+ All Categories
Home > Documents > 8051_ppt

8051_ppt

Date post: 27-Nov-2015
Category:
Upload: dubstepo
View: 16 times
Download: 0 times
Share this document with a friend
Description:
8051
32
System Design Example -1
Transcript

System Design

Example -1

Requirements

• Ocean parameter monitoring

• The system is made-up of two different systems-

▫ sea-floor observatory

▫ a swarm of floating drogues

• Data collected is transferred to a base-station on the ocean coast.

• Two different systems together do a complete 3D monitoring of the ocean column close to the coast

Specifications - drogue swarm

Drogue Swarm

Specifications Drogue

• Drogues are free-floating underwater devices that operate autonomously& collaborate thro’ an acoustic underwater network

• buoyancy controlled

• acoustically tracked

• equipped with sensors for data collection

• part of an ad hoc network for relaying data to surface stations for analysis

Specifications Drogue - Movement

• Buoyancy control allows the drogues to collect data from various depths in the ocean

• Propulsion is not needed as the drogues will be moving wit

• Buoyancy control is via CO2-pressurized neoprene bladder

• Stabilization of depth - via feedback - a servo-motor for small changes in buoyancy volume and compression/bleed valve for large changes in buoyancy

• Valve can be open/closed to varying degrees using stepper motor

Specifications Drogue – Commn &

Network • Data collected - transmitted acoustically using a

self-organizing UAN to basestation • Formation& Maintenance of UAN - network

protocol stack - resident in the flash memory- protocol stack is minimalistic

• Communication - acoustic modems at a maximum data rate of 4800 baud

• Communication Range is 250m • Acoustic modem is interfaced via UART

interface

Specifications – Drogue -Sensors

• Flourometers - for studies needing chlorophyll concentration data.

• Output Voltage 0-5.0 VDC

• Response Time 0.1 sec.

• Accuracy 0.02 µg/l

Specifications – Drogue Sensors

• Dissolved oxygen

• Measurement range 120% of surface saturation in all natural waters, fresh and salt

• Initial accuracy 2% of saturation

• Typical stability 0.5% per 1000 hours

• Output signal

▫ Option 1: 0 - 5 VDC

▫ Option 2:Frequency 4 -20KHz

Specifications-Drogue Sensor

• Salinity

▫ Output is analog varies between 4 – 20 mA output

• pH

▫ Output varies between 4 -20 mA

Specifications – Drogue Sensor

• Turbidity sensors

• Maximum Depth

▫ Stainless-Steel Body: 500 m

▫ Titanium Body: 1500 m

• Drift: less than 2% per year

• Maximum Data Rate: 10 Hz

• Optical power: 2000 µW

• Turbidity Accuracy: 2% of reading or 0.5 NTU

Specifications – Drogue Sensor

• 2.5 Output Option

▫ Output Voltage = 0 to 2.5 V over selected NTU range

▫ Supply Voltage = 5 to 15 Vdc

▫ Current Drain = 15 mA

• 5 Output Option

▫ Output Voltage = 0 to 5 V over selected NTU range

▫ Supply Voltage = 5 to 15 Vdc

▫ Current Drain = 15 mA

• 20 Output Option

▫ Output Voltage = 4 to 20 mA over selected NTU range

▫ Supply Voltage = 9 to 15 Vdc

▫ Current Drain = 45 mA

Depth Sensor

Buoyancy Control

Transceiver

Activate Sensors Timer

System Block Diagram

Protocol Stack

CPU

Memory

Commn Interface

Sensor

Buoyancy Control

Timer

Hardware Block Architecture

8051

• 8-bit CPU optimized for control applications

• Extensive Boolean processing

• 64K Program Memory address space

• 64K Data Memory address space

• 32 bidirectional & individually addressable I/0

• Two 16-bit timer/counters

• Full duplex UART

• 6-source/5-vector interrupt

• On-chip clock oscillator

VCC

VSS

ACC

TMP2 TMP1

ALU

PSW

SFR

Int,Serial and

Timer Blocks

SP

Inst R

eg

Tim

ing

&

Co

ntro

l

PSENALE EA RST

XTAL1 XTAL2

RAM ROM P0 Latch P2 Latch

PAR

Buffer

PC incr

PC

DPTR

Port 0 Port 2

P1 Latch P3 Latch

Port 1 Port 3

OSC

Port 0 Port 2

Port 3 Port 1

Commn Interface

• UART

• UART of 8051

▫ Mode 0

▫ Mode 1

▫ Mode 2

▫ Mode 3

Programming Serial I/f

SCON - $98

PCON - $87

FE/SM0 SM1 SM2 REN TB8 RB8 TI RI

SMOD1 SMOD0 - POF GF1 GF0 PD IDL

Framing Error Detection

• Provided for the three asynchronous modes

▫ Rx checks incoming data frame - valid stop bit

noise on the serial lines

from simultaneous transmission by two CPUs

• No valid stop bit - FE bit is set

• Once set- only s/w or reset can clear FE

• Subsequently rxed frames - valid stop bits cannot clear FE bit

Baud Rate

• Baud Rate Selection

▫ BDRCON

▫ BDRL

ADC 0808

IN0 IN1

IN2

IN3 IN4 IN5

IN6 IN7

Analog

I/ps

1.048 MHz CLK

DB0 –DB7

AD0

AD1

AD2 VREF+

VREF-

5V

0V

Vcc

GND

Supply

EOC

SOC

ALE

OE

EI0

P0

P2.0 P2.1 P2.2

P2.3

P2.4

P2.5

Servo motors

• Servo motors - electromechanical actuators

• Do not rotate continuously like DC/AC/ stepper motors

• Used to position & hold some object

• Used where continuous rotation is not

• Most common use is to position the rudder of aircrafts and boats

• Futaba S3003 Servo

Servo Motor Control

• RED Positive supply 4.8v to 6v

• BLACK GND

• WHITE Control Signal.

• Frequency 50 Hz

• Control using pulse width

▫ 0.388ms = 0 degree

▫ 1.264ms = 90 degrees (neutral position)

▫ 2.14ms = 180 degrees

Stepper Motor Control

• Allegro 5804 B – Translator + Driver

▫ Clock input maximum of 5 KHz - rotating the motor

▫ Translated into steps by the circuit available in the translator in the chip

▫ The direction of the steps either in clockwise/ anti-clockwise

▫ One Allegro 5804 chip can drive two stepper motors

Timer

• Data acquiring

• Data Communication

• Servo Motor

• Stepper Motor

Timer Function Enable

Tosc /12

Tx

Timer

EIx

0

1

C/T TMOD

TRx

TCON

or

TMOD

GATE

Timer- Modes of Operation

Mode 0

Mode 1

THx[8] TLx[5] 1 MHz Timer

Interrupt 3906.25 Hz 122.07 Hz

TFx

THx[8] TLx[8] 1 MHz Timer

Interrupt

3906.25 Hz 15.259 Hz

TFx

Timer- Modes of Operation

Mode 2

Mode 3

TLx[8] 1 MHz Timer Interrupt

3906.25 Hz

THx[8]

TFx

TL0[8] 1 MHz Timer Interrupt0

3906.25 Hz

TH0[8]

TF0

1 MHz

3906.25 Hz

TF1 Timer Interrupt1

Input Capture

n-bit Counter

Capture Reg

Edge Detector

CF

PT

EDGB:EDGA

Interrupt Logic CI

Interrupt Request

0005H

CLK

0005H

n-bit Counter 000AH

000AH

n-bit Counter

Output Compare

n-bit counter

n-bit comparator

Match Reg

CF PTx

Logic

OL0

OL1 PT

INT Logic

CI

Interrupt

CLK

Reset/Continue/Stop on Match

SPI

• Full-duplex, three-wire synchronous transfers

• Master or Slave operation

• Eight programmable Master clock rates

• Serial clock - programmable polarity & phase

• Master Mode fault error flag with MCU interrupt capability

• Write collision flag protection

0.0

0.7

1.0

1.1

1.2

1.3

1.4

1.5

1.6

1.7

2.0

2.1

2.2

2.3

2.4

2.5

2.6

2.7 0808

DB0 –DB7

CLK

SOC

ALE

OE

AD0

AD1

AD2

MISO

SCL

MOSI

3.0

3.1 Acoustic Modem

Servo Motor

EOC X1

X2 24M

supply 8051ED2

Stepper Motor

SPI