A+ Certification Notes

8/12/2019 A+ Certification Notes

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A+ certification Notes

*System unit:This is where processing takes place.

*Mouse:pointing device.

*Plug:part with some type on projection that goes intoport.

*Port:Part that has some type of matching holeor slotsthat accepts theplug.

*Jackis alternative to port. (Used more for Audio)

*Connector: either port (Jack) or Plug.

* Mini-DIN Connector: DIN stands for Deutsche Industry Norm which is replaced by Mini-

DIN, Mini-DIN sometimes refers to PS/2 connector Personal System 2 named by IBM 1987

when released, and it is used with keyboard, mouse, and ancient video cards.- Mini-Din contains 6 pins.

-Names: Mini-DIN, PS/2, DIN-6(in uses other than key board and mouse).

* USB: Universal Serial Bus, comes in many sizes A, B, Mini B, Micro B etc

- A: is the part that connects to USB port on the system unit.

- B: is the other end of the USB Cable

- USBis hot swappableand can provide powerto the devices connected to it.

* Firewire: IEEE 1394 and moves data at high speed, consists of 4, 6 and 9 wires for highspeeds, it is hot swappable. Examples: streaming video.

* DB Connectors: Have slight D-Shape, also known as D-Suband D-Shellconnectors by

CompTIA.

* RJ-11for phone jack and RJ-45for network connection.

*Audio Connectors: The most common type is 1/8 inch connector and also called Mini

Audio Connector.

* Card Types: Built incards and Add-on ExpansionCards, each expansion cardgoes

inside expansion slot.

* Monitors: VGAVideo Graphic Array, blue.

DVIDigital Versatile Interface, white.

HDMIHigh Definition Multimedia Interface.

S-Video


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* Heat Sink: Big slap of copperor Aluminumthat helps draw heat away from the

processor.

* ESD Electrostatic Discharge

* To prevent ESD you can use Antistatic wrist strap and Antistatic mat, they have tiny

resistors to prevent the flow of electricity, and these resistors can fail over time.

* You can touch the power supply once a while to keep yourself on the same electric

potential.

* EMIElectromagnetic Interference -keep magnets away

* RFIRadio Frequency Interference.

Chapter 4

* NTFSStarted with Windows NT.

* Windows XP Editions: Standard, Professional and Media center.

* Windows XP Pro VS Home:

-Domain joining.

-EFS.

-Multi-Processor.

-Remote Desktop.

-NTFS.

-Group Policy.* Other thanMedia CenterProgram, Windows XP Homeis Identicalto Media Center

edition.

* Windows Vista:

-Home Basic (XP Home)

-Home Premium (XP Media Center)

-Business (XP Security, NTFS and File sharing security)

-Ultimate (Game tweaks, DVD rip)

-Enterprise (EFS, Bitlocker, Multi CPU etc)

* Windows 7:-Starter: for lightweight laptops, it lacks the advanced media and graphic

capabilities of other windows 7 editions.

-Home Premium: Includes a lot of media functionality.

-Professional: Supports domain joining, XP mode, Remote desktop connection

etc.

-Ultimate: Advanced networking, backup and security tools.

-Enterprise: Purchased directly from Microsoft, Extra features.

* X86 vs X64:


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32-bit does not support Memory more than 4 GB.

X64 first showed up with Intel Itanium back in 2001, when Microsoft released X64 bit

it was running only on Intel Itanium Processors.

* AMD Advanced Micro Devices started to produce the Athlon 64 CPU, and then Intel

started to produce x64 bit processors.

* Windows 7 Starterdoes not come with x64 bit.

* Windows Vista Home Basicand Windows 7 Starterdont support Aero Desktop.

* Windows key + Tgive a small preview of the running apps on the taskbar.

* Windows key + Right Arrow fills the right half of the screen with the active window.

* Notification areaor System Trayis area that has the clock on the right side of the task

bar.

* Drag + CTRLCopy

* Drag + ShiftMove

* Viewing hidden and system filesenable them to show up in a search.

* F6Moves among selections in the current window.

* Shift+F10opens shortcut menu of the selected item (Same as Right click).

* ALT+SpaceDisplays the main windows system menu (Move, resize, restore, maximize,

Minimize).

* Windows Key + Pause/Breakopen system properties dialog box.

* System Root isC:\Windows%systemroot%to open system root from command

prompt.

* %SystemRoot%\SysWOW64:64-bit edition of windows store critical files here.

* Right Clickbrings context menu.

* Windows XP Homeand Windows XP Media Centereditions do notinclude the backup

utility; you must install it from the windows CD by running Valueadded\MSFT\NTBackup

* The Service option Delay startlets the service starts after Two minutesafter windows

startup.

* Backup status and configuration tool does not exist before Vista.


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Chapter 5Networking

Resourceis anything that once computer might share with another.

The goal of networking is to connect computers so that they can share resources oe

access other shared resources.

NICbreaks files into smaller data called frames to send across the network and

resembles the frames it receive into a whole files.

NICis called Network Interface Card when it is not built-in the motherboard expansion

card.

NICis called Network Interface Controller when it is built-in the motherboard.

MACMedia Access control, it is 48-bits long.

CRCCyclic Redundancy Check is a mathematical algorithm to check and verify the

data is received in good order; it comes at the end of the frame.

Ethernetis the dominating hardware protocol for networking.

All modern networks use Star Bustopology.

Segmentis a connection between a computer and switch, Ethernet segment are

limited to 100 meters or less.

Bandwidth is the maximum speed at which data can be transferred.

TIA/EIATelecommunication Industry Association/ Electronics Industry Alliance

established the UTP categories.

RJ-45Registered Jack.


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Chapter 6Microprocessor

Microprocessoris the Central Processing Unit CPU.

8088is first Intel CPU in 1970; it is 4.77 MHz (4.77 Million Cycles per second).

System Busis:

Control Bus The control bus carries the signals relating to the control and co-ordination

of the various activities across the computer, which can be sent from the control unit

within the CPU. Different architectures result in differing number of lines of wire within the

control bus, as each line is used to perform a specific task. For instance, different, specific

lines are used for each of read, write and reset requests.

Data Bus This is used for the exchange of data between the processor, memory and

peripherals, and is bi-directional so that it allows data flow in both directions along the

wires. Again, the number of wires used in the data bus (sometimes known as the 'width')can differ. Each wire is used for the transfer of signals corresponding to a single bit of

binary data. As such, a greater width allows greater amounts of data to be transferred at

the same time.

Address Bus The address bus contains the connections between the microprocessor

and memory that carry the signals relating to the addresses which the CPU is processing

at that time, such as the locations that the CPU is reading from or writing to. The width of

the address bus corresponds to the maximum addressing capacity of the bus, or the

largest address within memory that the bus can work with. The addresses are transferred

in binary format, with each line of the address bus carrying a single binary digit. Therefore

the maximum address capacity is equal to two to the power of the number of lines

present (2^lines).

EDBExternal Data Bus is the connection between the CPU, Northbridge, Southbridge

and all peripherals.

Address Busis an internal channel from the CPUto memoryacross which the addresses

of data (not the data) are transmitted.

Machine language commands = Lines of codes.

Clock WireCLK tells the CPU that another piece of information is waiting to be

processed.

The CPU processes a command placed on the External Data Bus by applying a

minimum voltage to the CLK wire.


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A single chargeto the Clock Wireis called Clock Cycle.

Clock Speedis the maximum number of Clock Cycles that the CPU can handle in a

given period of time; it is the fastest speed CPU can operate.

System Crystal determines the speed which CPU and the rest of PC can operate.

System Crystal is Quartz Oscillator.

1 Hertz = 1 Cycle per second.

1 MHz = 1 Million Cycles per second.

1 GHz = 1 Billion Cycles per second.

Hard Disks cant give the data to the CPU fast enough as it calculates billions of lines per

second, memory takes copies of the programs or lines from the hard disk and send them

to the CPU. Memory is fast.

The IFstatement is called branchby CPU makers.

RAM stores and transfer data to the CPU in bytessize chunks.

CPU can access any part of the RAM fast and easy as other parts, this is why it is called

Random Access MemoryRAM.

Computers use Dynamic RAM DRAM for the main system memory, data on this RAM

will be lost without constant Electric chargeand periodic refresh.

The CPU use a chip called Memory Controller Chip to look at any row in the RAM, the

MCC retrieves data rows from the RAM and place it on the EDB.

The CPUuses the Address Bus to tell the MMC which line of code it needs, the address

bus is a set of wires between the CPUand MMC.


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The CPU tells the MCC which of line RAM it wants by turning the wires in the address bus

onand offin different patterns.

32-bit address bus indicates 32 physical wiresbetween the CPUand MCC.

1 wire in the address bus = 2^1 = 2 different combination on and off

2 wires = 22= 4

20 wires = 220= 1,048,576 combinations

The number of lines (wires) in the address bus determines the amount of memory that

can be directly addressed as each line carries one bit of the address. For example, a 20-

line address bus (220) represents the binary number 1,048,576 which means 1 GB of

Memory can be addressed.

A computer with a 32-bit address bus can directly address 4GB (232) of physical

memory, while one with 36 bits (236) can address 64GB.

To calculate the maximum transfer speed of the bus:

Max transfer speed = Bus width (in bits) * Bus Frequency

Example:

16-bit * 133.106= 2128*106bit/s, (16 * 133,000,000 = 2128,000,000)

or 2128*106/8 = 266*106bytes/s (2128,000,000 / 8 = 266,000,000)

or 266*106/1000 = 266*103KB/s (266,000,000 / 1000 = 266,000)

or 259.7*103/1000 = 266 MB/s (266,000 / 1000 = 266)

Note: 106 = 1,000,000

Binary counting:

0, 1, 10, 11, 100, 101, 110, 1000 etc

210 = 1024 = 1 Kilobyte

220= 1,048,576 = 1 Megabyte

230= 1,073,741,824 = 1 Gigabyte

240= 1,009,511,627,776 = 1 Terabyte

1 Kb = Kilobit

1 KB = Kilobyte

Intel and AMD reuse model names for new products.

Budget CPUs are not for older CPU, but for low end of current versions.

2008 Intel released Core I7, 2011 Intel released Sandy Bridge version of I7.

Mobile devices need to consume less battery and produce less heat.


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Dynamic frequency scaling(also known as CPU throttling) is a technique in computer

architecture whereby the frequency of a microprocessor can be automatically adjusted

"on the fly," either to conserve power or to reduce the amount of heat generated by the

chip.

SpeedStepis a series of dynamic frequency scaling technologies built into some Intel

microprocessors that allow the clock speed of the processor to be dynamically changed

(to different P-states a voltage and frequency operating point) by software. This allows

the processor to meet the instantaneous performance needs of the operation being

performed, while minimizing power draw and heat generation.

Multiplier, CPUmultiplier, clockratio, clockmultiplier, CPUCoreRatiois the speed ratio

between the CPU and the FSB. For example, a CPU with a multiplier of 18 and a clock of

133 MHz will have internal CPU speed of 2.4 GHz.

Clock Multiplierthe CPU has an external clock, which is used when transferring data to

and from the RAM memory FSB (using the north bridge chip), and a higher internal clock.

To give a real example, on a 2.4 GHz Intel Core i5, this 2.4 GHz refers to the CPU internal

clock, which is obtained multiplying by 18 its 133 MHz external clock.

The CPU has to reduce its speed by 18x when it has to read data from RAM memory!

During this process, it works as if it were a 133 MHz CPU!


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AMD CPUs transfer two data per clock cycle Double Data Rate (DDR); Intel CPUs

transfer four data per clock cycle Quad Data Rate (QDR).

AMD CPU with a 200 MHz external clock is listed as 400 MHz. The same happens with

Intel CPUs: an Intel CPU with a 200 MHz external clock is listed as having an 800 MHz

external clock.

Front-side bus (FSB)is a computer communication interface (bus) that carries data

between the central processing unit (CPU) and a memory controller hub, known as the

Northbridge.

Originally CPUs ran at the speed of the bus (before multipliers).

Early clock multiplying systems could be manually configured via: Jumpers, DIPDualin-

linepackageswitches on mother boards.

Nowadays CPUIDconfigure the speedand multiplierautomatically.

64-bit Address Bus = 264bytes of memory which equals 16 Exabyte of RAM support.

Virtualizationis the process running more than one operating system at a time by

separating the logical desktops from the physicals machines.

Hardware-basedvirtualizationsolved the burden that programmers had to write code

to enable CPU designed to run one OS at a time; to run more than OS at a time.

Pipeliningis a technique to increase CPU instruction throughput (the number of

instructions that can be executed in a unit of time). Pipelining does not reduce the time

to complete an instruction, but increases instruction throughput by performing multiple

operations in parallel.


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Superscalar (Parallel execution)is CPU architecture implements a form of parallelism

within a single processor. It allows faster CPU throughput than would otherwise be possible

at a given clock rate. A superscalar processor executes more than one instruction during

a clock cycle by simultaneously dispatching multiple instructions to redundant functional

units on the processor (multiple execution subunits able to do the same thing in parallel

such as many fetch, decode, execute etc. subunits)

With Superscalar the CPU can process multiple commands or parts of command in

parallel in the same time.

Without Parallel execution the CPU has to finish command in hand before executing the

next command; this require at least 4 clock cycles, on each cycle 3 of the 4 circuits will

be idle.

Pipeline stallsare a complex command that requires more than one clock cycle forcing

pipelining to stop.

Floating point unitis a complex numbers cause the CPU to take many clock cycles to

execute.

Threadsare series of instructions that tells the computer what to do, threads exist as

subsets of a process.

Wait statesare pipeline stalls due to the CPU runs faster than the RAM can supply it with

code.

MultithreadingCPUs have hardware support to efficiently execute multiple threads at

the same time. These are distinguished from multiprocessing systems (such as multi-core

systems) in that the threads have to share the resources of a single core; the computing

units, the CPU caches and the translation lookaside buffer (TLB).

Multithreading runs multiple threads at the same time turning the CPU into two CPUs on

one chip but with limitations:

1-

OS and Apps has to support the feature

2-

It doesnt double the processing power as the main execution resources are not

duplicated.

Multiprocessingsystems include multiple CPUs, multithreading aims to increase utilization

of a single core by using thread-level as well as instruction-level parallelism. As the two


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techniques are complementary, they are sometimes combined in systems with multiple

multithreading CPUs and in CPUs with multiple multithreading cores.

Multi-core processoris a single computing component with two or more independent

actual central processing units (called "cores"), which are the units that read and execute

program instructions.[1] The instructions are ordinary CPU instructions such as add, move

data, and branch, but the multiple cores can run multiple instructions at the same time,

increasing overall speed for programs amenable to parallel computing.[2] Manufacturers

typically integrate the cores onto a single integrated circuit die (known as a chip

multiprocessor or CMP), or onto multiple dies in a single chip package.

Static RAM SRAM is a very high speed RAM comes with the CPU which preloads as

many instructions as possible and keep copies of already running instructions and data in

case the CPU require them again. SRAM = CPU Cache L1, L2, L3 caches.

The CPU access L1 cache first then L2 cache if it didnt find the information it requires in

the L1 cache.

L1 cache is faster than L2 cache.

Front Side Bus FSBis a computer communication interface (bus) that typically carries

data between the central processing unit (CPU) and a memory controller hub, known as

the Northbridge.

Northbridgetypically handles communications among the CPU, in some cases RAM,

and PCI Express (or AGP) video cards, and the Southbridge.

Back-side Busused to connect the CPU to CPU cache memory, usually L2.

In newer CPUs the L1and L2caches are integratedinside the CPU.

Pentium 4 first to come with Hyper-threading technology.

After Pentium 4, Hyper-threading technology back again with Core i7 in 2011.

Dual-coreis combining two CPUs Cores into a single chip, the two sets of pipelines

share the cache and RAM.

Cache is:

L1 and L2 cache, L1 cache is divided into:

-

D-Cache for data and is 32 KB

-

I-Cache for Instructions and is 32KB


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Integrated Memory Controller IMCoptimizes the flowof information inand outfrom the

CPU; enabling faster control over L3 Cache shared among multiple cores.

The modern models of IMC become integrated into the CPU.

AMD based sockets

Intel based sockets

Land grid array (LGA)The underside of the CPU has hundreds of contact points that line

up with socket pins, the pins are on the motherboard not the CPU.

Intel is LGA, so pins are on the CPU chip.

AMD CPU pins are located on the motherboard.

Zero insertion force ZIF.


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Thermal Compound is a paste applied between the processor and the heat sink to

transfer the heat from the CPU to the heat sink.

Overclocking is running the system at a clock speed higher than the CPU clock speed. It

is done through jumpers, CMOS settings or software configuration, increasing the voltage

is also one of the overclocking procedures.

The CPUIDfunction sets automatically the speedmultiplierand voltage.

Before overclocking, first find the CMOS clear jumper that makes the CMOS back to the

default settings, in case you did something wrong.

Intel Atom processors manufactured using 45-nanometer process; they also come fixed

to the motherboard.

Processor I/Oin the past CPUs was controlling data transfer between the Hard Disks and

RAM, the CPU then would be busy until data is transferred from the Hard disk to the RAM,

this slowed down the system.

DMAis data transfer between the hard drive and RAM without using the CPU.

Intel Core i3 2.4 Ghz refers to the CPU internal clock.


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Chapter 7RAM

DRAM Dynamic Randon Access Memory

When you load a program, your pc copies the program from the mass storage device

into the RAM and runs it.

RAM is like spreadsheet, each row is numbered, each cell contains one or zero and

each cell is a special type of semiconductor which holds a single bit.

Techs describe chips by bits rather than by bytes.

One chip can hold 8-bits wide while other is 16-bits.

x8 = 8-bits wide x16 = 12-bits wide

8088 = 8-bits FSB, 8086 = 16-bits FSB, 80386 = 32-bits FSB.

Modern CPUs have at least 64-bit FSB, between CPU and MCC.

Modern DRAM sticks came in 32-bit and 64-bit, this is the width of the DRAM module not

the DRAM chip.

RAM types:

Dynamic random-access memory (DRAM)is a type of random-

access memory that stores each bit of data in a separate

capacitor within an integrated circuit. The capacitor can be

either charged or discharged; these two states are taken to

represent the two values of a bit, conventionally called 0 and 1.

The capacitors will slowly discharge, and the information

eventually fades unless the capacitor charge is refreshed periodically. Because of this

refresh requirement, it is a dynamic memory as opposed to SRAM and other static.


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The advantage of DRAM is its structural simplicity: only one transistor and a capacitor are

required per bit, compared to four or six transistors in SRAM.


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SIPP or single in-line pin packagea type of random

access memory which consists of a small printed circuit

board upon which were mounted a number of memory

chips. It had 30 pins along one edge which mated with

matching holes in the motherboard of the computer.

This type of memory was used in 80286 and some 80386

systems. It was later replaced by SIMMs, which proved to

be easier to install.

30-pin SIPP modules were pin compatible with 30-pin SIMM modules explaining why

some SIPP modules were in fact SIMM modules with pins soldered onto the connectors.

SIMM, or single in-line memory module, is a type of

memory module containing random access memory used

in computers from the early 1980s to the late 1990s. It

differs from a dual in-line memory module (DIMM), the

most predominant form of memory module today, in that

the contacts on a SIMM are redundant on both sides of the module.

30-pin (top) and 72-pin (bottom) SIMMs. Early 30-pin modules commonly had either 256

KB or 1 MB of memory.

DIMM or dual in-line memory modulecomprises

a series of dynamic random-access memory

integrated circuits. These modules are mounted

on a printed circuit board and designed for use in

personal computers, workstations and servers.

DIMMs began to replace SIMMs (single in-line

memory modules) as the predominant type of memory module as Intel P5-based Pentium

processors began to gain market share.


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While the contacts on SIMMs on both sides are redundant, DIMMs have separate

electrical contacts on each side of the module. Another difference is that standard

SIMMs has a 32-bit data path, while standard DIMMs have a 64-bit data path.

Synchronous dynamic random access memory (SDRAM)is dynamic random access

memory (DRAM) that is synchronized with the system bus. Classic DRAM has an

asynchronous interface, which means that it responds as quickly as possible to changes in

control inputs. SDRAM has a synchronous interface, meaning that it waits for a clock

signal before responding to control inputs and is therefore synchronized with the

computer's system bus. The clock is used to drive an internal finite state machine that

pipelines incoming commands.

The data storage area is divided into several banks, allowing the chip to work on several

memory access commands at a time, interleaved among the separate banks. This allows

higher data access rates than an asynchronous DRAM.


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Pipelining means that the chip can accept a new command before it has finished

processing the previous one. In a pipelined write, the write command can be

immediately followed by another command, without waiting for the data to be written to

the memory array. In a pipelined read, the requested data appears after a fixed number

of clock cycles after the read command (latency), clock cycles during which additional

commands can be sent. (This delay is called the latency and is an important

performance parameter to consider when purchasing SDRAM for a computer.)

SDRAM is widely used in computers; from the original SDRAM, further generations of DDR

(or DDR1) and then DDR2 and DDR3 have entered the mass market, with DDR4 currently

being designed and anticipated to be available in 2014.

The most common types of DIMMs are:

-

72-pin SO-DIMM (not the same as a 72-pin SIMM.

-

100-pin DIMM, used for printer SDRAM

-

144-pin SO-DIMM, used for SDR SDRAM

-

168-pin DIMM, used for SDR SDRAM (less frequently for FPM/EDO DRAM in

workstations/servers, may be 3.3 or 5 V)

- 172-pin MicroDIMM, used for DDR SDRAM

- 184-pin DIMM, used for DDR SDRAM

-

200-pin SO-DIMM, used for DDR SDRAM and DDR2 SDRAM

-

204-pin SO-DIMM, used for DDR3 SDRAM

-

214-pin MicroDIMM, used for DDR2 SDRAM

-

240-pin DIMM, used for DDR2 SDRAM, DDR3 SDRAM and FB-DIMM DRAM

- 244-pin MiniDIMM, used for DDR2 SDRAM

Direct Rambus DRAM or DRDRAM(sometimes just called Rambus DRAM or RDRAM) is a

type of synchronous dynamic RAM. RDRAM was developed by Rambus inc., in the mid-

1990s as a replacement for then-prevalent DIMM SDRAM memory architecture.


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RDRAM was initially expected to become the standard in PC memory, especially after

Intel agreed to license the Rambus technology for use with its future chipsets. Further,

RDRAM was expected to become a standard for VRAM. However, RDRAM got embroiled

in a standards war with an alternative technology - DDR SDRAM, quickly losing out on

grounds of price, and, later on, performance. By the early 2000s, RDRAM was no longer

supported by any mainstream computing architecture.

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