A Flicker Noise/IM3 Cancellation Technique for Active Mixer Using Negative Impedance

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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 48, NO. 10, OCTOBER 2013 1

A Flicker Noise/IM3 Cancellation Technique forActive Mixer Using Negative Impedance

Wei Cheng, Anne Johan Annema, Member, IEEE, Gerard J. M. Wienk, and Bram Nauta, Fellow, IEEE

Abstract—This paper presents an approach to simultaneouslycancel flicker noise and IM3 in Gilbert-type mixers, utilizingnegative impedances. For proof of concept, two prototypedouble-balanced mixers in 0.16- m CMOS are fabricated. Thefirst demonstration mixer chip was optimized for full IM3 cancel-lation and partial flicker noise cancellation; this chip achieves 9-dBflicker noise suppression, improvements of 10 dB for IIP3, 5 dB forconversion gain, and 1 dB for input while the thermal noiseincreased by 0.1 dB. The negative impedance increases the powerconsumption for the mixer by 16% and increases the die area by8% (46 28 m ). A second demonstration mixer chip aims atfull flicker noise cancellation and partial IM3 cancellation, whileoperating on a low supply voltage ; in this chip,the negative impedance increases the power consumption by 7.3%and increases the die area by 7% (50 20 m ). For one chipsample, measurements show 10-dB flicker noise suppressionwithin 200% variation of the negative impedance bias current;for ten randomly selected chip samples, 11-dB flicker noisesuppression is measured.

Index Terms—Active mixer, CMOS, direct conversion, distor-tion cancellation, flicker noise, IIP3, IM3, linearity, narrowband,noise cancellation, receiver.

I. INTRODUCTION

C MOS active mixers have high gain but also suffer fromhigh flicker noise as well as from low linearity. While

high flicker noise causes serious sensitivity degradation espe-cially in narrowband direct-conversion receivers, mixers withpoor linearity limit the dynamic range of the receiver.Three major techniques have been presented for flicker noise

reduction in CMOS active mixers, given here.1) Dynamic current injection [1], [2]: a pMOS cross-coupledpair injects current into the NMOS mixer transconductorstage only at the switching on/off instants (at 0.5 T ) insuch a way that no dc current flows through the switchesthen. This is reported to suppress the flicker noise leakagefrom the switching pair.

2) Double LO switch pairs [3]: extra switches in series drivenat 2LO frequency are used in such a way that, during theswitching period, little dc current flows through the majorswitches that are driven by LO signal, thereby reducingflicker noise leakage.

Manuscript received February 19, 2012; revised September 27, 2012; ac-cepted April 15, 2013. This paper was approved by Associate Editor JacquesC. Rudell.W. Cheng was with the IC-Design Group, University of Twente, 7522 NH

Enschede, The Netherlands. He is now with Qualcomm, San Diego, CA 92121USA (e-mail: [email protected]).A. J. Annema, G. J. M. Wienk, and B. Nauta are with the IC-Design Group,

Center for Telematics and Information Technology, University of Twente, 7500AE Enschede, The Netherlands (email: [email protected]).Digital Object Identifier 10.1109/JSSC.2013.2272339

3) RF leakageless static current bleeding with two resonatinginductors [4]. Two inductors are connected between themixer transconductor stage and the current bleeding cir-cuit. The inductors resonate out the tail capacitance andreduce the RF signal leakage to the current bleeding cir-cuit.

In Technique 1), a large LO swing and large headroom is re-quired, increasing the LO power and decreasing the conversiongain due to the use of small [1]. Technique 2) needs astack of three transistors plus the load, which is not suitablefor deep-submicrometer technologies with low supply voltages.Technique 3) needs two inductors which consume significantdie area. Common to all of the techniques in [1]–[4] is thatthe effect of the transistor output resistance on the flicker noiseleakage is neglected.In technologies with long-channel transistors where the

output capacitance of transistors is dominant in the transis-tors’ output impedance at RF frequencies, the effect of outputresistance on flicker noise leakage can be neglected [1]–[4].However, nowadays CMOS technologies offer transistors withwell above 100 GHz, at the same time with lower transistor

output resistance and lower supply voltage [5]. Neglecting theeffect of output resistance in deep-submicrometer technologiescan yield a significant underestimation of the output flickernoise [7]. Taking into account the effect of both output resis-tance and output capacitance on flicker noise leakage, in thispaper, we propose a combined flicker noise/IM3 cancellationtechnique that uses a negative impedance to minimize theflicker noise leakage from the switching pair and to simulta-neously improve the linearity. Section II presents the circuittheory behind this flicker noise/IM3 cancellation technique.Sections III and IV show a circuit implementation and the mea-surement and simulation results. The results are summarized inSection V.

II. FLICKER NOISE/IM3 CANCELLATION USINGA NEGATIVE IMPEDANCE

A. Flicker Noise Leakage in Gilbert Mixers

The double-balanced Gilbert mixer shown in Fig. 1(a) iswidely used as the active downconverter in CMOS receivers.Transistors convert into current that is com-muting via switch pair and , respectively.The flicker noise output of the Gilbert mixer, , is dom-inated by the switch pair , while transistor causesthermal noise folding [6], [7]. Assuming perfect symmetryin the mixer, the flicker noise leakage mechanism from eachswitch is the same: it is hence sufficient to focus on flickernoise leakage from one of the switch pair transistors. In [7], thetime-varying small-signal model shown in Fig. 1(b) is used to

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2 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 48, NO. 10, OCTOBER 2013

Fig. 1. (a) Schematic and (b) time-varying noise model of the double-balanced Gilbert mixer.

Fig. 2. (a) Waveform of the LO signal. (b), (c) Approximation of the real andimaginary parts of , respectively.

analyze the flicker noise contributed by in one LO periodat the mixer output . The flicker noise of ismodeled by the equivalent gate-referred root mean square (rms)noise voltage . For a first-order approximation of , afew assumptions are made and are given here.• The LO signal is modeled by a trapezoid shown in Fig. 2(a)with a rise/fall time (e.g., - ) equal to .

• In and are off, while in andare off.

Taking into account the transconductance of and ,and the output admittance of ,the flicker noise contribution of at and inFig. 2(a) are given by

(1)

(2)

(3)

In and form a cascode amplifier. Due to thefinite output impedance of in deep- submicrometer CMOS,the noise contribution from the cascode transistor , given by(1), cannot be neglected. In both and are on,

while at and act as a balanced differentialpair. In this period of time, the output impedance of has anegligibly small effect on as shown by (2). Inis assumed to be off, thus is zero. Note that the integral(or area) of shown in Fig. 2(b) and (c) corresponds tothe flicker noise leakage that involves no frequency translation[7]. As a result, the flicker noise at the mixer output contributedby and is

(4)

For the symmetrical LO signal shown in Fig. 2(a), with a rise/fall time equal to , the time instants , and canbe rewritten as

. This enables rewriting (4) into

(5)

B. Negative Impedance for Flicker Noise Cancellation

To minimize the integral of in (4)—hence, to mini-mize the flicker noise leakage—we apply a negative impedance

between the drain of and , asshown in Fig. 3. Using the model shown in Fig. 3(b), this yieldsa different for the time interval - as

(6)

(7)

(8)


CHENG et al.: FLICKER NOISE/IM3 CANCELLATION TECHNIQUE FOR ACTIVE MIXER USING NEGATIVE IMPEDANCE 3

Fig. 3. (a) Schematic and (b) time-varying noise model for the mixer with a negative impedance for flicker noise cancellation.

Fig. 4. (a) Waveform of the LO signal. (b), (c) Approximation of the realand imaginary parts of , respectively, using a negative impedance forflicker noise cancellation.

Equation (6) shows that for andthe sign of the real part

of changes from negative to positive (a detailed deriva-tion is presented in the Appendix). At the negativeimpedance has no effect on as shown in (7) sinceand act as a balanced differential pair. Inis off, thus is zero. Now the new approximated wave-form of is shown in Fig. 4(b). The negative impedance

changes the real part of in from negativeto positive value, which enables minimization of the area of

in one LO period. This leads to the cancellation of theflicker noise leakage from the switching pair ( and

). For a complete flicker noise leakage cancellation,(5) equates to zero. Together with (6)–(7), this equation givesthe condition for complete flicker noise leakage cancellation:

(9)

Fig. 5. (a) Time-varying linear model for calculating the voltage gain of themixer with a negative impedance for flicker noise cancellation. (b) Approxima-tion for the instantaneous voltage gain .

Note that for complete cancellation across process and temper-ature spread, should track the variation of the sum ofand and should track .

C. Negative-Impedance Impact on Gain and Thermal Noise

It was derived in [7] that the first-order Fourier coefficient ofthe instantaneous voltage gain in one LOperiod corresponds to the conversion gain of a mixer. Using themodel shown in Fig. 5(a), a sufficiently accurate approximationof is given in Fig. 5(b) with

(10)

(11)

(12)

At are off and and(see Fig. 3(a)) forms a differential cascode common-sourceamplifier. At are off and and

form a differential cascode common-source ampli-fier. At and are on and there



Fig. 6. Time-varying noise model for calculating the thermal noise of the mixerwith a negative impedance.

is no output due to the differential symmetry. This yields thevoltage conversion gain

(13)

Equation (13) shows that the conversion gain is in-creased under partial flicker noise cancelling condi-tion ( and

). The reason for this increase is thatincreases the output impedance for the gm stage and as a resultmore RF signal current flows to the load .Fig. 6 shows the noise model for the mixer, where two

noncorrelated noise current and model the noise of. Note that the noise of the negative impedance contributes

to the mixer output by the same transfer function as the noiseof . Therefore, only contributes to thermalnoise while no flicker noise leaks to the output for a symmetricmixer. As a result, the mixer thermal noise is dominantly con-tributed by the thermal-noise folding of

, the load , the input source impedance ,and the negative impedance . Assuming perfect inputmatching, the single-side-band noise figure (NF) for high IF(thermal noise dominated) is then given by (14), shown at thebottom of the page, where the five terms respectively accountfor the thermal noise from the transconductor stage ,the thermal noise from the switching stage ( and

), the thermal noise from the input source impedance, the thermal noise from the negative impedance, and the

thermal noise from the load. Although the extra noise byincreases the thermal noise NF, due to the increased conversiongain (larger ), the input-referred noise due to the load

Fig. 7. Circuit model for the mixer distortion analysis.

is decreased. As a result, the thermal noise increase dueto can be small.

D. Negative Impedance for IM3 Distortion Cancellation

It is shown in [7] that the IM3 of the time-varying mixer canbe estimated by one time-invariant IM3 calculation at the max-imum of the LO signal. The circuit model shown in Fig. 7 is nowused to demonstrate the concept of using negative impedancefor IM3 cancellation. When the LO signal reaches its positivemaximum at are fully on and are fullyoff. The IM3 distortion current and aregenerated by the voltage swing across the transistor terminals.Given the differential circuit topology we can assume

and . For a first-orderapproximation, only the transconductance of and ,and the output admittance of are taken into account, whichyields

(15)

(16)

(17)

(14)



Fig. 8. Simulated and calculated (a) NF at 1 Hz and (b) IIP3 as a function of the negative resistance for the mixer shown in Fig. 3(a) at an LO of 0.9 GHz.

Equation (16) and (17) describe the fact that via transistor non-linearity (denoted by the function ) the distortion current of atransistor is due to both the voltage swing across its gate–sourceand to its drain–source voltage swing (assuming the distortionrelated to the bulk-source voltage swing is insignificant).For and

, the following is true.• Equations (16)–(17) show that the gate–source anddrain–source voltage swing, respectively, for and

have the same polarity. Thus, and have thesame polarity, given that both and are biased inthe saturation region.

• Equation (15) shows that the gain factor for distortion cur-rents and have opposite signs. This enables can-cellation of the distortion contributions caused by and

.Equating (15) to zero gives that for a complete IM3 cancellation

(18)

Under partial IM3 cancelling condition (and ),

the distortion current polarity of each transistor withinthe mixer remains unchanged. For the switching stage( and ), the negative impedance changesthe amplifying factor of their distortion current from negativeto positive. This enables the IM3 cancellation between thetransconductor stage and the switching stage( and ). As the IM3 cancellation dependson the scaling and subtraction of distortion currents of theswitching stage and stage, we use Monte Carlo simulationsto evaluate its sensitivity over device mismatches and processspread; the results are shown in Section IV.A.

E. Simulation Verification

To illustrate the validity of the proposed theory of flickernoise and IM3 cancellation, in this section we show some sim-ulation results for the mixer shown in Fig. 3(a) using an idealnegative resistance and an ideal negative capacitance in par-allel to implement . The bias and dimension condition forthis mixer is the same as one (MixerD) that will be discussed in

Fig. 9. Schematic of the mixer with a negative impedance .

Section III. In simulations, for 0.9-GHz LO, we sweep the neg-ative resistance while using a capacitance of 80 fF.Both simulated and calculated [using (5)–(8)] DSB NF in

Fig. 8(a) clearly show that either complete or partial cancella-tion of flicker noise can be achieved by using an ideal .The sweet spot for complete flicker noise cancellation is bynature sensitive to device mismatch and PVT variations, illus-trated by the notch around the optimum 950. Partialflicker noise cancellation is less sensitive to device mismatchand PVT variations: for this example, within % variationof at the NF notch more than 20 dB flicker cancellationis achieved. Due to some circuit analysis simplification in de-riving (9), the optimal for complete flicker noise accordingto (9) is somewhat different than actual (following from sim-ulations) value. Fig. 8(b) shows similar results for distortioncancellation, illustrating that IM3 distortion cancellation can beachieved using a properly designed and illustrating that(15)–(18) provide a good prediction for the actual (simulated)IM3 distortion cancellation.

F. Summary

It can be concluded that a negative impedance (and )

reduces the flicker noise leakage from the switching stage( and ) by averaging out the flicker noise



Fig. 10. Simulated (a) IIP3 and (b) DSB NF at 1 kHz as a function of LO frequency for MixerD with and without using the negative impedance. MixerD isdesigned for full IM3 cancellation and partial flicker noise cancellation at 0.9-GHz LO.

leakage transfer function. Note that this is very similar toflicker noise suppression in chopper amplifiers [8]. Using anegative impedance, also the conversion gain is increasedwhile the thermal noise may be slightly degraded. For a perfectsymmetric mixer no flicker noise will be introduced by thenegative impedance.Using negative impedance in the specified range also en-

ables partial IM3 cancellation between the transconductorstage and the switching stage ( and

). The exact optimum of is in general a littledifferent for complete flicker noise cancellation and completeIM3 cancellation. Hence, can be designed for either fullflicker noise/partial IM3 cancellation or full IM3/partial flickernoise cancellation.

III. CIRCUIT IMPLEMENTATION

A. Circuit Implementation of the Negative Impedance

To prove this flicker noise/IM3 cancellation concept, thecircuit shown in Fig. 9 is implemented in a standard 0.16- mCMOS process. The negative impedance is implemented bythe cross-coupled pair with source degenerationprovided by capacitor and current source [9],[10]. The pMOS-based negative impedance enables dc currentreuse of the negative impedance by the mixer’s transconductorstage. As a first-order estimation, the value of the negativeimpedance—taking only the transconductance of andand the output impedance of into account—is

(19)

Assuming , and denoting, then for (19) reduces to

(20)

Equation (20) shows that the for either full flicker noisecancellation or full IM3 cancellation can be obtained by settinga suitable value both for the transconductance of and forthe degeneration capacitance . For minimal chip area, twoanti-parallel poly-diffusion capacitors are used for insteadof a fringe capacitor.Equation (20) also shows that the implemented is

frequency dependent: the negative conductance hasa high-pass characteristic while the negative capacitance

presents a low-pass behavior. Consequently, using this-circuit the optimization for either flicker noise cancella-

tion or for IM3 cancellation is frequency-dependent. In order todemonstrate the effect of the frequency-dependency of thecircuit, Fig. 10 shows simulation results for one of the designedmixer circuits in Section III: MixerD, which is designed forfull IM3 cancellation and partial flicker noise cancellation at0.9 GHz. Design details of MixerD is shown in Section III-B.Fig. 10(a) shows IIP3 as a function of the LO frequency,

swept from 0.1 to 2 GHz. The IIP3 peak around 0.9 GHz showsthat circuit is optimized for this frequency. For higherfrequencies, the IM3 cancellation degrades, mainly due to theless negative capacitance provided by the circuit with in-creasing frequency. As a result, the phase difference betweenthe distortion currents of the switching stage and of the gm stagethen deviates from 180 degrees. For LO frequencies lower than0.8 GHz, the distortion cancellation remain effective since par-asitics has less effect. Fig. 10(b) shows that the circuitachieves a completeflicker noise cancellation at around 0.2 GHzand that only partial flicker noise cancellation is achieved athigher frequencies.In summary, the and provided by our circuit

is frequency-dependent. As a result, a complete IM3 distortionor a complete flicker noise cancellation provided by the circuitimplementation shown in Fig. 8 is narrowband. Tuning the biasof the circuit and using tunable capacitors for Cs, a tunablenegative impedance can be provided by the circuit for var-ious frequencies which may enable complete IM3 distortion orcomplete flicker noise cancellation for multiband applications.However, this is not implemented in this paper.

B. Two Prototype Chips

Our active mixer circuits use load ressitors . It isfrequently assumed that a poly-silicon resistor has negligible



Fig. 11. Simulated output noise of the mixer using poly-silicon resistor and metal resistor as , respectively.

TABLE IMAIN DESIGN PARAMETERS FOR TWO PROTOTYPE CHIPS (MIXERD AND MIXERNF)

Fig. 12. Two mixers for flicker noise reduction. (a) Dynamic bleeding [1]. (b) Dynamic bleeding with an inductor [2].

Fig. 13. Chip photograph of (a) MixerD and (b) MixerNF.

flicker noise [1], [6] which assumption is valid for manyconventional circuits. However, in this paper the aim is atvery low flicker noise mixers. The work in [11] shows that thetraps at the silicon grain boundaries in the poly-silicon causesome flicker noise, resulting in a flicker noise current given by

, where is a constant includingtechnology-dependent data and temperature, is the dc currentthrough the resistor, and and are the resistor width andlength, respectively. Simulation results in Fig. 11 show that,without mismatch and with metal resistors, the mixer noiseoutput only contains thermal noise (denoted by “Nominal mixernoise with MetalRload”). Including mismatch and with metalresistors, the mixer flicker noise frequency corner is below1 kHz. Using poly resistors, even in the nominal case withoutany mismatch, the flicker noise of the poly-silicon resistor isdominant compared to the mixer thermal noise unless largesilicon area (larger than 2100 m ) is used. Therefore, in ourdesign, a serpentine metal resistor consisting four stacked metal



Fig. 14. IIP3, NF, conversion gain, input and dc current taken by the mixer as a function of the normalized bias current of for MixerD. Solid line forsimulated results and symbol for measured results of the mixer with . Dashed line for measured results of the mixer without .

Fig. 15. Measured fundamental and IM3 output versus input power forMixerD.

layers (M1-M4) with a total area of 370 um is used to be ableto prove our concept properly.Using the topology shown in Fig. 9, we designed two chips.

One (MixerD) is optimized for full IM3 cancellation and partialflicker noise cancellation using the process’s nominal supplyvoltage ( 1.8 V). To show the robustness ofthe proposed flicker noise cancellation technique under theconstraint of low supply voltage, a second chip (MixerNF) isoptimized for full flicker noise cancellation and partial IM3cancellation using (1.2 V). The main designparameters of both circuits are listed in Table I. Since flickernoise is mainly a problem for narrowband system, the twomixer chips are designed for 0.9 GHz. Two off-chip balunsare used to generate the differential RF input and differential

Fig. 16. Measured DSB NF for mixer (MixerD) with and without using .

clock, respectively. The external differential clock signal andan on-chip LO buffer provides the LO for mixer.

C. Comparison With Other Techniques

Due to the similar topology appearance, our mixer in Fig. 9 iscompared with previous techniques of flicker noise reduction.In [1], the cross-coupled pair shown in Fig. 12(a)provides a dynamic current into the transconductor stage at theLO zero-crossings (at ). As a result, at ,the current through the switching pair and the transconduc-tance of the switching pair is reduced. This enables a smaller

in (5) and consequently yields flicker noisereduction. The cross-coupled pair turns on onlyaround and remains off during the remainder ofthe LO period, which requires a high LO voltage swing and



Fig. 17. Effect of mismatches and process spread on NF and IIP3 of MixerD with . (a) 200-time Monte Carlo simulation results of DSBNF at 1 kHz. (b) Measured DSB NF@1 kHz of ten dies. (c) 200-time Monte Carlo simulation results of IIP3. (d) Measured IIP3 of ten dies. Symbol for measuredresults of the mixer with . Dashed line for measured results of one mixer sample without .

Fig. 18. Simulated NF and IIP3 for mixer (MixerD) with and without using as a function of temperature.

low (50 in [1]). To tune out the parasitic capacitanceof the cross-coupled pair , an inductor is added tothe cross-coupled pair as shown in [2, Fig. 12(b)].Although these dynamic bleeding techniques [1], [2] and ourmixer all use the cross-coupled pair , there are anumber of fundamental differences, given here.• The cross-coupled pair in the dynamic bleedingtechnique only operates around , while in ourmixer the negative impedance is operational during thetotal LO period. As a result, our mixer only needs normalLO voltage swing, while high LO voltage swing is required

in the dynamic bleeding technique, which may impose lin-earity degradation due to the switching pair (see [7]).

• The cross-coupled pair in the dynamic bleedingtechnique is designed as a dc current injector rather thana negative resistor. Flicker noise leakage due to the fi-nite transconductor output resistance is not addressed. Thesource-degenerated capacitance together with the cross-coupled pair in this paper are designed as a neg-ative impedance, which fully addresses the flicker noiseleakage.

Based on the analysis in Section II, in fact, the mixer inFig. 12(b) can be made to act in the same way as our mixer if



Fig. 19. NF, IIP3, conversion gain, input and dc current taken by the mixer as a function of the normalized bias current of for MixerNF. Solid linefor simulated results and symbol for measured results of the mixer with . Dashed line for measured results of the mixer without .

Fig. 20. (a) 200-time Monte Carlo simulation results of DSB NF at 1 kHz for MixerNF . (b) Measured DSB NF at 1 kHz for MixerNFof ten dies.

the cross-coupled pair is designed to operate duringthe whole LO period: the cross-coupled pair together withthe inductor in [2] is equivalent to the negative impedanceproposed in our work. However, full flicker noise cancellingwas not done in [2].

IV. SIMULATION AND MEASUREMENT

The microphotograhps of two demonstrator mixer chips(MixerD and MixerNF) are shown in Fig. 13. The active areaof the LO buffer and mixer with decap is 0.0156 mm forMixerD, of which 8.2% is occupied by the circuit. InMixerNF, the circuit consumes 7.1% of the total activearea (0.014 mm ). The packaged chips were measured onPCB boards for 0.9-GHz LO and 0.92-GHz RF. The noise is

measured by an Agilent E5500 noise measurement setup. Fornoise at 1 MHz, a SRS preamplifer is used to connect themixer output with the noise set-up; for noise at 1 MHz,a LeCroy AP033 active probe was used connecting the mixeroutput with the noise measurement setup.

A. Mixer With Full-IM3/Partial-Flicker-Noise Cancellation

For the mixer optimized for full IM3 cancellation and partialflicker noise cancellation (MixerD), the bias current of( shown in Fig. 9) is swept within % variation of theoptimal value to demonstrate the robustness against processspread. Themeasured and simulated results are shown in Fig. 14as a function of the bias current normalized to the optimal value

. At the optimal bias value , a measured



improvement of 10 dB for IIP3, 5 dB for conversion gain, 9 dBfor DSB NF at 1 kHz, and 1 dB for input are achievedcompared with the same mixer without . The DSB NF at10 MHz degrades by 0.1 dB. The mixer dc current increasesfrom 9.2 to 10.7 mA due to the biasing of the circuitry,while the LO buffer current (16 mA) stays unchanged. Within45% variation of 5-dB gain improvement, 6 dB

NF at 1 kHz reduction, 0.2-dB thermal NF degradation, noinput degradation are achieved. Fig. 14(b) shows theflicker NF reduction at a very low frequency (1 kHz), wherethe flicker noise is dominant and the thermal noise can beneglected. Fig. 15 shows the measured fundamental and IM3output at the optimal bias value . Due to higherorder nonlinearity distortion introduced by , the IM3 curvestarts to show fifth-order behavior for Pin 18 dBm. Themeasured mixer DSB NF is shown in Fig. 16. The spikes arefrom the equipment power supply and the measurement setup.Although introduces 5-dB thermal noise to the mixer,5 dB more gain also provided by lowers the input-referrednoise of the by 5 dB and results in overall less than0.1-dB degradation in the thermal noise figure. The flickernoise corner frequency decreases from 100 kHz to 20 kHz.Simulated and measured effects of mismatch and process

spread on NF and IIP3 of MixerD are shown in Fig. 17. Theresults of a 200-time Monte Carlo simulation using a realisticproduction variation model for device mismatches and processspread, in Fig. 17(a), show a mean DSB NF at 1 kHz of19.2 dB (nominally 19 dB) which is about 7 dB lower than themixer without , while the measurements of ten dies fromone wafer show 7-dB NF reduction at 1 kHz in Fig. 17(b).Note that such a high NF is not the result of a badly designedmixer but is due to the very low frequency (1 kHz), wherethe flicker noise is significant. In comparison, the measuredNF at 1 kHz of the low-flicker-noise mixer in [2] is 29 dB. InFig. 17(c), a 200-time Monte Carlo simulation shows a meanIIP3 of 10.8 dBm (nominally 12 dBm) which is 9 dB higherthan the mixer without , whereas more than 6-dB IIP3improvement is measured in ten dies from one wafer, as shownin Fig. 17(d). For the temperature range [ 40 C to 80 C]in the nominal corner, simulations show 6.7-dB flicker NFreduction in Fig. 18(a); the IM3 cancellation becomes lesseffective as the temperature increases, as shown in Fig. 18(b).We did not implement a control loop to adjust the negativeimpedance over temperature; the realized chips aim to provethe principle of flicker noise and distortion cancellation.

B. Mixer With Full-Flicker-Noise/Partial-IM3 Cancellation

For the mixer optimized for full flicker noise cancellation(MixerNF), Fig. 19 shows the measured and simulated results asa function of the bias current for normalized to the optimalvalue . When is not enabled, MixerNF has about5 dB less gain compared with MixerD. There is less voltageswing across the transistors’ terminals resulting less distortionand hence higher IIP3. At the optimal bias value ,a measured improvement of 8 dB for DSB NF at 1 kHz, 1.4 dBfor conversion gain, 0.1 dB for the DSB NF at 5 MHz, and2.5 dB for input are achieved compared with the samemixer without . The mixer dc current increases by 4% dueto the biasing of the circuitry, while the LO buffer current

Fig. 21. Simulated NF for mixer (MixerNF) with and without using as afunction of temperature.

Fig. 22. Measured DSB NF for mixer with and with using for MixerNF.

(4.8 mA) stays unchanged. The difference between the mea-sured and simulated IIP3 shown in Fig. 19(d) may be due to thefact that this mixer is operated at low supply voltage

, where the headroom for the circuit is insuf-ficient to provide a robust IM3 cancellation. Full flicker noisecancellation at the optimal bias value shown inFig. 19(a) suggested by simulation is not found in measurement,probably due to external low-frequency noise contributed bythe measurement set-up and due to the LO phase noise leakageresulting from mismatches in the mixer. However, Fig. 19(a)shows that more than 10 dB improvement for the flicker NF canbe achieved for very broad bias range (for ). Therobustness of this flicker noise cancellation under low supplyvoltage is estimated for in MixerNF. Fig. 20(a)shows the results of a 200-time Monte Carlo with mismatch andprocess spread, indicating a mean DSB at 1 kHz of 21.9 dB(nominally 20 dB) which is 15 dB lower than in the mixerwithout ; measurements on ten dies shows more than 11 dBflicker NF reduction [see Fig. 20(b)]. For the temperature range[ 40 C to 80 C] in the nominal corner, simulations showsmore than 14 dB flicker NF reduction (see Fig. 21). The mea-sured mixer noise output is shown in Fig. 22 (for biasedat ). The flicker corner frequency decreases from200 kHz to 20 kHz; the rolling-off behavior for 5 MHz isdue to the IF filter in the measurement setup.



TABLE IICOMPARISON OF TECHNIQUES FOR FLICKER NOISE REDUCTION IN CMOS ACTIVE MIXERS

C. Benchmarking

The mixer with full-IM3/partial-flicker noise cancellation(MixerD) presented in this paper is compared with previousworks on flicker noise reduction [1]–[4] in Table II. Since theflicker NF value depends on a few factors such as circuit biasand technology-related flicker noise corner, our technique iscompared with previous works in term of the value of flickernoise reduction. It shows that the presented technique providesvery good flicker NF reduction, while at the same time itachieves the largest improvement in IIP3 and gain withoutusing on-chip inductors or high supply voltages or increasingthe LO power. In conclusion, this flicker noise/IM3 cancellationprovides solutions for reducing flicker noise and improvinglinearity of CMOS active mixers.

V. CONCLUSION

A new technique providing simultaneous cancellation offlicker noise and IM3 distortion for active mixers is presentedwithout using on-chip inductors or high supply voltages orincreasing the LO power. By using a negative impedance

, the flicker noise leakage from the switching pairs isminimized. Meanwhile the negative impedance enables IM3distortion cancellation between the switching pairs and thetransconductor stage, which yields overall IM3 improvement.The techniques also improve the conversion gain while it haslittle effect on the thermal noise. For the demonstrator mixerchip optimized for full-IM3/partial-flicker-noise cancellation,9-dB flicker noise suppression, 10-dB improvement for IIP3,

5-dB improvement for conversion gain, and 1-dB improvementfor input are achieved. The circuit increases thethermal NF by 0.1 dB, power consumption by 16% and activearea by 8%. Under mismatch and process spread, a 200-timeMonte Carlo simulation shows 7 dB reduction in mean NFat 1 kHz and 9 dB increase in mean IIP3. A ten-sample mea-surement shows over 7 dB reduction in NF at 1 kHz and morethan 6-dB increase in IIP3. Simulations indicate that the flickernoise cancellation is not very sensitive to temperature variation[ 40 C to 80 C], while the IM3 cancellation degrades asthe temperature increases. For the demonstrator mixer chipoptimized for full-flicker-noise/partial-IM3 cancellation underlow supply voltage , more than 10 dB flickernoise suppression is measured within % variation of thenegative impedance bias current. The ten-sample measurementshows over 11 dB flicker NF reduction, and the simulationshows more than 14-dB flicker NF reduction for the tempera-ture range [ 40 C to 80 C].

APPENDIX

The real part of (6) is given by

(A1)



where and . When

(A2)

the real part of (6) is positive. Forand (A2) can be simplified to

(A3)

Therefore, for ,the real part of (6) is positive.

ACKNOWLEDGMENT

The authors would like to thank NXP Semiconductors forchip fabrication, and G. van der Weide, M. C. M. Soer, and H.de Vries for their help.

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[4] J. Park, C. H. Lee, B.-S. Kim, and J. Laskar, “Design and analysis oflow flicker-noise CMOSmixers for direct-conversion receivers,” IEEETrans. Microw. Theory Tech., vol. 54, no. 12, pp. 4372–4380, Dec.2006.

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Wei Cheng was born in Wuhan, China, in 1980. Hereceived the B.E. degree in measuring technologyand instrument from Xiamen University, Xiamen,China, in 2002, the M.Sc. and Ph.D. degrees in elec-trical engineering from the University of Twente,Enschede, The Netherlands, in 2006 and 2012,respectively.From 2002 to 2003, he was an Academic Em-

ployee with the Department of Mechanical andElectrical Engineer with Xiamen University, Xi-amen, China. He is now with Qualcomm, San Diego,

CA, USA. His research interest includes CMOS analog/RF IC design.

Anne JohanAnnema (M’03) received theM.Sc. andPh.D. degrees in electrical engineering from the Uni-versity of Twente, Enschede, The Netherlands.In 1995, he joined Philips Research, Eindhoven,

The Netherlands. In 2000, he returned to the Univer-sity of Twente, Enschede, The Netherlands, where heis an Associate Professor with the IC-Design group.He is also a part-time Consultant to industry, and, in2001, he cofounded ChipDesignWorks.

Gerard J. M. Wienk was born in October 11, 1958,in Hengelo, The Netherlands. He received the B.Sc.degree in electrical engineering from the HogeschoolEnschede, The Netherlands, in 1992.From 1982 to 2001, he was with different com-

panies working in the field of computer hardwareand operating systems. In July 2001, he joined theIC-Design group of the CTIT Institute, Universityof Twente, Enschede, The Netherlands, as a CADSupport Engineer.

Bram Nauta (M’91–SM’03–F’08) was born inHengelo, The Netherlands, in 1964. He received theM.Sc. degree (cum laude) in electrical engineeringand Ph.D. degree in from the University of Twente,Enschede, The Netherlands, in 1987 and 1991,respectively. His dissertation focused on the subjectof analog CMOS filters for very high frequencies.In 1991, he joined the Mixed-Signal Circuits and

Systems Department, Philips Research, Eindhoven,The Netherlands, where he worked on high-speedA/D converters and analog key modules. In 1998,

he returned to the University of Twente, Enschede, The Netherlands, as a FullProfessor heading the IC Design group, which is part of the CTIT ResearchInstitute. His current research interest is high-speed analog CMOS circuits.Dr. Nauta served as an associate editor of the IEEE TRANSACTIONS ON

CIRCUITS AND SYSTEMS II, EXPRESS BRIEFS (1997–1999). He has served as aguest editor, associate editor (2001–2006), and editor-in-chief (2007–2010) ofthe IEEE JOURNAL OF SOLID-STATE CIRCUITS. He was a member of the tech-nical program committee of the International Solid State Circuits Conference(ISSCC), where he served in several roles including the European RegionalChair and the 2013 Program Chair. He also serves in the Technical ProgramCommittee of the European Solid State Circuit Conference (ESSCIRC) and theSymposium on VLSI circuits. He was the corecipient of the ISSCC 2002 and2009 “Van Vessem Outstanding Paper Award.” He is a Distinguished Lecturerof the IEEE and a member of IEEE Solid-State Circuits Society AdCom.

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A Flicker Noise/IM3 Cancellation Technique for Active Mixer Using Negative Impedance

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