2 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS AND CONTROL INSTRUMENTATION, VOL. IECI-26, NO. 1, FEB. 1979
A New Method for Simulating PowerSemiconductor Circuits
LORANT LAKATOS
Abstract-This paper deals with the digital computer simulation ofelectric circuits containing power semiconductors (diodes and thyristors).The semiconductors are supposed to operate with line commutation.After surveying briefly the traditional simulating methods, a new generalmethod is introduced: "the method of adjusted voltage sources." Usingthis method, the semiconductors are represented by voltage sources.In the case of a conducting semiconductor, the voltage of the voltagesources corresponding to the semiconductors is zero, but, in the op-posite case, it is adjusted to cause zero current through the semicon-ductor. This means that the simulation is performed similarly as in thecase of linear circuits, but in every point of the simulation, severalauxiliary computations are to be carried out in order to obtain thevoltage of the nonconducting semiconductors. The operation of theprogram using this method was verified by numerous examples, includ-ing the computation of switching transients and quasi-stationary state.It must be noted that the program cannot be used for flnding the quasi-stationary state. However, the method can be extended easily forsimulating, e.g., short-circuit phenomena. Examples show the effi-ciency of the new simulation method.
I. INTRODUCTIONIGITAL SIMULATION of power semiconductor circuitsbegan to be dealt with about fifteen years ago. Since
then numerous technical papers dealt with this theme. Inthese papers the simulation is used only for relatively low fre-quency operation (0-1000 Hz) of the circuits, because, at highfrequencies, the replacement of the semiconductors by switches-as it is done in the presented methods-is unacceptable.Most of the methods used widely deal with particular cir-
cuits, lacking a generalized approach. In the simulation twoimportant methods have been introduced. One of them is the"method of subroutines" [5], [71. In this case the programscontain the state equations of the circuits corresponding to theconducting combinations of the semiconductors, and the pro-gram selects the proper equations (i.e., the proper subroutines)for numerical integration in every moment. This method canbe used in every case, but it is rather complicated if the con-ducting condition of the semiconductors may vary in a widerange (that is in the case of complicated circuits, especiallyin erroneous operation, e.g., a short circuit).The second method is the "method of transformation" [6],
[8], [9]. The idea is to write the state equations in the casewhen all the semiconductor elements conduct, and, for stateequations implying conduction of only a few elements, the stateequations can be constructed by a linear transformation. The
Manuscript received March 24, 1978; revised September 29, 1978.The author is with the Department of Automation, Technical Uni-
versity, Budapest, Hungary.
transforming matrix is computed automatically by the com-puter. This method overcomes the shortcoming of the pre-viously mentioned method, but it can be used easily only inthe case when every impedance of the circuit is a series RL ele-ment. There are many variations of this method [10] .
There are even general methods, e.g., [11 ] which are suitablefor simulating arbitrary circuits. One of them is to recreatethe state equations of the circuit automatically by the com-puter after any change in the conducting condition of thesemiconductors. This is a very good but rather complicatedmethod [2].The new method proposed here is based upon the replace-
ment of semiconductors by voltage sources. Hungarian authorsused this method for simulating individual circuits, namelyelectric machines supplied through semiconductors [3], [4].In this paper this method is extended to simulate arbitrarycircuits. This is the "method of adjusted voltage sources"[12], [13]. The program using this method was written inAlgol for the Soviet-made computer RAZDAN-3 of the Tech-nical University of Budapest, and the operation of the programwas checked by many examples. This computer is a ratheroutdated one; thus the real computation time of the examplesmentioned in this paper is fairly long.
II. THE METHOD OF ADJUSTED VOLTAGE SOURCESThe semiconductor model used is the following: in conduct-
ing condition its voltage is zero, but in nonconducting condi-tion its current is zero.In addition to semiconductors, the circuit to be simulated
may contain uncontrolled (independent) voltage and currentsources, and resistances, capacitances, and self-inductances ofconstant values. In the first approach the semiconductors arerepresented by uncontrolled voltage sources. The graph of thecircuit is assumed to be connected. Besides, the circuit is sup-posed not to contain excess elements [1] ; that is, in the cir-cuit there are no loops composed only from voltage sourcesand capacitances, and there are no cut sets composed onlyfrom current sources and inductances. This assumption doesnot contradict the generality (see later sections), but has thesignificant advantage that the state equations are simple [1] .
As mentioned, the semiconductors are represented by voltagesources. Regarding the state equations, these sources are un-controlled, but regarding the operation of the program, theyare controlled, more precisely adjusted voltage sources. Thisadjustment means that the voltages of the voltage sourcescorresponding to conducting semiconductors have zero value,
but the voltages of the voltage sources corresponding to non-conducting semiconductors are set to cause zero currentsthrough the concerned voltage sources. Thus the computa-tion of the voltages of the nonconducting semiconductorsneeds additional computing tasks at every simulating point.The complexity of the simulation increases only with thiscomputation in comparison with the simple task of simulatinglinear circuits.The formulation of the state equations of circuits containing
no excess elements can be found in [1]. The definitions andresults are enumerated because they will be used later. Bold-face variables denote vectors, boldface variables with an over-bar denote matrices, and the upper T denotes transposition.The vectors of the branch voltages and branch currents can
be divided into two parts according to the tree branches andlinks:
i= [ I1 T
V = [V1 1T (1)
where indexes 1 and 2 denote tree branches and links. Thestructure of these vectors is the following:
i1 = [iE iC iR]TI2 [IG IL J]V= [E VC VRITV2 =[VG VL VJ]T (2)
where letters E, C, R, G, L, and J denote the voltage sources,capacitances, tree resistances, link conductances, self-induc-tances, and current sources, respectively. The relationbetweenthe tree branch and link variables is the following:
il =-FI2
V2==FTVi (3)
where matrix F is the submatrix of the reduced incidencematrix corresponding to the fundamental cut sets. The stateequations are
MZ = Ax + BU (4)where
Z [VR IG dVc/dt dILIdtlT
X= [VC IL]T
u=4[J E]. (5)Matrices M, A, and B can be formed from the parameters ofthe circuit elements and the matrix F [I].In the algorithm presented here, the state equations are
modified as follows. Let us partition the vectors E and iEaccording to the actual (electromotive) and adjusted (cor-responding to semiconductors) voltage sources:
E= [Ee Ea]T1E = [Ee iEa] T. (6)
It is useful to find a relation between vectors Ea and iEa. Us-
ing (4), we can write
IG P[VC IL J Ee Ea] (7)where matrix P (and the new matrices found later) can beformed from matrices F, M, A, and B. Using (3) and (7):
(8)iEa = Qg + SEa
where
g= [VC IL J EeLet us partition vectors E, and iEa according to the conductingand nonconducting semiconductors
Ea = [Eac Ean] TiEa = [iEac iEan I T (10)
where indexes c and n denote conducting and nonconductingsemiconductors. Using (10), (8) can be written as follows:
[lEac Q[I1 11 121[cI- i-i g - ii ,
Ean Q22 S21 S22J a.
Taking into consideration that
iEan 0°
Eac =0
the following results are obtained:
Ean =S22 Q2g
iEac=Qg+S92Ean
(1 1)
(12)
(13)
Equation (13) gives the voltages of the nonconducting semicon-ductors and the currents of the conducting semiconductors.Nevertheless, vectors Ean and iE, can be computed accordingto (13) only in the case where the circuit meets certain re-quirements: namely, in every cut set defined by an adjustedvoltage source corresponding to a nonconducting semicon-ductor, there must be at least one such link resistance which isin none of the other cut sets defimed by other adjusted voltagesources corresponding to othernonconducting semiconductors.This is the "link resistance condition." The necessity of thiscondition comes from logical considerations regarding theprinciple of the method, but it is detailed elsewhere [131. Itis advisable to extend this condition for every adjusted voltagesource. It is noted that fulfilling the link resistance conditionmay require supplementing slightly the circuits. These supple-mentations are the following. First, in series with every semi-conductor, there must be a resistance. (This is not a significantlimitation.) Second, in parallel with some of the inductances,there must be a resistance. (This is a bit more significantlimitation.) The examples in this paper give more details onthese supplementations.According to (13), the logic ofthe simulation is the following.1) If during a certain time period the conducting condition
of the semiconductors does not change, then, at every simulat-ing point of the concerned time period, Ean and iEac are to becomputed using (13), and this is followed by the computationof the other variables to be displayed.
3
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4 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS AND CONTROL INSTRUMENTATION, VOL. IECI-26, NO. 1, FEB. 1979
2) If in a certain moment the examination of the signs ofthe elements in Ean and iE,a and that of the firing conditionsindicate change in the conducting condition of the semicon-ductors, then the matrices of (13) are to be computed againfor the new conducting condition, and this is followed by thecomputation of Eo,n and iEac (but they already correspond toother semiconductors).
III. NOTATIONS AND EXTENSIONS
1) It would be difficult to extend the method for the casewhen the circuit contains excess elements, since, in this case,the state equations contain the differential quotients of thevector E [1]. On the other hand, the link resistance condi-tion is to be fulfilled even in this case; thus this extension isunreasonable.2) A similar method can be stated as follows. The semicon-
ductors must be adjusted current sources: namely, the currentsof the current sources corresponding to nonconducting semi-conductors have zero value, but the currents of the currentsources corresponding -to conducting semiconductors are setto cause zero voltage across the concemed current sources.Instead of the link resistance condition, now the "tree branchresistance condition" is to be fulfilled. So far, a program hasnot been prepared using this logic. This "dual" logic has onlyone advantage: the program using it would run quicker be-cause the order of the matrix to be inverted is less on the aver-age than in the case of the voltage source logic. The reason isthat, on the average, in a circuit there are more nonconduct-ing semiconductors than conducting ones. The two logicscan be combined, but this does not seem to be particularlyadvantageous.
3) The program can be extended for computing short-circuittransients. This can be done as follows. If between two pointsof the circuit a short circuit happens in the moment tsc, thenanother adjusted voltage source is to be placed between theconcerned points. But the logic of the adjustment is differentfrom that of the semiconductors: until the moment ts5, thevoltage is set to cause zero current across the "short circuit,"and later this voltage is set to zero. Thus the short circuit isrealized. With similar logic load change, transients can also besimulated.
IV. EXAMPLESA. Example
In the first example, the simulated results are compared withthe measured ones. The circuit is shown in Fig. 1. The param-eters are the following. The supply voltage system is a symmet-rical sinusoidal voltage system with effective value of 55 V andwith frequency of 50 Hz. BesidesLB = 0.87 mH,LD = 38.2 mH,RB = 0.232 Q2, and RD = 19.2 &2. The other resistances wereplaced in order to fulfill the mentioned link resistance condi-tion: RT = 10-3 Q? RG1 = RG2 = 104 t2 and RBP = 4.35 Q2(that is, LB/h where h is the integrating step size). The simula-tion was performed for a time duration of 20 ms with the in-tegrating step size of 0.2 ms. At the beginning, every semicon-ductor was supposed not to conduct, and every inductancecurrent was assumed to be zero. The simulation was started at
Fig. 1. The circuit to be simulated in Example 1.
2
- measured- si'mulated
Fig. 2. The simulated results in Example 1.
R6
_0UDFig. 3. The circuit to be simulated in Example 2.
the negative zero crossing of the voltage of the phase "b." Theresults of the simulation are compared with measured resultson Fig. 2. As shown in Fig. 2, the deviation is under 10 percent.It can be accepted, considering the precision ofthe oscilloscopeand regarding the fact that during the measurement, the threephases of the switch did not operate simultaneously. The realcomputation time was about S mn.
B. ExampleLet us consider the circuit of Fig. 3. The supply voltage sys-
tem is a sinusoidal symmetrical three-phase voltage systemwith the effective value of 220 V and frequency of 50 Hz.
t
LAKATOS: SIMULATING POWER SEMICONDUCTOR CIRCUITS
Fig. 4. Simulated voltage curves in Example 2.
u
V]I500
-5001Fig. 5. Simulated current curves in Examples 2.
LB I mH CD = 160 MF, RD = 19.2 Q,RB = 0.314 aRT10-3 g2,Ri = 10-3 92,RBp = 10OQandRr = 104 Q. RTRBP, and RG were placed in the circuit in order to fulfill thelink resistance condition, and RI to compute the resulting loadcurrent.Let us suppose that the performance of the semiconductor
numbered one regarding the absolute maximum ratings is in-
ferior to that of the other ones. Let its reverse breakdownvoltage be 400 V. A simulatlon has shown that the reverse
voltage of the semiconductor numbered one reaches the re-
verse voltage of - 400 V at tsc = 11.4 ms. Thus in this momentthe semiconductor breaks down and becomes a short circuit.Later with a new simulation, the whole transient can be
computed. In this case the semiconductor numbered one isrepresented by such an adjusted voltage source which showsthe logic of a semiconductor until tsc = 1 1.4 ms, but after thatits voltage is set constantly to zero.
The simulation was performed for a period of 40 ms withthe integrating step size of 0.1 ms. The simulation was startedat the positive zero crossimg of the voltage of the phase "a.At the beginning the semiconductors are nonconducting; allof the inductance currents and the capacity voltage are zero.The course of the direct voltage with the voltage of the
phase "a" is shown in Fig. 4. The phase currents and thedirect current are shown in Fig. 5. It can be seen that thephase currents are of great values. The computation time wasabout 10 min.
ACKNOWLEDGMENT
The author would like to express his gratitude to the lateProf F. CsAki for supporting the work, and to Dr. A. Kirpaitiand T. Gal for their valuable aids.
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