A Road Map to ARPA Involvement in

Electronic Packaging Lance A. Glasser, Advanced Research Projects Agency

dvanced electronic packaging and interconnect (EPlI) tech- nology’ is critical to the suc-

cess of the US Defense Department’s Advanced Research Projects Agency strategic plan. EPlI components per- vade ARPA systems, from the massive- ly parallel machines of the federal High-Performance Computing and Communication Initiative to compact embedded signal processors in smart weapons for critical mobile targets. To meet these needs (among others), ARPA is developing numerous EPlI technolo- gies.

This report presents a road map to EPlI at ARPA. The EPlI domain in- cludes packages, multichip modules (MCMs), connectors, printed circuit boards (PCBs), boxes, backplanes, and cages.

Strategy

The EP/I strategy has six components:

(1) Innovative physical technologies f o r faster, denser, more reliable EP/I. MCMS are the highest priority in this area because a speed discontinuity be- tween PCBs and ICs limits digital sys- tem performance. It is essential that the intrinsic speed of modern ICs be trans- lated into system performance, which

requires significant advances in pack aging and interconnect technology.

( 2 ) ln,formation technologies thatsup- port rapid, affordable acquisition o f the best EP/I technology, including com- puter-aided module design tools, stan- dard interfaces, part models, brokering, and electronic commerce. In a rapidly changing world environment, rapid ac- quisition translates into higher product performance, and lower cost and sys- tem risk. For the Department of De- fense (DoD), rapid acquisition is the equivalent of “rapid time to market.” Rapid, affordable prototyping is also required to lower new- system risk, in- crease upgrade opportunities, and in- crease the pace of innovation.

( 3 ) Manufacturing and test experi- ments, including modest-size pilot lines that support D o D product volumes, which often are quite low (a f e w hundred per month) , and low-volume, ,flexible DoD access ( for prototypes and prod- ucts) to high-volume commercial manu- facturing lines, which can produce the lowest cost products.

In an era of declining DoD budgets, the keys to affordability and quality is the exploitation of flexible commercial manufacturing capacity. Design and manufacturing experiments with DoD products will be required to debug tech-

nologies, interfaces, and infrastructure, and prove new concepts. From the stand- point of rapid acquisition, research pro- totypes built from design files that are volume-manufacturing-compliant (that is, the design file that drives the proto- type construction can be trivially retar- geted to volume manufacturing) help shorten the time required to translate research prototypes into manufactured objects useful to DoD.

(4) Manufacturing and test equipment and software that support DoD’s need f o r affordable high-quality systems. This strategy seeks to exploit computer- integrated manufacturing and equip- ment commonalities among MCMs. PCBs, flat panel displays, and ICs. Equip- ment that enables low-volume access to high-volume lines and the test and burn-in of bare die are priorities. This is the “machine tool” industry of EPlI, and its health is key to US capability. DoD is interested in equipment that lowers the barriers to its use of commer- cial capacity.

(5) Fundamental research in key en- abling technologies, f r o m physical tech- nologies (such as cus tom electronic materials) to information technologies (such as artificial intelligence). Longer term investments focus on potential breakthroughs such as 3D module

r-

Table 1. Program-versus-strategy matrix.

DARPA Program

EP/I Component Area 1 2 3 4 5

Strategy Component Physical Info. Found- Tools Funda- Tech. Tech. ries mentals

Computing Systems Technology Office (CSTO)

Defense Sciences Office @SO)

Electronic Systems Technology Office (ESTO)

Microsystem (CAD, brokering)

Diamond Substrates and Manufacturing

DARPA Initiative on Concurrent Engineering

Metal Matrix Electronic Packaging

Superconducting MCM

Application-Specific Electronic Modules

High-Definition Systems MCM Technology Microwave Array

Microwave and Millimeter

Physical Electronic

Sematech

Packaging

Wave Monolithic IC

Packaging

Microelectronics Technology IR Focal Planes Office (MTO) Photonics

Software and Intelligent Manufacturing Automa- SystemsTechnology Office tion and Design Engi- (SISTO) neering

X X

X

X

X

XI X

X

X

x X

XI X2 X

X

X

x3 X

X

X

X

X

Note: X = major empha\i\ . x = minor einph;i\i\ ' Integration program, 'Low-volt". flexible access 1 0 hisli-\ o l i i i i i c

commercial l ine\ 'Pilot lines and foundrier

packaging. integrated electromechanical systems CAD. and hardware-software cosynthesis.

( 6 ) Technology deniotistrritions iitirl systeni insertions, especially t h o . s ~ r&t- ing to the High-Performance Cottipiit- ing and Commrinication Initiritive, high- definition systems, criticnltiiohile trirgets (CMTs) , irndersea warfare, arid other critical D o D niissioti areas.

Techno I og y demons t r a t i on s h e 1 p prove to DoD customers the applicabil- i t y and efficacy of new technologies in

the context of user needs. These dem- o ns t r a t i o n s a Iso he 1 p de ve 1 ope rs focus o n the most relevant technologies and products .

Program details

I n its own way. EPiI is as fundamental and pervasive in the Information Age as are the concepts of transporting and communicating. EPil appears in many ARPA programs and is central to sev- cral . Llnfortunately. this makes the

EP/I road map rather complex. Four programs center on EP/I: Diamond Sub- strates. Superconducting MCMs. Phys- ical Electronic Packaging, and Applica- tion-Specific Electronic Modules. Many other programs have important roles. however. and each will be discussed below. (See Table 1 for a matrix of programs and strategies.)

Physical technologies. The competi- tive performance demands of high-per- formance electronic systems require numerous electronic-quality and low-

April 1993 83

Table 2. Wiring density of common modules.

I Technology Wiring Density (inkq. in.) Wire Cost ($/in.) I House wiring (installed) 0.20 Printed circuit board 50.00 Multichip module 500.00 IC 5,000.00

0.50 0.10 0.10 0.01

cost exotic materials. The materials sec- tion of the Defense Science Office (DSO) performs the more basic aspects of this work.

High-performance circuits dissipate agreat deal of heat, which poses a major problem. A supercomputer IC has a heat flux of 300 watts per square inch, while the active area of a semiconduc- tor laser diode can reach more that 3,000. Dissipating heat from high-performance devices while maintaining a tempera- ture rise of less than 50°C is an enor- mous challenge.

Diamond substrates. Nature’s best thermal conductor is diamond. The goal of DSO’s diamond-manufacturing pro- gram is to produce affordable artificial diamond substrates with excellent ther- mal conductivity. By late 1993, the pro- gram hopes to achieve thick 10 x 10- centimeter substrates at less than $200 per square cm. Such substrates would enable the thermal management of 3D supercomputer modules, resulting in sig- nificantly improved density for embed- ded applications and higher clock rates due to shorter wire lengths. At slightly lower costs (the limit is the cost of ener- gy; carbon is cheap), using diamond for thermal management in high-perfor- mance workstations would provide nu- merous advantages. The eventual goal is to produce substrates costing less than $2 per sq. cm. The program also ad- dressesmetalization, via formation, and similar issues. Because diamond MCM substrates are most appropriate for high- density systems, this approach also re- quires high wiring density.?

DSO’s superconducting MCM pro- gram addresses this need for wire densi- ty. Table 2 illustrates the enormous wir- ing density requirements of advanced components.

Superconductors. The diamond pro- gram allows devices to be placed closer together without overheating, while the

superconductivity program provides long, thin high-speed wires. DSO’s su- perconductivity program is increasing- ly focused on superconducting MCMs. Long, normal wires (say, 10 cm) carry- ing high-speed digital signals have to be much wider than the minimum size usu- ally allowed by fabrication technology so that low resistance avoids signal dis- tortion. This problem has driven high- speed computers to use over a dozen signal layers in PCBs. And the problem becomes worse as clock speeds increase.

Two layers of high-temperature su- perconducting interconnect can replace dozens of normal conductor layers, po- tentially improving density and manu- facturability. Throughout 1993, the su- perconductivity program hopes to demonstrate 10s of CMOS die, inter- connected with two-layer, high-temper- ature superconducting interconnect. The approach is consistent with using chilled CMOS devices, which achieve twice the room-temperature performance because electron and hole mobility improve when CMOS is cooled to liquid nitrogen tem- peratures. Eventually, cooling will be required to enable CMOS channel lengths to drop below 0.1 micrometer, where subthreshold leakage would un- reasonably degrade room-temperature devices. Beyond this point, the perfor- mance advantage of chilled CMOS be- comes even more compelling. Figure l illustrates the first functioning MCM made with high-temperature supercon- ducting films.

Metal matrix package. DSO’s efforts include metal matrix electronic packag- es. The program is trying to develop low-cost manufacturing of packages that have good thermal conductivity. match- ing the thermal expansion coefficients of ICs and providing a good Faraday cage to reduce electromagnetic radia- tion effects. This work is designed to exploit advances in the High-Tempera- ture Structural Materials Program.

Photonic components, The Microelec- tronics Technology Office’s Photonics Program focuses on optoelectronic in- terconnect components. Skin-effect loss- es limit the bandwidth per unit area of a given length of copper wire. For high- speed, dense interconnect, photonic communication is preferable to copper wire for long distances, since optical losses can be made orders-of-magni- tude lower than copper losses. To drive the copper-versus-fiber break-even point to shorter distances, where it will have a major impact on the “wiring” of computer chases , the electron-photon transducers must be made more pro- ducible and smaller - with less power demand. Over the next four years, MTO’s Photonics Program will seek to lower laser threshold currents by an order of magnitude (to less than 100 microamperes) and increase modula- tion rates (to over 60 gigabitds). Free- space exchange networks, monolithic optoelectronic ICs, and a variety of new devices are also being examined. MTO’s IR focal plane array program includes some of the special packaging concerns of this technology, such as detector chips with very high lead counts, cryogenic considerations, and packaging of very fragile semiconductors.

EP/I components. The Electronic Sys- tems Technology Office (ESTO) con- ducts the central effort in the EPlI com- ponent area, including MCM technology and 3D packages, because it is a con- sumer and integrator of the technolo- gies just discussed, weaving these and o ther technologies into packaging systems for electronic modules. Its Phys- ical Electronic Packaging Program is developing MCM technology for dig- ital systemsoperating at clock rates from 100 megahertz to several gigahertz. In MCMs, bare chips are interconnected via a common substrate instead of being packaged in single-chip carriers. This approach offers increased density and reduction in electrical parasitics. For system clock rates that exceed 100 megahertz, conventional chip-to-chip in- terconnects can virtually negate system performance improvements derivable from advances in devices and circuits. In addition, MCM technology offers po- tentially 10 to 100 times more density, 10 times more reliability, and reduced cost.’Army, navy, and air force applica- tions include satellite electronics, ad- vanced workstations, smart munitions,

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avionics. man-portable devices. and au- tonomous underwater vehicles. The present physical packaging program has hree main thrusts:

establishing merchant foundries ca- pable of low-volume (several hun- dred per month) production of MCMsfor 100-megahertz (or more) operation; demonstrating applications such as parallel processors for the HPCC Initiative: and developing materials. processing. testing. and simulation for 3D and gigahertz-clock-rate MCMs.

Mriltiple technologies. Figure 2 illus- trates a set of MCMs from Nchip Corp. that uses thick silicon dioxide as a di- electric. Technologies in the Physical Electronic Packaging Program include

diamond-based3D MCM structures. optical testing. flip-chip conducting. adhesive-chip attachment. high-speed membrane probe test-

ferroelectric materials for decou-

very low dielectric constant materi-

full-wave electromagnetic simula-

laser writing for MCM rework and

optical MCM-MCM interconnect.

ing.

pling capacitors.

als for gigahertz-signal planes.

tion.

prototyping. and

The High-Definition Systems Pro- gram is attempting to meet the special- ized needs o f high-definition display technology (such as chip-on-glass tech- nology).

Sprcinlizrd r1rrd.s. ESTO’s Microwave and Millimeter Wave Monolithic Inte- grated Circuit (MIMIC) Program also provides for specialized needs of af- fordable analog microwave devices. This work is often performed in conjunction with programs already mentioned , for instance. to form metal matrix IC pack- ages. AsMIMICcostscome down.pack- aging becomes the module cost driver. MIMIC packaging complements digital packaging because it has more strin- gent high-frequency signal integrity. crosst a I k. and attenuation require - ments - along with needs for fcwer 110 pins. Mode suppression is a problem unique to this specialty because o f the

Figure 1. First functioning MCM with high-temperature superconducting inter- connect, fabricated by Superconducting Technologies Inc. (shown with a dime at about twice its size).

Figure 2. Three multichip modules from Nchip Inc. that use silicon substrates, aluminum wire, and a thick silicon dioxide dielectric.

extremely high frequencies involved. A new microwave array packaging pro- gram focuses on thin. affordable. light- weight antenna arrays useful in avionics and space.

ARPA is increasing its support of EPiI manufacturing equipment and its emphasis on higher levels of the pack- aging hierarchy. particularly in packag- i n g het er ogr n e o us technologies. The

scope of the Physical Electronic Pack- aging Program has expanded to include analog (together with digital) devices. silicon (together with GAS) semicon- ductors. and electronic (together with photonic) ICs.

Information technologies. EPiI infor- mation technology programs are de- signed to provide rapid and affordable

April 1993 85

access to physical EP/I technologies, whether developed at DARPA or else- where. These programs build on AR- PA’s experience with ASICs and con- fronts several new challenges:

new supplier-consumer relation- ships; two-sided interfaces (up to the sys- tem and down to the chip levels); incorporating parts designed with a variety of styles (when designing an

grade that technology throughout the life of the weapon system. Within the context of this program, an electronic module is a “plug-replaceable’’ unit that performs a particular information-pro- cessing function. It may be implement- ed as an MCM, a circuit board, or a complete electronic subsystem. Much of the technology developed under this program can be extended to other do- mains.

The Computing Systems Technology

oriented database managers, qualita- tive thermal and mechanical approxi- mations, and formal methods for hard- ware-software trade-offs.

Acknowledgments The author acknowledges the many peo-

ple inside and outside ARPA who helped in the preparation of this article.

ASIC, one controls the internals of the component library); heterogeneous clocking and design methodologies (objects are harder todefine formally because they have more three-dimensional structures); and gies such as PCB and later retargeted to 1969.

Office’s Microsystems Program is re- sponsible for system-level CAD. Of par- ticular concern to CSTO is access to prototyping services, especially those where physical architectures can be ini- tially targeted to lower cost technolo-

References 1. C.A. Harper, Handbook of Electronic

Packaging, McGraw-Hik New York,

*burning-in and testing bare die to ensure quality.

The program is also concerned with the longer range goal of application- specific electronic systems.

ESTO’s Application-Specific Elec- tronic Module Program (ASEM) is cen- tral to the information technology pro- grams. Its objective is to improve the cost and performance of weapon sys- tems through timely insertion of state- of-the-art electronic modules. This will be achieved by shortening the time re- quired for module design, manufacture, test, acquisition, and insertion. Other factors include increasing the overlap and feedback between each phase and delaying choices of particular imple- mentation technologies until later in the design cycle.

New capabilities that facilitate flexi- ble low-volume access to high-volume commercial production facilities and distributed teaming of component sup- pliers and integrators will enable maxi- mum leverage of the domestic industrial infrastructure.

Common military and commercial specifications are essential to this goal. The cost of developing a support infra- structure for the ASEM industry will be minimized by levering techology com- monalties among requirements for ICs, MCMs, printed wiring boards, and flat panel displays. Easy access to ASEM foundries will be facilitated by common electronic data-interchange standards and an electronic brokering network.

The result will be a capability to cost- effectively deliver the most advanced electronics technology available with very low risk and to incrementally up-

high-performance technologies such as MCMs. This places a priority on flexi- ble brokering and technology-indepen- dent design representation. From a CAD standpoint, the biggest challenge is first- pass module design success. This is need- ed because board reworking is nearly impossible in ultradense or ultrafast packaging systems. The challenges in- clude verifying heterogeneous clocking and design methodologies, the unavail- ability of up-to-date part libraries, and simulation speed limitations.

The DARPA Initiative on Concur- rent Engineering (DICE) develops broadly applicable concurrent engineer- ing software, some of which has appli- cability to EPII. Technologies devel- oped by this program include a requirements manager, the ROSE (Rensselaer Object System for Engi- neering) database, a virtual factory sim- ulator, and collaboration tools. ASEM, whose scope is much narrower than that of DICE, is a customer for DICE tech- nologies as they develop.

The Software and Intelligent Systems Technology Office’s MADE (Manufac- turing Automation and Design Engi- neering) Program intersects ASEM in its support of enabling software tech- nologies to address longer term needs or follow-on efforts for higher level phys- ical objects such as boxes, card cages, physical enclosures, assemblies, elec- tromechanical devices, wiring harness- es, and cooling systems. SIST0 also develops tools for managing the design process, persistent object bases, tools to support designers at different sites, and mechanisms for remote access and dis- tribution of verified software compo- nents. Other tools include open object-

2. F.N. Sinnadurai, Handbook of Micro- electronic Packaging and Interconnection Technologies. Electrochemical Publica- tions, Ayr, Scotland, 1985.

3. R.R. Tummala and E.J. Rymaszewski, Microelectronics Packaging Handbook, Van Nostrand Reinhold, New York, 1989.

4. R.C. Eden.“Applicability of Diamond Substrates to Multichip Modules,” 2993 ISHM/IEPS Int’l Conf. and Exhibition Multichip Modules, Int’l Soc. for Hybrid Microelectronics, Reston, Va.

5. T.R. Haller et al., “High-Frequency Per- formance of GE High-Density Intercon- nect Modules,” 42nd Electronic Compo- nents and Technology Conf. , Int’l Soc. for Hybrid Microelectronics, Reston, Va., 1992.

Lance A. Glasser is director of the Electron- ic Systems Technology Office at the Ad- vanced Research Projects Agency and was a faculty member in the Department of Elec- trical Engineering and Computer Science at the Massachusetts Institute of Technology from 1980 to 1988.

Glasser received the BS in electrical engi- neering from the University of Massachu- setts at Amherst. and SM and PhD degrees from MIT.

Readers can contact Glasser at the Elec- tronic Systems Technology Office, Advanced Research Projects Agency, 3701 N. Fair- fax Dr., Arlington. VA 22203: e-mail. lglasser@darpa.mil.

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