7 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design 11
A Tutorial onA Tutorial onEmerging Nanotechnology DevicesEmerging Nanotechnology Devices
Tezaswi Raja, Tezaswi Raja, Rutgers UniversityRutgers UniversityVishwani D. Agrawal, Vishwani D. Agrawal, Auburn UniversityAuburn UniversityMichael Bushnell, Michael Bushnell, Rutgers UniversityRutgers University
227 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
OutlineOutline
IntroductionIntroductionNano Scale MOSFETNano Scale MOSFETCarbon Nanotube FETsCarbon Nanotube FETsSolid State Quantum DevicesSolid State Quantum DevicesMolecular ElectronicsMolecular ElectronicsChallenges and the Current State of the ArtChallenges and the Current State of the ArtConclusionConclusion
337 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
IntroductionIntroduction
Feature size nearing the physical limitsFeature size nearing the physical limitsFabrication process approaching limitsFabrication process approaching limitsPower consumption – a concernPower consumption – a concernQuantum effects need to be accounted for Quantum effects need to be accounted for Solution? Solution? NanotechnologyNanotechnologyWe present an overview of new devices We present an overview of new devices and outline some open problems.and outline some open problems.
447 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
557 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
667 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
What is Nanotechnology?What is Nanotechnology?Switching devices of nanometer (below 100nm, Switching devices of nanometer (below 100nm, typically 10nm) dimensions define nanotechnology.typically 10nm) dimensions define nanotechnology.
DNA strands as Bits
Molecular orientations as Bits
CNFETsSETs
Self assembled CNT using DNA
Quantum Dots
CNT arrays
DNA self assembly
Logic
(Our Focus)
Memory
Fabrication
RTDMolecular Nano CMOS
Molecules in Solution
Emerging Nanotechnology Drivers
Emerging Nanotechnology Solutions
777 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Computing DevicesComputing Devices
CMOS Devices
Solid State Devices Molecular Devices
Nano CMOS
Quantum Dot
RTD
Quantum Devices
CNFET SET
Electro-
mechanicalPhotoactiveQuantum Electro-
chemical
887 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Nano-Scale MOSFETNano-Scale MOSFET
Metal Oxide Semiconductor Field Effect TransistorMetal Oxide Semiconductor Field Effect TransistorThree terminal deviceThree terminal deviceSource, gate and drainSource, gate and drainVg controls the conduction from source to drainVg controls the conduction from source to drainHalf thickness of the gate is called “Feature size Half thickness of the gate is called “Feature size λλ””Current feature sizes in production – 90nm (Intel Pentium 5)Current feature sizes in production – 90nm (Intel Pentium 5)Demonstrated feature sizes up to 20nm (IBM).Demonstrated feature sizes up to 20nm (IBM).
Phot
o C
ourt
esy:
Fuj
itsu
Labs
997 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
ChallengesChallenges
DifficultiesDifficultiesHigh electric fieldsHigh electric fieldsPower supply vs. threshold voltagePower supply vs. threshold voltageHeat dissipationHeat dissipationInterconnect delaysInterconnect delaysVanishing bulk propertiesVanishing bulk propertiesShrinkage of gate oxide layerShrinkage of gate oxide layerToo many problems to continue miniaturization as physical Too many problems to continue miniaturization as physical limits approachlimits approachProposed solutions are short termProposed solutions are short term
Open ProblemsOpen ProblemsImprove lithographic precision (eBeam)Improve lithographic precision (eBeam)Explore new materials (GaAs, SiGe, etc.)Explore new materials (GaAs, SiGe, etc.)As a long term goal explore new devicesAs a long term goal explore new devices
10107 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
OutlineOutline
IntroductionIntroductionNano scale MOSFETNano scale MOSFETCarbon Nanotube FETsCarbon Nanotube FETsSolid State Quantum DevicesSolid State Quantum DevicesMolecular ElectronicsMolecular ElectronicsChallenges and current state of the artChallenges and current state of the artConclusionsConclusions
11117 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Carbon NanotubesCarbon Nanotubes
Carbon nanotubes are long meshed wires of carbonCarbon nanotubes are long meshed wires of carbonLongest tubes up to 1mm long and few nanometers thick made by IBM.Longest tubes up to 1mm long and few nanometers thick made by IBM.
PropertyProperty Carbon NanotubesCarbon Nanotubes ComparativelyComparatively
SizeSize 0.6-1.8 nm in diameter0.6-1.8 nm in diameter Si wires at least 50nm thickSi wires at least 50nm thick
StrengthStrength 45 Billion Pascals45 Billion Pascals Steel alloys have 2 Billion P. Steel alloys have 2 Billion P.
ResilienceResilience Bent and straightened without damageBent and straightened without damage Metals fracture when bent and Metals fracture when bent and restraightenedrestraightened
ConductivityConductivity Estimated at 10Estimated at 1099 A/cm A/cm22 Cu wires burn at 10Cu wires burn at 1066 A/cm A/cm22
CostCost $2500/gram by BuckyUSA in Houston$2500/gram by BuckyUSA in Houston Gold is $15/gramGold is $15/gram
12127 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Electrical Properties of CNTElectrical Properties of CNT
Carbon nanotubes can be metallic or semiconductor Carbon nanotubes can be metallic or semiconductor depending on their depending on their chiralitychirality..Chiral Vector CChiral Vector C is defined as the vector from one is defined as the vector from one open end of the tube to the other after it is rolled.open end of the tube to the other after it is rolled.If (n-m) is divisible by 3, the tube is metallicIf (n-m) is divisible by 3, the tube is metallicIf (n-m) is not divisible by 3, the tube is If (n-m) is not divisible by 3, the tube is semiconducting.semiconducting.
C = n a1 + m a2
13137 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Carbon Nanotube FETCarbon Nanotube FET
CNT can be used as the conducting channel of a MOSFET.CNT can be used as the conducting channel of a MOSFET.These new devices are very similar to the CMOS FETs.These new devices are very similar to the CMOS FETs.All CNFETs are pFETs by nature.All CNFETs are pFETs by nature.nFETs can be made throughnFETs can be made through
Annealing Annealing DopingDoping
Very low current and power consumptionVery low current and power consumptionAlthough tubes are 3nm thick CNFETs are still the size of the Although tubes are 3nm thick CNFETs are still the size of the contacts, about 20nm.contacts, about 20nm.
Cou
rtes
y: IB
M
14147 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
CNT FabricationCNT Fabrication
Controlling the conductivity of the tubes (Constructive Controlling the conductivity of the tubes (Constructive Destruction)Destruction)
All tubes laid on the contactAll tubes laid on the contactMetallic tubes are destroyedMetallic tubes are destroyed
Controlling diameter of the tubeControlling diameter of the tubeStart with MWNTs.Start with MWNTs.Destroy the outer layers one by one to reduce diameter.Destroy the outer layers one by one to reduce diameter.
Placing exactly at the required location. Yet to be demonstrated Placing exactly at the required location. Yet to be demonstrated convincingly to exploit complete advantage using Lithography.convincingly to exploit complete advantage using Lithography.Using DNA for self assembly Using DNA for self assembly
Demonstrated by Techion-Israel very recently (Nov’2003).Demonstrated by Techion-Israel very recently (Nov’2003).
Cou
rtes
y: IB
M
Cou
rtes
y: IB
M
15157 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Summary and ChallengesSummary and ChallengesCNTs are flexible tubes that can be made conducting CNTs are flexible tubes that can be made conducting or semiconducting.or semiconducting.Nano-scale, strong and flexible.Nano-scale, strong and flexible.Challenges:Challenges:
Multilevel interconnects not availableMultilevel interconnects not availableChip density still limited to the density of contacts.Chip density still limited to the density of contacts.Tube density not entirely exploitedTube density not entirely exploitedFabrication is still a stochastic processFabrication is still a stochastic processAlternatives to gold contacts need to be found.Alternatives to gold contacts need to be found.
Open Problems and Initiatives:Open Problems and Initiatives:Fabrication using DNA for self assembly (Technion-Israel; Fabrication using DNA for self assembly (Technion-Israel; Science, Science, Nov 2003)Nov 2003)Memory array of nanotubes using junctions as bit Memory array of nanotubes using junctions as bit storages (Lieber at Harvard)storages (Lieber at Harvard)Using nanotube arrays to make computing elements Using nanotube arrays to make computing elements (DeHon at Caltech)(DeHon at Caltech)Fabricate FPGAs using CNFETs and STM (Avouris at IBM)Fabricate FPGAs using CNFETs and STM (Avouris at IBM)
16167 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
OutlineOutline
IntroductionIntroductionNano scale MOSFETNano scale MOSFETCarbon Nanotube FETsCarbon Nanotube FETsSolid State Quantum DevicesSolid State Quantum DevicesMolecular ElectronicsMolecular ElectronicsChallenges and current state of the artChallenges and current state of the artConclusionsConclusions
17177 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Solid State Quantum DevicesSolid State Quantum Devices
Quantum effects used to build devices.Quantum effects used to build devices.Electrons confined on an Electrons confined on an islandisland
Island can be created by using different band-gap devices in successionIsland can be created by using different band-gap devices in successionIsland has certain allowed energy levelsIsland has certain allowed energy levelsIf allowed energy levels are filled then the device is in conductionIf allowed energy levels are filled then the device is in conduction
Types of devicesTypes of devicesResonant Tunneling Diode (RTD)Resonant Tunneling Diode (RTD)Single Electron Transistor (SET)Single Electron Transistor (SET)Quantum Dot (QD)Quantum Dot (QD)
Blocking conduction due to unavailable energy levels is called Blocking conduction due to unavailable energy levels is called coulomb blockadecoulomb blockade
Ener
gy
Occupied Energy Levels
Occupied Energy Levels
Allowed Energy Levels
Source Island Drain
Bar
rier
Distance
Bar
rier
18187 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Principle of ConductionPrinciple of Conduction
Conduction can occur byConduction can occur byIncreasing source to drain voltageIncreasing source to drain voltageApplying Gate BiasApplying Gate Bias
Allowed Energy Levels
Source Island Drain
Ener
gy
Occupied Conduction
Band
Allowed Energy Levels
Source Island Drain
Ener
gy
Occupied Conduction
BandGate bias
Occupied Conduction
Band
Conduction Conduction
19197 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Single Electron Transistors (SET)Single Electron Transistors (SET)
Conductance changes in spurts as energy levels are discreteConductance changes in spurts as energy levels are discreteTo go from conducting to non-conducting stage, it requires voltage To go from conducting to non-conducting stage, it requires voltage sufficient for one electron to crosssufficient for one electron to cross
This is achieved by applying gate bias enough for just one This is achieved by applying gate bias enough for just one electron charge -- hence the name SETelectron charge -- hence the name SETBias required for conduction is Bias required for conduction is coulomb gap voltagecoulomb gap voltage
Same device can act as pFET or nFET based on the barrier strengthSame device can act as pFET or nFET based on the barrier strengthApplications: Applications:
Extra sensitive charge metersExtra sensitive charge metersCMOS style conducting devicesCMOS style conducting devices
Drain
Source
GateCg
Island
20207 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Quantum Dots and ArraysQuantum Dots and Arrays
3-dimensional island tunneling barrier3-dimensional island tunneling barrierState determined by presence of electron and not by State determined by presence of electron and not by conduction.conduction.Quantum cell array (QCA) is a lattice of these cells Quantum cell array (QCA) is a lattice of these cells with 2 electrons confined.with 2 electrons confined.Occupied electrons are furthest from each other due Occupied electrons are furthest from each other due to repulsive forces.to repulsive forces.
Courtesy: vortex.tn.tudelft.nl/ grkouwen/kouwen.html
Inter-dot Barriers
Outer Barriers
Dot occupied by Electron
Dot unoccupied
21217 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Quantum Cellular AutomataQuantum Cellular Automata
2 states – “1” and “0”.2 states – “1” and “0”.Electrostatic interaction of nearby cells makes the bits Electrostatic interaction of nearby cells makes the bits flip.flip.Input to the cell is by manipulating the Inter-dot barriers.Input to the cell is by manipulating the Inter-dot barriers.Logic gates can be constructed.Logic gates can be constructed.
“1” “0”
1 1
QCA Wire
1 0
QCA Inverter
Stable
Unstable
22227 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Summary and ChallengesSummary and ChallengesSummarySummary
Electrons confined on an island.Electrons confined on an island.Allowed energy levels are discrete and allow the device to fluctuate Allowed energy levels are discrete and allow the device to fluctuate between conducting and non-conducting states.between conducting and non-conducting states.SET – 2 dimensional device with gate bias control.SET – 2 dimensional device with gate bias control.QD – device with electron presence as state.QD – device with electron presence as state.QCA – Arrays of QDs used for computing.QCA – Arrays of QDs used for computing.
ChallengesChallengesBackground charge may offset states (noise sensitivity)Background charge may offset states (noise sensitivity)Sensitivity of tunneling current to barrier width (lithographic Sensitivity of tunneling current to barrier width (lithographic accuracy)accuracy)Sensitivity to barrier widthsSensitivity to barrier widthsCryogenic operationCryogenic operation
Open ProblemsOpen ProblemsLithographic methods with guaranteed accuracyLithographic methods with guaranteed accuracySelf assembly of systemsSelf assembly of systemsBackground charge eliminationBackground charge eliminationSynthesis and verification techniques neededSynthesis and verification techniques neededTesting of these devices as stuck-at models may be inadequate.Testing of these devices as stuck-at models may be inadequate.
23237 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
OutlineOutline
IntroductionIntroductionNano scale MOSFETNano scale MOSFETCarbon Nanotube FETsCarbon Nanotube FETsSolid State Quantum DevicesSolid State Quantum DevicesMolecular ElectronicsMolecular ElectronicsChallenges and current state of the artChallenges and current state of the artConclusionsConclusions
24247 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Molecular ElectronicsMolecular ElectronicsIncentivesIncentives
Molecules are nano-scaleMolecules are nano-scaleSelf assembly is achievableSelf assembly is achievableVery low-power operationVery low-power operationHighly uniform devicesHighly uniform devices
Quantum Effect DevicesQuantum Effect DevicesBuilding quantum wells using moleculesBuilding quantum wells using molecules
Electromechanical DevicesElectromechanical DevicesUsing mechanical switching of atoms or moleculesUsing mechanical switching of atoms or molecules
Electrochemical DevicesElectrochemical DevicesChemical interactions to change shape or orientationChemical interactions to change shape or orientation
Photoactive DevicesPhotoactive DevicesLight frequency changes shape and orientation.Light frequency changes shape and orientation.
25257 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Molecular ElectronicsMolecular Electronics
Mechanical synthesisMechanical synthesisMolecules aligned using a scanning tunneling Molecules aligned using a scanning tunneling microscope (STM)microscope (STM)Fabrication done molecule by molecule using STMFabrication done molecule by molecule using STM
Chemical synthesisChemical synthesisMolecules aligned in place by chemical interactionsMolecules aligned in place by chemical interactionsSelf assemblySelf assemblyParallel fabricationParallel fabrication
Benzene ringAcetylene linkageThiol
26267 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
An Atomic RelayAn Atomic Relay
27277 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
Summary and ChallengesSummary and ChallengesSummarySummary
Parallel self assemblyParallel self assemblyVery regular structuresVery regular structuresMany alternatives proposed but inherent problemsMany alternatives proposed but inherent problemsVery low energy operationVery low energy operation
ChallengesChallengesSignal restoration and gainSignal restoration and gainFinding non-interacting chemicalsFinding non-interacting chemicalsChemical reactions stochastic with by-productsChemical reactions stochastic with by-productsSlow operating speedsSlow operating speeds
Open ProblemsOpen ProblemsSelf assembling of devicesSelf assembling of devicesIncreased speed of operationIncreased speed of operationGuaranteed switching of molecules (HP- UCLA devices)Guaranteed switching of molecules (HP- UCLA devices)Simulation models and CADSimulation models and CAD
28287 Jan 20047 Jan 2004 17th Int'l Conference on VLSI Design17th Int'l Conference on VLSI Design
ConclusionConclusion
CMOS technology is approaching CMOS technology is approaching saturation – problems in the nanometer saturation – problems in the nanometer rangerangeSeveral new possibilities emergingSeveral new possibilities emerging Carbon nanotubes (CNT)Carbon nanotubes (CNT) Single-electron transistor (SET) and Single-electron transistor (SET) and
quantum dots (QD)quantum dots (QD) Molecular computing devicesMolecular computing devices