IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014 1269
A Z-Source Half-Bridge ConverterGuidong Zhang, Zhong Li, Bo Zhang, Member, IEEE,
Dongyuan Qiu, Member, IEEE, Wenxun Xiao, and Wolfgang A. Halang
Abstract—Applying an LC network into a half-bridge con-verter, a novel Z-source half-bridge converter is presented, inwhich less LC components are needed compared to the conven-tional one. This Z-source half-bridge converter can solve not onlythe problems of the shoot-through and limited voltage but also theproblem of imbalance at the midpoint voltage of input capacitors.Furthermore, it can generate a broader range of output voltagevalues and much more kinds of waveforms, such as the variedpositive or negative output voltages and the varied time ratiobetween positive and negative voltages, which are particularlydesirable for some special power supplies, like the electrochemicalpower supply. Finally, the proposed converter is implemented in aprototype, and the experimental results can verify the effectivenessof the proposed converter.
Index Terms—Half-bridge converter, reduced number,shoot-through, Z-source.
I. INTRODUCTION
CONVENTIONAL half-bridge converters have theirswitches in series, as shown in Fig. 1, with which the
shoot-through can occur [1], which means that the strongcurrent flowing through the switches makes them break down.Moreover, the ac output voltage is limited below the dc voltage,which is named the limited voltage problem, because, in prac-tice, ac output voltage is sometimes desirable to be higher thanthe dc voltage. Furthermore, an unbalanced midpoint of inputcapacitors in conventional half-bridge converters leads to largeripples [2], [3], making the system unstable.
To solve the unbalanced midpoint problem, Eloy-Garciaet al. proposed an extended direct power control algorithmto balance the midpoint voltage in multilevel neutral-point-clamped (NPC) inverters [4], [5]. Although the method isdesigned for three-phase inverters and multilevel NPC, it is alsoapplicable to a single-phase half-bridge converter. Additionally,
Manuscript received August 20, 2012; revised November 21, 2012 andFebruary 3, 2013; accepted March 20, 2013. Date of publication April 5, 2013;date of current version August 23, 2013. This work was supported in part bythe Key Program of the National Natural Science Foundation of China underGrant 50937001.
G. Zhang is with the School of Electric Power, South China Universityof Technology, Guangzhou 510640, China, and also with the Faculty ofMathematics and Computer Science, FernUniversität in Hagen, 58084 Hagen,Germany (e-mail: [email protected]).
Z. Li was with the Faculty of Mathematics and Computer Science,FernUniversität in Hagen, 58084 Hagen, Germany. He is now with the Facultyof Engineering, University of Duisburg–Essen, 47057 Duisburg, Germany(e-mail: [email protected]).
W. A. Halang is with the Faculty of Mathematics and Computer Science,FernUniversität in Hagen, 58084 Hagen, Germany (e-mail: [email protected]).
Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2013.2257146
Fig. 1. Conventional half-bridge converter.
Win et al. and Tanaka et al. proposed a half-bridge-converter-based active power quality compensator with a dc voltagebalancer to balance voltages of two dc capacitors [6], [7].
To solve the limited voltage problem, adding a boost circuitinstead of the source or adding a step-up transformer in parallelwith the output part has been proposed [8], where the outputvoltage is fixed due to the fixed turn ratio of the transformer.
In order to solve the shoot-through problem, a shoot-throughprotection scheme has been proposed [9], but it is only applica-ble to specially designed switches. In addition, a novel controlstrategy based on a digital signal processor [10] has also beenproposed, which is like traditional methods focusing on controldesign instead of redesigning the main circuit. Redesigning themain circuit not only can reduce the complexity and cost butalso can enhance the stability of the system.
To solve the limited voltage problem and the shoot-throughproblem better, Peng has first used an LC network, which isnamed a Z-network as shown in Fig. 2, to couple with the dcsource in the converters and, thus, proposed a novel source,which is different from the voltage source and the currentsource and is named as a Z-source (see Fig. 2) [11]. Since then,the Z-source technology has greatly advanced. For example,Peng et al. have proposed some novel Z-source circuits [12],[13] and corresponding control methods [14], [15]. FollowingPeng’s work, new Z-source circuits and control methods havealso been proposed, such as the algorithms for controlling boththe dc boost and ac output voltage of Z-source inverters [16] anddual-input–dual-output Z-source inverters [17]; moreover, theZ-source technology has been applied in practice, for instance,in fuel cell systems [18], motor drives [19], distributed powergenerations [20], photovoltaic systems [21], and battery hybridelectric vehicles [22]. The Z-source converter can work inthe shoot-through mode, and its output voltage can reach abroader range than that of the conventional ones. However,the range of the output voltage is not broad enough for somespecial applications, like electrochemical power supply [23],which requires a much broader range of output voltage [24] andabundant waveforms in various shapes [25], [26].
1270 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 2. Z-source half-bridge converter with two Z-networks.
Applying Peng’s Z-source concept into half-bridge convert-ers [11] results in a Z-source half-bridge converter, in which anLC Z-network should be parallelized to the power source. Itis known that two input capacitors in the half-bridge converterplay the role of two dc sources; therefore, two LC Z-networksare needed to couple with the capacitors, as shown in Fig. 2[27], [28]. Although the characteristics of the Z-source may beobtained, many additional devices, such as LC elements, areused in the circuit, which increase the cost, size, and weight ofthe converter.
Here, a novel Z-source half-bridge converter is proposed,in which, instead of putting two LC Z-networks to couplewith the capacitors, only one LC Z-network is required tobe placed between the input capacitors and the switches. Thisproposed Z-source half-bridge converter not only can solve thelimited voltage and the shoot-through problems but also cansolve the unbalanced midpoint voltage problem. Furthermore,it can generate a much broader range of output voltages andmore abundant waveforms than the conventional Z-source con-verter. It is also remarked that it has higher efficiency thanconventional half-bridge converters, where an additional dc–dcboost converter is needed to obtain such desired outputs asthe proposed converter can, as it is stated in [11] that “TheZ-source inverter can generate boost–buck voltage, minimizecomponent count, increase efficiency, and reduce cost” and“For applications where over drive is desirable and the availabledc voltage is limited, an additional dc–dc boost converter isneeded to obtain a desired ac output. The additional powerconverter stage increases system cost and lowers efficiency.”
A typical application of the Z-source half-bridge converteris in the electrochemical power supply, whose output voltagesare requested to be varied, including varied positive or negativeoutput voltages and the varied time ratio between positiveand negative voltages. These characteristics, desired in elec-trochemical power supply, are the very ones of the proposedconverter. For example, in order to realize the smooth electro-plating products, the current densities and directions should bevaried according to the requests of electroplating technology[25], [26]. Traditionally, the engineer had to compose sev-eral cascaded subcircuits and use complex control methodsto generate an overlapped waveform of multioutput voltages[23], [24]. However, the disadvantages lie in that it is hard tocontrol and regulate the output voltages, and the use of cascadedsubcircuits not only increases the cost and size but also leads toa more complex bulky structure and instability of the system.
Fig. 3. Diagram of electroplating.
Electroplating is a kind of electrochemical process, whosefundamental operation diagram and operation principle areshown in Fig. 3 and described in the following.
The electroplating process is a redox reaction, with funda-mental components: two electrodes (+ and −), a dc source(Vd), and the solution, as shown in Fig. 3. The purpose of theelectroplating is to make the metal ions cover the surface of thenegative electrode evenly and smoothly. However, due tothe nonuniformity of the solution, the dc-voltage direction andthe current density should be changed from time to time, whichrequires complicated designs according to different productsand processes [25], [26].
With the rapid growth of the demand on electroplating prod-ucts with very different voltages and duties, there are morestringent requirements on the electrochemical power suppliesto provide a broad range of outputs, asymmetrical positive andnegative voltages, step waves, recurrent pulses, square waves,triangular waves, and saw-tooth waves [24], which can be quitewell fulfilled by the proposed converter.
The rest of this paper is organized as follows. Section IIgives the system design and analysis. Then, in Section III,the midpoint balances of input capacitors in the traditionalconverter and the proposed converter are compared to show thatthe proposed converter is more stable. The parameter designof the Z-network is discussed in Section IV. In Section V,simulations via Simulink software are conducted to verify theanalysis. In Section VI, a prototype is designed to illustrate theperformance of the proposed converter. Finally, a conclusion isdrawn in Section VII.
II. SYSTEM DESIGN AND ANALYSIS
The proposed converter is depicted in Fig. 4, in which an LCZ-network, consisting of capacitors C1 and C2 and inductorsL1 and L2, is integrated into a traditional half-bridge converter,consisting of capacitors Cd1 and Cd2, switches S1 and S2, anddiode D, which is used to prevent the current from flowing backto the source. Therein, the use of the inductors in the Z-networkis to avoid strong current in the circuit when the switches are inthe shoot-through state.
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1271
Fig. 4. Z-source half-bridge converter.
For simplicity, the following conditions are assumed: 1) Allthe components are ideal; 2) the dead time in the driven pulsesis ignored; 3) L1 = L2 and C1 = C2 in the Z-network; 4) C1,C2, Cd1, and Cd2 are large enough; and 5) the freewheelingdiodes of the switches are ignored in the analysis since the loadcharacteristic of the electrochemical solution is resistance orresistance with a small capacitance.
Denote the duties of the switches S1 and S2 by D1 andD2, respectively. The proposed converter performs differentlyin two cases: D1 +D2 ≤ 1 and D1 +D2 > 1.
A. Case 1: D1 +D2 ≤ 1
In this case, S1 and S2 are not switched on at the same time;then, the circuit is in the non-shoot-through state.
There are three modes corresponding to the states of theswitches. In the first mode, Fig. 5(a) shows an equivalent circuitfor the mode when the S1 is on and S2 is off, in which the cur-rent flows out of the source, through the diode, the Z-network,and S1, and then back to the source. The arrows indicate thecurrent directions. In the second mode, Fig. 5(b) shows anequivalent circuit of that when S1 and S2 are off, in which thecurrent also flows out of the source, through the diode and theZ-network, and back to the source; there is no output here. Inthe third mode, Fig. 5(c) shows an equivalent circuit of thatwhen S2 is on and S1 is off, in which the diode suffers a neg-ative voltage and, thus, turns off. The current flows out of thesource, through the load, S2, and the Z-network, and then backto the source. Furthermore, the current direction is also indi-cated. The operation process for this case is similar to the tradi-tional one for half-bridge converters, which is not detailed here.
B. Case 2: D1 +D2 > 1
In this case, the behavior of the switches in the circuit leadsto three modes within a switch period T , which correspond tothree linear equivalent circuits: Mode 1, when S1 and S2 areon; Mode 2, when S1 is on and S2 is off; and Mode 3, when S1
is off and S2 is on, as shown in Fig. 6(a)–(c), respectively.Denote t0 as the beginning of one period, t1 as the mode
transition instant from mode 1 to mode 2, i.e., t1 = t0 + (D2 +D1 − 1)T , t2 as the mode transition instant from mode 2 tomode 3, i.e., t2 = t1 + (1−D2)T , and t3 = T as the end ofthe period.
Fig. 5. Equivalent circuits in case 1. (a) S1 on and S2 off. (b) S1 off andS2 off. (c) S1 off and S2 on.
In the steady state of the converter, its operation process ina switch period is analyzed in the following, and the outputvoltage vo will be deduced in each mode.
1) Mode 1: t ∈ [t0, t1]: As shown in Fig. 6(a), in loops 1and 2, capacitors C1 and C2 discharge the energy to inductorsL1 and L2; thereafter, iL1
and iL2increase. Thus, L1 and L2
store the energy, and one has{ vL1= vC1
vL2= vC2
(1)
where iL1, iL2
, vL1, vL2
, vC1, and vC2
are the currents of L1
and L2 and the voltages of L1, L2, C1, and C2, respectively.The voltage of diode D is −(vC1
+ vC2− Vd), so D un-
dertakes negative voltage stress and, thus, turns off. The en-ergy of C2 is delivered to the load RL and Cd2 through theC2−RL−Cd2 loop, so Cd2 charges and Cd1 discharges.
1272 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 6. Equivalent circuits in case 2. (a) Mode 1: S1 on and S2 on. (b) Mode 2:S1 on and S2 off. (c) Mode 3: S1 off and S2 on.
In terms of the C2−RL−Cd2 loop, the output voltage of theconverter reads
vo = vC2− vCd2
(2)
where vCd2is the voltage of Cd2.
2) Mode 2: t ∈ [t1, t2]: As shown in Fig. 6(b), S1 is on, andS2 is off. In loop 1, the source Vd and L1 discharge the energyto C2, so that vC2
increases. In loop 2, the source Vd and L2
discharge the energy to C1; thereafter, vC1increases. Then, the
energy of C2 is delivered to the load RL and Cd2 through theC2−RL−Cd2 loop, so Cd2 charges and Cd1 discharges. Fromloop 1, one has
vL1= Vd − vC2
. (3)
In terms of the C2−RL−Cd2 loop, the output voltage of theconverter is the same as that in (2).
Mode 3: t ∈ [t2, t3]: In Fig. 6(c), S1 is off, and S2 is on.In loop 1, the source Vd and L1 discharge the energy to C2;thus, vC2
increases. Similarly, in loop 2, Vd and L2 dischargethe energy to C1; thus, vC1
increases. The energy of L2 andCd2 is delivered to RL through the L2−Cd2−RL loop, so Cd2
discharges and Cd1 charges. In terms of loop 1, one has thesame equation as (3).
In terms of the Vd−D−C1−RL−Cd2 loop, the output volt-age is
vo = −(vCd2+ vC1
− Vd). (4)
As a result, vo can be deduced as follows.The voltage–second characteristic of L1 leads to
∫ T
0
vL1dt = 0. (5)
Substituting (1) and (3) into (5) leads to
(D2+D1−1)TvC1+(2−D2−D1)T (Vd−vC2
)=0. (6)
Assume that L1 = L2, C1 = C2, and C1 and C2 are largeenough. Due to the structural symmetry of the Z-network, (6)can be rewritten as
vC1≈ vC2
=2−D1 −D2
3− (D1 +D2)Vd. (7)
The ampere–second property of Cd2 implies that∫ T
0
iCd2dt = 0 (8)
where iCd2is the current of Cd2.
Denote the voltage and current of Cd1 by vCd1and iCd1
, re-spectively. It is known from Fig. 6 that vCd1
+vCd2=Vd. Denote
the errors of vCd1and vCd2
by ΔvCd1and ΔvCd2
, respectively.Due to Vd being a constant, one has ΔvCd1
=−ΔvCd2, and
straightforwardly, iCd1= iCd2
in terms of i=Cdu/dt.Moreover, from io = iCd1
+ iCd2, one has iCd2
= io/2,where io is the current of the load; thereafter, (8) can berewritten as
(vC2−vCd2
)
2RLD1T+
−(vC2+vCd2
−Vd)
2RL(1−D1)T =0 (9)
and it follows that
vCd2= (2vC2
− Vd)D1 − vC2+ Vd. (10)
When switch S1 is on, substituting (7) and (10) into (2)results in the positive output of the converter vp as
vp = vo = vC2− vCd2
=(1−D1)
3− 2(D1 +D2)Vd. (11)
When the switch S2 is on and S1 is off, substituting (7) and(10) into (4) leads to the negative output of the converter vn as
vn = vo = vd − vC2− vCd2
= − D1
3− 2(D1 +D2)Vd. (12)
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1273
Fig. 7. Relationship figure of D1, D2, and vo/Vd.
Fig. 8. Zooming in of Fig. 7.
According to (11) and (12), the relationships of D1, D2, andvo/Vd are drawn in Fig. 7. Therein, vo/Vd increases dramati-cally as D1 +D2 is about 1.5, which is zoomed in in Fig. 8.It is remarked from Figs. 7 and 8 that the novel converter cangenerate abundant output voltages by adjusting D1 and D2.
When vo/Vd < 1, the converter functions as a buck con-verter; otherwise, the converter acts as a boost converter. There-fore, it is a buck–boost converter. By controlling the duty ofthe switches, special output voltages can be obtained, includingthe buck–boost voltages, asymmetric and symmetric voltages,positive and negative peak output voltages, and the time ratiobetween positive and negative voltages.
Additionally, according to (11) and (12), the values of vp andvn are not equal when D1 �= 0.5, but they are equal when D1 =0.5, which will be explained hereinafter.
First, when D1 = 0.5, the key waveforms of the Z-sourcehalf-bridge converter in case 2 are drawn in Fig. 9 according tothe analysis for three modes, where QS1
and QS2stand for the
driving voltages of switches S1 and S2, respectively; id is thecurrent of diode D; iL1
and iL2are the currents of inductances
L1 and L2, respectively; vC1, vC2
, vCd1, and vCd2
are thevoltages of the capacitances C1, C2, Cd1, and Cd2, respectively;and vo is the output voltage. Additionally, modes 1, 2, and 3 aredistinguished in red, blue, and green colors, respectively. Thelimited output voltages of the traditional half-bridge converter
Fig. 9. Key waveforms of the Z-source half-bridge converter in case 2 whenD1 = 0.5 and D2 = 0.7.
Vd/2 and −Vd/2 are marked at the output voltage waveformvo, and it is shown that the output voltages of the proposedconverter can exceed the limited one.
Second, the corresponding waveforms for D1 �= 0.5 areshown in Fig. 10. It is remarked that the output voltage vo inFig. 10 is quite different from that in Fig. 9; the positive andnegative values of vo in Fig. 9 are symmetrical, but they areasymmetrical in Fig. 10. This means that the proposed convertergenerates many kinds of output voltages, fulfilling the require-ments of the electrochemical power supply, such as variouspositive or negative output voltages, and the regulated durationat negative or positive output voltage, which has prominent ad-vantages over traditional methods by using complicated controlmethods and multiple cascaded subcircuits.
Moreover, the efficiency of the converter η is given by
η =Pout
Pin
=D1
v2p
R + (1−D1)v2n
R
VdIav
=D1v
2p + (1−D1)v
2n
RVdIav
=D1(1−D1)Vd
(3− 2(D1 +D2))2 RIav
(13)
where Pout = D1v2p + (1−D1)v
2n/R, Pin = VdIav, and Iav
are the output power, the input power, and the average inputcurrent, respectively. Here, the conduction and switching lossis taken into account, which is indicated in Pin − Pout.
1274 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 10. Waveforms of the Z-source half-bridge converter in case 2 whenD1 = 0.7 and D2 = 0.5.
III. MIDPOINT BALANCE OF INPUT CAPACITORS
The stability of the midpoint voltage in the converter plays akey role for the system’s stability. The midpoint voltages of theinput capacitors in the conventional converter and the proposedconverter will be analyzed and compared in this section.
A. Midpoint Voltage in Conventional Half-Bridge Converters
In conventional half-bridge converters, there are always someproblems caused by the midpoint imbalance of the input capaci-tor voltage. In this section, the midpoint voltage in conventionalhalf-bridge converters will be analyzed, and the fluctuationequation of the midpoint voltage will be deduced.
Fig. 11 shows the equivalent circuits of that in Fig. 1.In a switching period, S1 is on and S2 is off as t ∈ [0, D1T ],
while S1 is off and S2 is on as t ∈ [D1T, T ].Denote the initial voltage of Cd2 by VCd20. In terms of
the Kirchhoff’s voltage law (KVL), vCd2can be derived in
frequency domain as
vCd2(s) =
Vd
s− Vd − VCd20
s+ 1Cd2R
. (14)
Employing Laplace inverse transformation to (14) results in
vCd2(t) = Vd − (Vd − VCd20)e
− tCd2R . (15)
Denote the maximal and the minimal voltages of vCd2by
vCd2 max and vCd2 min, respectively, and the maximal fluctua-
Fig. 11. Equivalent circuits of the conventional half-bridge converter.(a) Mode 1: S1 on and S2 off. (b) Mode 2: S1 off and S2 on.
tion of vCd2by ΔV . Following (15), one has
ΔV = vCd2 max − vCd2 min
=(Vd − VCd20)
(1− e
− D1T
Cd2R
). (16)
In the high-frequency power supply, T is always very small,the input capacitance Cd2 is always quite large, particularlyin electrochemical application, and its load is very large.Thus, D1T is much smaller than Cd2R, and (16) can beapproximated by
ΔV ≈ D1t
Cd2R(Vd − VCd20). (17)
B. Midpoint Voltage in Z-Source Half-Bridge Converters
It is described in [29] that the input part can be regarded as adc voltage source or a dc current source due to the Z-network.Similarly, the output part of the Z-network can be treated as adc current source. Hence, the equivalent circuits are derived asfollows.
The differential equation of the circuit shown in Fig. 12(a)can be described as
Cd2dvCd2
dt= Ip (18)
where Ip is the current of the constant current source.Integrating both sides of (18) leads to
vCd2(t) = VCd20 +
∫IpCd2
dt. (19)
Denote the maximal fluctuation of vCd2as shown in Fig. 12
by ΔVZ . Then, from (19), one has
ΔVZ = vCd2 max − vCd2 min
=
∫ D1T
0
IpCd2
dt = D1TIpCd2
. (20)
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1275
Fig. 12. Equivalent circuits of the Z-source half-bridge converter. (a) Mode 1:S1 on and S2 off. (b) Mode 2: S1 off and S2 on.
Ip can be derived by Kirchhoff’s current law (KCL) as
Ip =Vd − VCd20 − VIp
R(21)
where VIp is the voltage of the constant current source.Substituting (21) into (20) leads to
ΔVZ = D1TVd − VCd20 − VIp
Cd2R. (22)
Therein, the ratio of ΔVZ to ΔV can be derived from (17) and(22) as
ΔVZ
ΔV=
Vd − VCd20 − VIp
VdVCd20× 100%. (23)
It is obvious that ΔVZ < ΔV , if VIp is positive; the smallerthe ΔVZ/ΔV is, the smaller the ripple in the proposed con-verter is and, consequently, the more stable the proposed con-verter is. ΔVZ/ΔV will become very small, or even zero, ifVIp is very close to the value of Vd − VCd20, and VIp can bedesigned by the parameters of the Z-network.
It is remarked that the proposed converter is more stablethan the traditional one with regard to the problem of the inputcapacitor stability.
IV. PARAMETER DESIGN
The parameters of the Z-network are designed in this section,including capacitor and inductance parameter design.
A. Parameter Design of the Capacitor in the Z-Network
Normally, the design of the capacitor is to determine the ratedvoltage and capacitance with a permitted fluctuation range xC%(xC is preassigned), a given output voltage Vo, a given outputcurrent Io, and a given switching period T .
From (7), (11), and (12), one has
vC2=2−D1−D2
D1Vo, when (S1)=(on) (24)
vC2=2−D1−D2
1−D1Vo, when (S1, S2)=(off, on). (25)
In terms of KCL, the equations of the connected nodesof L2−C1−S2 in Fig. 6(a), L1−C2−S1 in Fig. 6(b), andL2−C1−S2 in Fig. 6(c) can be derived as⎧⎨
⎩iL2
= iC1+ io, when (S1, S2) = (on, on)
iL1= iC2
+ io, when (S1, S2) = (on, off)iL2
= io − iC1, when (S1, S2) = (off, on).
(26)
Denote the rms currents of L2 and C2 by IL2and IC2
,respectively. Then, from (26), one has
IC2≈ IL2
=Io2. (27)
1) Determination of the Rated Voltage: The range of vC2
is determined by (24) and (25). Thereby, the rated voltage ofC2 can be determined by the maximal VC2M . Considering thesafety margin, the rated voltage of C2 is normally set between1.5VC2M and 2VC2M .
2) Determination of the Rated Capacitance: The ripplesof the capacitors have great influence on the stability of theconverter, whose permitted fluctuation range can be used todesign the capacitance.
Then, the capacitors in the Z-network can be designed ac-cording to the differential equation of capacitors
C2 =iC2
dt
dvC2
. (28)
The high harmonic frequency of the capacitance is nearlyequal to the switching frequency of the converter, as shown inFig. 9, namely,
dt ≈ (D1 +D2 − 1)T. (29)
Denote the permitted error of VC2M by dvC2, according to
the permitted fluctuation range xC%; dvC2is expressed as
dvC2= xC%VC2M . (30)
Substituting (27), (29), and (30) into (28) leads to
C2 =Io(D1 +D2 − 1)T
2xC%VC2M. (31)
1276 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Therein, the range of the capacitance can be calculated, and themaximum is taken as the rated capacitance.
B. Parameter Design of the Inductor in the Z-Network
Similar to the parameter design of the capacitor, the param-eter design of the inductor is to determine the rated currentand capacitance with a permitted fluctuation range xL% (xL ispreassigned), a given output voltage Vo, a given output currentIo, and a given switching period T .
1) Determination of the Rated Current: IL2can be deter-
mined by (27). Considering the safety margin, the rated currentof L2 is normally taken as 2IL2
.2) Determination of the Rated Inductance: The ripples of
the inductors also have great influence on the stability of theconverter; therefore, the inductance can be designed in terms ofthe permitted ripples.
The inductances in the Z-network can be designed accordingto the differential equation of inductances
L2 =vL2
dtLdiL2
. (32)
In the L1−C2−L2−C1 loop, the KVL equation can be ex-pressed as vL2
+ vC1= vL1
+ vC2. In the Z-network, the rms
voltages of C1, C2, L1, and L2 are denoted by VC1, VC2
, VL1,
and VL2, respectively, and one has vC1
≈ VC2and VL2
≈ VL1.
Thereby, the maximum of vL2is derived as
VL2M ≈ VC2M . (33)
The high harmonic frequency of the inductance is nearlyequal to the switching frequency of the converter, as shown inFig. 9, so the time interval dtL in (32) can be obtained as
dtL ≈ (D1 +D2 − 1)T. (34)
Denote the permitted error of IL2by diL2
. According to thepermitted fluctuation range xL%, diL2
is expressed as
diL2= xL%IL2
. (35)
Substituting (24), (25), (27), and (33)–(35) into (32) leads tothe inductance of L2
L2 =2VC2M (D1 +D2 − 1)T
xL%Io. (36)
V. SIMULATION RESULTS
To verify the feasibility and validity of the proposed con-verter, Simulink software is applied for the simulation of theconverter.
The preassigned parameters are as follows: xC% = 1%,xL% = 10%, Vd = 48 V, Vo = 100 V, Io = 10 A, and T =20 μs. According to the design, the parameters of the con-verter can be calculated: C1 = C2 = 482.5 μF and L1 = L2 =105.5 μH. However, in practice, the parameters can be chosenas follows: C1 = C2 = 470 μF and L1 = L2 = 100 μH.
Fig. 13. Simulation waveforms when D1 = 0.5 and D2 = 0.7.
Fig. 14. Simulation waveforms when D1 = 0.7 and D2 = 0.5.
The simulation results are shown in Figs. 13 and 14, whichare consistent to the theoretical analyses shown in Figs. 9and 10.
VI. EXPERIMENT RESULTS
A prototype of the Z-network converter is built as shownin Fig. 15, and the parameters are chosen as follows: Cd1 =Cd2 = 470 μF, C1 = C2 = 470 μF, L1 = L2 = 100 μH, R =100 Ω, and T = 20 μs.
The main circuit is in the left side in Fig. 15, composed of L1,L2, C1, C2, switches (type: IRFP450), and the resistive loadR, while the driving circuit is in the right side, composed of
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1277
Fig. 15. Prototype of the proposed converter.
Fig. 16. Experimental waveforms in shoot-through case (D1 = 0.5 andD2 = 0.7).
two SG3525 ICs being applied to generated two synchronousoverlapped driving signals and TLP250 ICs being used todrive the switches, whose working frequency and duties can beadapted by the adjustable resistors.
The waveforms of the converter at D1 = 0.5 and D2 = 0.7with an input voltage of 40 V are shown in Fig. 16. Therein,the upper waveform refers to VGS (gate–drain voltage) of theswitch S1, the middle one is VSD (source–drain voltage) ofthe switch S2, which is not but can be synchronized to thedriving waveform of S2, and the lower one is the output voltageof the load R, whose negative and positive output voltagesare symmetric, and they are all about 50 V. This verifies theanalytical and simulation results.
Fig. 17 shows the experimental waveforms of the converterwhen D1 = 0.7 and D2 = 0.5. Therein, the negative and pos-itive output voltages are asymmetric; the positive one is about20 V, which is nearly equal to Vd/2 and has a width of D1T ,while the negative one is 40 V, which is much larger than Vd/2.The experimental results are also consistent with the simulationresults.
In order to verify that the proposed converter has a balancedmidpoint voltage, the experimental result is shown in Fig. 18.Therein, the ripples of vCd2
in the proposed converter havemaximal peak-to-peak values just about 98.4 mV.
The start-up waveforms with the start-up time of about 80 msare shown in Fig. 19.
The efficiency is obtained through an experiment and thecalculation according to (13), with regard to the resistance
Fig. 17. Experimental waveforms in shoot-through case (D1 = 0.7 andD2 = 0.5).
Fig. 18. Ripple experiment waveform of vCd2in the proposed converter.
Fig. 19. Start-up output waveforms.
Fig. 20. Comparison between the experimental and estimation efficiencies.
increasing from 1 to 10 Ω at a step length of 1 Ω, as shownin Fig. 20. It is remarked that, as the resistance increases,the power reduces and the efficiency decreases; moreover, theoutput voltages can be regulated.
1278 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
VII. CONCLUSION
Inspired by the Z-source converter, this paper has proposeda novel Z-source half-bridge converter that can output buck–boost voltages. Different from the Z-source converter, it needsonly one LC Z-network between the input capacitors and theswitches. Additionally, the novel converter is more stable thanthe conventional one according to the analysis of the midpointbalance of input capacitors.
Moreover, the converter has been analyzed in two differ-ent states, including the shoot-through and non-shoot-throughstates. Furthermore, the feature of the proposed converterowning abundant outputs under an appropriate control is verydesirable for requirements of the electrochemical power supply.Finally, simulations and experiments have been carried out toverify the effectiveness of the proposed converter.
ACKNOWLEDGMENT
The first author would like to thank F. Xie for his help inconducting a part of the experiments.
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Guidong Zhang was born in Guangdong, China,in 1986. He received the B.Sc. degree in electri-cal engineering and automation from the Schoolof Automation and Information Engineering, Xi’anUniversity of Technology, Xi’an, China, in 2008. Hehas been working toward the Ph.D. degree in powerelectronics and electric transmission, by taking suc-cessive postgraduate and doctoral programs, in theSchool of Electric Power, South China Universityof Technology, Guangzhou, China, since September2010. He has also been working toward the Ph.D.
degree at the Faculty of Mathematics and Computer Science, FernUniversitätin Hagen, Hagen, Germany, since 2011.
His research interests include power electronics topology and applications.
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1279
Zhong Li received the B.Sc. degree from SichuanUniversity, Chengdu, China, in 1989, the M.Sc. de-gree from Jinan University, Guangzhou, China, in1996, the Ph.D. degree from the South China Uni-versity of Technology, Guangzhou, in 2000, and theD.Sc. (Habilitation) degree from the FernUniversitätin Hagen, Hagen, Germany, in 2007.
He was an Adjunct Professor with the FernUni-versität in Hagen. He is currently with the Fac-ulty of Engineering, University of Duisburg–Essen,Duisburg, Germany. His research interests include
fuzzy logic and fuzzy control, chaos theory and chaos control, intelligentcomputation and control, complex networks, and swarm intelligence. He servesas Associate Editor for six international journals and has published three bookswith Springer-Verlag, 18 book chapters, 53 journal papers, and 38 conferencepapers.
Bo Zhang (M’03) was born in Shanghai, China, in1962. He received the B.Sc. degree in electrical engi-neering from Zhejiang University, Hangzhou, China,in 1982, the M.Sc. degree in power electronics fromSouthwest Jiaotong University, Chengdu, China, in1988, and the Ph.D. degree in power electronics fromthe Nanjing University of Aeronautics and Astronau-tics, Nanjing, China, in 1994.
He is currently the Vice Dean of the School ofElectric Power, South China University of Technol-ogy, Guangzhou, China, where he is also a Professor.
He has authored or coauthored more than 330 papers and is the holder of 30patents. His current research interests include nonlinear analysis and control ofpower supplies and ac drives.
Dongyuan Qiu (M’03) was born in China in 1972.She received the B.Sc. and M.Sc. degrees from theSouth China University of Technology, Guangzhou,China, in 1994 and 1997, respectively, and the Ph.D.degree from the City University of Hong Kong,Kowloon, Hong Kong, in 2002.
She is currently a Professor with the School ofElectric Power, South China University of Technol-ogy, Guangzhou. Her main research interests includedesign and control of power converters, fault diag-nosis, and sneak circuit analysis of power electronic
systems.
Wenxun Xiao was born in Hainan, China, in 1979.He received the B.Sc., M.Sc., and Ph.D. degrees inelectrical engineering from the South China Uni-versity of Technology, Guangzhou, China, in 2002,2005, and 2008, respectively.
Since 2008, he has been with the School of Elec-trical Power, South China University of Technology,where he is currently an Associate Professor. Hisresearch interests include topology and control meth-ods of switching power supplies, and multiphysicscoupling of power electronics equipment.
Wolfgang A. Halang received the Ph.D. degreein mathematics from Ruhr-Universität Bochum,Bochum, Germany, in 1976, and the Ph.D. degreein computer science from the Universität Dortmund,Dortmund, Germany, in 1980.
He worked both in industry (Coca-Cola GmbHand Bayer AG) and in academia (King Fahd Uni-versity of Petroleum and Minerals, Dhahran, SaudiArabia, and the University of Illinois at Urbana–Champaign, Urbana, IL, USA), before he wasappointed as the Chair of Applications-Oriented
Computing Science and the Head of the Department of Computing Science,University of Groningen, Groningen, The Netherlands. Since 1992, he has beenthe Chair of Computer Engineering with the Faculty of Electrical and ComputerEngineering, FernUniversität in Hagen, Hagen, Germany, where he was theDean from 2002 to 2006. He was a Visiting Professor with the University ofMaribor, Maribor, Slovenia, in 1997, and the University of Rome II, Rome,Italy, in 1999. His research interests comprise all major areas of hard real-timecomputing with special emphasis on safety-related systems. He is the Founderand was the European Editor-in-Chief of the journal Real-Time Systems, is aMember of the Editorial Boards of four other journals, was a Codirector of the1992 North Atlantic Treaty Organization Advanced Study Institute on Real-Time Computing, has authored 12 books and some 350 refereed book chapters,journal publications, and conference contributions, has edited 20 books, isthe holder of 12 patents, and has given some 80 guest lectures in more than20 countries.
Dr. Halang is active in various professional organizations and technicalcommittees as well as being involved in the program committees of some180 conferences. In the International Federation of Automatic Control, hechaired the Technical Committee on Real-Time Software Engineering beforehe became a Member of the Technical Board from 2002 to 2008 chairing theCoordinating Committee on Computers, Cognition, and Communication forControl.
