ACADEMIC BOOKLET Semester-II - ADCET booklet_TE Sem-II_15_jan...ACADEMIC BOOKLET Year 2015-2016...

Academic Booklet BE semester - II 1

Annasaheb Dange College of Engineering and Technology, Ashta

Department of Electronics & Telecommunication Engineering

Annasaheb Dange College of Engineering and Technology,

Ashta, Tal: Walwa, Dist: Sangli. 416 301 (Maharashtra)

Learning for Professional Performance

ACADEMIC BOOKLET

Year 2015-2016

Class TE

Semester-II




1. INTRODUCTION

Annasaheb Dange College of Engineering and Technology, Ashta (ADCET), one of

the prime technical institutes in Western Maharashtra, was established in 1999 which is

affiliated to Shivaji University, Kolhapur, Maharashtra and is approved by AICTE, New

Delhi. The institute offers undergraduate (U.G.) program leading to Bachelor‟s degree in

Engineering (B. E.) and post graduate (P.G) program leading to master degree in engineering

(M.E) as shown in the following table.

Undergraduate (U.G.) program

Branch Degree Intake

Automobile Engineering B.E. (Automobile Engineering) 60

Civil Engineering B.E. (Civil Engineering) 60

Computer Science and Engineering B.E. (Computer Science and Engineering) 60

Electrical Engineering B.E. (Electrical Engineering) 60 Electronics and Telecommunication Engg B.E. (Electronics & TelecommunicationEngg) 120

Information Technology B.E. (Information Technology) 60

Mechanical Engineering B.E. (Mechanical Engineering) 180

Mechanical Engineering B.E. (Mechanical Automation) 60

Aeronautical Engineering B.E. (Aeronautical Engineering) 60

Post graduate (P.G) program

Branch Degree Intake

Computer Science and Engineering M.E.(Computer Science and Engineering) 36

Electrical Engineering M.E. (Power system Engineering) 18 Electronics and Telecommunication Engg M.E(Electronics & TelecommunicationEngg) 18

Mechanical Engineering M.E. (Design Engineering) 18

Mechanical Engineering M.E. (CAD/CAM) 18

Electronics Engineering M.E. (VLSI & EmbeddedSystems) 18

2. CURRICULUM

2.1 General

Every branch has a course structure prescribed by Shivaji University, Kolhapur,

which in general terms is known as Curriculum. It details the courses to be studied in each

semester. The courses structure along with detail syllabus for each course of each program is

updated periodically and is uploaded on the website of SUK (www.unishivaji.ac.in). The

duration of U.G Engineering Program is of four academic years with two regular semesters in

a year. Total duration of each semester is generally of 20 weeks including the period of

examination.

The teaching scheme consists of Lecture (L), Practical (P), Tutorial (T) & Drawing

(D) as applicable. The evaluation scheme consists of Theory paper of 100 marks, Term work

(TW) of 25/50 marks, Practical/Oral examination (POE/OE) of 50 marks, Oral examination

(OE) of 25 marks.




2.2 Seminar

For few U.G Programs seminar is a course requirement wherein a student is expected

to carry out in-depth study in a specialized area under the guidance of a faculty advisor by

carrying out a literature survey, understanding different aspects related to that area, preparing

a status report based on the topic chosen. A student then shall submit a seminar report and

give an oral presentation to a panel constituted for this purpose. The grading shall be done on

the basis of the depth of the work done, understanding of the problem, technical quality of the

report prepared and presentation given by the student.

2.3 Mini Project/ Project:

Mini Project/Project is a course requirement, wherein under the guidance of a faculty

advisor, a group of maximum four third year/final year students is required to carry out

innovative/contributory/developmental work by applying knowledge earned while

undergoing various theory and laboratory courses in his/her course of study. A student has to

exhibit both analytical and practical skills through the Mini Project/Project work. The mini

project shall be carried out in three phases while the final year project is carried out in four

phases, the evaluation scheme for which is given in detail in Section-6. The quantum of work

expected to be carried out by a student in each phase shall be in accordance with assessment

criteria mentioned in the assessment section.

3. DISCIPLINE AND CONDUCT

3.1 Every student will maintain discipline and decorous behavior both inside and outside the

campus with the faculty and their friends and will not involve in any activity, which shall tend

to bring down the prestige of the institute.

3.2 Any act of indiscipline of a student reported to the Authorities, shall be discussed in ADCET-

ACC meeting. The Committee shall enquire into the charges and recommend necessary action

if the charges are substantiated.

3.3 If a student while studying in the institute is found indulging in anti-national activities

contrary to the provisions of acts and laws enforced by Government he/she shall be liable to

be expelled from the institute without any notice.

3.4 If a student is involved in any kind of ragging, the student shall be liable for strict action as

per Maharashtra anti-ragging act 1999, which is in effect from 15th May 1999.

3.5 A student should not get involved in any activity such as common off. If he/she is found to be

involved in common off then he/she shall be liable to disciplinary action decided by ACC.

3.6 If a student is found guilty of malpractice in examinations then he/she shall be punished as per

the recommendations of lapses committee of Shivaji University, Kolhapur.

3.7 Every student shall be issued photo identification (ID) card which must be retained by his/her

while he/she is registered with ADCET. The valid ID card must be presented for

identification purpose as and when demanded by authorities. Any student refusing to provide

an ID card shall be subjected to disciplinary action.

3.8 A dress code is compulsory on all days except Wednesday & Saturday.

3.9 Students are discouraged from using mobile phones during academic hours. If any student is

found using mobile phones during the academic hours, he will be liable necessary action.

3.10 A student has to submit an undertaking before the start of every semester regarding the

conduct and discipline in the institute. He/she shall be liable for necessary action for his/her

misbehavior anywhere within the campus or outside the campus.

3.11 Any student involved in non-ethical activity while working on computers and internet

shall be governed by cyber crime laws and shall be liable for punishment. 3.12 The library facilities shall be properly used without violation of rules and regulations of

ADCET Library.

3.13 A student of ADCET shall follow the instructions issued by institute from time to time.




4. ATTENDANCE

4.1 The attendance shall be monitored on regular basis during theory and laboratory hours and the

same will be intimated to the parents at the end of every month. The cumulative record of the

attendance will be maintained by the respective class monitor.

4.2 Disciplinary action may be necessitated for such students who come late to both theory and

practical classes.

4.3 No student is permitted to remain absent without prior permission of the authorities.

4.4 As per the norms prescribed by Shivaji university, Kolhapur, the students having attendance

less than 75% are liable to declared as „Defaulters‟.

4.5 The list of the students having attendance less than 75% at the end of each month will be

displayed on the notice board upto 5th day of the preceding month and the same will be

intimated to their parents. Such students will have to furnish necessary documents justifying

their absenteeism and ensuring the required attendance by the end of the semester.

4.6 The list of the students having cumulative attendance less than 75% at the end of second

month will be submitted to the respective HOD‟s upto 5th day of the third month and the same

will be intimated to their parents. Such students along with their parents will be called for

counseling by ACC.

4.7 The students having cumulative attendance less than 75% at the end of the third month will be

declared as „Defaulters‟ after taking the decision in ACC meeting and with prior intimation to

parents. In such cases, the decision of ACC committee shall be final.

4.8 Attendance in Co-curricular and Extra-curricular activities of the Institute and Department is

compulsory.

4.9 It is required to take prior permission from HOD to remain absent from ADCET to attend Co-

curricular and Extra-curricular activities organized by other institutes.

5. FACILITATION TO STUDENTS

5.1 Student Counseling:

On joining the institute, a student or a group of students shall be assigned to a counselor

(Faculty) who shall be mentor for a student throughout his/her tenure in the institute. A

student shall be expected to consult the counselor on any matter relating to his/her academic

performance and the courses he/she may have to take in various semesters. A counselor shall

be the person to whom the parents/guardians should contact for performance related issues of

their ward. The role of a counselor is as outlined below:

1. Provide guidance about the rules and regulations governing the courses of study for a

particular degree.

2. Extend help so that individual student can plan his/her academic programs to suit

his/her career objectives.

3. Pay special attention to weak students.

4. Provide guidance and liaison with parents of students for their performances.

5. Provide moral support to the student.

5.2 Helping Weaker Students:

A student with poor academic performance should continuously seek help from

his/her counselor and head of the department. Additionally the counselor or HOD must also




be in constant touch with his/her parents/local guardians for keeping them informed about

academic performance. The institute also shall communicate to the parents/guardians of such

student at-least once during each semester regarding his/her performance in various tests and

also about his/her attendance. It shall be expected that the parents/guardians too keep constant

touch with the concerned counselor or head of the department. Remedial and or make-up

classes shall be organized by the respective department for such academically weak students.

5.3. Academic Awards: ADCET encourages students to excel academically and recognizes

their efforts with special Academic Awards as listed in below table.

Important Notes:

a. Prize money for the awards at sr. no. 1, 2, 4 and 5 will be shared if two or more

candidates assume the same position based on the eligibility criteria.

b. For awards at sr. no. 3 point 1 is invalid. (i.e. each candidate is eligible for the max.

prize money even though two or more candidates assume the same position.)

c. The awards at sr. no. 4 and 5 are applicable to each class of each shift.

d. If a candidate is eligible for two or more awards based on the eligibility criteria, then

he will be considered for the highest award only. Detailed illustration is given below:

d.1) If a candidate from, say, Mechanical Engineering is eligible for award at sr. no.

1, then the award at sr. no. 2 and at sr. no. 4 for Mechanical Engineering will stand

null and void.

d.2) Similarly, if a candidate from, say, Mechanical Engineering is eligible for

award at sr. no. 2, then the award at sr. no. 4 for Mechanical Engineering will stand

null and void.

d.3) Likewise, if a candidate from, say, Mechanical Engineering is eligible for

award at sr. no. 3, then the award at sr. no. 4 for Mechanical Engineering will stand

null and void.

e. Point no. d including its sub-points is applicable to all other branches run by the

institute.

Sr.

No.

Name of

the Award

Eligibility Max. Prize

Money

Total Prize Money

(Rs.)

1

Academic

Genius

First Rank in University in

Engineering and Technology

(Considering all branches together)

Rs.

1,00,000.00 1,00,000.00

2

Academic

Leader

First Rank in University in

respective branch of Engineering

and Technology

Rs.

25,000.00

50,000.00

(Avg. 2 awardees)

3

Academic

Deputy

Leader

Second to Tenth Rank in University

in respective branch of Engineering

and Technology

Rs.

10,000.00

1,00,000.00

(Avg. 10 awardees)

4 Academic

Deputy

Class Toppers with Distinction

(Final Year)

Rs.

5,000.00

50,000.00

(Ten Class Toppers)

5 Academic

Deputy Jr.

Class Toppers with Distinction

(First to Third Year)

Rs.

3,000.00

90,000.00

(Thirty Class Toppers)

Total 3,90,000.00




6. ASSESSMENT

Direct evidence of student learning from different sources such as University final

examinations, assignment from individual courses, tests, student‟s seminars and projects etc,

contribute to program assessment. The best evidence from learning comes from direct

observation of student work. The assessment may answer question like;

1. Is the student learning as expected?

2. Has the student‟s work improved over the semester?

3. How well has the student achieved learning outcomes set for the course?

4. What are the strengths and weaknesses of a student?

5. Are the assignments helping students to achieve the expected level of knowledge or

skills?

6.1 University Examinations:

University examinations for theory, practical, project etc are conducted at the end of

the semester, the time table for which is published by SUK well in advanced.

The assessment of theory papers is carried out centrally at the examination centre of

university. The moderation of the assessed papers is carried out by the senior faculty

appointed by the university; the number of papers to be moderated depends upon the

moderation policies.

The assessment of practical for POE or OE is done jointly by an internal and external

examiner appointed by university.

The results are processed centrally at the Result Section of Shivaji University and are

declared on the university web site. Once finalized, the hard copies of mark sheets are

distributed to the students through department office after receiving the same from the

university.

6.2 Assessment of Class Tests (CT)

Class Tests are planned and scheduled as indicated in the Academic Calendar to

assess the student performance and to indentify academically weaker students. The three tests

are planned in a semester and their assessment is as follows;

i. I-Class Test of 25 marks

ii. Mid Term Test of 50 Marks

iii. II-Class Test of 25 marks

Mid-Term test is scheduled centrally, generally after 8 weeks of academic delivery, while I

and II Class Tests are organized by the department during lecture hours without disturbing

other academic activities, after 4 and 12 weeks of academic delivery respectively.

6.3 Assessment of Laboratory Work/Term work

The assessment of laboratory course shall be continuous and based on turn-by-turn

supervision of the student's work and the quality of his/her work as prescribed through

laboratory journals and his/her performance in viva-voce examinations uniformly distributed

throughout the semester. An assessment of a student during semester for term work shall be

based on Lab Tests while for the same entire course shall be by Shivaji university POE/OE

examinations.

The Laboratory and Term work assessment may be carried out as under:

Sr. No. Description % Assessment

1 Class Tests 40%

2 Regular performance 40%

3 Oral, Internal POE/OE 20%




Attendance and timely submission of term work shall be assessed as indicated below:

Sr. No. Attendance in % Assessment

1 90-100 No Negative (Zero)

2 80-89 -1.00

3 75-79 -2.00

If a student fails to submit journals, assignments, tutorials before or on the scheduled date

of the time, two marks shall be deducted from his/her overall TW assessment.

6.4 Assessment of Seminar

As mentioned in Section 2.2, every student has to deliver seminar. The topic of

seminar may be related to theoretical analysis, an experimental investigation, new

concept, analysis of data etc. The student shall be evaluated for his/her seminar by a

committee of three faculty members for the novelty in the concept, the report submitted

and presentation(s) etc. as per written and oral rubric evaluation guidelines.

6.5 Assessment of Project/Seminar/Mini-Project

a. Every student has to carry out mini project/Project of professional nature at Third year

and Final year of their study respectively. The mini-project/project work may be

related with an experimental investigation, a prototype design, new concept, analysis

of data, fabrication and setup of new equipment etc. The student shall be evaluated for

mini-project/project for the quality of work carried out, the novelty in the concept, the

report submitted and presentation(s) etc. through the project evaluation rubrics.

b. The mini- project/project report must be submitted by the prescribed date.

c. The mini- project/project report, presentation and demonstration shall be evaluated by

three departmental faculty members (decided by PEC).

d. The three phase evaluation of the mini project shall be carried out as shown in the

table below:

Phase Evaluation Duration

I Synopsis submission & presentation Within 3 weeks from the start of the

semester

II Progress seminar After 10 weeks from the start of the

semester

III Final demonstration along with

detail report submission

1 week before the end of

semester

e. The details of the project assessment and evaluation are given below:

Phase Period Semester Nature of Work Assessment Mark

s

Phase

I

June-

August

I Literature Survey, Problem

Definition

Synopsis

Submission/Presentation 50

Phase

II

September

-October

I Architectural Design, Software

Code, Logic Development

Poster Presentation

Phase

III

December

-February

II Project Implementation (50%) Project Report and

Project Demonstration 100

Phase

IV

March-

April

II Project Completion, Testing,

Report Writing

Full Project Report,

Project Demonstration

Final May End II University Viva (External) Project Report and

Demonstration 100




i. A preliminary survey of literature and state-of-the-art technology is carried

out to define the problem.

ii. The students are expected to discuss the steps, time schedule, any

requirement, among themselves and prepare a synopsis indicating the

feasibility of the project with available resources.

iii. The progress of the project is monitored throughout the year by a group of

three faculty members assigned to each group with 50% weightage being

given to Guide and 25% weightage being given to each of the two other

faculty members for grading the students.

iv. The assessment is based on the parameters as defined in the rubrics for

evaluating project, communication skills, Team Work and Team member

v. The four phase evaluation of the final year project shall be carried out as

shown in the table below:

7. SHIVAJI UNIVERSITY RULES AND

REGULATIONS FOR PASSING

7.1 A candidate to be eligible for a degree will be required to pass examinations as under;

a. First Examination in Engineering Sem. I & II

b. Second Examination in Engineering Sem. III & IV

c. Third Examination in Engineering Sem. V & VI

d. Fourth Examination in Engineering Sem. VII & VIII

7.2 A candidate to pass the examination, must obtain, a minimum of 40% marks in each head of

passing with an aggregate of 45%.

7.3 A candidate will get a choice to reappear for any heads if he/she do not qualify in aggregate

7.4 The award of class in the examination is as follow;

a. Minimum of 45% for Pass Class

b. Minimum of 50% for Second Class

c. Minimum of 60% for First Class

d. Minimum of 66% for First Class with Distinction

7.5 Grace Marks for getting higher class

a. A candidate who passes in all subjects and heads of passing in the examination

without the benefit of either gracing or condonation rules and whose total number

of marks falls short for securing class/higher second class or first class by marks

not more than 1% of aggregate marks of that examination or upto 10 marks,

whichever is less. Benefits of above mentioned marks shall not be given, if the

candidate fails to secure necessary passing marks in the aggregate head of passing

also if prescribed in the examinations concerned.

b. Grace marks for Distinction in subject only

A candidate who passes in all the subject/head of passing in the examination

without benefit of either gracing or condonation rules and whose total number of

marks in the subject/s falls short by not more than three marks for getting

distinction is the subject/s shall be given necessary grace marks up to three in

maximum two subject, subject to maximum of one percent of total marks of that




head of passing whichever is more, in a given examination. Provided that benefit

of the above mentioned grace marks shall be given to the candidate only for such

an examination/s for which provision for distinction in a subject has been

prescribed.

c. Grace marks for passing in each head of passing

The examinee shall be given the benefit of grace marks only for passing in each

head of passing is up to maximum of 10 marks provided that the benefit of such

gracing marks given in different heads of passing shall not exceed 1% of the

aggregate marks in that examination. This is applicable only if the candidate

passes the entire examination of semester/year.

d. Condonation

If a candidate fails in only one head of passing, having passed in all other heads of

passing, his/her deficiency of marks in such head of passing may be condoned by

not more than 1% of the aggregate marks of the examination or 10% of the total

number of marks of that head of passing in which he/she is failing, whichever is

less. However, condonation whether in one head of passing or aggregate head of

passing is restricted to maximum up to 10 marks only.

7.6 Allowed To Keep Term (ATKT) Rules

a. A candidate who fails in Semester-I of FE, Semester-III of SE, Semester V of TE and

Semester VII of BE are allowed keep term for Semester-II of FE, Semester-IV of SE,

Semester VI of TE and Semester VIII of BE.

b. A candidate is allowed to keep term to III Semester of SE, if he/she has failed in not

more than three heads of passing in I and II Semester of F.E.

c. A candidate is allowed to keep term to V Semester of TE, if he/she has cleared all

heads of passing of I and II Semester of F.E. and failed not in more than three heads

of passing of III and IV Semester of S.E.

d. A candidate is allowed to keep term to VII Semester of BE, if he/she has cleared all

heads of passing of III and IV Semester of S.E. and has failed not in more than three

heads of passing of V and VI Semester of T.E.

7.7 Not Fit for Technical Course (NFT)

No candidates will be admitted to S.E. Sem. I course unless he/she fails in not more

than three heads of passing at the F.E. Sem. I and F.E. Sem. II examination in within a

period of three academic years from the date of his admission to the F.E. Sem. I

course.

7.8 A candidate requesting for Photo copy or revaluation shall apply to the SUK within 15 days

after the announcement of their results.

7.9 For any suggestion and clarifications related to SUK may contact Mr. R. H. Patil and Mr.

D.S. Patil from institute office.




Laboratory and Classroom Instructions

Laboratory instructions:

Handle all electronics Devices /equipments carefully

Any damage due to the mishandling of equipments is punishable

Do inform to respective teacher before beginning your experiment

Switch off the equipments, tubes & fans before you leave the laboratory

Inform the lab assistance or lab in-charge when any fault arises during the

performance of an experiment

Report any broken equipment or defective part to the lab instructor; don‟t open/

remove the cover/ attempt to repair any equipment.

Do not move the instruments from one laboratory to another , without permission

Any one violating any rules or regulations may be denied access to these facilities.

Classroom instructions:

Maintain silence in class rooms

Don‟t write anything on seating bench and walls of classroom.

Keep your mobiles switched off otherwise it will be punishable.

Attend classes regularly and be punctual for your classes.

Your reason of absence should be timely informed to your class teacher with written

application.

Switch off fans and tubes before leaving the classroom.

Do not tamper with or remove security straps or other security devices. Do not disable

or attempt to defeat the security camera.

Keep the work area/ benches neat & clean

Academic Booklet TE semester - II 11



Department Vision and Mission

Vision

To prepare technically sound Electronics & Telecommunication engineering

graduates to serve the society holistically.

Mission

We at Department of Electronics and Telecommunication are committed to

provide technical expertise and infrastructure to the students in order to

mould them into graduates capable of providing solutions to societal,

economical and environmental problems concerned with local and global

issues.




Department Program Educational objectives and Program Outcomes

Programme Educational Objectives (PEOs): Graduates of Electronics and Telecommunication Engineering program at ADCET, Ashta should be

able to utilize the knowledge gained from their academic program to

1. Solve real world problems related with electronics and Communication using

a) Knowledge of Mathematics, Basic Sciences, Electronics & Telecommunication Engineering and

relevant disciplines

b) Skills developed during graduation studies.

2. Demonstrate an understanding about selected specific areas of electronics and telecommunication

engineering as a critical step in career development.

3. Function and communicate effectively, both individually and with multidisciplinary teams,

using professional ethics and social awareness and environment concern.

4. Engage in lifelong learning for successful adaptation to technological changes.

Program Outcomes (POs):

Students of Electronics & Telecommunication Engineering program at ADCET, Ashta by the time

of graduation will demonstrate:

(a) An ability to apply knowledge of mathematics, science, and engineering,

(b) An ability to design and conduct experiments, as well as to analyze and interpret data,

(c) An ability to design a system, component, or process to meet desired needs within realistic

constraints.

(d)An ability to function on multidisciplinary teams,

(e)An ability to identify, formulates, and solve engineering problems,

(f) An understanding of professional and ethical responsibility,

(g) An ability to communicate effectively,

(h) The broad education necessary to understand the impact of engineering solutions in a global,

economic, environmental, and societal context,

(i) A recognition of the need for, and an ability to engage in life-long learning,

(j) A knowledge of contemporary issues, and

(k) An ability to use the techniques, skills, and modern engineering tools necessary for engineering

practice

(l) An ability to provide solutions to communication related problems using Computer aided tools

and state-of-the –art electronic approaches.

(m) An ability to develop and implement a process in a well planned manner leading to a

demonstrable product.




Departmental Laboratory Educational Objectives and Laboratory Outcomes:

Laboratory Educational Objectives (LEOs):

Laboratory sessions aim to:

L-I Conceptual Understanding: Develop students‟ understanding through laboratory

activities to solve problems related to key concepts taught in the classroom.

L-II Design Skills: Develop students‟ ability to solve open ended problems through the

design and construction of new artifacts or processes.

L-

III

Debugging Skills: Develop debugging capability in order to propose and apply

effective engineering solutions.

L-

IV

Social Skills: Develop the skills related to teamwork, societal aspects and

environmental issues.

L-V Professional Skills: Develop the technical and communication skills so as to have

successful professional career.

Laboratory Outcomes (LOs):

1. Instrumentation: Apply appropriate instruments and/or software tools and handle

them carefully and safely to make measurements of physical quantities or perform

data analysis.

2. Models: Identify the strength and limitations of theoretical models and establish a

relationship between measured data and underlying physical principles.

3. Experiment: Specify appropriate equipment and procedures/algorithms, implement

these procedures/algorithms, analyze and interpret the resulting data.

4. Design: Design and build a software/hardware part to meet desired specifications

and tests it using appropriate testing strategy and/or equipments.

5. Teamwork: Work effectively in teams to accomplish the assigned responsibilities in

an integral manner.

6. Communication: Communicate effectively about laboratory work both orally and in

writing journals/technical reports.

7. Ethics and Awareness: Behave with highest ethical standards with concern to

global, environmental, economic, social issues & lifelong learning, and awareness

of contemporary issues.




Faculty details

Sr.

No.

Name of Professor Designation Phone no. & email ID

1. Mrs. Sunita Sunil Shinde HOD 9860963551

[email protected]

2. Ms. Rupali Ramesh

Jagtap

Assistant Professor 8600600782

[email protected]

[email protected]

3. Mrs. Madhura Makarand

Raste


[email protected] 4. Mr. Vikram Anant Mane Assistant Professor 7350177210

[email protected] 5. Ms. Shabanam Shabbir

Tamboli


[email protected] 6. Ms. Viddulata

Appasaheb Patil


[email protected] 7. Mrs. Saylee Sandeep

Bidwai


[email protected] 8. Mr. Sandeep Sakhahari

Bidwai


[email protected] 9. Mrs. Manjusha

Nandkumar Chavan


[email protected] 10. Mr. Sanjay P. Patil Assistant Professor 9421222185

[email protected] 11. Ms. Rupali H. Nangare Assistant Professor 8552000492

[email protected] 12. Mr. Santosh M. Herur Assistant Professor 9049899025

[email protected] 13. Ms. Pradnya Prakash

Mirajkar


[email protected] 14. Mr. Harshad Shankar

Daingade


[email protected] 15. Mr.Basavaraj. S

Sannakashappanavar


[email protected] 16. Ms. Rajashree B. Tapase Assistant Professor 9766923639

[email protected] 17. Ms. Archana Laxman

Lakesar


[email protected] 18. Ms. Arati Appaso Pujari Assistant Professor 7387920772

[email protected] 19. Mr. Kiran Nivrutti Patil Assistant Professor 964669060

[email protected]

20. Mr Vikas Anandrao.

Patil


[email protected]

21. Ms. Ashwini S Shinde Assistant Professor 8055935256

[email protected] 22. Mr. Sachin S. Patil Assistant Professor 9405284189

[email protected] 23. Mr.Suhas B. katkar Assistant Professor 8007347262

[email protected] 24. Mr. Mahesh M.

Kumbhar


[email protected]

mailto:[email protected]




























25. Mrs. Y. S. Ahankari Assistant Professor 8600700654

[email protected] 26. Mr.K. M. Dange Assistant Professor 9922425350

[email protected] 27. Dr. Manjula S.

Muchalambe

Professor 8275233984

[email protected] 28. Ms. Smita J. Patil Assistant Professor 7768959965

[email protected] 29. Ms. Pradnya R. Narvekar Assistant Professor 9175578196

[email protected] 30. Mr. Tanaji U. Kamble Assistant Professor 9503066999

[email protected]

Nonteaching staff:

Sr.

No

Name of Staff Qualification Email ID Contact

Number

1 Mr. Patil S. S. DE&C [email protected] 9923244383

2 Mr. Patil D. R. DE&C [email protected] 8600600990

3 Mr. Waghmare R. B. DE&TC [email protected] 9637431966

4 Mrs. Kulkarni K.Y. DIE [email protected] 9372763258

5 Mr. D. P. Patil BE [email protected] 9975830739

6 Mr. A. A. Khichade D E&Tc [email protected] 9762960005









Departmental Academic Calender

JANUARY FEBRUARY MARCH APRIL MAY

1 FRI

COMMENNCEMENT OF

SEM II

SPORTS WEEK

1 MON 1 TUE 1 FRI 1 SUN SUNDAY

MAHARASHTRA DAY

2 SAT 2 TUE 2 WED 2 SAT PROFEST, IGNITE2K16, REVIEW

OF FEEDBACK-II 2 MON

3 SUN 3 WED 3 THU 3 SUN SUNDAY 3 TUE

4 MON 4 THU 4 FRI 4 MON CLASS TEST-II(CT-II) 4 WED

5 TUE 5 FRI 5 SAT NS-2 WORKSHOP 5 TUE 5 THU

6 WED 6 SAT WORKSHOP ON PCB DESIGN 6 SUN SUNDAY 6 WED 6 FRI

7 THU 7 SUN WORKSHOP ON PCB DESIGN

SUNDAY 7 MON MAHASHIVRATRI 7 THU 7 SAT

8 FRI ACADEMICS START 8 MON

FIRST FEEDBACK

8 TUE 8 FRI GUDHI PADWA 8 SUN SUNDAY

9 SAT 9 TUE 9 WED 9 SAT 9 MON

10 SUN SUNDAY 10 WED 10 THU

MID TERM TEST(MT)

10 SUN SUNDAY 10 TUE

11 MON 11 THU 11 FRI 11 MON 11 WED

12 TUE 12 FRI 12 SAT 12 TUE 12 THU

13 WED 13 SAT COMPUTER AWARENESS

PROGRAM 13 SUN SUNDAY 13 WED 13 FRI

14 THU 14 SUN SUNDAY 14 MON 14 THU AMBEDKAR JAYANTI 14 SAT

15 FRI 15 MON

CLASS TEST-I(CT-I)

15 TUE 15 FRI RAM NAVMI 15 SUN SUNDAY

16 SAT COMPENSATORY

CLASSES OF 19TH JAN 16 TUE 16 WED 16 SAT

RESULT ANALYSIS CT-II,

CONCLUSION OF TEACHING 16 MON

17 SUN SUNDAY 17 WED 17 THU 17 SUN SUNDAY 17 TUE

18 MON 18 THU 18 FRI 18 MON 18 WED

19 TUE SANSTHA SNEHA

MELAVA 19 FRI 19 SAT RESULT ANALYSIS MT 19 TUE MAHAVIR JAYANTI 19 THU

20 WED POCKET CALENDER

DISTRIBUTION 20 SAT ELOCUTION COMPETITION 20 SUN ALUMNI MEET 20 WED

STUDENT COURSE EXIT

FEEDBACK FAREWELL

PROGRAM

20 FRI

21 THU 21 SUN SUNDAY 21 MON

SECOND FEEDBACK

21 THU 21 SAT BOUDHA POORNIMA

22 FRI 22 MON 22 TUE 22 FRI 22 SUN SUNDAY

23 SAT COMPENSATORY

CLASSES OF 23RDJAN 23 TUE 23 WED 23 SAT 23 MON

24 SUN PARENTS MEET 24 WED 24 THU 24 SUN SUNDAY 24 TUE

25 MON 25 THU 25 FRI GOOD FRIDAY 25 MON TENTATIVE STARTING DATE

OF ORAL 25 WED

26 TUE REPUBLIC MEET 26 FRI 26 SAT DNYANADA PUBLICATION, SOCIAL

AWARENESS PROGRAM 26 TUE 26 THU

27 WED 27 SAT

RESULT ANALYSIS CT-I ,

ARDUINO BOARDS/ RASPBERRY

PI- W/S

27 SUN SUNDAY 27 WED 27 FRI

28 THU 28 SUN SKILL ASSESSMENT, ARDUINO

BOARDS/ RASPBERRY PI- W/S 28 MON RANG PANCHAMI 28 THU 28 SAT

29 FRI ANNUAL GATHERING

29 MON 29 TUE 29 FRI 29 SUN SUNDAY

30 SAT 30 WED 30 SAT SKILL ASSESSMENT 30 MON

31 SUN SKILL ASSESSMENT 31 THU SKILL ASSESSMENT 31 TUE END OF SEMESTER










Course Structure (TE-Part II)

SYLLABUS STRUCTURE

Class/Year: Third Year Semester: Second




COURSE DETAILS

Structure of Course

Class TE-Part-II Semester VI

Course Code and Course Title ETC307 Digital Signal Processing

Designated as Compulsory

Prerequisite/s ETC302-SS

Teaching Scheme (Lecture/Practical/Tutorial/Drawing) 04/02/--/-- Hours

Total Contact Hours: Theory/Practical/Tutorial/Drawing 56/28/--/-- Hours

Credits 04

Evaluation Scheme: Theory Paper/TW/POE/PO 100/25/50/--

Subject Incharge Ist Shift

Subject Incharge IInd Shift

S.S.Tamboli

Nangare R. H.

Course Educational Objectives(CEOs):

The course aims to:

C-I Understand DTFT and DFT.

C-II Understand, analyze and design FIR and IIR filters.

C-III Understand realization of FIR and IIR Filters.

C-IV Understand its hardware implementation using DSP Processor.

Course Outcomes (COs):

Upon successful completion of this course, the student will be able to:

PO mapped

1 Apply DFT as an analytical tool. a,e

2 Analyze LTI Systems using FFT algorithms. a,e

3 Design FIR and IIR systems. a,e

4 Implement FIR and IIR Systems. a,e

5 Implement various DSP Systems on DSP Processor. a,e

Course Syllabus

Unit I

Discrete Time Fourier Transform (DTFT, Properties and symmetrical properties of of DTFT,

Introduction to DSP Systems [BD], Convergence of DTFT: Gibb‟s Phenomenon. (08hrs) 10 Marks

Unit II

Discrete Fourier Transform Frequency Domain Sampling and Reconstruction of Discrete Time

Signal.DFT, Properties of DFT, Circular Convolution and Circular Co-relation using DFT and

IDFT,Analysis of LTI System using Circular Convolution, Linear Convolution using Circular

Convolution, Fast Convolution. Overlap Save and Overlap add algorithm. Relationship between

DTFT,DFT and ZT.FFT Algorithms – Radix 2: DIT-FFT and Radix 2: DIF, Goertzel FFT

algorithm and Chirp-Z transform FFT algorithm.

(12hrs) 24 Marks

Unit III

FIR Filter Design Characteristics of FIR Filters. Properties of FIR Filters.FIR Design using

Windowing Technique [Rectangular Window, Hamming Window and Hamming Window]FIR

Design using Kaiser Window.FIR Design using Frequency Sampling Technique.

(08) 16 Marks

Unit IV

IIR Filter Design Introduction to IIR Filters, IIR Filter Designing using Impulse Invariant




method and Bilinear Transformation method, Butterworth Filter approximation, Frequency

Transformation.

(10hrs) 20 Marks

Unit V

Realization of FIR and IIR Filters. Introduction, Basic realization blocks diagram.FIR

realization- Direct Form (Non-linear phase and Linear phase), Cascade and Parallel

realization.IIR realization- Direct form I and II, Cascade and parallel realization.

(08hrs) 20 Marks

Unit VI

DSP Processors Introduction, Architecture of DSP Processor, TMS320C67XX, Specifications,

Comparison between general purpose and DSP Processors.

(06hrs) 10Marks

Text Books

Sr.

No Title Author Publisher Edition

Year of

Edition

1 Digital Signal Processing

Principles, Algorithms

and Application

John G Prokis,

Manolakis

Pearson Education

publication

-- --

2 Digital Signal Processing Salivahanam, A

Vallavaraj, C.

Guanapriya

TMH -- --

3 Digital Signal Processing

Tarun Kumar

Rawat

Oxford

Reference Books

Sr.


Year of

Edition

1 Digital Signal Processing P. Ramesh

Babu,

Scitech publication -- --

2 Digital Signal Processing Sanjeet Mitra, MGH -- --

3 Digital Signal Processing E.C.Ifeachor,Ba

rrie W. Jervis

----- -- --

4 Digital Signal Processing Dr. A. C.

Bhagali

MPH -- --

5 Digital Signal Processing Ashok

Ambardar,

Cengage learning -- --

6 Texas Instruments DIP

Processor data sheet.

-- -- -- --

5 Digital Signal Processing A. Anand

Kumar

PHI -- --




Mapping of course educational objectives with course objectives:

Course Educational

Objectives

Digital Signal

Processing

Course Outcomes

1 2 3 4 5

CI √ √

CII √ √

CIII √ √

CIV √

Mapping of Course Outcomes to Program Outcomes:

Course Outcomes

Digital Signal

Processing

Programme Outcomes

a b c d e f g h i j k l

1 √ √

2 √ √

3 √ √

4 √ √

5 √




Content Delivery and assessment tools

Module Lect.

No.

Lesson Plan

TM TA AT

Mapping with

Outcomes

Content Delivery CO PO

I

The Discrete Time Fourier Transform

1 a ,e

1 Discrete Time Fourier Transform LT CB QA

2 Discrete Time Fourier Transform LT CB QA & AS

3 Properties and symmetrical properties of of DTFT, LT CB QA

4 Properties and symmetrical properties of of DTFT LT CB QA

5 Introduction to DSP Systems [BD] LT CB QA

6 Convergence of DTFT: Gibb‟s Phenomenon. LT CB QA

7 Revision of Ch.1 LT CB QA &CT, AS

II

Discrete Fourier Transform

1&2

a ,e

8 Frequency Domain Sampling and Reconstruction of

Discrete Time Signal

LT CB QA &CT

9 DFT LT CB QA &CT

10 Properties of DFT LT CB QA &CT

11 Properties of DFT LT CB & PP QA &CT

12 IDFT LT CB & PP QA &CT

13 Circular Convolution and Circular Co-relation using

DFT and IDFT

LT CB&PP QA &CT

14 Analysis of LTI System using Circular Convolution LT CB QA &CT

15 Overlap Save and Overlap add algorithm LT CB QA &CT

16 Relationship between DTFT,DFT and ZT. LT CB QA &CT

17 FFT Algorithms – Radix 2: DIT-FFT LT CB QA

18 FFT Algorithms -Radix 2: DIF, LT

19 Goertzel FFT algorithm LT

20 Chirp-Z transform FFT algorithm. LT




Module Lect.

No.

Lesson Plan TM TA AT

Mapping with

Outcomes


III

FIR Filter Design.

3&4 a ,e

21 Characteristics of FIR Filters

22 Properties of FIR Filters LT CB QA &CT

23 FIR Design using Windowing Technique [Rectangular

Window,]

LT CB QA &CT

24 FIR Design using Windowing Technique [Hamming

Window]

LT CB QA &CT

25 FIR Design using Windowing Technique [Hanning

Window]

LT

26 Design using Kaiser Window LT CB QA &CT

27 Design using Kaiser Window LT CB QA &CT

28 FIR Design using Frequency Sampling Technique. LT CB QA &CT

29 FIR Design using Frequency Sampling Technique. LT

IV

IIR Filter Design.

30 Introduction to IIR Filters LT CB QA &CT

3&4 a ,e

31 IIR Filter Designing using Impulse Invariant method LT CB QA &CT



34 IIR Filter Designing using Bilinear Transformation

method

LT CB QA &CT


method

LT CB QA &CT


method

LT CB QA &CT

37 Butterworth Filter approximation LT CB QA &CT

38 Butterworth Filter approximation LT CB QA &CT

39 Frequency Transformation. LT CB QA &CT

40 Frequency Transformation. LT CB QA &CT




Module Lect.

No.


Mapping with

Outcomes


V

Realization of FIR and IIR Filters.

3&4 a ,e

41 Introduction LT CB QA

42 Basic realization blocks diagram.FIR realization-

Direct Form

LT CB QA


Direct Form

LT CB QA


Direct Form (Non-linear phase and Linear phase),

LT CB QA

45 Cascade and Parallel realization LT EL&PP QA &CT

46 IIR realization- Direct form I and II, LT CB QA

47 IIR realization- Direct form I and II LT EL & PP QA

48 Cascade and parallel realization. LT CB QA

VI

DSP Processors

5 a

49 Introduction LT CB AS

50 Architecture of DSP Processor LT CB AS

51 TMS320C67XX LT CB AS

52 TMS320C67XX LT CB AS

53 Specifications LT CB QA &CT

54 Comparison between general purpose and DSP

Processors

LT CB QA &CT

55 Review --- --- --- --- ---

56 Review --- --- --- --- ---

Note: TM-Teaching Method- Lecture (LT), Demo (DM), Laboratory Visit (LV), Group Discussion (GD), Seminar(SM), Industrial Visits (IV), Case Studies

(CS)TA-Teaching Aids–Chalk Board (CB), Power Point Presentation (PP), Models (MD), Video Film (VF), E-Learning (EL), AT- Assessment Tool –Assignments

(AS), Class Tests (CT), Question Answers (QA), University Examinations (EX), Rubrics (RB), Tutorials (TT), Feedback Report (FP), Seminar/Project Report (RP),

Quiz (QZ)




Question Bank:

Q.1) Find the circular convolution of two finite duration sequences x1(n)= 1,−1,−2,3, −1 &

x2(n)= 1,2,3 using concentric circle method.

2) What is FFT? Why FFT is needed? Explain calculation of IDFT using FFT algorithm.

3) Find the DFT of the given sequence x(n)= 1,−1, −1,−1,1,1,1,−1 using DIT FFT

algorithm.

4) Explain in detail DIT-FFT algorithm.

5) What is sectioned convolution? Explain in detail overlap add method.

6) Two finite duration sequences are x1(n)= 1,−1,2,1,2, −1,3,1 & h(n)= 1,2,1 use overlap-

add and overlap-save method to find y(n).

7) Two finite duration sequences are x1(n)= 3,−1,0,1,3, ,2, 0,1,2,1 & h(n)= 1,1,1 use

overlap-add and overlap-save method to find y(n).

8)

9) Two finite duration sequences x1(n)= 1,2,−1,3,2,−3, −2, −1 & h(n)= 3,2 use overlap add

method to find y(n).

10) Two finite duration sequences are x1(n)= 1,2,−1,0,2, 3,−1,4,1,3 & h(n)= 1,2,3 use

overlap-add method to find y(n).

11) Explain in detail how computations are reduced in FFT algorithms.

12) For the x1(n),x2(n) and N given compute circular convolution x1(n)= 1,0,−1, 0 &

x2(n)= 1,1,1 , N=5

13) Use the four point DFT and IDFT to determine circular convolution of

x1(n)= 1,2,3,1 } & x2(n)= 4,3,2,2

14) Obtain the circular convolution of x1(n)= 1,2,2,1 } & h(n)= 1,2,3,4

15) Explain DIF-FFT algorithm.

16) By means of DFT and IDFT, determine the sequence x3(n) corresponding to circular

convolution of sequences x1(n) & x2(n) where x1(n)= 2,1,2,1 and x2(n)= 1,2,3,4

17) Compute the FFT of a sequence x(n)=n+1 where N=8 using DIT algorithm.

18) Two finite duration sequences are x1(n)= 1, 2, −1, 3, −3,−2, 1 } & h(n)= 1,2,1 use overlap-

add method to find y(n).

19) Two finite duration sequences are x1(n)= −1, 2,−1,0,1, 3, −2,1,−3,−2,−1,0,−2 } &

h(n)= 1,0,1 use overlap-save method to find y(n).

20) Two finite duration sequences are x1(n)= −1, 2,−1,0,2, 3, −1,4,1,3, } & h(n)= 1,2,3 use

overlap-add method to find y(n).

21) Compute IDFT of the sequence

X(K)= 7,−0.707 − 𝑗0.707,−𝑗, 0.707 − 𝑗0.707, 1, 0.707 + 𝑗0.707, 𝑗, −0.707 + 𝑗0.707 } using

radix-2 DIT FFT algorithm.




22) Compute IDFT of the sequence

X(K)= 6,−2 + 2𝑗, −2,−2 − 2𝑗 } using radix-2 DIF FFT algorithm.

23) Compute the eight point circular convolution for the following

a) x1(n)= 1,1,1,1,0,0,0,0 } & x2(n)=sin3𝜋

8 n ; 0 ≤ n ≤ 7

b) x1(n)= 1,0,−1,0 , x2(n)= 1,1,1 , N=5

24) Draw the signal flow graph for 8-bit DIT-FFT, explain bit reversal & in place computation

25) x(n)= 1,2,3,4,4,3,2,1 }, find X(K) using DIF-FFT algorithm.

26) x(n)= 1,2,3,4,5,6,7,8 }, find X(K) using DIF-FFT algorithm.

27) Find X(K) of a sequence x(n)=2n using DIF- FFT algorithm.

28) Compute FFT of sequence x(n)=n+1 for N=8 using DIT algorithm.

29) Explain the type-1 frequency sampling method of designing an FIR filter.

30) Design a low pass filter that approximates

𝐻𝑑 𝑓 = 1, 0 ≤ 𝑓 ≤ 1000𝐻𝑧0, 𝑒𝑙𝑠𝑒𝑤ℎ𝑒𝑟𝑒

31) The Sampling frequency is 8000Hz. The impulse duration is to be limited to 2.5ms. (fourier series

method).

32) Design an FIR digital filter to approximate an ideal low pass filter with passband gain of

unity, cut off frequency of 850 Hz & working at a sampling frequency 5000 Hz. The length of

impulse response should be 5. Use rectangular window.

33) Explain the design procedure of FIR filter using Kaiser window.

34) Using frequency sampling method, design a BPF with the given specifications. Sampling

frequency=8000Hz and cut off frequencies fc1=1000Hz, fc2=3000Hz. Determine the filter

coefficients for N=7.

35) Write short notes on

a) Gibb‟s Phenomenon

b) Comparison of FIR & IIR filter

c) FIR filter design using Fourier series method.

d) Advantages and disadvantages of digital filters

e) Properties of FIR filters

36) Design a high pass filter that approximates

𝐻𝑑 𝑓 = 1, 𝜋/4 ≤ ⃓𝑤⃓ ≤ 𝜋

0, ⃓𝑤⃓ ≤ 𝜋/4

Find the values of h(n) for N=11 and find H(z)

37) Use frequency sampling method to design a linear phase low pass FIR filter with 10

coefficients, whose cut off frequency is 100 Hz. Assume sampling frequency of 1000sps.

38) Design a high pass filter that approximates

𝐻𝑑 𝑓 = 0, 0 ≤ ⃓𝑤⃓ ≤ 𝜋/31, 𝑜𝑡ℎ𝑒𝑟𝑤𝑖𝑠𝑒

Find the values of h(n) for N=11 and find H(z)

39) Design a Kaiser window FIR HPF for following specifications




40) Pass band frequency fp=3200 Hz; stop band frequency fs=1600 Hz; pass band ripple Ap=0.1

dB; minimum stop band attenuation As=40dB and sampling frequency=1000 Hz.

41) What is the principle of designing FIR filters using window? Give mathematical expressions

for different windows.

42) Design a low pass filter that approximates

𝐻𝑑 𝑓 = 𝑒−𝑗2𝑤 − 𝜋/4 ≤ 𝑤 ≤ 𝜋/4

0, 𝜋/4 ≤ 𝑤 ≤ 𝜋

43) Determine the filter coefficients, if window is defined as

𝑤(𝑛) = 1, 0 ≤ 𝑛 ≤ 4

1, 𝑜𝑡ℎ𝑒𝑟𝑤𝑖𝑠𝑒

Also determine the frequency response of designed filter.

44) A low pass filter has desired response as given below

𝐻𝑑 𝑓 = 𝑒−𝑗3𝑤 0 ≤ 𝑤 ≤ 𝜋/2

0, 𝜋/2 ≤ 𝑤 ≤ 𝜋

45) Determine the filter coefficients h(n) for N=7 using type-1 frequency sampling technique.

Design a FIR with

𝐻𝑑 𝑒𝑗𝑤 = 𝑒−𝑗3𝑤 − 𝜋/4 ≤ 𝑤 ≤ 𝜋/4

0, 𝜋/4 ≤ 𝑤 ≤ 𝜋

Using Hanning window with N=7

46) Design a linear phase FIR low pass filter of order seven with cut off frequency 1 rad/sec.

using rectangular window.

47) Use the frequency sampling method to design a linear phase low pass FIR filter with cut off

frequency wc= π/2for N = 17.


𝐻 𝑒𝑗𝑤 = 𝑒𝑗3𝑤 − 3𝜋/4 ≤ 𝑤 ≤ 3𝜋/4

0, 3𝜋/4 ≤ 𝑤 ≤ 𝜋

49) Design the filter. Determine the frequency response 𝐻 𝑒𝑗𝑤 of designed filter for length N=7 using

rectangular window.

50) Using frequency sampling method design a BPF with the following specifications

Sampling frequency fs=8000Hz Cut-off frequency fc1=1000Hz Fc2=3000Hz

Determine the filter coefficients for N=7.


𝐻𝑑 𝑓 = 1 0 ≤ 𝑓 ≤ 5𝐻𝑧

0, 𝑒𝑙𝑠𝑒𝑤ℎ𝑒𝑟𝑒 𝑖𝑛 0 ≤ 𝑓 ≤ 𝑓𝑁

52) The sampling frequency is 20 SPS & the impulse response is to have duration of 1Sec. Use

Hamming window & plot the magnitude response.

53) What is bilinear Transformation?Explain frequency warping & prewarping procedure in BLT

method.

54) Explain impulse invariant method for IIR filter design.

55) Determine H(z) using impulse invariant method if & Ts = 0.1

sec.

56) Explain coefficient quantisation in IIR filter.

57) An analog filter has a transfer function Design a digital filter

equivalent to this using impulse invariant method for T = 0.2 sec




58) Design the first order high pass digital butterworth filter whose cut off frequency is 1KHz at

sampling frequency of 104 samples/sec. Use BLT method.

59) Design a digital IIR filter using Impulse invariant method for a transfer function

𝐻 𝑠 =10𝑠2

𝑆2+7𝑠+10 & Ts=0.2 sec.

60) Determine H(z) using impulse invariant method if 𝐻 𝑠 =𝑠+0.1

𝑠+0.1 ^2+16 & Ts = 0.1 sec.

61) Design a digital Butterworth filter to meet the constraints

0.8 ≤ |H(ejw

)| ≤ 1, 0 ≤ w ≤ 0.25π

|H(ejw

)| ≤ 0.2, 0.6π ≤ w ≤ π

Use Impulse invariant method. Assume sampling frequency 1KHz.

62) Design a second order digital butterworth filter whose cut off frequency is 1KHz and

sampling frequency of 1000sps. Use BLT method.

63) Determine H(z) using Impulse invariant method for

𝐻 𝑠 =1

𝑠+0.5 (𝑠2+0.5𝑠+2) , T=1sec

64) Determine H(z) using Impulse invariant method for

𝐻 𝑠 =2

𝑠+1 (𝑠+2) , sampling frequency is 5KHz.

65) The transfer function of analog filter is given below

𝐻 𝑠 =5𝑠+1

𝑠2+0.4𝑠+1 , Design digital filter using BLT with critical frequency 10 Hz and sampling

frequency is 60 Hz.

66) The transfer function of analog filter is given below

𝐻 𝑠 =1

𝑠2+√2𝑠+1 , Find H(z) if T=1 sec use impulse invariant method.

67) The transfer function of analog filter is given below 𝑠 =3

𝑠+2 (𝑠+3) , Design digital filter

using BLT with Ts=0.1 sec.

68) Convert the following analog filter into digital filter 𝐻 𝑠 =𝑠+0.2

(𝑠+0.2)2+9 , Design digital filter

using impulse invariant method. Assume T=1 sec.

Plan for Class Test (CT):

Planed Date/ Week Type of CT Based on Module No.

February 2nd

Week Class Test –I I & II

March 2nd

Week Midterm Test III &IV

April 1st Week Class Test-II V & VI




Course Details of Laboratory Practice

Laboratory practice aims to

Laboratory Educational Objectives(LEOs):

L-I Familiar with tools used to write algorithms

L-II Write the program over Signal Processing algorithms

L-III Implement of algorithms on Hardware kits.

On successful completion of laboratory practice, student will be able to,


1 Formulate flowcharts, algorithms to solve Signal Processing Problems

2 Develop logic for given problem

3 Implement the algorithms on hardware kit

Mapping of Laboratory Educational Objectives to Laboratory Outcomes

Laboratory

Educational

Objectives

Laboratory Outcomes

i ii iii

L-I

L-II

L-III

Mapping of Laboratory Outcomes to Programme Outcomes

Laboratory

Outcomes

Programme Outcomes


i √ √ √ √

ii √ √ √

iii √ √ √

Laboratory Skill Acquisition Matrix

Laboratory

Outcomes

Program Outcomes

a b c d e f g h i j K l

Digital

Signal

Processing

√(1) √(3) √(3) (3)

Plan to Cover Content beyond Syllabus:

Planed Date/

Week

Topic Beyond Syllabus Resource Person

with Affiliation

7 *DSP algorithms in C Subject incharge

Plan to Cover Content beyond Syllabus for lab:

Planed Week Topic Beyond Syllabus Outcomes Met

12 Implementation of linear and circular

convolution programs TMS320 C6713 b,f,g,k




Practical Plan

Expt.

No.

Experiment List PO

Mapped

Assessment

tool

1 Generation of CT and DT signals

b,f,g,k

Continuous

Assessment

sheet

&

**Lab

Rubric

2 Convolution and correlation of signals 3 Computation of DFT & IDFT using standard

formula

4 Computation of DFT and IDFT using FFT

algorithms

5 Computation of circular convolution using DFT and

IDFT.

6 Review

7 Design of FIR LPF filter using Fourier series

method 8 Design of FIR LPF,HPF filter using windowing

method

9 Design of IIR LPF,HPF filter using BLT

Design of IIR LPF filter using IIM

10 Program for finding length of Kaiser window

11 Design IIR filter using placement of poles & zeros.

12 Implementation of linear and circular convolution

programs TMS320 C6713

13 Review

14 Internal oral & Final submission

*indicate the experiment beyond of syllabus

** POs f, g and k are obtained by applying rubric, at least once in semester

Self Study Materials and References:

1. Laboratory Manuals

2. Journal/Conference Papers

Additional Comments: Nil




COURSE DETAILS

Structure of Course Class TE-Part-II Semester VI

Course Code & Course Title ETC309 VLSI Design


Prerequisite/s ETC205, ETC209

Teaching Scheme: Lecture/Practical/Tutorial/Drawing 03/02/--/--

Total Contact Hours: Theory/Practical/Tutorial/Drawing 36/24/--/-- Hours

Credits 04

Evaluation Scheme: Theory Paper/TW/POE/OE 100/25/50/--

Subject In- charge Mrs. S. S. Bidwai (1st Shift)

Mr. S. P. Patil (2nd

shift)

Course Educational Objectives The course aims to:

C-I

To Explain the need of Hardware Description Languages (HDL) to design &

implement digital circuits (combinational & sequential) using VHDL and Verilog

HDL.

C-II

To Provide an introduction to VLSI Design flow for implementing

Behavioral/RTL/gate level

architectures on programmable logic devices such as FPGAs & CPLDs

C-III To Explain the features & capabilities of HDL to simulate, synthesize and test digital

logic modules.

C-IV

To Develop combinational & sequential logic / FSM design skills using HDLs and

verify their performance by simulation for functionality, speed & power using EDA

tool.

C-V Explain the basics of MOS device.

Course Outcomes (COs) Upon successful completion of this course, students will be able to:

Mapped

to POs

1 Implement & Demonstrate HDL codes of digital designs using FPGA/

CPLD based technology.

b

2 Explain the difference between VHDL and Verilog HDL. a

3

Model combinational circuits like Adder, Subtractor, Decoder, encoder,

multiplexer, parity generator, Parity checker, comparator using different

styles of modeling in VHDL&/or Verilog and implement in FPGA/ CPLD

using suitable EDA tool

b, k

4 Construct FSM, Model sequential logic circuits like counter & sequence

detector and simulate it for functional verification

b, e, k

5 Describe the features & internal architectures of CPLD (XC 9572) &

Spartan IIIE FPGA (XC3S 500E).

a, k

6 Demonstrate practical skills in simulating & testing digital modules b, k




Course Syllabus: Unit I

Introduction to VHDL:

Level of abstraction. Need of HDL, VLSI Design flow, Features and capabilities of VHDL,

Elements of VHDL (EntityArchitecture, Library, Package, and Configuration), Identifiers,

literals, data types, operators and Attributes (type, signal, signal value, array, block).

8hrs

Unit II

Combinational logic design using VHDL:

Adder, substractor, decoder, encoder, tristatebuffer, multiplexer, parity generator, Parity

checker, comparator, using Concurrent& Sequential statements.

7hrs

Unit III

FSM Design Using VHDL:

Wait statement, delays, inertial delay, Transport delay, VHDL implementation of counter,

sequencedetector, Design of content addressablememory CAB.

6hrs

Unit IV

Introduction to Verilog:

Basic verilog naming conventions, verilog operators, data types, assignment statements,

control statements, behavioralmodeling in verilog HDL, combinational logic design using

verilog.

5hrs

Unit V

MOS Transistor theory:

Physical structure of MOS transistor, MOS transistor under static conditions,Introduction to

CMOS inverter and its V-I characteristics.

5hrs

Unit VI

PLD Architectures and Testing:

Xilinx 9500 series CPLD (XC 9572), Spartan II FPGA (XCS 2s30), Testing: Fault models,

path sensitizing random test design for testability, Built-in self test and Boundary scan.

5hrs

Reference Books Sr.

No

Title Author Publisher Edition Year of

Edition

1. Fundamentals of Digital

Logic with VHDL design Stephen Brown

and

ZvonkoVranesic

Tata Mcgraw

Hill

Second 2009

2. Principals of Digital System

Design using VHDL Roth John Cengage

Learning

--

--

3. Digital Systems Design with

VHDL and Synthesis An

Integrated Approach

K.C. Chang Wiley-

India Edition

--

--

4. Digital integrated circuits-

A design perspective Jan Rabaey,

Anantha C PHI Second

--

5. Digital logic and

microprocessor design with

VHDL

Enoch O.

Hwang

Thomson

Publication 2004




Other Books/E-material Sr.

No

Title Author Publisher Edition Year of

Edition

1 The Programmable logic data

book

-- Xilinx -- --

2 Datasheets of XC9572 CPDL,

XC2S30- Spartan –II- FPGA

-- Xilinx -- --


Course Educational

Objectives

Course Outcomes

1 2 3 4 5 6

C I

C II

C III

C IV

C V


Course

Outcomes

Program Outcomes

a b c d e f g h i j k l M

1

2

3

4

5

6





Module Lect.

No.

Lesson Plan

TM TA AT

Mapping with

Outcomes


I

Introduction to VHDL: (08)

1 Introduction to the subject, Level of abstraction

LT

CB

AS/

CT/

QA/

EX

1

a,b

2 Need of HDLVLSI Design flow. 3 Features and capabilities of VHDL 4 Elements of VHDL Entity Architecture

5 Library, Package, Configuration 6 Identifiers, literals

7 Data types, operators. 8 Attributes- type, signals 9 Attributes- signal value 10 Attributes- array block

II

Combinational logic design using VHDL: (07)

11 Adder, subtractor

LT

CB

AS/

CT/

QA/

EX

1,

3

b, k

12 Decoder, encoder, 13 Tristate buffer,Multiplexer 14 Parity generator, parity checkerComparator 15 Concurrent assignment 16 Sequentialassignment statements 17 Example of each above two

FSM Design Using VHDL: (06)

18 Wait statement delay

LT

CB

AS/CT,

QA, EX

4 b, e, k 19 Inertial and transport delay 20 VHDL implementation of counter 21 Design of sequential detector




Module Lect.

No.

Lesson Plan

TM TA AT

Mapping with

Outcomes


III 22 Examples of counter and sequential detector 23 Design of memory

24 Design of content addressable memory CAM

IV

Introduction to Verilog: (05)

25 Introduction, Naming, Conventions

LT

CB

AS/

CT/

QA/

EX

2 a,b

26 Operators, data type 27 Assignment statement 28 Control statement 29 Behavioral modeling in Verilog 30 Combinational design using Verilog 31 Examples of Combinational design

V

MOS Transistor theory: (05)

32 Physical structure of MOS LT CB AS/

CT/

QA/

EX

6 a 33 MOSFET under static condition 34 Static conditions 35 Introduction to MOS inverter 36 V-I characteristics of MOS inverter

VI

PLD Architectures and Testing: (05)

37 Xilinx 9500 series CPLD (XC 9572)

LT

CB

AS/

CT/

QA/

EX

5,

6

a, b, k

38 Spartan II FPGA (XC35500E) 39 Testing : Fault models 40 Path sensitizing 41 Random testdesign for testability 42 Built-in self-test,Boundary scan




Assignment Questions:

Module Question Bank

1

Explain package in VHDL

Write syntax of „for….generate statement‟ give suitable example.

Write in brief about operators in VHDL

Explain the multi-valued logic in VHDL

Explain with example syntax of „configuration ‟ statement

Explain the syntax for physical literals. Write a physical type for current.(nA, µA,

mA, A)

Explain different elements of VHDL with syntax

Draw a flowchart & explain the design process for FPGA/CPLD based digital

designs.

What is transaction, event & sensitivity list? Write a process with & without

sensitivity list & explain the difference.

Explain process statement using different types of wait statements. Write example

to each.

Explain different types of simulators in VHDL

Explain different types of attributes in VHDL with suitable example.

Explain briefly signal values & array type of attribute in VHDL with example.

Which are different types of delays used in VHDL? Explain each with timing

diagram.

Explain array & record data types in detail.

2

Write VHDL code for synchronous reset D- flip-flop

Write structural VHDL model for half adder

Write behavioral VHDL code for 3:8 decoder

Write a VHDL code for N-bit parity generator using „Generic‟

Write a VHDL code for Hamming encoder

Write a VHDL code for 4:1 MUX using -1) case statement, 2) with……select

Write a VHDL code for binary to gray convertor

Write a behavioral VHDL code for tri-state buffer

Describe using VHDL code 8-bit comparator. If „A‟ & „B‟ are 8-bit numbers.

Comparator has three outputs A>B, A<B, A=B. Use 4-bit comparator to

implement 8-bit comparator.

Write VHDL code for Full adder using three styles of modeling.

Implement using generate statement, a 4-bit shift register .use D flip-flop as a

component.

Design & describe using VHDL 4-bit 1 hot decoder with ENABLE input &

VALID output. If ENABLE= 0 , then VALID=1 otherwise VALID =0 & only one

of the 16 output is active.

Design a 2-input N-bit serial adder & write a VHDL description for the same.(hint:

if A & B are the inputs then sum= A+B at every clock & COUT is a carry bit

which is stored for further additions. At reset, the stored carry bit is cleared. )

3

Write a note on metastability

Design a Mealy FSM to detect an overlapping sequence „1101‟ & describe using

VHDL

Explain with neat diagram how asynchronous inputs are interfaced with

synchronous digital circuits.

Write a VHDL code for up-down counter with control input UP/DOWN.




Module Question Bank

What is clock skew? Explain with neat diagram types of clock skew.

Write a VHDL code for up counter with synchronous & asynchronous reset.

Write a VHDL code to describe a 4-bit counter which counts only even numbers.

(0,2,4,……..14, 0,2,…..)

What is gating of clock? What are its disadvantages?

Explain the working of 4-input bus arbiter having fix priority with the help of state

diagram.

List & explain the I/O signal for dual port RAM & write a VHDL description for

the same.

4

List the operators in Verilog. Give examples of each

Write all the naming conventions in Verilog HDL

With the help of example, write data types in Verilog

Write verilog codes for the following- 1. Full adder, 2. Mux 4:1, 3. Comparator 4-

bit

5

Explain in detail the behaviour of MOS transistor under various static conditions.

Explain VTC of static CMOS inverter with the help of load curves of n-MOS & p-

MOS transistors

Draw CMOS structure of inverter and explain its working in detail

6

With the help of suitable circuit diagram, briefly elaborate the role of LFSR in

component testing

Draw & explain the fast connect –II switch matrix in Xilinx XC9500 series.

Briefly write about the scan path technique used for testing sequential digital

systems.

Explain the Built-in self test used for testing of digital ICs.

Draw & explain the architectural block diagram of XC9500 CPLD.

Draw & explain in detail the basic block diagram of Spartan-II family FPGA

Explain boundary scan methodology used for testing circuit boards.

Which are different fault models used while testing combinational logic? Explain

each with example.

Explain the fault detection using path sensitizing with example.

Draw & explain in detail the product term allocator in the macrocell in the function

block of XC9500 series.

Using neat block diagram, explain I/O block of Spartan-II FPGA

Plan for Class Test (CT): Type of CT Based on Module No.

Class Test-1 1, 2

Midterm Test 1, 2, 3

Class Test-2 4, 5







L-I Introduction of the hardware & software tools used for simulation, synthesis &

implementation of VHDL codes

L-II To make students acquainted with designing combinational & sequential circuits

using VHDL & their simulation.

L-III To persuade the students for testing the designs using test benches & implement it on

available hardware like FPGAs & CPLDs.

L-IV To encourage students explore in the design process of higher end systems like

ALUs, processors & ASICs.



1 Install at least the student versions of software & handle the hardware proficiently

2 Write & simulate VHDL codes for combinational & sequential circuits.

3 Troubleshoot common errors while design & implementation of programs.

4 Create test benches for assigned task & get the expected results.

5 Discuss & demonstrate a solution to the given problem from design to implementation.

6 Use the prerequisite knowledge while choosing their final year projects as well as the

career


Laboratory

Educational

Objectives

Laboratory Outcomes

1 2 3 4 5 6

L-I

L-II

L-III

L-IV


Laboratory

Outcomes

Programme Outcomes


1

2

3

4

5

6





Laboratory

Outcomes

Program Outcomes


VLSI Design (2) (1) (2) (1)

Plan to Cover Contents Beyond Syllabus: Planned Date/

Week

Topic Beyond

Syllabus

Resource Person

with Affiliation

Remarks

12th

Week Introduction to CMOS

VLSI Design

Subject In charge --

Experiment List Expt.

No.

Title of Experiment PO’s

mapped

Assessment

Tool

1 Introduction, Study of simulation steps in Xilinx

ISE software by writing simple VHDL code for

AND gate

b

Continuous

Assessment

Sheet

&

Laboratory

Rubric *

2 Writing VHDL codes & simulation of 4-bit

comparator

b, d, g, k

3 Writing VHDL codes & simulation of full adder,

full substractor

4 Writing VHDL codes & simulation of priority

encoder & decoder.

5 Implementation of VHDL codes(Gates) on

FPGA &/or CPLD

6 Revision

7 Writing Verilog codes & simulation of full adder,

full substractor

8 Writing Verilog codes & simulation of priority

encoder & decoder.

9 Writing VHDL codes & simulation of counter

10 Writing VHDL codes & simulation of shift

registers

11 Writing VHDL codes & simulation of sequence

detectors

12 Verification of ALU Design with Verilog HDL

13 Miniproject

14 Internal Assessment

* PO b will be assessed through Continuous Assessment as well as Laboratory Rubric.

* PO‟s d, g, k will be assessed through Laboratory Rubric at least once in a semester.




Plan to Cover Contents beyond Syllabus:

Planned Date/

Week

Topic Beyond Syllabus

12th

Week Designing a layout and simulation of CMOS

Inverter using Microwind/Mentor graphics tool.

Self Study Materials and References: 1) Laboratory Manuals

2) Websites

3) Books

****




COURSE DETAILS

Structure of Course

Class TE-Part-II Semester VI

Course Code & Course Title ETC-309

Microprocessor and Microcontrollers


Prerequisite/s DE

Teaching Scheme: Lecture/Practical/Tutorial/Drawing 04/02/00/00 Hours

Total Contact Hours:

Theory/Practical/Tutorial/Drawing 56/28/00/00 Hours

Credits 05


Subject In- charge Mr. V.A.Mane and Mr. S.M.Herur


The course aims to:

C-I Provide introduction to basic 8085 microprocessor and 8051 microcontroller

architecture and programming.

C-II Explain difference between microprocessor and microcontroller

C-III Explain interrupts of 8085and 8051 and programs over interrupts.

C-IV Explain interfacing 8255 with 8085.

C-V Provide knowledge of interfacing LED ,LCD, ADC DAC and stepper motor etc. to

8051 and 8085

C-VI Explain Timers/Counters, Serial Port, interrupts and RS232 with associated SFRs

C-VII Introduce embedded C programs for 8051

Course Outcomes (COs): After completion of this course, students

will be able to

PO Mapped

1 Know the architecture of 8085 and 8051 a

2 Compare microprocessor and Microcontrollers a

3 Know instruction set of 8085 and 8051. a

4 Write programs over 8085 microprocessors a

5 Interface 8255,ADC, DAC and stepper motor and LCD to 8085

and 8051. a

6 Know interrupt structure of 8085 and 8051 a

7 Do programs over timers and serial ports of 8051 a

8 Demonstrate logical skills by writing programs to simulate it. And

implement on Hardware kits. a, b, k

9 Write programs in embedded C a




Course Syllabus UNIT I

Introduction to 8085 Microprocessor:

CPU Architecture, Register Organization, 8085 Instruction Set, Addressing modes. Stack

&Subroutines, Instruction Cycle, Interrupts of 8085(Hardware and software).

(8Hrs)

UNIT II

Interfacing:

Memory interfacing, I/O interfacing, Memory mapped I/O, I/O mapped I/O, Peripheral

Interfacing – Programmable I/O-8255 Interface, ADC – 0809, DAC – 0808, Seven segment

LED, 4 x 4 Matrix keyboard , stepper motor.

(8Hrs)

UNIT III

Introduction to MCS51

Introduction to MCS51Family, Architecture, Functional Pin out diagram, Programming

Model, Memory Organization, Addressing Modes, Instruction Set: Classification, Reset

Circuit, Machine Cycle, Oscillator Circuit, Introduction to Assembly Language

Programming.

(8Hrs)

UNIT IV

Hardware overview: Input / Output Ports, Counters & Timers, Serial Communication, Interrupt.

Note: Structure of Above, Related S.F.R, Instruction, Associated Programs.

(8Hrs)

UNIT V

Interfacing & Application Interfacing: RAM ROM, LCD, ADC, DAC, Keyboard, stepper motor Minimum System

Design &Application: Interfacing of Temperature Sensor (LM35) 8051 Connection to

RS232.

(8Hrs)

UNIT VI

Embedded ‘C’ Programming for 8051: Data types and time delay, I/O Programming, Logic operations, Data conversions, accessing

code ROM space, Data serialization.

(8Hrs)

Text Books Sr.


Year of

Edition

1

Microprocessor

architecture ,

Programming and

applications with

8085A

Ramesh S

Gaonkar

Penram

International

Publications

V

Edition --

2

The 8051

Microcontroller &

Embedded Systems

Muhammad Ali

Mazidi & Janice

Gillispie

Pearson

Education

publication

III

Edition

--




Reference Books Sr.


Year of

Edition

1

Microprocessor and

programmed logic Kenneth L Short

Prentice

Hall of

India ,New

Delhi

2nd

edition

Indian

Reprint

2004

2 Microprocessor and

Digital systems

Douglas V Hall

New York :

Gregg

division ,

Mc Graw –

Hill , c1983

2nd

--

3 The 8051

Microcontroller Kenneth J Ayala

Pearson

Education

publication

III

Edition 1999


Course Educational

Objectives

Course Outcomes

1

2

3

4

5

6

7

8

9

C I √ √ √ √

C II √

C III √

C IV √

C V √

C VI √

C VII √ √


Course

Outcomes

Program Outcomes

a b c d e f g h i j k l m

1 √

2 √

3 √

4 √

5 √

6 √

7 √

8 √ √ √

9 √





Module Lect.

No.

Lesson Plan

TM TA AT

Mapping with Outcomes


I

Introduction to 8085 Microprocessor

1,3,4&6 a

1 Evolution of microprocessor and basic building blocks

LT

CB

QA,

CT-1

MT

2 Pin Diagram of 8085

3 Architecture of 8085

4 Register structure

5 Data transfer and arithmetic instructions

6 Branch instruction set

7 Programs over instruction set

8 Programs over instruction set

9 Addressing Modes

10 Stacks and subroutines

11 Timing Diagram

12 Timing Diagram

13 Delay Programs

14 Delay Programs

15 Interrupts in 8085

16 Interrupts in 8085

II Interfacing




17 PPI 8255

LT

CB

QA,

CT-1

MT

5 a

18 PPI 8255

19 ADC

20 Interfacing of temperature sensor and relay

21 Interfacing of 7 segment display

22 DAC

23 Key board interfacing

24 Interfacing of stepper motor

III

Introduction to MCS51

25 Introduction to MCS 51 family

LT

CB

QA,

MT

1,2&3 a

26 Architecture and Pin Diagram of 8051

27 Detailed Architecture of 8051 and oscillator circuits

28 Instruction set of 8051

29 Addressing Modes

30 Instruction set

31 Programming over Boolean instructions

IV

Hardware overview

32 Introduction to I/O Ports and bit addressability

LT

CB

QA,

CT-2

6&7

a

33 Introduction to bit addressability of RAM

34 Introduction to 8051 timers(timer0 and timer1)

35 Timer in mode1

36 Timer in mode2 and mode 3




37 Serial communication

38 Serial communication

39 Interrupts in 8051 microcontroller

40 Interrupts in 8051 microcontroller

V

Interfacing & Application

41 Interfacing: RAM ROM

LT

CB

CT-2

42 Interfacing: RAM ROM

43 Interfacing of LCD to 8051

44 Interfacing keyboard to 8051

45 Interfacing of ADC and temperature sensor to 8051

46 Interfacing of DAC and RS 232 to 8051

47 Interfacing of Temperature Sensor (LM35) 8051 Connection to RS232.

48 Stepper motor Minimum System Design

VI

Embedded ‘C’ Programming for 8051

49 Data types and time delay,

LT

CB

QA

8&9 a

50 Data serialization

51 I/O Programming,

52 Logic operations

53 Data

Conversions

54 accessing code ROM space

VII 55 Introduction to higher end processor PIC* (out of syllabus) LT CB QA

a 56 Introduction to higher end processor PIC* (out of syllabus) LT CB QA




Note: TM-Teaching Method- Lecture (LT), Demo (DM), Laboratory Visit (LV), Group Discussion (GD), Seminar(SM), Industrial Visits (IV), Case

Studies (CS)TA-Teaching Aids–Chalk Board (CB), Power Point Presentation (PP), Models (MD), Video Film (VF), E-Learning (EL), AT- Assessment

Tool –Assignments (AS), Class Tests (CT), Question Answers (QA), University Examinations (EX), Rubrics (RB), Tutorials (TT), Feedback Report

(FP), Seminar/Project Report (RP), Quiz (QZ)




Question Bank:

Module Assignment / Tutorials/Quiz/ Questions

1

Draw and Explain 8085 CPU Architecture?

Draw and Explain Programmable model of 8085

Draw and Explain different addressing modes of 8085

Explain stack and subroutine instructions

What is machine cycle? What are the different machine cycles ?

Compare Hardware and software interrupts

2

Interface 2kbyte memory chip to 8085 microprocessor

Compare memory mapped I/O and IO mapped I/O

Interface 8085 microprocessor and 8255 I/O Peripheral IC

Interface 8085 microprocessor and ADC

Interface 8085 microprocessor and DAC

Interface 8085 microprocessor and 7 Segment LED

Interface 8085 microprocessor and 4 X 4 matrix keyboard

Interface 8085 microprocessor and stepper motor

3

Explain program status word of 8051

Explain memory map of 8051

Draw and explain SFR map for 8051

Explain addressing modes for 8051

Draw and explain 8051 programming model.

Explain architecture of 8051

Explain reset circuit and oscillator circuit of 8051.

In battery based embedded product, what is the most important factor in choosing microcontroller.

Explain with example the read modify write feature of 8051.

Explain pin function of 8051.

Explain the advantage and limitations of register indirect addressing mode.

Explain the following w.r.t. 8051:

i)Machine cycle ii)P1, P2 iii)States

Explain memory organisation in 8051

Explain the Boolean instructions of 8051.

Draw and explain the power on reset circuit of 8051.

Explain in detail the following instructions

a. DIV AB

b. CJNE

c. ANLC,SCR bit

d. JMP @A+DPTR

Indicate the result of following instructions

i ) mov 06H, #0FFH

i. dec 06 H

ii) MOV R0, #40H

i. MOV @R0, FFH

iii) CLR A

i. SETB C

ii. RRC A

iii. SETB C

iv. RRC A




Write ALP to transfer the block of data from external memory location 2000H to internal RAM

20h onward. Assume no of banks in R3 of bank 1.

Write program using the instruction of MCS51 family to multiply 8 bit nos stored at 4100H and

4101H and store result at memory location 4102H and 4103H

Indicate the flag status of CY,P after execution of following code

a. CLR A

i. CLR C

ii. SUBB A,#01H

b. MOV A, #02H

i. MOV B, #02H

ii. MUL AB

4

Explain baud rate setting for serial port of 8051.

Explain timer/counter and timer modes of 8051

Explain interrupt structure of 8051

Explain serial communication of 8051.

Draw and explain the functional diagram of port 1 of MCS-51. Explain how the port is configured

as an OUTPUT port.

Explain UART of 8051.

Explain the auto reload mode of timer of MCS-51. Give the applications of this mode.

Write a assembly language program to continually transmit „HELLO‟ with 4800 baud to a terminal

connected to serial port of 8051. (Crystal frequency=11.0592 MHz)

Write an ALP that generates square waves on P 1.0 and P 2.0 with frequency of 10KHz and 1KHz

respectively. (Crystal frequency=12 MHz).

Indicate which mode and which timer will get selected for following instructions

a. MOV TMOD,#10H

b. MOV TMOD,#20H

c. MOV TMOD,#12H

d. MOV TMOD,#01H

Find BR for the following:

if XTAL= 16MHz and SMOD=0 MOV TH1, #-10 write a program to transfer the serially

message.

5

Explain interfacing of RAM , ROM LCD and DAC

Interface 32KB of RAM and 16KB of EPROM to 8051, with access only to the OFF chip program

memory.

Interface a LCD consisting of two lines and 16 characters to 8051 and describe the LCD

pins/signals used in the interfacing.

Interface a sixteen key-keypad to 8051 and explain the interface for

i) Key board scanning to find out which key is pressed.

ii) Key debouncing (Either software or hardware).

Write a assembly language program to continually transmit „HELLO‟ with 4800 baud to a terminal

connected to serial port of 8051. (Crystal frequency=11.0592 MHz)

Draw interfacing diagram of 16x2 LCD with 8051 ports and write a program to display the

message “SHIVAJI UNIVERSITY” on LCD.

Interface LM 35 temperature sensor to 89c51 microcontroller

Explain UART of 8051.

Draw and briefly describe a 8051 based minimum system for sensing and displaying temp. in the

range 0-100oC. (Use LM 35 sensor)




Interface 89c51 to RS 232

6

Explain data types and time delay 89c51

Explain logical operations 89c51

Explain data conversions in 89c51

Explain accessing code ROM space

Explain data serialization


Planned Date/ Week Type of CT Based on Module No.

First Shift Second Shift

15-20th

Feb 15-20th

Feb Class Test-1 I

10-12th

March 10-12th

March Midterm Test I,II, III

4-9th

April 4-9th

April Class Test-2 IV, V



Laboratory practice aims to:

L-I Conceptual Understanding: Develop students‟ understanding through laboratory activities to

solve problems related to key concepts taught in the classroom.

L-II Design Skills: Develop students‟ ability to solve open ended problems through the design and

construction of new artifacts or processes.

L-III Debugging Skills: Develop debugging capability in order to propose and apply effective

engineering solutions.

L-IV Social Skills: Develop the skills related to teamwork, societal aspects and environmental

issues.

L-V Professional Skills: Develop the technical and communication skills so as to have successful

professional career.

Laboratory Outcomes (LOs): On successful completion of laboratory practice, student will be able to,

i Apply appropriate instruments and/or software tools and handle them carefully and safely to

make measurements of physical quantities or perform data analysis.

ii Specify appropriate equipment and procedures/algorithms, implement these

procedures/algorithms, analyze and interpret the resulting data.

iii Design and build a software/hardware part to meet desired specifications and tests it using

appropriate testing strategy and/or equipments.

iv Teamwork: Work effectively in teams to accomplish the assigned responsibilities in an

integral manner

v Communication: Communicate effectively about laboratory work both orally and in writing

journals/technical reports.





Laboratory

Educational

Objectives

Laboratory Outcomes

i ii iii iv v

L-I √

L-II √

L-III √

L-IV √

L-V √


Laboratory

Outcomes

Programme Outcomes


i

ii √

iii √

iv √ √

v √


Laboratory Outcomes Program Outcomes


MP & MC √ (3) √(2) √(1) √(1) √(1) √(1)


Planned Date/ Week Topic Beyond Syllabus Resource Person

with Affiliation Remarks

14th

Week

*Introduction to PIC

controller Subject In charge -----




Practical Plan:

Expt.

No. Title of Experiment

Compulsory

or Optional

Plann

ed

Week

PO’s

Met

Assessment

Tool

1 Program for addition of sixteen bit nos.(on

Hardware kit) Compulsory 1

st

b. d, g, k

Continuous

Assessment

Sheet

&

*Lab Rubric

2 Block Transfer (on Hardware kit) Compulsory 2nd

3 Block Exchange (on Hardware kit) Compulsory 3rd

4

Multiplication of two 8 bit numbers using

Successive addition, Multiplication of two 8

bit numbers using Shift and add method(on

simulator)

Compulsory 4th

5

Arranging the numbers in ascending order,

Sorting of even and odd numbers(on

simulator)

Compulsory 5th

6 Interfacing of 8255 in Output mode , In

put mode and BSR (Hardware kit)

Compulsory 6th

7 Revision/introduction to PIC

microcontroller(beyond syllabi)

Compulsory 7th

8 Program over the timers (on keil) Compulsory 8th

9 Program over the timers in C (on keil) Compulsory 9th

10 Program for serial communication C

program (on keil)

Compulsory 10th

11 Program for LCD interfacing (in C) Compulsory 11th

12 Program for DAC interfacing Compulsory 12th

13 Program for stepper motor

interfacing(Assembly)

Compulsory 13th

14 Revision/Internal Submission Compulsory 14th


* PO‟s b, d, g, k will be assessed through Laboratory Rubric at least once in a semester.


Planned Date/

Week Topic Beyond Syllabus

7 Introduction to PIC



2. Website: www.atmel.com

3. Books

Additional comments: nil

****




COURSE DETAILS

Structure of Course

Class TE-Part-II-VI Semester

Course Code & Course Title ETC305/Optical Communication

& Network

Designation as Compulsory

Teaching Scheme(Lecture/Practical/Tutorial/Drawing) 04/02/--/--

Total Contact Hours:

Theory/Practical/Tutorial/Drawing

36/24/--/-- Hours


Prerequisite/s ETC208

Credits 4

Subject In-charge Mr. Sandeep Bidwai (1st Shift)

Mr. Mahesh Kumbhar (2nd

Shift)

Course Objectives: The course aims to:

1. Describe the basics optical communication along with simulation and modeling the same

with blocks.

2. Optical fiber structure and light propagating mechanisms in detail.

3. Analyze the signal degradation mechanisms and the methods of limiting the same.

4. Explain the construction and working of optical sources and detectors.

5. Describe the optical receiver operation in detail.

6. Describe the wavelength division multiplexing and optical network

Course Outcomes: Upon successful completion of this course, the student will be

able to:

PO

Mapped

1. Elaborate the basic optical communication along with the simulation and

modeling tools.

a

2. Differentiate the different types of optical fiber structures and light propagating

mechanisms.

a

3. Acquire knowledge of signal degradation mechanism in optical fiber. a,b

4. Understand the construction of and working of optical sources and detectors. a

5. Describe the optical receiver operation, WDM and optical network in detail. a

Course Syllabus

Unit I

Overview of Optical Fiber Communication

Motivation for light wave communication, Basic Network Information Rates, The evolution of




Optic System, Elements of Optical Fiber Transmission Link, optical spectral band, The nature

of Light, Basic Optical Laws and Definitions, Single Mode Fibers, Graded Index fiber

structures.

08hrs

Unit II

Optical Fibers: Structures, Wave guiding and Fabrication

Optical Fiber Modes and Configurations, Mode theory for waveguides, Fiber Materials, Fiber

Fabrication, Fiber Optic cables.

08hrs

Unit III

Transmission characteristics of optical fibers.

Attenuation, material absorption losses, scattering losses, bending losses, dispersion,

polarization, nonlinear effects.

08hrs

Unit IV

Optical Sources

Semiconductor Physics, Light-Emitting Diodes (LEDs), Laser Diodes, 09Light Source

Linearity, Modal, Partition and Reflection Noise, Rel08iability Considerations.

07hrs

Unit V

Optical Receiver

Physical Principal of Photodiodes, Photodetector Noise, Detectors Response Time, Avalanche

Multiplication Noise, Structure for InGaAs APDs, Temperature effect of Avalanche Gain,

Comparison of Photodetectors , Fundamental Receiver Operation, Digital Receiver

Performance, Detailed Performance Calculations

09hrs

Unit VI

Optical Networks

Operational Principles of WDM, Passive Components, Tunable Sources, Tunable Filters, Basic

Networks, SONET/SDH, Broadcast and Select WDM Networks, Wavelength Routed

Networks, Nonlinear Effects on Network Performance, Performance of WDM+EDFA Systems,

optical CDMA.

08hrs

Text Books

Sr.

No. Title Author Publisher Edition

Year of

Edition

1 Optical Fiber

Communication Gerd Keiser TMH 3

rd 2000




Reference Books

Sr.

No. Title Author Publisher Edition

Year of

Edition

1. Optical Communication Senior

2. Optical Fiber

Communication Agarwal Wiley

3. Optical fiber and laser

principles and applications Anuradha

New Age

Publications.

4. Optical Networks Ramaswamy Elsevier

India

5 Fiber optic communication

systems Dr .R .K .Singh Willey India

Other Books/E-material

Sr.


Year of

Edition

01 Optical Sources

NPTEL Lecture Series Dr. Shevgaonkar, IIT, Mumbai





Module Lect.

No.

Lesson Plan

TM TA AT

Mapping with

Outcomes


I

Overview of Optical Fiber Communication

1 a

1 Motivation for light wave communication LT CB & PP QA

2 Basic Network Information Rates LT CB & PP QA & AS

3 The evolution of Optic System LT CB & PP QA

4 Elements of Optical Fiber Transmission Link LT CB & PP QA

5 optical spectral band LT CB & PP QA

6 The nature of Light LT CB & PP QA

7 Basic Optical Laws LT CB & PP QA &CT

8 Basic Optical Definitions LT CB & PP QA

9 Single Mode Fibers LT CB & PP QA

10 Graded Index fiber structures. LT CB & PP QA

II

Optical Fibers: Structures, Wave guiding and Fabrication

1&2

a ,e

11 Optical Fiber Modes LT CB & PP QA &CT

12 Optical Fiber Configurations LT CB & PP QA &CT

13 Mode theory for waveguides LT CB & PP QA &CT

14 Fiber Materials LT CB & PP QA &CT

15 Fiber Fabrication LT CB & PP QA &CT

16 Fiber Optic cables LT CB & PP QA &CT

17 Fiber Optic cables LT CB & PP QA &CT

III

Transmission characteristics of optical fibers.

3&4 a ,e 18 Attenuation, LT CB & PP QA &CT

19 material absorption losses LT CB & PP QA &CT

20 scattering losses LT CB & PP QA &CT




21 Bending losses LT CB & PP QA &CT

22 dispersion LT CB & PP QA &CT

23 dispersion LT CB & PP QA &CT

24 polarization LT CB & PP QA &CT

25 nonlinear effects LT CB & PP QA &CT

IV

Optical Sources

26 Semiconductor Physics LT CB & PP QA &CT

3&4 a ,e

27 Light-Emitting Diodes (LEDs) LT CB & PP QA &CT

28 Laser Diodes LT CB & PP QA &CT

29 Light Source Linearity LT CB & PP QA &CT

30 Light Source Modal LT CB & PP QA &CT

31 Partition Noise LT CB & PP QA &CT

32 Reflection Noise LT CB & PP QA &CT

33 Reliability Considerations LT CB & PP QA &CT

V

Optical Receiver

3&4 a ,e

34 Physical Principal of Photodiodes LT CB & PP QA

35 Photodetector Noise LT CB & PP QA

36 Detectors Response Time LT CB & PP QA

37 Avalanche Multiplication Noise LT CB & PP QA

38 Structure for In GaAs APDs LT CB & PP QA &CT

39 Temperature effect of Avalanche Gain LT CB & PP QA

40 Comparison of Photodetectors LT CB & PP QA

41 Fundamental Receiver Operation LT CB & PP QA

42 Digital Receiver Performance LT CB & PP QA

43 Detailed Performance Calculations LT CB & PP QA

VI

Optical Networks

5 a 44 Operational Principles of WDM LT CB & PP AS

45 Passive Components LT CB & PP AS




Note: TM-Teaching Method- Lecture (LT), Demo (DM), Laboratory Visit (LV), Group Discussion (GD), Seminar(SM), Industrial Visits

(IV), Case Studies (CS)TA-Teaching Aids–Chalk Board (CB), Power Point Presentation (PP), Models (MD), Video Film (VF), E-

Learning (EL), AT- Assessment Tool –Assignments (AS), Class Tests (CT), Question Answers (QA), University Examinations (EX),

Rubrics (RB), Tutorials (TT), Feedback Report (FP), Seminar/Project Report (RP), Quiz (QZ)

46 Tunable Sources LT CB & PP AS

47 Basic Networks LT CB & PP AS

48 SONET/SDH LT CB & PP QA &CT

49 Broadcast WDM Networks LT CB & PP QA &CT

50 Select WDM Networks LT CB & PP QA &CT

3&4 a

51 Wavelength Routed Networks LT CB & PP QA &CT

52 Nonlinear Effects on Network Performance LT CB & PP QA &CT

53 Performance of WDM LT CB & PP QA &CT

54 Performance of EDFA Systems LT CB & PP QA &CT

55 optical CDMA LT CB & PP QA &CT

56 Next Gen Communication Systems LT CB & PP QA &CT




Assignment Questions/Course Question Bank

Module Assignment Questions

1

Explain in detail elements of optical fiber communication link.[Dec-12][08]

What are the merits of the optical communication system.[May-12][08]

Explain advantages and disadvantages of optical fiber communication over that

using metallic conductor. [Dec-11][08][Dec-10][08][Nov-07][08]

Discuss military and consumer application of optical communication [Dec-11][08] [Dec-10][08]

Draw and explain optical fiber communication system.[Dec-08][08]

What are the special features offered by optical communication over

conventional communication sys

tem. [May-11][08] [May-07][08]

Explain with the help of block diagram optical communication system and its

merits. [May-04][05][May-09][08]

Write short notes on

a. Advantages of optical fiber communication

[May-10][06][Dec-10][06][May-11][06]

b. Simulation and modeling tools [May-10][06][Dec-09][06][Dec-11][06]

c. Industrial applications of optical fiber communication

[May-10][04][May-07][08]

d. Military and computer application of optical communication [Dec-11][06]

Discuss optical fiber application for civil and public network. [May-07][06]

Discuss optical fiber application for public network.

[Dec-08][06][Dec-07][06][May-09][06]

Discuss optical fiber communication system [May-06][05]

2

Explain in detail different optical fiber modes and configurations

[Dec-12][08]

What are the functions of optical cables? What are the factors affecting fiber

strength and durability. [May-06][08]

Explain in detail optical fiber cable. [Dec-07][08]

Describe with aid of simple ray diagrams

a. Step index fiber

b. Graded index fiber [Dec-10][08][Dec-09][08][Dec-08][08]

Explain shadow method for the on-line measurement of the fiber outer

diameter. [Dec-09][06][May-07][08]

Explain mechanical properties of fibers and find expression for failure

probability. [May-10][08][May-11][08]

What is meant by the acceptance angle for optical fiber? Show how this is

related to the fiber numerical aperture and refractive indices for the fiber core

and cladding. [May-06][05]

Derive an expression for NA and acceptance angle for meridional rays.

[Dec-09][08][May-07][08]

Briefly describe with the aid of suitable diagrams, the difference between

meridional rays and skew rays path in step index fiber. Derive and expression

for NA in case of skew rays. [May-10][10]

Compute the numerical aperture and the acceptance angle of optical fiber from

following data n1 = 1.55 and n2 = 1.50. [May-10][08]

Explain with neat diagrams comparison between step index fiber and graded

index fiber. [May-10][08]




Prove NA = (n12 – n22) ½ using ray theory analysis. Also derive relationship

between NA and acceptance angle. [Dec-07][08]

Find out critical angle, numerical aperture and acceptance angle for a fiber with

core and cladding refractive indices 1.47 and 1.37 respectively.

[May-07][08]

A silica optical fiber with a core diameter large enough to be described by ray

theory analysis has a core refractive index o f1.75 and cladding refractive index

of 1.70. Determine

The critical angle at core-cladding interface

The NA for the fiber

The acceptance angle in air for fiber [May-04][08]

Explain mechanical properties of fibers. Find the expression for failure

probability. [Dec-10][08][Dec-11][08]

Discuss any fiber manufacturing process. [May-06][05]

Describe liquid phase technique for preparation of optical fibers.

[Dec-09][08]

Explain the principle considerations to design a optical fiber.[Dec-09][08]

With the help of neat sketch explain fiber drawing mechanism.

[Dec-11][08][Dec-07][08]

Explain different methods of fiber dispersion measurement. [May-11][08]

Explain different fiber materials and double crucible method for fiber

fabrication. [Dec-10][08] [May-11][08]

State different techniques for preparation of optical fiber. Explain any one

technique. [May-11][08]

State different manufacturing techniques for optical fiber. Explain any one in

detail. [May-07][08]

Describe the double crucible method for fiber drawing. [May-11][08]

Explain different fiber materials and any one vapor phase deposition technique

of fiber fabrication. [Dec-11][08][Dec-11][08]

Explain different types of fiber materials and fiber fabrication methods.

[Dec-12][08][May-12][08]

Describe chemical vapor deposition technique for preparation of optical fiber.

[May-09][08]

With the help of schematic explain ferrule connector.[Dec-11][08]

Define and explain following terms

i) Numerical Aperture ii) Acceptance Angle

ii) Total Internal Reflection iv) Critical angle

v) Skew Rays [May-12][08][Dec-10][08][Dec-08][08][May-09][08]

State different types of optical cable. Explain any one. [Dec-10][08]

Compare single mode and multimode optical fiber. [May-11][08]

Explain with diagrams single mode and multimode fibers.

[May-12][08][Dec-11][08][May-09][08]

Compare step index and graded index fiber. [Dec-07][08]

Explain step index and graded index fiber.[May-07][08]

Using simple ray theories describe the mechanism for the transmission of light

with in an optical fiber. [May-07][08]

Explain light transmission mechanism through optical fiber and different types

of optical fibers with necessary diagrams. [Dec-09][08]

Discuss fiber refractive index profile measurement.[Dec-09][08]




What is principal requirement of good conductor design? Explain connector

types with schematic representations. [Dec-10][08]

Explain in detail connectors. [May-09][08]

What is optical fiber coupler? What are its types.

[May-06][08][May-04][08]

Explain different types of optical fiber couplers. [Dec-10][08][Dec-08][08]


Graded index fiber structure [Dec-12][08]

Design optimization of single mode fiber [May-10][06]

Numerical aperture measurement [May-10][04][May-11][06]

Slotted Optical Fiber Cable [May-09][06]

Mode Field Diameter[May-10][06][Dec-10][06][May-11][06][Dec-11][06]

Design optimization of single mode fibers[Dec-09][06][Dec-11][06]

Glass Fibers [Dec-09][06][Dec-10][06][Dec-11][06]

Skew Rays [Dec-07][06]

Total Internal Reflection [Dec-07][06]

Modified chemical vapor deposition technique for fiber.[Dec-09][06]

Optical fiber Splicers [Dec-11][06][Dec-10][06][Dec-09][06]

Fiber splicers and connectors [May-10][08]

Fiber drawing techniques [Dec-10][06]

Laser modulation [Dec-11][06]

Explain cut off wavelength measurement of optical fiber.

[May-04][08][May-09][06]

Discuss optical fiber cable design with regard to

i) Fiber buffering

ii) Cable strength

iii) Cable sheath [Dec-08][08]

With the help of schematic explain fusion splice.[Dec-08][08]

Derive the relation for numerical aperture in terms of refractive indices. Also

derive relation for acceptance angle. [Dec-11][08][May-11][08]

3


a. Connectors [Dec-07][06][May-11][06]

b. Dispersion [May-11][06]

c. Couplers [May-09][06]

d. Material dispersion [Dec-07][06]

e. Connectors [Dec-09][06]

f. LED Coupling for single mode fiber [May-11][06]

g. Modal, partition and reflection noise [Dec-09][06]

h. Dispersion in optical fiber [May-10][06]

i. Dispersion measurement [Dec-10][06]

j. Optical fiber cable [Dec-11][06][May-10][06]

k. Absorption Losses [May-09][06]

l. Total fiber attenuation measurement [Dec-11][06][May-10][04]

m. Scattering losses in optical fibers [Dec-11][06][Dec-10][06]

n. Signal distortion in optical waveguide [Dec-12][08]

Briefly discuss dispersion modified single mode fiber.[May-04][05]

Explain the effect of pulse broadening in graded index waveguide.

[Dec-12][08]

What is principal requirement of good conductor design? Explain connector




types with schematic representation. [May-10][08][Dec-09][08]

The mean optical power launched in to an optical fiber link is 1.5mW and fiber

has an attenuation of 0.5 db/km. Determine the maximum possible link length

with out repeaters. When minimum mean optical power level at detector is 2

µW.

What is material absorption? Explain extrinsic absorption.[May-06][08]

Explain in brief different types of losses occurring in optical fiber.

[May-10][08][May-07][08]

What are the causes of loss in optical fiber? Explain them.

[Dec-07][08][May-11][08]

Explain the phenomenon of scattering as referred to optical fibers.

[Dec-09][08]

Explain attenuation, absorption and scattering losses in optical fibers.

[May-12][08][May-10][08][Dec-09][08] [Dec-10][08]

Briefly describe linear and non-linear scattering losses. [Dec-08][08]

Discuss how total fiber attenuation is measured. [Dec-08][06][May-06][08]

What is waveguide dispersion? Derive expression for pulse broadening in

graded index fibers. [Dec-10][08]

Explain different dispersion mechanisms in optical fibers.

[May-11][08][Dec-11][08]

Explain working of fiber dispersion measurement.[Dec-11][08]

Explain time domain and frequency domain methods for fiber dispersion

measurement. [Dec-07][06]

What is dispersion? List its types and describe.[Dec-10][08][May-04][05]

What is waveguide dispersion? Derive expression for pulse broadening in

graded index fibers. [Dec-09][08]

What is dispersion? With schematic diagram show hoe the pulse broadening

takes place due to intermodal dispersion in different types of optical fiber. [May-06][08]

Discuss how total fiber attenuation is measured.[Dec-07][06]

Explain the phenomenon of dispersion as referred to optical fibers.

[May-07][08]

What are different types of linear scattering losses.[May-05][04]

Explain mode coupling. [May-04][05]

Explain phase velocity and group velocity.[May-06][05]

Briefly discuss dispersion shifted fibers. [May-06][05]

What are the different techniques used for coupling injection lasers to optical

fiber? Illustrate using single mode fiber. [May-06][08]

4

Write note on high performance receivers.[May-06][08]

Prove the relation stimulated emission rate / spontaneous emission rate = 1 /

[exp (hf / KT) - 1] [May-06][08][May-04][08]

What is heterojunction? Explain. [May-04][08]

Explain with diagram double heterojunction LED. [May-06][05]

With the help of schematic explain double heterojunction semiconductor laser. [May-10][08][Dec-08][08]

Explain in detail structure, energy band diagram and refractive index profile for

double heterojunction injection laser.

[May-10][08][Dec-09][08]

Explain principle of operation of double heterojunction LED.

[Dec-08][08][Dec-07][08]

Briefly outline the advantages and drawbacks of the LED in comparison with




the injection laser for use as a source in optical fiber communication.

[Dec-07][08]

Explain in detail structure, energy band diagram and refractive index profile for

typical GaAlAs double heterostructure LED.

[May-12][08][Dec-10][08]

Explain in detail the construction and operation of semiconductor injection

lasers. [May-12][08][Dec-09][08][May-07][08]

Explain the construction and operation of Burrus etched well surface LED.

[Dec-09][08]

Explain in detail power coupling calculations in source to optical fiber power

launching. [May-11][08]

State different types of LEDs and explain any one.

[May-10][09][May-11][08]

Explain any two characteristics of LED. [Dec-09][06][May-06][05]

Discuss different LED characteristics.

[Dec-11][08][Dec-08][06][May-04][08][May-07][08]

Explain different types of LED internal structures. And explain any one.

[Dec-12][08][Dec-11][08][Dec-10][08][Dec-09][08][Dec-08][08]

Explain working of avalanche photodiode (APD) with its benefits and

drawbacks. [May-06][08][May-07][08]

With the help of neat diagram explain construction of Avalanche Photo Diode.

[Dec-10][08]

Explain APD diode with its characteristics. [Dec-09][08][May-11][08]

Explain advantages and disadvantages of LED in comparison with laser for use

as a source in optical communication. [Dec-10][08]

Explain the construction and operation of following

PN diode

PIN diode

APD [May-10][09]

Explain temperature effect on light sources, light source linearity and reliability

considerations. [May-10][08][Dec-09][08][Dec-11][08]

Describe internal quantum efficiency, external quantum efficiency and emitted

optical power from LED. Derive necessary expressions.

[May-11][08][Dec-11][08]

What is power radiated by an LED if its quantum efficiency is 3% and peak

wave length is 670nm? (Assume I = 50mA, hc = 1248) [May-10][08]

Explain in detail power coupling calculations in source to optical fiber power

launching. [Dec-11][08]

Discuss lens coupling of LEDs to optical fibers and outline various techniques

employed. [May-07][06]


1. Modulation technique of LED [Dec-11][06]

2. Light Source Linearit[May-12][08][Dec-10][06][May-11][06]

3. Double heterojunction LED [May-11][06]

4. PIN photodiode [May-11][06]

5. Non-semiconductor Lasers[Dec-09][06][Dec-07][06] [May-11][06][May-

09][06]

6. Laser principle [Dec-11][06][May-11][06]

7. Semi – conductor Injection Laser [May-09][06]




8. LED structure [May-04][06][Dec-07][06]

9. PIN photo diode [Dec-10][06]

10. PIN photo diode [Dec-10][06]

11. PN photo diode [Dec-11][06]

12. Avalanche Photo Diode. [Dec-11][06]

13. LED characteristics [Dec-10][06]

What is meant by intensity modulation of an optical source? Give reasons for

the major present use of direct intensity modulation of semiconductor optical

sources and comment on possible alternatives.

[May-07][08][May-09][08]

Discuss lens coupling of LED to optical fibers and outline various techniques

employed. [May-09][06]

Discuss population inversion, optical feedback and laser oscillations.

[May-04][08]

What is thermal, dark current and quantum noise?[May-06][05]

Explain in detail what is population inversion? What are the glass fibers?

[May-12][09]

Write a note on partition and reflection noise related to laser diode.

[Dec-12][08]

5

Compare various photo detectors. [May-12][08]

Explain the n – p – n in GaAsP/IP heterojunction phototransistor with suitable

diagram. Also draw the external connection diagram.[May-04][08]

Explain the terms quantum efficiency and responsivity, long wavelength cutoff. [Dec-09][08][May-07][06]

Explain the term Responsivity. [May-06][05]


Responsivity of the detector [May-10][04]

Photodiode pulse responses under various detector parameters

[May-11][06]

Avalanche photodiode [May-04][06]

Requirement of optical detectors [May-04][06]

Dispersion [Dec-09][06]

Temperature effect on average gain of the detector. [Dec-09][06]

Explain optical detection principle of the photodiode and reach – through

avalanche photodiode structure. [May-10][08][May-07][06][May-11][08]

Explain optical detection principle. [May-06][05]

Explain different requirements of optical detectors.[May-11][08]

State and explain different requirements of optical detectors.[Dec-10][08]

Explain p-i-n photodiode with suitable figure.[May-04][08][May-07][08]

Explain p – n photodiode with its characteristics.

[Dec-07][08][May-09][08]

What is the basic principle of optical detection? Explain the construction of

photo transistor. [Dec-10][08]

Explain working of photo transistor.[Dec-09][08] [Dec-08][08][Dec-07][08]

List different types of LEDs and explain any one. [May-09][08]

Describe the basic detection process in a photo conductive receiver.

[Dec-11][08][May-10][08][Dec-08][08][May-07][08] [May-09][08]

What is PIN – FET hybrid receiver? Discuss its merits and drawbacks in

comparisons with APD receiver. [Dec-08][08][May-09][08]

Explain different types of noise due to spontaneous fluctuation in optical in




optical fiber communication system. [May-09][08]

Explain thermal noise, dark current and quantum noise.

[Dec-07][06][May-09][06]

Draw and explain structure for InGaAs APDs. What is effect of temperature on

avalanche gain? [Dec-12][08][May-12][08][Dec-10][08]

Explain photodetector noise and detector response time.[Dec-09][08]

A p – n photodiode has a quantum efficiency of 50% at a wavelength of 0.9

µm. Calculate

Its responsivity at 0.9 µm

The received optical power if the mean photocurrent is 10-6

A

Corresponding number of received photons. [Dec-07][08]

A photo diode has a quantum efficiency of 65% when photons of energy 1.5 *

10-19 J are incident upon it

At what wavelength is the photodiode operating?

Calculate the incident optical power required to obtain a photocurrent of 2.5µA.

[Dec-08][08][May-06][08]

6

Explain in detail function of optical receiver. Compare its performance with

digital receiver. [May-12][08]

Explain low impedance front end optical fiber receiver?[May-06][05]

Explain low impedance front end optical fiber receiver and trans-impedance

front end optical fiber receiver in detail.[Dec-09][08]

Briefly discuss the possible sources of noise in optical fiber receiver. Discuss in

detail what is meant by quantum noise. Consider the phenomenon with regard

to a) Digital signaling and b) Analog transmission [Dec-09][08]

What are the sources of receiver noise? Explain anyone.[May-11][08]

Explain different receiver structures. [May-07][08]

Explain different types of noise in optical communication receiver.

[May-10][08]

Briefly discuss the possible sources of noise in optical fiber receiver.

[Dec-11][08][Dec-08][06]

Explain in detail receiver configuration with necessary schematic diagram of a

typical optical receiver. [Dec-09][08][Dec-10][08][Dec-11][08]

Explain various parameters used for performance calculation of optical

receivers. [Dec-12][08]

Explain in detail digital receiver performance parameters of the optical receiver. [May-10][08][May-11][08] [Dec-11][08]


Optical Interfaces [May-10][06][Dec-10][06]

High Performance FET amplifier [May-10][06][Dec-10][06][May-11][06]

FET preamplifier [May-10][04][May-11][06]

Preamplifier types in optical receiver [Dec-11][06]

Analog receiver [Dec-10][06][May-11][06][Dec-11][06]

Equivalent circuit of noise receiver [May-04][06]

Receiver structure [Dec-10][06]

7

Explain in detail WDM + EDFA performance. [May-12][08][May-10][08]

[Dec-10][08][May-11][08][Dec-11][08]

In case of fiber grating filters, explain basic parameters in reflection grating and

formation of a Bragg grating in a core by means of two intersecting ultraviolet

light beams. [May-11][08][Dec-11][08]

Explain in detail with operational principle WDM. [Dec-12][08]




Explain in detail passive components used in optical communication system.[May-12][09][May-10][08][Dec-09][08]

Explain in detail tunable filters and types of tunable filters.

[May-12][09][Dec-09][08]

Explain in detail tunable Sources. [May-12][08]


Tunable Sources [May-11][06]

Tunable Resources [May-10][06]

Tunable filters [Dec-11][06]

Operating principle of WDM [Dec-09][06]

Optical interfaces [Dec-09][06]

Performance of WDM + EDFA systems [Dec-12][08]

8


Optical CDMA. [May-12][08]

Ultra-high capacity optical networks

[May-10][06][Dec-09][06][Dec-10][06] [Dec-11][06]

Explain in detail optical CDMA. [Dec-10][08][May-11][08]

Explain in detail wavelength routed networks.

[Dec-12][08][May-11][08][Dec-11][08]

Explain in detail transmission formats and speeds in SONET.

[May-12][09][May-10][08][Dec-09][08][Dec-11][08]

Explain in detail different network topologies, performance of linear buses and

power budget. [May-10][08][Dec-09][08][Dec-10][08]

Discuss the parameters necessary to maintain stability of the fiber transmission

characteristics.



15th

to 20th

Feb 2016 Class Test – I I & II

10th

to 12th

Mar 2016 Mid Term Test III & IV

4th

to 9th

Apr 2016 Class Test – II V & VI




L-I Develop students‟ understanding for light transmission mechanism through

LED‟s and LASER‟ with modulation

L-II Develop students‟ ability to identify the losses in transmission through optical

fiber link.



1 Apply the knowledge of light transmission mechanisms using different media.

2 Classify the different types of losses in light transmission mechanisms.

3 Explain the modulation scheme for light.





Laboratory Educational

Objectives

Laboratory Outcomes

1 2 3

L-I √ √

L-II √


Laboratory

Outcomes

Program Outcomes


Optical

Communication &

Network

√ √ √ √ √ √

Experiment List

Expt. No. Title of Experiment PO

Mapped

Assessment

Tool

01

Study of

a) V-I characteristics &

b) P-I characteristics of Laser Source.

b, d, f, g,

k

Continuous

Assessment/

Laboratory

Rubric *

02 Study of characteristics of fiber optic LED‟s and

Detectors.

03

Study of

a) Analog Signal Transmission &

b) Digital Signal Transmission using Laser Source.

04

Measurement of

a) Propagation time delay in Fiber cable.

b) Numerical Aperture.

05 To study the effect of Lateral, Longitudinal, and

Angular Displacement.

06

Measurement of losses in optical fiber

a) Propagation loss.

b) Bending loss.

07 To study Chromatic dispersion using dual source of

1310nm & 1550nm laser Diodes

08 Study of characteristics of LED

09 Forming PC to PC communication link using optical

fiber link and RS – 232 interfaces.

10 Experiment on visim- QPSK modulation technique


* PO‟s d, f, g, k will be assessed through Laboratory Rubric at least once in a semester.




Self-Study Materials and References:


2. Websites

3. Mini-projects

4. Books




COURSE DETAILS

Structure of Course

Class TE-Part-II Sem.-VI

Course Code and Course Title Industrial Management


Prerequisite/s

Teaching Scheme (Lecture/Practical/Tutorial/Drawing) 03/00/00/00

Total Contact Hours: Theory/Practical/Tutorial/Drawing 42/00/00/00 Hours

Credits 04

Evaluation Scheme: Theory Paper/TW/POE/PO 100/25/00/00

Subject Incharge Mr.Basavaraj S S(1st shift)

Mrs Yogini Ahankari(2nd

shift)


The course aims to:

C-I To understand various functions of Management-planning.

C-II To study and understand the actual predictions made in organization in profit making

process and various activities to be performed.

C-III To know the staffing procedure in an organization and their performance analysis

process.



1 Demonstrate that how a person is getting selected in a company, how the performance of

employee is evaluated.

2 Analysis the methods of performance appraisal and find the best out of them.

3 Define both marketing and selling concept.

4 Understand the techniques used for selling the product.

Course Syllabus

Unit 1

Management : Concept, functions, importance, levels of management, forecasting-concept and importance,

Organization Importance and Principles, Staffing Procedure of staffing, performance appraisal

methods. Directing Leadership –definition and concept, styles/types, qualities of leader,

Motivation-concept, objective, Theories- Maslows, Herzberg‟s, McGreqors. Communication-

concept, Process, types, Barriers and Remedies.(Marks:20)

(06 Hrs)

Unit 2

Marketing : Marketing and selling concept, marketing mix, Advertising- concept, need, types, advantages and

limitations. Material Management– concept, function, Purchase management-concept, objectives,

functions, importance, policies and procedure, Five Rs of purchasing. Inventory Control-

Inventory costs, EOQ analysis, ABC analysis.(Marks:15)

(06 Hrs)




Unit 3

Costing; Elements of cost, cost estimation procedure, Entrepreneurship-importance, Qualities, function of

entrepreneur, small scale industries procedure of starting SSI unit, Difference Schemes for SSI.

Forms of Business Organization -Single, partnership, Joint stock, co-operative and state and

central Govt., Social responsibilities and business ethics-introduction. (Marks:15)

(06 Hrs)

Unit 4

Operations Research Definition, methodology, Scope and limitations. Linear programming

Concept, Formulation of LPP, Graphical method, Simplex Method.(Marks:18)

(06 Hrs)

Unit 5

Assignment Problems Introduction Balanced, Unbalanced, Prohibitive type of assignments,

Hungarian methods Transportation Problems For finding basic feasible solution by Northwest

corner method, Least cost method and Vogets Approximation method.(Marks:16)

(06 Hrs)

Unit 6

Project Management Programmed Evaluation and review technique, CPERTI, critical path

method (CPM), Network Analysis, Identifying critical path, Probability of completing the project

within the given time.(Marks:16)

(06 Hrs)

Text Books

Sr.


Year of

Edition

1 Indusrial Engineering

and Management

O.P.Khanna Dhanpat Rai

Publication. -

2

Industrial Management

and Operations

Research,

Nandkumar K.

Hukeri

Electrotech

Publications -

3 Essentials of

Management-

Harold Koontz,

Heinz Weihrich- seventh

edition

4 Industrial Engineering and

Management

N.V.S.Raju Cengage Learning

Reference Books

Sr.


Year of

Edition

1 Operation Research Anand Sharma,

2 Operations Research,

S.D.Sharma Kedar Nath Ram

Nath pub.

3 Problems in OR Hira and Gupta

4 Operation Research Panneerselvam PHI Learning





Course Educational Objectives Course Outcomes

1 2 3 4

CI

CII

CIII


Course Outcomes

Industrial

Management

Programme Outcomes


1

2

3

4





Unit Lect. No. Lesson Plan

TM TA AT Mapping with Outcomes


I 1 Operations Research Definition, methodology LT CB AS,CT, QA,EX

1 a,e

2 Scope and limitations LT CB AS,CT, QA,EX

3 Linear programming Concept LT CB AS,CT, QA,EX

4 Formulation of LPP LT CB AS,CT, QA,EX

5 Graphical method LT CB AS,CT, QA,EX

6 Simplex Method LT CB AS,CT, QA,EX

7 problems LT CB AS,CT, QA,EX

II 8

Assignment Problems Introduction Balanced,

LT CB AS,CT, QA,EX

2 a,e

9 Unbalanced LT CB AS,CT, QA,EX

10 Prohibitive type of assignments LT CB AS,CT, QA,EX

11 Hungarian methods Transportation Problems For finding

basic feasible solution by Northwest corner method

LT CB AS,CT, QA,EX

12 Least cost method LT CB AS,CT, QA,EX

13 Vogets Approximation method. LT CB AS,CT, QA,EX

14 Problems LT CB AS,CT, QA,EX

III 15

Project Management Programmed Evaluation and review

technique

LT CB, AS,CT, QA,EX

3 a,e

16 PERT LT CB AS,CT, QA,EX

17 critical path method (CPM) LT CB AS,CT, QA,EX

18 Network Analysis LT CB AS,CT, QA,EX

19 Identifying critical path LT CB AS,CT, QA,EX

20 Probability of completing the project within the given time. LT CB AS,CT, QA,EX

21 problems LT CB AS,CT, QA,EX

IV 22

Management

Concept, functions, importance

LT CB AS,CT, QA,EX 4 a




Unit Lect. No. Lesson Plan

TM TA AT Mapping with Outcomes


23 levels of management, forecasting-concept and importance LT CB, AS,CT, QA,EX

24 Organization Importance and Principles, Staffing Procedure

of staffing, performance appraisal methods

LT CB AS,CT, QA,EX

25 Directing LT CB AS,CT, QA,EX

26 Leadership –definition and concept, styles/types, qualities

of leader

LT CB AS,CT, QA,EX

27 Motivation-concept, objective LT CB AS,CT, QA,EX

28 Theories- Maslows, Herzberg‟s, McGreqors LT CB, AS,CT, QA,EX

29 Communication-concept, Process, types, Barriers and

Remedies.

LT CB, AS,CT, QA,EX

V 30

Marketing Marketing and selling concept, marketing mix,., ,.,.

LT CB,PP AS,CT, QA,EX

4 a

31 Advertising- concept, need, types, advantages and

limitations


32 Material Management– concept, function LT CB,PP AS,CT, QA,EX

33 Purchase management-concept, objectives, functions,

importance


34 policies and procedure, Five Rs of purchasing LT CB,PP AS,CT, QA,EX

35 Inventory Control- Inventory costs LT CB,PP AS,CT, QA,EX

36 EOQ analysis, ABC analysis LT CB,PP AS,CT, QA,EX

VI 37

Costing Elements of cost, cost estimation procedure


5 a

38 Entrepreneurship-importance, Qualities, function of

entrepreneur


39 small scale industries procedure of starting SSI unit,

Difference Schemes for SSI


40 Forms of Business Organization -Single, partnership, Joint

stock


41 co-operative and state and central Govt LT CB,PP AS,CT, QA,EX

42 Social responsibilities and business ethics-introduction LT CB,PP AS,CT, QA,EX




Note: TM-Teaching Method- Lecture (LT), Demo (DM), Laboratory Visit (LV), Group Discussion (GD), Seminar(SM), Industrial Visits (IV), Case Studies (CS)

TA-Teaching Aids–Chalk Board (CB), Power Point Presentation (PP), Models (MD), Video Film (VF), E-Learning (EL)

AT- Assessment Tool –Assignments (AS), Class Tests (CT), Question Answers (QA), University Examinations (EX), Rubrics (RB), Tutorials (TT), Feedback Report

(FP), Seminar/Project Report (RP), Quiz (QZ)




Assignment Questions:

Unit Assignment / Tutorials/Quiz Questions

1

Case studies Preparation of Project proposal for SSI. 2

3

4 Numerical on Unit no. 4



Practical Plan

Expt. No. Title of Experiment Compulsory or Optional Planned Date

1 Case study/project proposal Compulsory 26 th Feb onwards

Project proposal for SSI will be based upon following guidelines-

Students are supposed to conduct survey of any small scale industry, submit report and give

presentation on the same.

a) Type of industry

b) Location, area, vision, mission & quality policies of industry.

c) Products.

d) Production process, detailed flow diagram.

e) Organization structure.

f) Innovative systems in industry.

g) Fulfillment of community needs.

h) Pollution control techniques, care taken for control.

i) Technical Requirement- Man power, Consultancy, Expertise available in industry, View of

industry for enhancing industry institute interaction.

[NOTE: Numerical of above assignment must be solved using Computer.]



15-20 feb 2016 Class Test I I,II

10-12 march 2016 Mid Term Test I,II,III

04-09 april 2016 Class Test II IV,V




COURSE DETAILS

Structure of Course

Class TE-Part-II Sem.-V

Course Code and Course Title ETC312 Electronic System Design


Prerequisite/s ETC209, ETC304

Teaching Scheme (Lecture/Practical/Tutorial/Drawing) 02/02/00/00

Total Contact Hours: Theory/Practical/Tutorial/Drawing 28/28/00/00 Hours

Credits 04

Evaluation Scheme: Theory Paper/TW/POE/PO 00/25/00/50

Subject Incharge Ms.R.B.Tapase


The course aims to:

C-I To understand basic concepts of electronics system design.

C-II To understand and design an electronics systems by using different sensors

C-III To Design microcontroller based systems.

C-IV To implement mini projects based on knowledge of designing of electronics systems

C-V Understand and design simple electronics systems.



1 Understand and design simple electronics systems.

2 Apply the knowledge of sensors in designing different electronics systems

3 Perform and design electronics systems based on microcontrollers.

4 Use these skills to implement mini projects.

5 understand and design simple electronics systems.




Course Syllabus

Unit 1:

DIGITAL VOLTMETER: Design of 4-digit numeric display circuit, Design of 3½ digit

DVM, Study of IC7107/7106

(03 Hrs)

Unit 2:-

PHASE LOCKED LOOP: Design of digital phase locked loops (cd4046 & 565), It‟s use in

frequency synthesizer, frequency & phase demodulation, Amplitude modulation.

(03 Hrs)

Unit 3:-

AUDIO &VIDEO AMPLIFIERS: Audio amplifier: audio op-amp applications mike pre-

amplifier with tone control, study of LM 386 Video amplifier: Theory, voltage gain, NE592,

filter applications

(05Hrs)

Unit 4 :-

TIMERS: Fundamentals of IC timers, timer & 2240 Binary Programmable Timer/counter,

use of timers for event or interval timing, design of frequency counter using IC 74C926 for

the time &event Counting.

(05Hrs)

Unit 5:-

Sensor Signal Conditioning: For sensors to get output in standard range 1)Temperature–RTD,

Thermocouple, Semiconductor LM35,AD549 05 26 and1N4148 2)Strain gauge type

transducers of 350ohm/120ohm bridge configuration 3)V to I and I to V converters for std

input and output Standard input output ranges– 0to2V(DVM),0to5V(Microcontroller),4

to20mA(Industrial) 4) Optical encoder process controllers using above transducers ON/OFF

proportional PID controller. Algorithm implementation only for any 8-bit Microcontroller

based process controllers (05 Hrs)

Unit 6 :-

SWITCHED MODE POWER SUPPLY: Introduction to SMPS, IC LM3524, Design of

SMPS using LM3521, Step up, Step down, Invert mode. Micro Controller Based Design:

Design of process controllers ON-OFF ,Proportional,PID

(03 Hrs)

Text Books

Sr.


Year of

Edition

1 Industrial Control

Electronics: Mickel Jacob. Prentice Hall -- --

2 Electronic System

Design– B. S. Sonde(Ch1)

Dhanpat Rai

Publications -- --

3 Operation Amplifier Ramakant

Gaikwad,& LIC Pearson(ch2) -- --

4 Electronic System

Design V.T.Tarate

Electrotech

Publication III 2002




Reference Books

Sr.


Year of

Edition

1 Electronics Design Goyal Khetan, Khanna Publications

Other Books/E-material

Sr.


Year of

Edition

1 Linear Data Manual - National - -

2 Intersil Data Manual - - - -


Course

Objectives

Course Outcomes

1 2 3 4 5

C-I √

C-II √

C-III √

C-IV √

C-V √


Course Outcomes

Electronics System

Design

Programme Outcomes


1 √ √ √ √ √ √ √ √

2 √ √ √ √ √ √ √ √

3 √ √ √ √ √ √ √ √

4 √ √ √ √ √ √ √

5 √ √ √ √ √ √ √ √ √





Unit Lect.

No.


Mapping with

Outcomes


I DIGITAL VOLTMETER(L-3)

1 Design of 4-digit numeric display circuit LT CB AS/QA

I a ,b ,c ,e

,h,k,l,m 2 Design of 3½ digit DVM LT CB AS/QA

3 Study of IC7107/7106. LT CB AS/QA

II PHASE LOCKED LOOP: (L-3)

4 Design of digital phase locked loops (cd4046 & 565) LT CB AS/QA

I a ,b ,c ,e

,h,k,l,m 5 PLL use in frequency synthesizer LT CB AS/QA

6 PLL use in frequency & phase demodulation, Amplitude modulation. LT CB AS/QA

III AUDIO &VIDEO AMPLIFIERS: (L-5)

7 Audio amplifier: audio op-amp applications mike pre-amplifier with tone

control LT CB/EL AS/QA

I,IV,V a ,b ,c ,e

,h,k,l,m

8 Study of LM 386 Video amplifier LT CB/EL AS/QA

9 Theory, voltage gain of LM 386

LT CB/EL AS/QA

10 Study of NE592

LT CB/EL AS/QA

11 Filter applications LT CB/EL AS/QA

IV TIMERS: (L-5)

12 Fundamentals of IC timers LT CB AS/QA

IV,V a,b,c,e,k,l,

m

13 Timer & 2240 Binary Programmable

Timer/counter. LT CB AS/QA

14 Use of timers for event or interval timing, LT CB AS/QA

15 Study of IC 74C926 LT CB AS/QA

16 Design of frequency

counter using IC 74C926 for the time &event Counting LT CB AS/QA




Unit Lect.

No.


Mapping with

Outcomes


V Sensor Signal Conditioning: (L-8)

17 For sensors to get output in standard range

1)Temperature–RTD, Thermocouple, LT CB/EL AS/QA

II,IV,

V

a , b, c,h

,k ,l,m

18 Semiconductor LM35,AD549 LT CB/EL AS/QA

19 Study of 1N4148 LT CB/EL AS/QA

20 2)Strain gauge type transducers of 350ohm/120ohm bridge configuration LT CB/EL AS/QA

21 3)V to I and I to V converters for std input and output Standard input

output ranges– 0to2V(DVM),0to5V(Microcontroller),

4 to20mA(Industrial)

LT CB/EL AS/QA

22 Optical encoder LT CB/EL AS/QA

23 4) Optical encoder process controllers using above transducers ON/OFF

proportional PID controller. LT CB/EL AS/QA

24 Algorithm implementation only for any 8-bit

Microcontroller based process controllers LT CB/EL AS/QA

VI SWITCHED MODE POWER SUPPLY: (L-4)

25 Introduction to SMPS, IC LM3524. LT CB AS/QA

III,IV,

V

a , b,

c,e.h,i,j

,k,l,m

26 Design of SMPS using LM3521, Step up, Step down, Invert mode. LT CB AS/QA

27 Micro Controller Based Design:

Design of process controllers ON-OFF , LT CB AS/QA

28 Micro Controller Based Design:

Proportional, PID LT CB AS/QA

Note: TM-Teaching Method- Lecture (LT), Demo (DM), Laboratory Visit (LV), Group Discussion (GD), Seminar(SM), Industrial Visits (IV), Case Studies

(CS)TA-Teaching Aids–Chalk Board (CB), Power Point Presentation (PP), Models (MD), Video Film (VF), E-Learning (EL), AT- Assessment Tool –Assignments

(AS), Class Tests (CT), Question Answers (QA), University Examinations (EX), Rubrics (RB), Tutorials (TT), Feedback Report (FP), Seminar/Project Report (RP),

Quiz (QZ)







L-I Develop students understanding through laboratory activities to solve problems related to

key concepts taught in classroom(Conceptual Understanding)

L-II Develop debugging capability in order to propose and apply effective Engineering solution

(Debugging Skills)

L-III Develop the technical and communication skills so as to have successful professional

career.(Professional skills)



i Apply appropriate instruments and software tools and handle them carefully and safely to

make measurements of physical quantities or perform data analysis.(Instrumentation)

ii Specify appropriate equipment and procedures/algorithms, implement these

procedures/algorithms, analyze and interpret the resulting data.(Experiments)

iii Work effectively in team to accomplish the assigned responsibility in an integral

manner(Teamwork)

iv Communicate effectively about laboratory work both orally and in writing journals/technical

reports.(Communication)


Laboratory

Educational

Objectives

Laboratory Outcomes

i ii iii iv

L-I √

L-II √

L-III √


Laborator

y

Outcomes

Programme Outcomes


i √

ii √

iii √ √

iv √ √ √ √


Laboratory

Outcomes

Program Outcomes

a b c d e f g h i j K l

Electronics

System Design √(2) √(1)

(

3 √(1) √(1) √(1) √(1) √(1)




Plan to Cover Content beyond Syllabus:

Plann

ed

Week

Topic Beyond Syllabus Resource Person

with Affiliation

Remarks Outcomes

Met

14th PCB Design Software Milind Dhule j

Practical Plan

Expt.

NO Title of Experiment

Compulsory

or Optional

Planned

Week

Programme

Outcomes

Met

1. Introduction Compulsory 1st

*b ,d,f,g,k

2. Study of sensors and signal conditioning. Compulsory 2nd

3. Study I to V & V to I converters. Compulsory 3rd

4. Study of Audio amplifier LM 386. Compulsory 4th

5. Design of frequency synthesizer using PLL565 Compulsory 5th

6. Revision-I -- 6th

7. Frequency measurement using 74C926 Compulsory 7th

8. Interval measurement using 74c926. Compulsory 8th

9. Study of LM3524 SMPS Compulsory 9th

10. Study of 7107/7106. Compulsory 10th

11. Revision-II 11th

12. Mini project should be based on above Chapters. compulsory 12th

13. Submission -- 13th

14. Internal Oral -- 14th

--

* PO b meets through continuous assessment and laboratory rubric.

PO d, f, g, k meets through laboratory rubric



4. Websites

5. Journal/Conference Papers

6. Books:

7. Mini projects

8. Data Sheets

9. Additional Comments: Nil




Written Communication Assessment Rubric (V.01)

Name of the Student: Roll No: Branch: Class: Course:

PO Mapping to ‘g’ Criterion

No.

Performance

Criteria

Excellent Average Poor Ex Grading Poor

5 4 3 2 1

CR1 Introduction

Introduction provides background and a

forecast of the document.

Problem is well defined with material

properly oriented for readers

Introduction is adequate Introduction is missing, out of

context or confusing

CR2 Organization

Points are clearly presented in a logical

order.

Easily followed without any ambiguity.

Page layout is effective and professional

Most points are ordered properly.

No major problem with page layout.

Confusing.

Disorganized.

Layout is distracting or

unprofessional.

CR3 Language

Wording is concise, clear and easy to

follow.

Style is consistent and appropriate in

formality.

Consistently proper grammar, punctuation

and words are correctly spelled.

Wording is concise, clear and easy to

follow.

Style is consistent and appropriate in

formality.

Minor problems with grammar,

spelling, punctuation.

Distracting word choice. Style is not

appropriate in formality.

Problems with grammar, punctuation,

spelling inhibit reader understanding.

CR4 Content

Consistently appropriate.

Analysis is logical and sound.

No gaps in topic coverage.

Data/analysis clearly supports the thesis.

Generally appropriate to readers and

to author‟s role. (may not be to a

critic). Appropriate length. Sufficient

& Data/analysis

Major gaps in information or analysis.

Contents are too large or too short.

CR5 Conclusions Clear, insightful conclusions Most but not all points contained in

the conclusions.

Inadequate summary.

No conclusions.

CR6 Visuals

Easy to read.

Improves comprehension.

Layout is satisfactory.

Meets standard requirements.

Visuals inappropriate or distracting

CR7 Sources

Credit is given for all work from other

sources using standard format.

Material from external sources is relevant

and adds value to the report.

Credits are given for main points and

not for all.

Sources are listed.

Sources are not listed.

External material is not relevant.

Note: This rubric is to be used for assessment of project synopsis, project/mini project report

Teacher I/C:




Oral Communication Assessment Rubric (V.01)

Name of the Student: Roll No Branch: Class: Course:

PO Mapping to „g‟

Note: This rubric is to be used for synopsis (Project) Seminar presentation .

The criterion CR1 to CR4 and CR7 are to be used for oral presentation for Phase II and Phase III of final year project assessment.

Teacher I/C:

Name with Signature and Date

Criterion

No.

Performance

Criteria


5 4 3 2 1

CR1 Introduction Complete, concise and complete Introduction orients the audience

adequately

Introduction is missing or

confusing

CR2 Organization Points are clearly presented in a

logical order, Easily followed.

Most points are ordered well. Confusing, disorganized;

CR3 Language

Wording is concise, clear, and easy

to follow. Speaking style is

consistent and appropriate in

formality. Professional tone with

proper voice modulation.

Grammatically correct.

Speaker has most of the

“Excellency” traits

Distracting word choice;

Speaking style is not appropriate

in formality. Unprofessional.

Grammatically not correct.

CR4 Delivery

Extemporaneous, relaxed body

language; excellent eye contact,

pace and volume

Notes were used by the speaker;

minimum distraction; appropriate

eye contact, pace and volume

Obviously read or memorized

major portions; Little or no eye

contact; too slow or too fast; too

soft or too loud

CR5 Conclusions/ Q/A

Clear, insightful conclusions;

questions handled well

Most but not all points contained

in the conclusions

Inadequate summary; No

conclusion; Q/A a were handled

unprofessionally. Most of the

answers were technically wrong

CR6 Visuals Easy to read; Improves

comprehension

Layout is satisfactory; meets

standard requirements

Visuals inappropriate or

distracting




Team Work Assessment Rubric (V.01)

Name of the Team: Branch: Class: Team Members: (Roll Nos.:)

PO Mapping to‘d’

Note : 1) This rubric is to be used for overall team work assessment throughout the year for the final year Project.

2) The criterion CR2, CR4 to CR6 are to be used for team work assessment for Phase II and phase III of final year project assessment

Teacher I/C:


Criterion No. Performance Criteria Excellent Average Poor Ex Grading Poor

5 4 3 2 1

CR1

Contributions

(Quality/management of

quality)

All members routinely contribute

quality and useful ideas and

information;

Team evaluates all ideas and uses only

the best

Most (but not all) members

contribute useful idea &

information; The team as a whole

adequately integrates the ideas

presented

Internal conflicts result in team

failing to achieve project goals.

CR2 Division of labor (Equality

/quantity)

All members make significant

contributions & are accountable to

complete assigned tasks

Progress is satisfactory, but unequal

workloads in observed

Serious problems due to

unequal workload

CR3 Communication (within the

team)

Consistent communication throughout

the project;

Insightful use of real and virtual

meetings;

Meetings are productive

Adequate number of meetings (real

or virtual)

Inadequate meetings and

communications

CR4 Professional Conduct

All team members consistently behave

in a professional manner(show up for

meetings prepared and on time, treat

other team members with courtesy &

respect) & seek outside advise if team

is not productive

Team members usually behave in a

professional manner;

Do not repeat the same error &

accept outside advise if team is not

productive

Team members frequently fail

to behave to behave in a

professional manner;

Team does not seek outside

help.

CR5 Group Discipline

Stays focused on task; Finds solutions

as problems are encountered. Uses

sound principles of inquiry when

analyzing problems and seeking

solutions

Adequate focus to complete task;

some problems are discounted until

a later time

Totally lacks focus; Problems

are discounted;

Team does not take

responsibility for failures of the

group

CR6 Group Dynamics

Synergy Majority of team members

willingly participate; team functions

adequately

Every member of team goes in

his/her way.




Team Member Assessment Rubric (V.01)

Name of the Student: Branch: Class: Team Name: Roll No:

PO Mapping to ‘d’

Criterion

No.

Performance

Criteria


5 4 3 2 1

CR1

Researches and

gathers information

Collects a great deal of information

and relates to the topic

Collects basic information needed

and relates most of it to the topic

Does not collect any information

/ collected information does nor

relate to the topic

CR2

Fulfills team role‟s

responsibilities

Performs all duties satisfactorily of

the assigned team role

Performs nearly all duties of the

assigned team role

Does not perform or performs

very little duties of the assigned

team role

CR3 Shares in the work of

team

Always does the assigned work

without having to be reminded

Usually does the assigned work;

rarely needs to be reminded

Always relies on others to do the

work.

CR4 Listens to other

teammates

Listens and speaks a fair amount Listens but sometimes talks too

much.

Always talks and never allows

other teammate to speak.

Note: This rubric is to be used for to be used for team member assessment for Phase II, phase III of final year project

assessment.

The criterion CR1 should be assessed more rigorously for phase I

Teacher I/C:





Project Assessment Rubric (V.02)

Group no: Class: Shift: Roll Nos.

Note: 1) Criteria CR1 to CR4 map to technical skill of person. 2) Criterion CR1 though maps to a, b, c, should be assessed only for c.

Teacher I/C:

Criterion

No.

Performance Criteria PO

Mapped

Excellent Average Poor Grading on scale 1 to 5

1 2 3 4 5

CR1

Technical design a, b, c, e

Meets/exceeds specifications with

efficient design.

Meets average specifications

Meets poor specifications

CR2 Percent of Work

Completion f 50% 30% 10%

CR3

Explanation of the

results on the work

done

a, b Appropriate explanation of results

obtained and insightful conclusions

Produced some results, but struggled with interpretation, lack

sufficient support for their

conclusions

Generated few results with little

meaningful interpretation;

conclusions are absent/wrong/trivial or

unsubstantiated

CR4 Level of Understanding a 80 to 100% 40 to 60% 10 to 20%

CR5

Appropriate choice &

use of resources

(computers, lab

equipments etc.)

k Innovative selection of resources; Expert use of resources

Appropriate resources used as was

demonstrated in class; Resources limited to faculty provided

materials/tools

Inadequate use of suggested resources.

CR6 Oral Presentation g Demonstration with good technical details and communication skills.

Demonstration with average technical skills and communication.

Demonstration with poor technical skills and communication

CR7 Team Management d Excellent Coordination of all team members.

Average Coordination of all team members.

Poor Coordination of all team members.

CR8 Clarity of Future work i Able to explain clearly future work

related with full execution of project.

Average idea about future work and

full execution of project.

Poor idea about future work and

full execution of project.

CR9

Information

management; Log

book, status reports,

workmanship

documentation

f Detailed, appropriate and timely entries; collected and distributed to

appropriate parties,

Adequate entries in journal or log

books; Only critical

data/information collected and distributed

Insufficient data

collection/recording. Existing

documentation is not shared/utilized.

CR10 Use of modern

technology l

Extensive use of advance CAD tool

for design & simulation

Moderate use of advance CAD tool

for design & simulation

Low use of advance CAD tool for

design & simulation

CR11 Overall final Product

quality m

Aesthetically good workmanship, Direct applicable for real world

application

Aesthetically satisfactorily workmanship, Partly applicable for

real world problem

Aesthetically poor workmanship, Not suitable for real world

application




Final Project Assessment Rubric (V.01)

Name of the Team: Branch: Class: Team Members: (Roll Nos.:)

Sr

No. Phase Details

Assessment for

skills

Assessment

tool PO Mapped % Attainment

1 Phase –I

Seminar for Synopsis

Submission

Understanding

Level

QA oral

rubric a

Oral

communication

skills

Oral_Rubric

g

2 Phase –II Poster Presentation

Technical skills Pr_Rubric g

Poster quality Wr_Rubric g

Oral

communication

Oral_Rubric g

Team work Tw_Rubric d

3 Phase –III Project Demonstration

Review-I

Technical skills Pr_Rubric a, b, c

Oral

communication

Oral_Rubric g


4 Phase –IV Project Demonstration

Review-II

Technical skills Pr_Rubric a, b, c

Oral

communication

Oral_Rubric g


5 Phase –V Project Demonstration

& Final Assessment

Phase-V project assessment is jointly carried out by external and

internal examiner appointed by SUK

Note: In phase-I besides the attainment of PO „g‟ the exposure to POs „i‟(Life Long learning) & „j‟(Contemporary issues) is achieved

by the students by way of literature review and discussion with the guide.

Teacher I/C:

Name with Signature and Date:




Lab Work Assessment Rubric (V.01)

Name of the Student: Branch: Class: Course:

Performance

Criteria

PO

Mapping

Sub-criteria Excellent Average Poor Ex Grading Poor

5 4 3 2 1

Design and

conduct an

experiment

b

Understanding of

theoretical concepts of

the experiment

Design, develop,

perform/execute the

expected

Result analysis

Relating results with

theory

Extension of expected

work

-Good

understanding

beyond expectation

-Designed,

developed and

performed

successfully

-Appropriate

analysis

-Good comparison

between theory and

–practice

-Was done fully

-Adequate

understanding

-Designed and

developed, but could

perform partially

-Analyzed partially

-All points of

comparison not taken

into consideration

-Was done partially

-Poor understanding

-Could not design

-Lacks analytical skills

-Cannot comprehend

and compare

-Could not achieve the

results of mail expt.

Use of

equipments and

modern tools

k

Proper and careful

handling of

equipments

Knowledge about

simulation and

modern tools

Checks for

initialization/

calibration

-Very good

handling with

confidence

-Good acquaintance

and usage of

modern tools

-Always checks the

initialization

-Proper handling of

equipments

-Knows the modern

tools but rarely uses

-Checks the

calibration/initialization

only after encountering

error

-Careless handling of

equipments

-Unaware of

simulation and modern

tools

-Starts the expt

without necessary

checkups




Lab Work Assessment Rubric (V.01) contd…

Performance

Criteria

PO

Mapping

Sub-criteria Excellent Average Poor Ex Grading Poor

5 4 3 2 1

Team Work

and

Team Member

d

Contributions All members

routinely contribute to

successful

performance of the

experiment

Most (but not all)

members contribute to

successful performance of

the experiment

Internal conflicts result in

team failing to achieve

experiment goals.

Listens to other

teammates

Listens and speaks a

fair amount

Listens but sometimes

talks too much.

Always talks and never

allows other teammate to

speak.

Professional and

ethical attitude f

Neat and tidy

Punctuality

Emphasis on self

learning

Does not copy from net

info or other sources

Confidence level

-Always neat and tidy

-Always

-Good

-Journal writing in

own words with

understanding

Very good

-Frequently neat and tidy

Most of the time

Fair

Journal writing fairly good

with few mission links

Good

Never neat and tidy

Never

Poor

Copies from net or

friends journal

Poor

Written

Communication

through journal

g1

Neat

diagrams/flowcharts

Calculations

Representation of

results

Conclusions

Overall organization

Self explanatory

Clearly carried out

Clear and concise

Very well drawn

Very good with

proper linking

Adequate

Formula OK, calculations

wrong

Fairly good

Necessary and sufficient

conclusions

Fairly good with few

mission linked

Vague

Does not know the

formula

Bad and ambiguous

No conclusions

Not at all organized

Oral

Communication g2

Neat, clear, concise

language

Confidence in

communication

Loud and clear,

speaks to the point

Quite confident

Not very clear, not much

emphasis on the point

Not fully confident

Vague and ambiguous

language, does not

pertain to the point

Not at all confident

Teacher I/C:





Mini-project Assessment Rubric (V.01)

Name of the Student: Branch: Class: Course:

Criteria

No Performance Criteria

PO

met Sub-criteria Excellent Average Poor

Ex Grading Poor

5 4 3 2 1

CR1 Identification of

problem e1

Identification &

definition of project

work

Define objectives

-Clear, concise and

complete ID of design

goals and project

objectives

-Adequate ID of

problem;

-Any lack of specifics

does not impair

solution or design

Insufficient ID of

problem; Inadequately

spelled out objectives of

ID

CR2 Technical design e2 Decide appropriate

specifications

Exceeds specifications;

Meets specifications with

efficient design

Meets nearly all

specifications

Not designed taking into

consideration minimum

specifications

CR3 Design and

implementation b

Understanding of

theoretical concepts of

the experiment

Design, develop,

perform/execute the

expected

Result analysis

Relating results with

theory

Extension of expected

work

-Good understanding

beyond expectation

-Designed, developed

and performed

successfully

-Appropriate analysis

-Good comparison

between theory and

practice

-Was done fully

-Adequate

understanding

-Designed and

developed, but could

perform partially

-Analyzed partially

-All points of

comparison not taken

into consideration

-Was done partially

-Poor understanding

-Could not design

-Lacks analytical skills

-Cannot comprehend and

compare

-Could not achieve the

results of main expt.

CR4 Use of equipments and

modern tools k

Proper and careful

handling of

equipments

Knowledge about

simulation and modern

tools

Checks for

initialization/

calibration

-Very good handling

with confidence

-Good acquaintance and

usage of modern tools

-Always checks the

initialization

-Proper handling of

equipments

-Knows the modern

tools but rarely uses

-Checks the

calibration/initializatio

n only after

encountering error

-Careless handling of

equipments

-Unaware of simulation

and modern tools

-Starts the expt without

necessary checkups




Mini-project Assessment Rubric (V.01) (contd..)

Criteria

No Performance Criteria

PO

met Sub-criteria Excellent Average Poor

Ex Grading Poor

5 4 3 2 1

CR5

Written

Communication

through journal

g

Neat

diagrams/flowcharts

Calculations

Representation of

results

Conclusions

Overall organization

Self explanatory

Clearly carried out

Clear and concise

Very well drawn

Very good with proper

linking

Adequate

Formula OK,

calculations wrong

Fairly good

Necessary and

sufficient conclusions

Fairly good with few

mission linked

Vague

Does not know the

formula

Bad and ambiguous

No conclusions

Not at all organized

CR6

Team Work

and

Team Member

d

Contributions All members routinely

contribute to successful

performance of the

experiment

Most (but not all)

members contribute to

successful

performance of the

experiment

Internal conflicts result in

team failing to achieve

experiment goals.

Listens to other

teammates

Listens and speaks a fair

amount

Listens but sometimes

talks too much.

Always talks and never

allows other teammate to

speak.

CR7 Overall Judgment of

the mini-project c

Completed as per

design, Meets

specifications,

Workmanship

Average of CR1 to CR6

Teacher I/C:


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