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ACCELERATING INDUSTRIAL IO T INNOVATION 1
AccelerAting industriAl iot innovAtion
1
2
CONTENTSACCELERATE INTERNET OF THINGS (IoT) INNOVATION ......................................................................................................................3
THE INDUSTRIAL IoT .............................................................................................................................................................................................4
Industrial IoT Needs ...........................................................................................................................................................................................4
FPGA Value in Industrial IoT ...........................................................................................................................................................................5
CONTROL ...................................................................................................................................................................................................................6
Factory Automation – Drives ..........................................................................................................................................................................6
Motor Control Solutions .................................................................................................................................................................................7
FPGA Benefits in Motor Control Applications .......................................................................................................................................8
Factory Automation – PLCs .............................................................................................................................................................................8
FPGA Use Cases for PLCs ...............................................................................................................................................................................8
FPGA Benefits in PLC Applications ............................................................................................................................................................9
Machine Vision ...................................................................................................................................................................................................10
CONNECTIVITY .....................................................................................................................................................................................................11
Interoperability ..................................................................................................................................................................................................11
OPC UA: Essential Open Data Connectivity for Industrial IoT and Industry 4.0 .................................................................11
Matrikon OPC UA Stack for Easy Integration on Intel® FPGA Platforms .................................................................................12
Industrial Ethernet ...........................................................................................................................................................................................13
SECURITY ................................................................................................................................................................................................................14
SAFETY .....................................................................................................................................................................................................................15
DEVELOPMENT ENVIRONMENTS AND TOOLS ......................................................................................................................................16
SELECT INDUSTRIAL PRODUCTS .................................................................................................................................................................17
Intel® MAX® 10 Family .....................................................................................................................................................................................17
Intel Cyclone® Family .......................................................................................................................................................................................19
Powering Industrial IoT: Intel® Enpirion® Power Solutions ............................................................................................................22
LEARN MORE .........................................................................................................................................................................................................23
Intel Technology3
ACCELERATE IOT INNOVATIONNow more than ever the development of industrial solutions entails many design considerations that are both intrinsic and extrinsic with respect to the product in development. Extrinsic factors often address how the product interacts and shares data with other products and the industrial network as a whole. Industrial installations are now part of a connected world with the promise of much higher levels of productivity and efficiency while also presenting new design challenges.
Figure 1 depicts a cloud-enabled industrial complex that addresses specific requirements. Larger installations involve layers including cloud, fog, and edge networks.
Aside from the traditional control demands such as Functional Safety (IEC61508) and Control (IEC61131), new emerging requirements related to connectivity (Time-Sensitive Networking (TSN)), security, and interoperability (OPC UA) need to be addressed both today and in the future. Architectures requiring the use of edge analytics and distributed control must employ networks that enable the choreography that is essential for the precise control of motion and other manufacturing processes.
In order to truly accelerate IoT innovation, best-in-class development tools, critical intellectual property (IP), and reference designs must be provided today with mechanisms in place to future-proof solutions. Moreover, given the need to deploy certain critical functions horizontally (across the network for different applications) and vertically (from factory floor to cloud), solutions must be scalable to avoid reinventing the wheel for each product family. This brochure provides an overview of solutions for various industrial systems from Intel.
Figure 1. Cloud-Enabled Industrial Installation
Functional Safety
Factory
Connectivity
Gateway Interoperability
CommunicationsServer
PLCEdge
Analytics
I/OController
IEC61508 IE, Fieldbus, TSN
Security Control
Drive
SSL, AES, Ciphers IEC61131-3
Big DataAnalytics
DataCenter
SensorSensor ActuatorActuator
Sensor Sensor SensorActuator
SensorSensor ActuatorActuator
Sensor Sensor SensorActuator
SensorSensor ActuatorActuator
Sensor Sensor SensorActuator
4
Industrial IoT Needs
In order to enable the aforementioned operational efficiencies, several things need to come together:
• End-to-end connectivity that is flexible, i.e. adaptable to the needs of different interfaces connecting different machines or environments
• Interoperability of different components in the factory- to-enterprise M2M communications chain
• Orchestration and manageability of the different components in the M2M communications chain
• Scalability of compute-power at different layers of automation: Edge, gateways, plant cloud or fog, and enterprise cloud
• The ability to analyze sensor information at the source (Edge Analytics) and immediately act upon it to activate actuators to optimize operations
• Security of the entire M2M and factory-to-enterprise network
THE INDUSTRIAL IOTEnd-to-end connectivity from sensors and actuators on the factory floor, or Edge, to the Enterprise Cloud has opened up the possibility of unprecedented operational efficiencies that can be achieved by combining this ubiquitous connectivity with autonomous operation.
Operational efficiencies can be derived in the areas of operating expense savings, improved asset utilization, and improved inventory turns and supply chain logistics, to name a few. New revenue streams such as from ‘Outcome as a Service’ can be enabled by suppliers of industrial automation, wherein suppliers are able to charge a recurring fee to their customers in exchange of a certain guaranteed outcome, such as a pre-negotiated production level or guaranteed minimum downtime.
ConnectivityAutonomous
OperationOperationalEfficiencies
Figure 2. Industrial IoT Overview
Customizable WorkloadAcceleration- Security- Analytics- Control
Cloud Computing- Big Data/Enterprise Analytics
Cloud to CloudCommunication
Gateway to Fog/CloudCommunication
Device to DeviceCommunication
Device to CloudCommunication
Edge to CloudCommunication
Edge Computing Edge Computing Edge Computing
Fog Computing- Plant Analytics
Edge Computing- Edge Analytics
Connectivity (Integration)
Acceleration and ProgrammabilityConnectivity Analytics Scalability Interoperability Managability Security Energy Efficiency
- TSN- Legacy Industrial Ethernet
On Premise Private Cloud
Edge Computing
Edge to GatewayCommunication
Intel Technology5
FPGA Value in Industrial IoT
FPGAs and SoC FPGAs play a pivotal role in providing flexible connectivity options, scalable compute power for analytics, and high fabric performance for accelerating interoperability, manageability, and security algorithms, and are able to do this at a power profile considerably less than conventional processors. Between the scalability of Intel processor product lines and the flexibility and performance of FPGAs, Intel's processor and FPGA offerings provide the best of both worlds for Industrial IoT.
Scalable Intel FPGA families provide the right mix of performance choices for different layers of the Industrial IoT network. Available solutions such as OPC-UA over TSN provide interoperability and the deterministic latency of time-sensitive networking. Four-to-five fold improvements in algorithm performance is routinely achieved when executing security algorithms in FPGA fabric instead of the processor. The ability of FPGAs to accelerate JavaScript provides a proven pathway to accelerate manageability algorithms.
TABLE 1 INDUSTRIAL IOT FUNCTIONAL AND COMPUTING ENVIRONMENTS
INDUSTRIAL IOT LAYER
FUNCTIONALITY ENVIRONMENT FPGA FAMILIES PROCESSOR CLASS
Cloud Server acceleration; high-performance computing; NFV Enterprise; ERP; database Intel Stratix® 10,
Intel Arria® 10 Intel XeonTM
Fog Fog-server acceleration; orchestration acceleration
Factory; Wind River titanium server; MS-Azure
Intel Stratix 10, Intel Arria 10, Intel Cyclone® V
Intel CoreTM / Intel AtomTM
GatewayIntegration; protocol abstraction; human-machine interface (HMI); industrial networking
Many per factory; Linux*; CODESYS; HMI runtime
Intel Arria 10, Intel Cyclone V Intel Atom; ARM*
Edge Sensor hub; edge analytics controller; industrial networking
Factory floor: sensor; actuators
Intel Cyclone V, Intel MAX® 10 Intel Atom; Quark™; ARM
6
TABLE 2 MOTOR HARDWARE PLATFORM OPTIONS
HARDWARE PLATFORM DESCRIPTION POWER STAGE FEEDBACK/FEATURES
Falcon Eye Hunter
Motor types: PMSM, BLDCAxis: 1Applications: industrial servoFPGA interface: HSMCwww.devboards.de
Power stage: 400 V IGBTMotor phases: 3Isolation: YesEMI filter: YesPF correction: Yes
• DC link voltage measurement• Motor current measurement• Resolver, encoder feedback
Tandem Motor Types: PMSM, BLDC, stepper, software reluctanceAxis: 2Applications: industrial, automotive, high-speedFPGA interface: HSMCAvailable Q1 2017
Power stage: 48V MOSFETMotor phases: 3Isolation: NoEMI filter: NoPF correction: No
• DC link voltage measurement• Motor current measurement• Resolver, encoder, hall, Sensor-less feedback• Power conversion or motor control (bi-directional converter)
CONTROLFactory Automation – Drives
Motor Control Solutions
Motor and motion control designers are faced with unique challenges for each type of motor application. To address the needs of motor control design engineers, Intel provides a Motor Control Development Framework comprising Motor
Hardware Platforms, an appropriate FPGA development board, and motor control reference designs as shown in Figure 3.
ARM*/Nios® II
V/IFeedback INTF
Primary PowerSource
Motor Hardware Platform
Safety
Motor Control Reference Designs FPGA Development Board
MotionPlanning
Speed/POS
Drive onChipFPGA
VibrationAnalysis FOC PWM Drive on
ChipFPGA
HSM
C In
terf
ace
HSMC Interface
DCSupply
Figure 3 Intel's Motor Control Development Framework
Motor Hardware Platform
The Motor Hardware Platform enables motor drive hardware engineers to quickly start developing solutions without the need to design prototype hardware first. The Motor Hardware
Platform connects an FPGA development board of choice via the high-speed mezzanine card (HSMC) interface.
Intel Technology7
Motor Control Reference Design
Intel's Motor Control Reference Design provides engineers with key software and hardware IP cores to help make the difficult parts of motor control algorithm development quick and easy thereby reserving engineering bandwidth to address customization. Application Note (AN669): Drive-on-Chip Reference Design shows how to download and use the reference designs; and the reference design itself is free to download at https://cloud.altera.com/devstore/platform/.
Some of the outstanding features of the reference design include:
• Multiple FOC loop implementations.
- Fixed and floating-point implementations for Nios® II soft processors and ARM* hard processors.
- Fixed and floating-point acceleration designed using the Simulink model-based design flow with the DSP Builder for Intel FPGAs.
• Integration in a single device single or multi-axis motor control IP including:
- Pulse-width modulation (PWM) channels for two-level IGBT or MOSFET power stages.
- Analog-to-digital converter (ADC) interfaces (integrated on MAX 10 FPGA platform).
- Multiple motor position/speed feedback mechanisms including encoders, resolvers, hall switches, and sensor-less.
• Support for Cyclone IV, Cyclone V, Cyclone V SoC, and MAX 10 product families.
When combined with other IP from Intel or one of its partners, highly precise, cost effective motor and motion control solutions with appropriate safety, connectivity, and security can be implemented on a single chip with fast time to market.
Motor Control Use Cases
Figure 4 provides two common FPGA use case examples. Drive designs typically incorporate programmable logic either as a companion device as shown on the left or in a ‘drive-on-a-chip’ configuration as shown on the right. In both cases the programmable logic is closely coupled with the motor hardware enabling the system designer to take advantage of the FPGAs unique capabilities. Multiple axes configurations are easily implemented via multiple instantiations of motor control/interface IP. The motor control reference designs are amazingly compact. A four-axis system with Industrial Ethernet connectivity can be implemented on a single MAX 10 FPGA. Because the designer has access to hardware fabric, the mindset of how much processor performance is required is altered. This is because portions of the motor control that are processor intensive can be implemented in hardware in the fabric; thus alleviating the need to incorporate a processor that typically delivers hundreds of million instructions per second (MIPS). In the Motor Control Development Framework, this methodology has significantly reduced loop times, power, and cost. Finally, motor voltage/current and sensor feedback can be analyzed in the frequency domain using digital signal processing (DSP) blocks embedded in the fabric. This enables advanced diagnostics such as vibration detection used for predictive maintenance as well as vibration suppression.
M M
Multiple Axis(if required)
Nios® IIProcessor
PWM
ADC
EncoderINT
SafetyIP
MotorControl
AlgorithmsE’net
CAN
ARM*/Nios® IIProcessor
PWM
ADC INT
EncoderINT
SafetyIP
MotorControl
AlgorithmsE’net
CAN
MEMCTRL
Figure 4. Motor Control FPGA Use Cases
8
Figure 5. FPGAs as a PLC Companion Device (Intel Architecture)
Intel® Processor
IntelFPGA
FPGA Benefits in Motor Control Applications
The use of Intel’s FPGA technology in motor and motion control applications provides many unique benefits:
• Scalability: Design reuse is the hallmark of predictability and faster design time enabling engineers to focus their talent on innovation rather than implementing core functions and features. With a wide range of pin-compatible fabric sizes and a selection of processor and DSP capabilities, engineers can share critical IP across multiple product families and select the FPGA platform that is appropriate for the task at hand. For example, the implementation of a four-axis motion control system is a superset of a single-axis design; and both product families share certain software and hardware blocks. Additionally, as newer requirements arise, designers can move to a larger/smaller device and reuse most of the existing design.
• Design Flexibility: Intel’s motor control reference designs provide support for various power electronics, feedback methods, and new/upcoming Industrial Communications protocols and legacy fieldbus interfaces.
• Higher Performance: FPGAs meet the full range of system performance requirements by using hardware and coprocessors to accelerate your motor control algorithm. This can include hardware acceleration of critical loop parameters, high-speed PWM channels for improved power device drive, and DSP capabilities for signal processing applications like vibration suppression.
• Improved Reliability: Drive-on-a-chip architectures afford higher levels of integration that often lead to improved failures in time (FIT) rates and higher reliability.
• Increased Productivity: Aside from the starting point provided by reference designs, developers have the option of selecting design flows that are hardware-centric, software- centric, and model-based depending on the expertise and preferences of the design team. Combined with reuse, new products are introduced faster with lower development costs.
• Reduced time to market and development costs: Intel brings together solutions for most motor control applications; and offers peripheral functionality critical to the entire system as well. Certifying a new design to IEC61508, developing time-sensitive networking solutions, and offering security features are a few product requirements that can add person years to the development schedule. Intel is constantly investing in new solutions and seeking out sources of IP to help customers get to market sooner; without waiting for a hardware solution to become available.
• Lower Total Cost of Ownership: Through integrated SoC platforms, FPGAs provide opportunities to differentiate on a single architecture with long device lifetimes that significantly reduce obsolescence risks.
Factory Automation – PLCS
FPGA Use Cases for PLCS
Figure 5 and Figure 7 illustrate two common FPGA use cases for PLCs. In Figure 5, the FPGA serves as a companion device to an Intel processor and provides hardware acceleration and specialized connectivity features (e.g. Industrial Ethernet). This architecture is highly scalable as the appropriate Intel processor can be chosen to meet the needs of a specific family of PLCs. In this instance, FPGAs are particularly useful if the design employs emerging technologies in which standards are somewhat fluid; allowing for updates after equipment deployment. Figure 7 illustrates a ‘single-chip PLC’ and shows the main features of a development kit from one of Intel’s industrial partners, Exor International. An ARM architecture provides the processing function and the core functionality required for a mid-range PLC is implemented within the Cyclone V SoC. This architecture is particularly useful for cost-sensitive designs.
Intel Technology9
Figure 7. Single-Chip PLC Development Platform (ARM Architecture)
USG OTG(x2)
I2C(x2)
CAN(x2)
UART(x2)
NANDFLH CNT
SDI/SDIOMMC
QSPICNTR
JTAG DMA
HPS
GPI
O
GPIO
HPS/FPGA Interface
MP DDR
SPI(x2)
64 KBRAM
Ethernet(x2)
Timers(x11)
L2 Cache
Hard Processor System (HPS)
ARM* Cortex* A9NEON/FPUL1 Cache
ARM Cortex A9NEON/FPUL1 Cache
FPGA Fabric
MemoryController
FPGA
PCle Transceivers
FPG
A G
PIO
FPGACONFIG
Figure 6. Cloud-Enabled PLCs and I/O Modules
FUNCTIONCYCLONE® V SoC SECTION COMMENT
Operating System HPS Linux* Kernel 3.8 RT
Control HPS CODESYS
Connectivity HPS Ethercat
Security HPS + FPGA Hardware Accelerated OpenSSL
Interoperability HPS OPC UA
HMI FPGA Video Controller
HMI HPS Graphics Engine (JMOBIL)
Connectivity HPS Fieldbus Interfaces
FPGA Benefits in PLC Applications
Programmable logic provides several key benefits for PLC architectures:
• Scalable Performance: As discussed, FPGA use cases for a PLC include a companion device for the main processor or a ‘PLC-on-a-chip’. The functions provided by an FPGA in PLC designs include complete PLC functionality, processor offload and/or acceleration, communications hub, system security, PWM channels, miscellaneous logic, and many more. Perhaps a less obvious benefit of using FPGAs as part of a PLC design is that IP instantiated in the PLC can be ported to other systems including I/O modules. Security IP used in the gateways (implemented with an FPGA) can be ported to the PLC. Thus critical IP needed throughout the edge and fog network can be shared across multiple products and functions as shown in Figure 6.
• Increased Security: As the factory floor is connected to enterprise, network security is critical. Using FPGA fabric to accelerate network security features significantly reduces security vulnerabilities over a pure software implementation.
• Future Proof: While certain aspects of PLC design have remained a constant for decades, newer core requirements continue to be transitional by their nature (e.g. security). Programmable logic not only provides customization prior to product delivery to the customer, but affords the capability of updating critical functionality after product deployment.
• Reduce Development Costs and Accelerate Time to Market: FPGA fabric enables quick time to market by supporting the latest generation of interface, timing, and security standards before ASICs become available.
802.1TSN
IEC61508Safety IP
10
DDR3
DDR3
DDR3
QPI
Intel Architecture + Intel FPGA
DDR3
DDR3
• • • • • •
DDR3
DM
I2
PCle
* 3D
x 8
PCle
3D
x 8
PCle
3D
x 8
PCle
3D
x 8
Heterogeneous architecture withhomogeneous platform support
Machine Vision
Machine imaging-based automatic inspection and analysis is proliferating at an unprecidented rate throughout many Industrial applications. Manufacturers can speed production processes, minimize defects, and reduce costs.
Intel FPGAs provide the highest degree of I/O connectivity and programming flexibility, drastically simplifying the integration of the widest range of image sensors, enabling tightly tuned Image Sensor Pipelines to all possible use-cases with the fastest time to market.
When coupled with Computer Vision Analytics, a high level of understanding from digital images or videos can be realised to achieve object recognition in applications such as intelligent surveillance, collision avoidance in autonomous drones, and beyond.
The marriage of Intel architecture and FPGA brings together the industry’s a high-performance hetrogenious compute platform to optimally execute Image Sensor Pipelines and Vison Analytics algorithms in one hollistic system.
In doing so, Intel simplifies the design flow by abstracting the heterogeniality of the architecture through a user friendly Vision SDK. At the same time still providing unrestricted extensibility through Open Computing Language (OpenCL™) for customers who want fine-grained control.
Intel® Computer Vision SDK ArchitectureVision/Image Processing Application
Dev
ice-
Spec
ific
Het
erog
eneo
us
PipelineManager
Intel Extension
Pipeline CompilerWork Distributor
Customer SW
IntelImaging-Vision
ProcessorsLegend
FPGA Plug-in
FPGA Driver/Runtime
FPGAKernels
UserKernels
CVE Plug-in
CVE Driver/Runtime
CVEKernels
DSPKernels
IPU Plug-in
IPU Driver/Runtime
IPU Kernels
GPU-OpenCL Plug-in
OpenCL Driver/Runtime
GPUKernels
User Kernels(OpenCL C)
CPU Engine
CPUKernels
UserKernels (C)
Note: OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission by Khronos.
Intel Technology11
Cloud
Fog
Gateway
• Low Power• Lean Resources• Low Cost
• Abundant Power• Resource Rich• Highest Performance
OPC UAProfiles
Standard
Micro
Nano
Embedded
ComputingPlatforms
Edge
updates per second), the OPC UA Standard groups OPC UA Server capabilities into profiles. This allows vendors to choose the right level of functionality and performance they need to implement for their specific applications.
Figure 8. OPC UA Profiles
CONNECTIVITYInteroperability
OPC UA: Essential Open Data Connectivity for Industrial IoT and Industry 4.0
Secure, reliable open data connectivity is the central factor Industry 4.0 and the Industrial IoT relies on to deliver the unprecedented business and operational improvements end-users and device vendors have come to expect. Recognized as the key data connectivity method in Industry 4.0 applications, the OPC UA standard delivers the flexibility, security, and scalability needed for the job - the Matrikon OPC UA SDK provides Intel developers with a quick and easy “one-stop-shop” OPC UA SDK solution. Designed to tackle current and evolving Industrial IoT and Industry 4.0 data connectivity challenges, OPC UA provides an elegant solution to the question of how diverse Industrial IoT components can all share meaningful (context rich) data securely and efficiently.
Key Characteristic of OPC UA
Scalability: OPC UA can run on virtually all networked sensors, devices, controllers, or applications. Taking into account that a small smart sensor will not have the computing power of a controller or a PC (both of which can sustain over a million
OPC UA
OPC UA
OPC UA OPC UA OPC UA
OPC UAOPC UA
Cloud
Subnet
12
Security: Designed from ground up using IT and OT security best practices - OPC UA addresses both IT and OT related issues (for example: ensuring data sources are secure while their data remains accessible to ensure maximum factory floor uptime). Beyond standard IT security concerns - OPC UA security employs best practices based on Public Key Infrastructure (PKI) technology to establish trust between systems and encryption and signing to guarantee data confidentiality and integrity right from the source.
Flexibility: With the advantage of being operating system (OS) and platform independent - OPC UA can be implemented on various platforms and any OS: from bare-metal systems with no OS, to custom RTOSs and mainstream OSs such as Linux and Windows. Making OPC UA flexible enough to make it usable on virtually any new or existing networked product.
Future Friendly: Addressing the rapid evolution of networking and IT security practices - OPC UA makes it possible to upgrade the underlying transport protocols , such as binary, HTTPS, and AMQP, without disrupting previous OPC UA implementations – preserving your ROI.
Matrikon OPC UA Stack for Easy Integration on Intel FPGA Platforms
Matrikon OPC UA SDK Details & System Requirements:
• Supports 32-bit processors and higher. Currently ported to Cyclone V SoC
• Written in C++
• Program using Ansi C, C++, or Java (JNI)
• Requires C++ compiler that conforms with ISO/IEC 14882:1998 (C++98)
Step 1Write Code
HighlyReliable
MinimizedFootprint
FullyScalable
Easy toUse
Minimize development time with easy drop-in ‘OPC US Server in a box’ designs.
Use one SDK for all products. From the smallest micro controller unit (MCU) to multi-core CPUs.
Embed OPC UP in virtually any newer existing product with minimal resource use.
Built from embedded first principles, delivers maximum product uptime.
Matrikon OPC UA SDK
Step 2Compile
Step 3Download & Use on Platform
DeviceProgramming& SharedMemory
External UA ClientConnectivity
Matrikon EmbeddedUA SDK
1101010110100101010
Intel Technology13
Industrial Ethernet
With the need to support multiple variants of Industrial Ethernet protocols, designing industrial systems can be far from simple. These protocols often must be implemented as a deeply embedded function to meet shrinking system costs, form factors, and power budgets. It is commonplace for a developer to obtain IP protocols in which they must negotiate with different vendors, usually requiring them to pay up-front licensing fees, and sometimes adding the complexity of tracking end-product sales to pay royalties.
Intel FPGAs offer an integrated Industrial Ethernet function with a simplified licensing structure. Therefore, developers have access to most of the common Industrial Ethernet protocols thereby enabling them to focus efforts on other aspects of the design.
Intel teamed with Softing Industrial Automation GmbH, the world leader in Industrial Ethernet IP protocols. The combination of Intel FPGAs and a security CPLD provides an easy and inexpensive way for developers to implement Industrial Ethernet and fieldbus connectivity platforms with:
• No license negotiation
• No up-front licensing costs
• No per-unit royalty reporting
• Easy-to-use two-chip solution with "No Hassle" licensing
IEEE 802.1 – TSN
TSN is proving to be a key enabling technology for Industrial IoT and Industry 4.0 by acting as one of the future emerging networking standards for deterministic Ethernet communication in many end markets, such as Industrial Automation, substation automation, machine vision and robotics.
By integrating TSN solutions based on Intel FPGAs into your end product, one can build controllers and I/O units that offer users the full benefits of guaranteed real-time Ethernet communication. Intel FPGA-based TSN solutions will be compliant to the following future and upcoming IEEE 802.1 standards:
• 802.1Qbv
• 802.1Qcc
• 802.1AS
• 802.1ASrev
• 802.1Qbu
• 802.1CB
• 802.1QciSlav
e Pr
otoc
ols Profinet RT
Profinet IRT EtherCAT Ethernet POWERLINK Ethernet/IP (soft DLR) Profibus ModBus/TCP
SoftingSecurity
CPLD
ASSPIndustrialEthernet
IEEE 802.1
Cloud
14
SECURITYSecurity together with Safety and Reliability are key requirements for the Industrial IoT, involving security approaches beyond simple methods such as link encryption. The functional view of the security framework includes:
Endpoint protection implements defensive capabilities on devices at the edge and in the cloud. Primary concerns include physical security functions, cyber security techniques and an authoritative identity.
Communications and connectivity protection uses the authoritative identity capability from endpoint protection to implement authentication and authorization of the traffic. Cryptographic techniques for integrity and confidentiality secure the data flowing over the communications.
Brownfield describes environments where new solutions and components must co-exist and interoperate with existing legacy solutions. The term is used in contrast to Greenfield, where legacy systems are absent, removing such constraints. Implementing security for existing brownfield deployments
should be as non-invasive as possible. In the case of Brownfield end points the primary consideration is not to disrupt the existing business process with added security control. The most common technique for implementing security quickly and effectively is to deploy a security gateway that provides security capabilities to the devices behind it. Common functionality includes:
• Storing and managing identity
• Mutual authentication
• Authorizing network traffic
• Confidentiality and integrity controls
Intel FPGAs offer the capability to not only secure Greenfield environments, but also to Brownfield environments, by the creation of secure gateways that not only add the required security but also enable connectivity to the legacy buses. FPGA implementation is well suited to accelerating software encryption functions, providing whitelisting and firewall functionality.
FPGA acceleration of secured IPsec connections has been shown by Barco Silex to reduce the CPU usage by factor of 4X†, and accelerate the throughput by greater than 7X†.
Secure Greenfield
In-secure Brownfield
LegacyProtocols
Protected M2M Zones & Standard Protocols
IoT Platform
Field Endpoint & Edge Security
CPU
Gateway Proxy Assist
X
Soft
war
e O
nly
FPGA Accelerated IPsec
15010050
50%
100%
CPULoad
200 Throughput(Mbps)
Intel Technology15
SAFETYFunctional safety is increasingly a central requirement for industrial systems in the machinery, transportation, and process automation sectors. Government directives to reduce the risk of operator injuries and the demand for improved operational efficiencies are driving the need for more comprehensive functional safety features.
Safety imposes an increase in overall complexity with considerations such as:
• On-schedule and in-budget product certification meeting the appropriate Safety Integrity Level (SIL) as defined by IEC 61508 and derivative industry-specific standards
• Flexibility to design for today’s diverse requirements while meeting evolving requirements over the product line lifetime
• Cost and risk reduction through integration of safe and non-safe functionality into fewer discrete devices
To simplify and speed up your certification process, we worked closely with TUV Rheinland to gain approval for IEC61508 SIL 3, making Intel the first and only FPGA supplier offering a complete safety package across tools, tool flows, devices, and reliability data. Intel's TUV-qualified safety package simplifies and speeds up your certification process through availability of solutions such as:
• Certified IEC61508 tool flow mapped to FPGA specific V-flow
• Safety Separation Design Partitioning, tool flow retaining the FPGA benefits of quick upgrades/bug fixes while reducing the need for full design re-certification
• Safety Reference Board, providing board and design examples for implementing SIL3 safety systems
• FMEDA, providing comprehensive and detailed IEC61508 specific failure rate calculations, simplifying customer certification data generation
• Diagnostic IP with IEC61508 standard documentation and source code to monitor the integrity of your design
• Nios II Lockstep, SIL3 certified Smart Comparator IP to enable safety certified software implementations
Figure 9. Functional Safety Data Package
Methodology Tool IP PLDs
• V Model• Check Lists• SEU Scaling
• Intel Quartus® Prime • Safety Design• Partitioning• REL Data• Si Integration Guide• FMEDA Tool
• Diagnostic IP• CRC• SEU• Clock Checker• DDRx• Qsys IP
Waterfall Model
Requirements
Design
Implementation
Vertification
Maintenance
Mor
e G
loba
l xx
Mor
e D
etai
led
xx
System DesignIncludes Validation,
Verification, and Test
Quality MonitoringSupervises Keeping
of Requirements
RealizationHardware and Software
Development
System Design
Qua
lity M
onito
ring
Intel® FPGA Intellectual Property
16
DEVELOPMENT ENVIRONMENTS AND TOOLSFigure 10 illustrates the various development flows supported by Intel’s FPGA development tools. Whether you work in the software domain, the hardware domain, or you engineering discipline focuses more on modeling, Intel has the tool suite to suit your preferred methodology to model, develop algorithms, and build your system.
Standard Software Development Tools for High Productivity
Develop software targeting integrated ARM and Nios II processors on Intel's SoC and FPGAs using the ARM Development Studio 5 (DS-5*) for Intel SoC FPGAs and other standard Eclipse-based software development and debug tools.
Model-Based Software and Hardware Design Flows
Simulate models of complete systems and use C/C++ and HDL code generation tools from MathWorks and Intel to directly target FPGA and SoCs. MathWorks’ Embedded Coder, HDL Coder, and DSP Builder tools shorten your design cycle, from algorithm development and system modeling, to software hardware design partitioning exploration and optimized system implementation.
Intellectual Property
Together with our partners, we offer a broad IP portfolio in areas such as Industrial Ethernet, motor control, and functional safety in addition to optimized standard communication, memory controller, and DSP functions.
Quartus ® Prime Software Development Tool
The Qsys system integration tool, part of the Quartus® Prime software development tool, lets you integrate coprocessors, interface IP, and on chip ARM and Nios II processors. It allows for system level specification of design topology, peripheral addressing and interrupts, and AXI* interconnect generation to meet required throughput, latency, and area constraints.
The Quartus Prime tool is the programmable logic industry’s number one software in performance and productivity for CPLD and FPGA design synthesis, place and route, and static timing analysis.
Figure 10. Intel FPGA System Development Environments
System Modeling (Optional)
SoftwareDevelopment
FPP Configuration
AlgorithmDevelopment
Optimization
DesignCompilation
FlashProgrammer
System Design &Integration
HardwareDevelopment
HPS
Fabric
Intel Technology17
SELECT INDUSTRIAL PRODUCTSMAX 10 Family
The MAX 10 family is a versatile ‘hybrid’ product family possessing some qualities of a CPLD and is aalso a full-featured FPGA. The on-board flash memory provides device configuration registers and also includes user flash memory which can be used for parameters and/or code/data storage for a Nios II soft processor. The MAX 10 FPGA is highly integrated including traditional FPGA circuitry (fabric, RAM, DSP, PLLs, and I/O) but can also include analog blocks (a voltage regulator, analog-to-digital converters (ADCs), and a temperature sensor). Use cases2 range from implementing a simple block of logic, to a companion device that handles PWM channels and Industrial Communications to a fully integrated one chip solution like an I/O module, a 4-axis drive with Industrial Ethernet, or an Industrial Ethernet switch.
Figure 11. MAX 10 Architecture
TABLE 3 MAX 10 FPGA COMMON INDUSTRIAL USE CASES
DRIVESMOTION
CONTROL PLC I/O MODULEVISION/
SURVEILLANCE ENERGYINDUSTRIAL
COMMUNICATIONS
Companion Device Yes Yes Yes N/A Yes Yes Yes
One-ChipSolution Yes Yes Yes Yes
32-bit Processor
Nios® II
DDR3 Controller
RAM Blocks
DSP Blocks
User FlashConfiguration Flash 1
Configuration Flash 2
12-bit SAR ADCs
Power Regulator
4 PLLs
8 I/O Banks
Up to 50K Logic Elements
Packages assmall as
3 x 3 mm
Flash Memory (NOR)
On-chip Oscillator
On-chip Clock
2For example, see Figure 4.
18
TABLE 4 MAX 10 PRODUCT OFFERING
Product Offering 10M2 10M4 10M8 10M16 10M25 10M40 10M50
LEs (k) 2 4 8 16 25 40 50
Block Memory (kb) 108 189 378 549 675 1,260 1,638
User Flash (kB)1 12 16 – 156 32 - 172 32 – 296 32 – 400 64 – 736 64 – 736
18X18 Multipliers 16 20 24 45 55 125 144
PLLs2 1,2 1,2 1,2 1,4 1,4 1,4 1,4
Configuration Boot Mode Single Dual Dual Dual Dual Dual Dual
ADC, Temp Sensor3 No 1,1 1,1 1,1 2,1 2,1 2,1
External Memory Interface (EMIF) Yes4 Yes4 Yes4 Yes5 Yes5 Yes5 Yes5
Dual Power Supply Device Package Options and I/O Pins, Feature Set Options, GPIO, True LVDS Transceiver
V36 WLCSP(3mm, 0.4 mm pitch)
C27,3/7
V81 WLCSP(4 mm, 0.4 mm pitch)
C/F56,7/17
F256 FBGA(17 mm,1.0 mm pitch)
C/A178,13/54
C/A178,13/54
C/A178,13/54
C/A178,13/54
C/A178,13/54
C/A178,13/54
U324 UBGA(15 mm,0.8 mm pitch)
C160,9/47
C/A246,15/81
C/A246,15/81
C/A246,15/81
F484 FBGA(23 mm,1.0 mm pitch)
C/A250,15/83
C/A320,22/116
C/A360,24/136
C/A360,24/136
C/A360,24/136
F672 FBGA(27 mm,1.0 mm pitch)
C/A500,30/192
C/A500,30/192
Single Power Supply Device Package Options and I/O Pins, Feature Set Options, GPIO, True LVDS Transceiver
E144 EQFP(22 mm, 0.5 mm pitch)
C101,7/27
C/A101,10/27
C/A101,10/27
C/A101,10/27
C/A101,10/27
C/A101,10/28
C/A101,10/28
M153 MBGA(8 mm, 0.5 mm pitch)6
C112,9/29
C112,9/29
C112,9/29
U169 UBGA(11 mm, 0.8 mm pitch)
C130,9/38
C130,9/38
C130,9/38
C130,9/38
Notes:1. Additional user flash may be available depending on configuration options.2. The number of PLLs avail is dependent on the package option.3. Availability of the ADC and TSD varies by package type. Smaller pin count packages
typically do not include the ADC and TSD.4. SRAM only.5. SRAM, DDR3, SDRAM, DDR2, SDRAM, or LPDDR2.6. Uses 0.8 mm design rules.7. All data is correct at time of printing and may be subject to change without prior notice.
Please visit www.altera.com. C,27,3/7 Indicates feature set options, GPIO count, and LVDS transmitter or
receiver count. Feature set options C = Compact (single image), F = FLASH (dual image), A = Analog
Intel Technology19
Cyclone Family
The Cyclone family has been a workhorse in the industrial segment for decades. The industrial segment requires a careful balancing act between cost, performance, and power consumption. Over time, fabric size and performance has increased while operating power has decreased. Transceiver performance in this family keeps pace with market requirements. SoC family members represent the latest innovation in programmable logic technology for the industrial segment. While the benefits from the perspectives of cost and size are obvious, there are notable advantages to
implementations employing Cyclone V SoC over a (processor + companion FPGA) architecture. The coupling between the processor cores and the fabric are much tighter than a two-chip approach enabling the fabric to provide acceleration of functions rather than offloading the processor. The bandwidth between the HPS and the FPGA fabric is very high; and, blocks implemented in the fabric can share parameters with the processor cores via the L2 cache while maintaining cache coherency. Additionally, the development and debug environment is far superior which enables much faster/easier development of architectures in which there is significant interaction between the processor and fabric.
ARM Cortex* A9NEON*/FPU
L1 Cache
Hard Processor System (HPS)
L2 Cache
QSPICNTR
SDI/SDIOMMC
NANDFLH CNT
ARM Cortex A9NEON/FPUL1 Cache
JTAG DMAH
PS G
PIO
64 KBRAM
MP DDR
FPG
A G
PIO
GPIO
HPS/FPGA Interface
Timers(x11)
FPGACONFIG
Ethernet(x2)
SPI(x2)
UART(x2)
CAN(x2)
I2C(x2)
USB OTG(x2)
FPGA Fabric
MemoryController PCle* Transceivers
FPGA
*
Figure 12. Cyclone V SoC
TABLE 5 CYCLONE FAMILY COMMON INDUSTRIAL USE CASES
FAMILY ROLE DRIVESMOTION CONTROL PLC I/O MODULE
VISION/ SURVEILLANCE ENERGY
INDUSTRIAL COMMUNICATIONS
Cyclone IV Companion Device Yes Yes Yes Yes Yes Yes
One Chip Solution Yes Yes Yes Yes
Cyclone V Companion Device Yes Yes Yes Yes Yes
One Chip Solution Yes Yes Yes
Cyclone V SoC
Companion Device Yes Yes Yes Yes Yes Yes
One Chip Solution Yes Yes Yes Yes Yes Yes
20
TABLE 6 CYCLO
NE V
SOC PRO
DU
CT OFFERIN
G
UBG
A-484 (19X19) 0.8 M
M PITCH
UBG
A-672 (23X23) 0.8 M
M PITCH
FBGA
-896 (31X31) 1.0 PITCH
FAM
ILYPRO
DU
CT
LOG
IC
(kLEs)PLL FPG
A/
HPS
FPGA
I/O
HPS
I/OLV
DS
TX
LVD
S R
XXC
VR
FPGA
I/O
HPS
I/OLV
DS
TX
LVD
S R
XXC
VR
FPGA
I/O
HPS
I/OLV
DS
TX
LVD
S R
XXC
VR
CYC
LON
E V
SE SoC
5CSE-A
225
5/366
16115
18–
145181
3135
––
––
––
5CSE-A
440
5/366
16115
18–
145181
3135
––
––
––
5CSE-A
585
6/366
16115
18–
145181
3135
–288
18172
72–
5CSE-A
6110
6/366
16115
18–
145181
3135
–288
18172
72–
CYC
LON
E V
SX SoC
(3 Gbps)
5CSX
-C2
255/3
––
––
–145
18131
356
––
––
–
5CSX
-C4
405/3
––
––
–145
18131
356
––
––
–
5CSX
-C5
856/3
––
––
–145
18131
356
288181
7272
9
5CSX
-C6
1106/3
––
––
–145
18131
356
288181
7272
9
CYC
LON
E V
ST SoC(5 G
bps)
5CST-D
585
6/3–
––
––
––
––
–288
18172
729
5CST-D
6110
6/3–
––
––
––
––
–288
18172
729
TABLE 7 CYCLO
NE V
PROD
UCT O
FFERING
PACKAG
EM
BGA
-301 (M
11)M
BGA
-383 (M
13)M
BGA
-484 (M
15)FBG
A-256
(F17)U
BGA
-324 (U
15)U
BGA
-484 (U
19)FBG
A-484
(F23)FBG
A-672
(F27)FBG
A-896
(F31)FBG
A-1152
(F35)
Pitch (mm
)0.5
0.50.5
1.00.8
0.81.0
1.01.0
1.0
Size (mm
x mm
)11 X
1113 X
1315 X
1517 X
1715 X
1519 X
1923 X
2327 X
2731 X
3125 X
35
FAM
ILYPRO
DU
CT
LOG
ICkLEs
PLLS
CYC
LON
E V
E5C
E-A2
254
–223/56
–128/56
176/56224/56
224/56–
––
5CE-A
449
4–
223/56–
128/56176/56
224/56224/56
––
–
5CE-A
577
6–
175/60–
––
240/60240/60
––
–
5CE-A
7149.5
6–
–240/120
––
240/120240/120
336/120480/120
–
5CE-A
9301
6–
––
––
240/120224/120
336/120480/120
–
CYC
LON
E V
GX
(3 Gbps)
5CGX
-C3
35.54
––
––
144/52/3208/52/3
208/52/3–
––
5CGX
-C4
506
129/84/4175/84/6
––
–224/84/6
240/84/6336/84/6
––
5CGX
-C5
776
129/84/4175/84/6
––
–224/84/6
240/84/6336/84/6
––
5CGX
-C7
149.57
––
240/120/3–
–240/120/6
240/120/6336/120/9
480/120/9–
5CGX
-A9
3018
––
––
–240/140/5
224/140/6336/140/9
480/140/12560/140/12
CYC
LON
E V
GT
(5 Gbps)
5CGT-D
577
6129/84/4
175/84/6–
––
224/84/6240/84/6
336/84/6–
–
5CGT-D
7149.5
7–
–240/120/3
––
240/120/6240/120/6
336/120/9480/120/9
–
5CGT-D
9301
8–
––
–224/140/5
224/140/6339/140/9
480/140/12560/140/12
Intel Technology21
TABLE 8 CYCLONE IV E PRODUCT OFFERING
PACKAGEEQFP-144
(E144)MBGA-164
(M164)UBGA-256
(U256)FBGA-256
(F256)UBGA-484
(U484)FBGA-324
(F324)FPGA-484
(F484)FBGA-780
(F780)
Pitch (mm) 0.5 0.5 0.8 1.0 0.8 1.0 1.0 1.0
Size (mm x mm) 22X22 8X8 14X14 17X17 19X19 19X19 23X23 29X29
FAMILY PRODUCT LOGIC kLEs PLLS I/OS/LVDS/TRANSCEIVERS
CYCLONE IV E
EP4CE6 6.3 2 91/21 – 179/66 179/66 – – – –
EP4CE10 10.3 2 91/21 – 179/66 179/66 – – – –
EP4CE15 15.4 4 81/18 89/21 165/53 165/53 – – 343/137 –
EP4CE22 22.3 4 79/17 – 153/52 153/52 – – – –
EP4CE30 28.8 4 – – – – – 195/61 328/124 532/224
EP4CE40 39.6 4 – – – – 328/124 195/61 328/124 532/224
EP4CE55 55.9 4 – – – – 324/132 – 324/132 374/160
EP4CE75 75.4 4 – – – – 292/110 – 292/110 426/178
EP4CE115 114.5 4 – – – – – – 280/103 528/230
TABLE 9 CYCLONE IV GX PRODUCT OFFERING
PACKAGEQFN-148
(N148)FBGA-169
(F169)FBGA-324
(F324)FBGA-484
(F484)FBGA-672
(F672)FBGA-896
(F896)
Pitch (mm) 0.5 1.0 1.0 1.0 1.0 1.0
Size (mm x mm) 11X11 14X14 19X19 23X23 27X27 31X31
FAMILY PRODUCT LOGIC kLEs PLLS I/OS/LVDS/TRANSCEIVERS
CYCLONE IV GX
EP4CGX15 14.4 3 72/25/2 72/25/2 – – – –
EP4CGX22 21.3 4 – 72/25/2 150/64/4 – – –
EP4CGX30 29.4 4/6 – 72/25/2 150/64/4 290/130/4 – –
EP4CGX50 49.9 8 – – – 290/130/4 310/140/8 –
EP4CGX75 73.9 8 – – – 290/130/4 310/140/8 –
EP4CGX110 109.4 8 – – – 290/130/4 310/140/8 475/220/8
EP4CGX150 149.8 8 – – – 290/130/4 310/140/8 475/220/8
22
Powering Industrial IoT: Intel Enpirion® Power Solutions Intel Enpirion® power solutions were the first to deliver power system-on-chip (PowerSoC) DC-DC converters with a high level of integration and ultra-small footprint (cutaway shown on right). Today the Enpirion PowerSoC products continue to impress with products focused on the best combination of power density and performance. The Enpirion portfolio represents several families of step-down voltage converters that span a wide range of output currents (from 10’s of mA to 10’s of A) and address the entire breadth of industrial application requirements. Enpirion PowerSoC DC-DC converters are ideal for industrial motor controllers, PLC and networking cards, machine vision, and smart energy applications.
DRIVES/MOTION CONTROL PLC I/O MODULE
VISION/SURVEILLANCE ENERGY
INDUSTRIAL COMMUNICATIONS
Efficiency
Size
Reliability
Important Critical
Higher Efficiency and Thermal Performance
Industrial electronics must deliver increasingly higher levels of performance in smaller form factors. Thermal issues are challenging to address because fans, cooling vents, and other thermal management devices are typically not an option. Enpirion’s highly efficient, point-of-load approach reduces system thermal load greatly increasing system reliability and reducing costs.
High Power Density and Small Footprint
Enpirion PowerSoCs integrate the controller, power stages, critical passive loop components, and inductor into a single device. Component size is greatly reduced by operating the control loop at an appropriate frequency enabled by proprietary output stage transistors. EMI emissions are ultra-low due to compact module size.
Lowest Component Count, Ease of Design, High Reliability
Unlike less integrated designs in which the onus is on the engineer to validate that the design will meet critical power supply specifications, Enpirion Power SoCs are fully validated designs providing engineers with turnkey solutions. This can save engineers over 40%† less design time than discrete power solutions. More importantly, higher levels of integration lead to improved mean time between failures (MTBF) and FIT rates that help reduce common cause system failures.
Compensation Network
M tro
VIN
VOUT
COUT
VFB
CIN
Intel® Enpirion® PowerSoC
MOSFETsInductor
PWConPWM
Control
GateDrive
ErrorAmp
CompensationNetwork
100
90
80
70
60
50
40
30
20
10
0
Effic
ienc
y(%
)
VOUT=1VVOUT=1.2VVOUT=1.8VVOUT=2.5VVOUT=3.3V
Intel Technology23
LEARN MORETo learn more about Intel's industrial solutions, contact your local sales representative. You can download white papers, view webcasts, purchase development kits, and more from our website at www.altera.com/industrial.
To learn more about Enpirion power solutions, visit www.altera.com/products/power/overview.html
© Intel Corporation. All rights reserved. Intel, the Intel logo, the Intel Inside mark and logo, the Intel. Experience What’s Inside mark and logo, Altera, Arria, Cyclone, Enpirion, Intel Atom, Intel Core, Intel Xeon, MAX, Nios, Quartus and Stratix are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. See Trademarks on intel.com for full list of Intel trademarks. *Other marks and brands may be claimed as the property of others.
Broch 1017-1.1
† Tests measure performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit www.intel.com/benchmarks.
