A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date: Sheet of LA-2411 0.1 Cover Sheet 1 65 , 07, 2004 星期三 七月 Compal Electronics, Inc. Schematics Document Compal confidential MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 2004-06-28 DT TRANSPORT or Prescott uFCPGA with ATI-RC300M+SB200 core logic LA-2411 REV:0.3
Transcript
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Title
Size Document Number Rev
Date: Sheet o f
LA-2411 0.1
Cover Sheet
1 65, 07, 2004星期三 七月
Compal Electronics, Inc.
Schematics DocumentCompal confidential
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2004-06-28
DT TRANSPORT or Prescott uFCPGAwith ATI-RC300M+SB200 core logic
LA-2411
REV:0.3
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Title
Size Document Number Rev
Date: Sheet o f
LA-2411 0.1
Block Diagram
2 65, 07, 2004星期三 七月
Compal Electronics, Inc.
page 7
MDC & BT Conn
EC I/O Buffer
page 25
VGA DDR x2 CHB
page 38
page 41
HDDConnectorpage 31
Thermal SensorADM1032AR
page 42
AC-LINK
page 43
LCD Conn ATI-RC300M
SUPER I/O SMC 207
DC/DC Interface CKT.
page 25
page 45
CABLE CONN.
page 14,15,16
page 47
page 4,5,6
Audio Codec
ATI-M9+X/M10C
page 40
page 26,27,28,29
CDROM Connector
IDSEL:AD20(PIRQA,B#,GNT#2,REQ#2)
page 36
BGA 457 pin
page 44
CardBus Controller
868 pin u-BGA
Secondary IDE
ENE910
IDSEL:AD19(PIRQD#,GNT#1,REQ#1)
page 41page 34
VGA DDR x2 CHA
IDSEL:AD18(PIRQC#,GNT#3,REQ#3)
ALC 250
Primary IDE
Touch Pad
Mini PCIsocket
IEEE 1394TI-TSB43AB22
Compal confidential
AGP BUS
page 30
USB2.0
page 33
page 50,51,52,53,54,55,56,57
page 33
page 43
ATI-SB200
H_A#(3..31)
PCI BUS
RTC CKT.
page 23
RJ45 CONN
LAN
Int.KBD
Power Circuit DC/DC
uFCBGA-479/uFCPGA-478 CPU
H_D#(0..63)
page 22
page 26
ATA-100
page 45
RJ11 CONN
IDSEL:AD16(PIRQA#,GNT#0,REQ#0)
2.5V DDR- 200/266
BIOS
USB conn x4
A-Linkpage 37
Power OK CKT.
ATA-100
page 7
PSB
Intel Northwood/Prescott Processor
page 41
page 46
Fan Control
page 42
Mini-PCI solt
LPC BUS
AMP & Audio Jack
RTL 81000CL
page 32
File Name :LA2411
W/EXT VGA CHIP
page 46
800MHz
DDR-SO-DIMM X2
Slot 0
page 17,18,19,20,21
3.3V 33 MHz
page 35
W/EXT VGA CHIP
Power On/Off CKT.
BANK 0, 1, 2, 3
Memory BUS(DDR)
FIR
W/O EXT VGA CHIP
page 8,9,10,11,12,13
CRT & TV-OUT Conn.
ENE 714/1410
VGA M9 Embeded
W/O EXT VGA CHIP
*RJ45 CONN*LINE IN JACK*DC JACK*COM PORT*USB CONN x1*SPDIF*5V INPUT*VOLUME ADJUSTMENT KEY+TV-OUT PORT
page 30
Card slot
BTUSB1.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
+VCC_CORE Core voltage for CPUAC or battery power rail for power circuit.
1.25V switched power rail for DDR VttThe voltage for Processor VID select
Adapter power supply (19V)
+VCCVIDON
N/AN/A
S3
OFFON
S5
OFF
N/AOFF
N/AN/A
ON
N/A
OFFOFF OFF
S0-S1 Symbol Note :
: means Digital Ground
: means Analog Ground
@ : means just reserve , no build
NAGP@ : means just build when no external AGP VGA chip build in (UMA).
OFFOFF
ON2.5V switched power rail
+3VS OFF
ON*+2.5VS
3.3V switched power rail
ONON2.5V system power rail for DDR
ON*ON
OFF
+2.5VALW+2.5V
ON
1.5V I/O power rail for ATI-RS300M/RC300M NB AGP.
OFF2.5V always on power rail
+3VALWON
ON
OFFON
OFF+1.5VS
3.3V always on power rail
+1.8VS
ON
1.8V switched power rail for ATI-RS300M/RC300M NB.
OFF
OFFOFF
ON
ON
+1.2VS_VGA 1.2V I/O power rail for ATI-VGA M9+X/M10P. ON OFFOFF
12V always on power rail+5VS
ONONONOFF
ON
ON
ON+12VALW
5V switched power rail OFF
RTC powerON*
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
ON
RTCVCC ON
ON*+5VALW 5V always on power rail
+3V 3.3V system power rail for SB,LAN,CardReader and HUB.ON
ONOFF
+5V 5V system power rail .
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
ON ON OFF
M10@ : means build VGA M10M9@ : means build VGA M9+XM9-M10@ : means build VGA M9 or M10 1520@ : means build Cardbus PCI15201620@ : means build Cardbus PCI1620ATI@ : means build ATI SB USB2.0 related to turn on the function .NEC@ : means build NEC USB2.0 related to turn on the function .
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.Place cap within 600 mils ofthe VCCA and VSSA pins.
Note: Please change to 10uH, DC currentof 100mA parts and close to cap
PLL Layout note :
2.H_VCCIOPLL,HVCCA,HVSSA trace wide12 mils(min)
Close to the ITP
Between the CPU and ITP
H_TESTHI12
I f CPU is P4 , Change the resistorR546 va lue to 75_0603_1%
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
SANYO OS-CON 820uF H:13*3 (C163,C164,C165)
SANYO OS-CON 820uF H:9*2 (C166,C167)
+C178
@470U_D2_2.5VM
1
2
C15922U_1206_16V4Z
1
2
C14322U_1206_16V4Z
1
2
+C180
470U_D2_2.5VM
1
2
C16222U_1206_16V4Z
1
2
C172
0.22U_0603_10V7K
1
2
C13222U_1206_16V4Z
1
2
C170
0.22U_0603_10V7K
1
2
C13922U_1206_16V4Z
1
2
C168
0.22U_0603_10V7K
1
2
+ C163
820U_E9_2_5V_M_R7
1
2
+C183
@470U_D2_2.5VM
1
2
C13422U_1206_16V4Z
1
2
C15422U_1206_16V4Z
1
2
C15322U_1206_16V4Z
1
2
C15122U_1206_16V4Z
1
2
C14522U_1206_16V4Z
1
2
C13522U_1206_16V4Z
1
2
C14622U_1206_16V4Z
1
2
C173
0.22U_0603_10V7K
1
2
C15622U_1206_16V4Z
1
2
+C179
470U_D2_2.5VM
1
2
C14122U_1206_16V4Z
1
2
C14722U_1206_16V4Z
1
2
+ C166
820U_E9_2_5V_M_R7
1
2
C15222U_1206_16V4Z
1
2
C15522U_1206_16V4Z
1
2
C15822U_1206_16V4Z
1
2
C13822U_1206_16V4Z
1
2
C13122U_1206_16V4Z
1
2
C171
0.22U_0603_10V7K
1
2
+C176
@470U_D2_2.5VM
1
2
C14222U_1206_16V4Z
1
2
C13622U_1206_16V4Z
1
2
+ C164
820U_E9_2_5V_M_R7
1
2
C16122U_1206_16V4Z
1
2
+C182
470U_D2_2.5VM
1
2
C15722U_1206_16V4Z
1
2
C15022U_1206_16V4Z
1
2
C14022U_1206_16V4Z
1
2
C14922U_1206_16V4Z
1
2
C16022U_1206_16V4Z
1
2
C13322U_1206_16V4Z
1
2
C14822U_1206_16V4Z
1
2
+C174
470U_D2_2.5VM
1
2
+C177
@470U_D2_2.5VM
1
2
C14422U_1206_16V4Z
1
2
C13722U_1206_16V4Z
1
2
+C175
470U_D2_2.5VM
1
2
+ C165
820U_E9_2_5V_M_R7
1
2
+C181
470U_D2_2.5VM
1
2
C169
0.22U_0603_10V7K
1
2
+ C167
820U_E9_2_5V_M_R7
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EN_FAN1 EN_FAN2
FAN1 FAN2
H_THERMTRIP#
H_THERMDA
H_THERMDC
H_THERMDA
H_THERMDC
EC_SMC_2 <44>
EC_SMD_2 <44>
H_THERMDA <5>
H_THERMDC <5>
EN_FAN1<44> EN_FAN2<44>
FANSPEED2<44>FANSPEED1<44>
H_THERMTRIP#<5>
MAINPWON <48,49,51>
+3VALW
+VCC_CORE
+5VS
+3VS
+5VS
+3VS
+12VALW
Title
Size Document Number R ev
Date: Sheet o f
LA-2411 0.1
CPU Thermal Sensor&FAN CTRL
7 65, 07星期三 七月 , 2004
Compal Electronics, Inc.
Thermal Sensor ADM1032AR
Address:1001_100X
W= 15mil
FAN CONN.1 FAN CONN. 2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C265
10U_0805_10V4Z
1
2
R91610K_0402_5%
12
R917 8.2K_0402_5%1 2
C840
0.1U_0402_10V6K1
2
R920 10K_0402_5%1 2
R918 8.2K_0402_5%1 2 JP11
ACES_85205-0300
123
C253
2200P_0402_25V7K
1
2
C
BE
Q90
FMMT619_SOT231
2
3
JP10
ACES_85205-0300
123
U10A
LM358A_SO8
+IN3
-IN2 OUT 1
P8
G4
R283
@10K_0402_5%
12
C856
1000P_0402_16V7K
1
2
C855
1000P_0402_16V7K
1
2
C
BE
Q91
FMMT619_SOT231
2
3
D25
1N4148_SOD80
12
C251
0.1U_0402_10V6K1
2
C907
1000P_0402_16V7K
1
2
Q172SC2411K_SC59
C 1
E3
B2
D68
1SS355_SOD323
12
R913 100_0402_5%1 2D67
1SS355_SOD323
12
C83810U_0805_16V4Z
12
C266
10U_0805_10V4Z
1
2
R286 300_0402_5%12 C256 @1U_0603_10V6K12
R919 10K_0402_5%1 2
C839
10U_0805_16V4Z
1
2
R91510K_0402_5%
12
D26
1N4148_SOD80
12
U8
ADM1032AR_SOP8
VDD1
ALERT# 6
THERM#4 GND 5
D+2
D-3
SCLK 8
SDATA 7
R914 100_0402_5%1 2
C841
0.1U_0402_10V6K1
2
C9081000P_0402_16V7K
1
2
U10B
LM358A_SO8
+IN5
-IN6 OUT 7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_D#[ 0..63]
H_REQ#[0..4]
H_A#[3..31]
H_D#62
H_DSTBP#3
H_D#37
H_D#59
H_DINV#2
H_D#39
H_D#54
H_D#11
H_DSTBN#2
H_D#12
H_D#46
H_D#63
H_D#8
H_DSTBP#2
H_D#48
H_D#50
H_DSTBN#0
H_D#19
H_D#47
H_D#0
H_D#6
H_D#13
H_D#5
H_D#9
H_D#18
H_D#4
H_D#28
H_D#57
H_D#40
H_D#36
H_DSTBP#1
H_D#43
H_D#33
H_D#24H_D#25
H_D#34
H_D#29
H_D#55
H_DSTBN#3
H_DINV#0
H_D#16
H_D#51
H_D#2
H_D#45
H_D#31
H_D#23
H_D#52
H_D#3
H_D#20
H_D#17
H_D#7
H_DINV#3
H_D#22
H_D#15
H_D#30
H_DSTBP#0
H_D#32
H_D#58
H_D#10
H_D#1
H_D#35
H_D#21
H_D#41
H_D#44
H_D#42
H_D#53
H_D#60
H_D#27
H_D#38
H_DSTBN#1
H_D#56
H_D#49
H_D#26
H_D#61
H_DINV#1
H_D#14
H_A#28
H_ADSTB#1
H_A#7
H_A#30
H_A#3
H_A#20
H_A#29
H_A#6
H_A#22
H_A#18
H_A#24
H_REQ#3
H_A#23
H_BNR#
H_A#9H_A#8
H_A#25
H_A#11
H_DEFER#
H_A#10
H_ADSTB#0
H_A#4
H_DRDY#
H_LOCK#
H_A#17
H_TRDY#
H_A#27
H_A#16
H_A#13
H_HIT#
H_ADS#
H_RS#1
H_RESET#
H_DBSY#
H_A#5
COMP_P
H_A#15H_A#14
H_A#26
H_A#31
H_HITM#
H_RS#2
H_BPRI#
H_REQ#1
H_A#19
H_REQ#2
NB_GTLREF
H_A#21
H_REQ#4
H_REQ#0
H_RS#0
H_A#12
H_BR0#
COMP_N
CPVSS
CPVDD
H_D#[0..63] <4>
H_A#[3..31] <4>
H_REQ#[0..4] <4>
H_DSTBP#0 <5>
H_DSTBN#3 <5>
H_DSTBN#0 <5>
H_DSTBP#3 <5>
H_DSTBP#2 <5>H_DSTBN#2 <5>
H_DSTBP#1 <5>H_DSTBN#1 <5>
H_TRDY#<5>
H_RS#1<5>
H_DEFER#<4>
H_HITM#<4>H_HIT#<4>
NB_PWRGD<10,46>
H_ADSTB#1<5>
H_DRDY#<5>
H_ADSTB#0<5>
H_RS#2<5>
H_LOCK#<4>
H_DBSY#<5>
H_BPRI#<4>H_BNR#<4>
H_RS#0<5>
H_RESET#<5,26>
NB_RST#<17,26>
H_ADS#<4>
H_BR0#<4>
H_DINV#3 <5>
H_DINV#0 <5>
H_DINV#2 <5>
H_DINV#1 <5>
NB_SUS_STAT#<27>
+VCC_CORE
+VCC_CORE+1.8VS
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet o f
LA-2411 0.1
ATI RC300M-AGTL+
8 65, 07, 2004星期三 七月
Compal Electronics, Inc.
C363 CLOSE TO Ball W28
PLACE CLOSE TO U27 BallW28, USE 20/20WIDTH/SPACE
Note: PLACE CLOSE TO RC300M,USE 10/10 WIDTH/SPACE
L
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DDR_VREF trace width of20mils and space20mils(min)
L
Group 6 sweep Group 7
Place these resistorclosely DIMM0,all trace lengthMax=0.75"
Layout note
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AD25=1 DESTOP CPUAD25=0 MOBILE CPUAD17--DON'T CARE
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
R431 4.7K_0402_5%
R428 4.7K_0402_5%
R422 4.7K_0402_5%
R429 @4.7K_0402_5%
R469 @4.7K_0402_5%
R438 10K_0402_5%1 2
R430 @10K_0402_5%1 2
R461 10K_0402_5%1 2
R425 4.7K_0402_5%
R443 10K_0402_5%1 2
R434 10K_0402_5%1 2
R427 10K_0402_5%1 2
R463 @4.7K_0402_5%
R435 @4.7K_0402_5%
R452 10K_0402_5%1 2
R448 10K_0402_5%1 2
D86RB751V_SOD323
2 1
R468 @4.7K_0402_5%
R1309 10K_0402_5%1 2
R423 4.7K_0402_5%
R454 @4.7K_0402_5%
D85RB751V_SOD323
2 1
R460 4.7K_0402_5%
R465 4.7K_0402_5%
R464 @4.7K_0402_5%
R466 @4.7K_0402_5%
R420 10K_0402_5%1 2
R444 @4.7K_0402_5%
R467 @4.7K_0402_5%
R421 @4.7K_0402_5%
R424 10K_0402_5%1 2
R440 @4.7K_0402_5%
R457 @4.7K_0402_5%
R462 @4.7K_0402_5%
R426 @4.7K_0402_5%
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDRA_SDQS[0..7]
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_ADD[0..15]
DDRA_SDQ32
DDRA_SDQS3
DDRA_SDQ42
DDRA_SDQS4
DDRA_SDQS2
DDRA_SDQ19
DDRA_SDQ34
DDRA_SDQS5
DDRA_SDQ43
DDRA_WE#
DDRA_SDQ26
DDRA_SDQ16
DDRA_SDQ35
DDRA_SDQ41
DDRA_SDQ27
DDRA_SDQ18
DDRA_SDQ40
DDRA_SDQ25
DDRA_SDQ33
DDRA_SDQ24
DDRA_SDQ17
DDRA_SDQ44
DDRA_RAS#
DDRA_SDQ38
DDRA_CAS#
DDRA_SDQ39
DDRA_SDQ46
DDRA_SDM4
DDRA_SDQ36
DDRA_SDQ23
DDRA_SDM5
DDRA_SDQ37
DDRA_SDQ45
DDRA_SDQ47
DDRA_SDQ31
DDRA_SDM3
DDRA_SDQ20
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ21
DDRA_SDM2DDRA_SDQ22
DDRA_SDQ28
DDRA_VREF
DDRA_SDQ56DDRA_SDQ57
DDRA_SDQS7DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60DDRA_SDQ61
DDRA_SDM7DDRA_SDQ62
DDRA_SDQ63DDRA_SDQ48
DDRA_SDQ49DDRA_SDQS6
DDRA_SDQ50DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53DDRA_SDM6
DDRA_SDQ54DDRA_SDQ55
DDRA_SDQ6DDRA_SDQ7
DDRA_SDQ4
DDRA_SDM1
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDM0DDRA_SDQ5
DDRA_SDQ12
DDRA_SDQS0
DDRA_SDQ2
DDRA_SDQ1
DDRA_SDQ8
DDRA_SDQ3
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11DDRA_SDQ0
DDRA_SDQS1
DDRA_CKE_R1 DDRA_CKE_R0
DDRA_CS#0 DDRA_CS#1
DDRA_ADD5
DDRA_ADD12DDRA_ADD9
DDRA_ADD7
DDRA_ADD3DDRA_ADD1
DDRA_ADD10DDRA_ADD13
DDRA_ADD6DDRA_ADD4DDRA_ADD2DDRA_ADD0
DDRA_ADD14
DDRA_ADD11DDRA_ADD8
DDRA_ADD15
SMB_CK_DAT2<15,24,27>SMB_CK_CLK2<15,24,27>
DDRA_SDQ[0..63]<9,15,16>
DDRA_ADD[0..15]<9,15,16>
DDRA_SDM[0..7]<9,15,16>
DDRA_SDQS[0..7]<9,15,16>
DDRA_CKE_R1<9,16>
DDRA_CLK0<9>DDRA_CLK0#<9>
DDRA_WE#<9,15,16>
DDRA_CLK1# <9>DDRA_CLK1 <9>
DDRA_CAS# <9,15,16>DDRA_RAS# <9,15,16>
DDRA_CKE_R0 <9,16>
DDRA_CS#0<9,16> DDRA_CS#1 <9,16>
+2.5V+2.5V
+3VS
+2.5V
+2.5V
+2.5V+2.5V
Title
Size Document Number R ev
Date: Sheet o f
LA-2411 0.1
DDR-SODIMM SLOT1
14 65, 07星期三 七月 , 2004
Compal Electronics, Inc.
System Memory Decoupling caps
DDRA_VREF trace width of20mils and space 20mils(min)
DIMM0
Group 6 sweep Group 7Group 6 sweep Group 7
Group 0 sweep Group 1
Group 0 sweep Group 1
L
REVERSE
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DDRB_VREF trace width of20mils and space20mils(min)
L
STANDARD
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
PIR BOM & Layout 93.1.9
C466
0.1U_0402_10V6K
1
2
C486
0.1U_0402_10V6K
1
2
C470
0.1U_0402_10V6K
1
2
C469
0.1U_0402_10V6K
1
2
RP73
56 _0804_8P4R_5%
18273645
R474
33_0402_5%
12
C472
0.1U_0402_10V6K
1
2
C495
0.1U_0402_10V6K
1
2
C458
0.1U_0402_10V6K
1
2
RP91
56 _0804_8P4R_5%
18273645
RP89
33_0404_4P2R_5%
1423
RP70
56 _0804_8P4R_5%
18273645
C494
0.1U_0402_10V6K
1
2
RP82
56 _0804_8P4R_5%
18273645
RP68
56 _0804_8P4R_5%
1 82 73 64 5
RP65
56 _0804_8P4R_5%
1 82 73 64 5
C460
0.1U_0402_10V6K
1
2
C476
0.1U_0402_10V6K
1
2
C484
0.1U_0402_10V6K
1
2
C463
0.1U_0402_10V6K
1
2
RP78
33_0804_8P4R_5%
18273645
C490
4.7U_0805_16V6K
1
2
RP85
56 _0804_8P4R_5%
18273645
C473
0.1U_0402_10V6K
1
2
C474
0.1U_0402_10V6K
1
2
C496
0.1U_0402_10V6K
1
2
C471
0.1U_0402_10V6K
1
2
C465
0.1U_0402_10V6K
1
2
RP84
33_0804_8P4R_5%
18273645
C467
0.1U_0402_10V6K
1
2
C464
0.1U_0402_10V6K
1
2
RP88
56 _0804_8P4R_5%
18273645
RP79
56 _0804_8P4R_5%
18273645
RP92
33_0404_4P2R_5%
1423
C455
0.1U_0402_10V6K
1
2
C493
0.1U_0402_10V6K
1
2
C461
0.1U_0402_10V6K
1
2
C483
0.1U_0402_10V6K
1
2
RP81
33_0804_8P4R_5%
18273645
C452
0.1U_0402_10V6K
1
2
C462
0.1U_0402_10V6K
1
2
RP67
56 _0804_8P4R_5%
18273645
RP75
33_0804_8P4R_5%
18273645
+ C491
@100U_D2_10M_R45
1
2
C468
0.1U_0402_10V6K
1
2
C489
4.7U_0805_16V6K
1
2
RP72
33_0404_4P2R_5%
1423
+ C492
100U_D2_10M_R45
1
2
C457
0.1U_0402_10V6K
1
2
RP90
56 _0804_8P4R_5%
1 82 73 64 5
RP80
56 _0804_8P4R_5%
1 82 73 64 5
RP86
56 _0804_8P4R_5%
1 82 73 64 5
C478
0.1U_0402_10V6K
1
2
C459
0.1U_0402_10V6K
1
2
C497
4.7U_0805_16V6K
1
2
C479
0.1U_0402_10V6K
1
2
C475
0.1U_0402_10V6K
1
2
RP71
56 _0804_8P4R_5%
1 82 73 64 5
C482
0.1U_0402_10V6K
1
2
RP83
56 _0804_8P4R_5%
1 82 73 64 5
RP87
33_0404_4P2R_5%
1423
C481
0.1U_0402_10V6K
1
2
C456
0.1U_0402_10V6K
1
2
C451
0.1U_0402_10V6K
1
2
RP76
56 _0804_8P4R_5%
18273645
C480
0.1U_0402_10V6K
1
2
R1180
@100_0402_5%
1 2
C453
0.1U_0402_10V6K
1
2
RP74
56 _0804_8P4R_5%
1 82 73 64 5
C488
0.1U_0402_10V6K
1
2
C485
0.1U_0402_10V6K
1
2
C454
0.1U_0402_10V6K
1
2
C487
0.1U_0402_10V6K
1
2
RP69
33_0404_4P2R_5%
1423
C477
0.1U_0402_10V6K
1
2
RP93
56 _0804_8P4R_5%
18273645
RP77
56 _0804_8P4R_5%
1 82 73 64 5
RP66
56 _0804_8P4R_5%
18273645
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
STRAP_A
STRAP_L
STRAP_F
FREQOUT
STRAP_E
AGP_AD[0..31]
STRAP_M
STRAP_O
STRAP_N
STRAP_D
STRAP_B
AGP_ST[0..2]
AGP_SBA[0..7]
AGP_CBE#[0..3]
STRAP_J
XTALIN_SSFREQOUT
STRAP_G
XTALIN
XTALIN_SS
CRT_R
TV_LUMA
AGP_REQ#
AGP_AD12
AGP_RSET
TXA0-
STRAP_E
AGP_SBA7
AGP_SBA2
AGP_AD22
AGP_AD2
CRT_HSYNC
TXBCLK+
VREFG
STRAP_J
TV_CRMA
AGP_ADSTB0
AGP_AD27
AGP_AD16
DVOMODE
STRAP_M
AGP_SBSTB#
AGP_ST0
AGP_RBF#
AGP_DEVSEL#
AGP_AD23
AGP_AD17
AGP_AD8
TXB0+
AGP_AD5
TXA2+
TXA1+
STRAP_B
TV_COMPS
AGP_SBA4
AGP_BUSY#
AGP_AD10
TXBCLK-
AGP_SBA1
AGP_PAR
AGP_CBE#3
AGP_AD15
AGP_AD1
STRAP_K
CRT_G
STRAP_A
STRAP_K
AGP_ADSTB0#
AGP_IRDY#
AGP_AD20
AGP_AD11
STRAP_O
XTALIN
AGP_DBI_HI/PIPE#
AGP_ST2
AGP_SBA3
AGP_STP#
AGP_AD29
AGP_AD19
AGP_AD4
CRT_B
AGP_DBI_LO
AGP_ST1
AGP_AD14
3VDDCCL
TXB1-
MCLK_SPREAD
STRAP_F
AGP_CBE#1AGP_CBE#0
AGP_AD18
AGP_AD9
TXB2+TXB2-
TXA1-
STRAP_D
SUSSTAT#
AGP_AD26AGP_AD25
TXACLK-
STRAP_G
SSIN
AGP_SBA0
AGP_ADSTB1
CLK_AGP_EXT_66M
AGP_CBE#2
AGP_AD31
AGP_AD0
TXA0+
STRAP_T
STRAP_N
AGP_SBA5
AGP_FRAME#
AGP_AD24
AGP_AD3
STRAP_H
3VDDCDA
TXB1+
TXACLK+
STRAP_L
AGP_ADSTB1#
AGP_GNT#
AGP_AD30
AGP_AD28
AGP_AD21
AGP_AD7
CRT_VSYNC
ENAVDD
TXB0-
STRAP_H
AGP_STOP#
TXA2-
AGP_SBSTB
AGP_SBA6
AGP_TRDY#
AGP_AD13
AGP_AD6
DRAM128M
STRAP_SSTRAP_R
SSOUT
ENBKL
STRAP_T
STRAP_R
STRAP_S
ENBKL
DRAM128M
XTALIN_SS
NB_RST_R#NB_RST#
AGP_AD[0..31]<10>
AGP_SBA[0..7]<10>
AGP_CBE#[0..3]<10>
AGP_ST[0..2]<10>
CLK_AGP_EXT_66M<24>
AGP_BUSY#<10,27>AGP_STP#<10,27>
VREF_8X_IN<10>
AGP8X_DET#<10>
TV_LUMA<11,46>
AGP_RBF#<10>
PCI_PIRQA#<10,26,31,34>
AGP_WBF#<10>
CRT_B <11,25>CRT_HSYNC <11,25>
AGP_ADSTB0<10>
AGP_REQ#<10>
3VDDCCL <11,25>
AGP_TRDY#<10>
AGP_STOP#<10>
AGP_IRDY#<10>
AGP_ADSTB1<10>
3VDDCDA <11,25>
AGP_SBSTB#<10>
TV_COMPS<11,46>
AGP_ADSTB1#<10>AGP_ADSTB0#<10>
CRT_R <11,25>
CRT_VSYNC <11,25>
AGP_DBI_HI/PIPE#<10>
AGP_PAR<10>
AGP_SBSTB<10>
AGP_DBI_LO<10>
AGP_GNT#<10>
NB_RST#<8,26>
CRT_G <11,25>
TV_CRMA<11,46>
AGP_DEVSEL#<10>
AGP_FRAME#<10>
TXACLK- <25>
TXB0+ <25>
TXBCLK- <25>
TXA0- <25>TXA0+ <25>
TXB1- <25>
TXA2- <25>
TXB1+ <25>
TXA1- <25>
TXA2+ <25>
TXB2+ <25>TXB2- <25>
TXBCLK+ <25>
TXB0- <25>
TXA1+ <25>
TXACLK+ <25>
ENAVDD <10,25>
DDC_DAT <10,25>DDC_CLK <10,25>
AGP_SUS_STAT#<27>
ENBKL <10,44>
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+1.5VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
LA-2411 0.1
ATI M10-P & M9+X (AGP BUS)
17 65, 07, 2004星期三 七月
Compal Electronics, Inc.
GPIO0
GPIO6
GPIO5
GPIO4
VGA_Disable
3.3V OSC out for W180
GPIO7
1.5V OSC out for M9+X1.2V OSC out for M10-P
ID_Disable
Rb
Divider Circuit for 1.2V/(1.5)dc XTALIN from 3.3Vdc OSC out
GPIO8
Ra
GPIO3
GPIO13
GPIO2
GPIO12
GPIO11
GPIO9
GPIO1
AGP, DAC & LVDS INTERFACE
AGP8X_DET#Low:AGP3.0
(15mil)
(25mil)
(15mil)
(15mil)
(25 mil)
SS%
(Closed to M26)
If M10+P POP 47_0603_1%If M9+P POP 137_0603_1%
Note: PLACE CLOSE TO U6 (VGA M9+X/M10-P)L
Ra 261_0603_1%
150_0402_5%150_0402_5%
180_0603_5%
M10-PM9+X
Rb
Fin>Fout>Fin-3.75%
Spread % Setting for Freq. RangeFin>Fout>Fin-1.25%0
1
Selection Table For W180
SS%
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
As close as ppossible to related pinAs close as ppossible to related pin
VGA DDR FOR CHANNELB
(25mil)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0 0 0 0 0 100 100Spreaf OFF OR Center spread +/-0.3%
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Layout note:Trace length of PCI_CLK_R + PCI_CLK_FB shouldbe less than 200 mils.
PULL DOWN FOR S3
PLACE CLOSE TO CPU SOCKET
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
High : ENE910
Low : NS591L
R967
@10K_0402_5%
12
R42
10K_0402_5%
R48
10K_0402_5%
12
R37
@10K_0402_5%
R44
10K_0402_5%
R35
@10K_0402_5%
R39
@10K_0402_5%
R59
@10K_0402_5%
R45
10K_0402_5%
R57
@10K_0402_5%
R41
10K_0402_5%
12
R54
@10K_0402_5%
R50
10K_0402_5%1
2R51
10K_0402_5%
12
R58
@10K_0402_5%
R46
10K_0402_5%
12
R953
10K_0402_5%
12
R43
10K_0402_5%
R52
10K_0402_5%
12
R55
@10K_0402_5%
R34
10K_0402_5%
12
R36
@10K_0402_5%
R38
@10K_0402_5%
R56
@10K_0402_5%
R47
@10K_0402_5%
R49
10K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IDEDA[0..15]
SD_SBA2
SD_SIOW#
PD_IRQA
PD_IOW#
SD_DACK#
SD_SBA1
SD_SIOR#
SD_SBA0
PD_DACK#
SD_SCS3#
IDESAB1IDESAB0
SD_IDERST#
HD_IDERST#
IDESAA0
HDD_LED#
CDLED#
PD_D4PD_D5
PD_A2
PD_D12
PD_A0PD_A1
PD_D14
HDD_LED#
PD_D11
PCSEL
HD_IDERST#
PD_IOR#
PD_DACK#
PD_D3
PD_IOW#
PD_D9
PD_D1
PD_D6
PD_D2
PD_CS#3
PD_D15
PD_D13
PD_CS#1
PD_D10
PD_D8
PD_IRQA
PD_IORDY
PD_D7
PD_D0
SD_DREQ
CDROM_L
SD_D9
SD_SIOW#
SD_D4
SD_IDERST#
SD_DACK#
SD_SBA2
SD_D11
SD_D3
SD_CSEL
SD_D8
SD_D2
SD_D6
SD_SIORDY
SD_D0
SD_IRQ15
SD_D12
SD_SCS3#SD_SCS1#
SD_D1SD_D14SD_D15
SD_D7
SD_SBA1
CD_AGND
SD_D13
SD_D10
SD_SIOR#
CDROM_R
SD_DREQ
SD_SBA0
SD_D5
IDEDB0
IDEDB10
IDEDB7
IDEDB2
IDEDB3
IDEDB5
IDEDB1IDEDB14
IDEDB11
IDEDB13
IDEDB15
IDEDB6
IDEDB9
IDEDB8
IDEDB12
IDEDB4
PD_D14PD_D0
PD_D1PD_D15
PD_D8PD_D6
PD_D7
SD_SIORDY
SD_SCS1#
PD_IOR#
SD_DREQ
SD_IRQ15
IDEDA14IDEDA0IDEDA15IDEDA1
IDEDA7
IDEDA6IDEDA9
IDEDA8
IDEDA3IDEDA12IDEDA2IDEDA13
PD_D2PD_D12PD_D3
PD_D9
IDEDA11
IDEDA4
PD_D11
PD_D5PD_D10
IDEDA5IDEDA10
PD_D4
PD_IORDY
PD_D13
IDEDB[0..15]
CDLED#
SD_D6
SD_D3SD_D12SD_D2SD_D13
SD_D10SD_D8SD_D7
SD_D0SD_D15SD_D1SD_D14
SD_D5SD_D9SD_D4SD_D11
PD_A0PD_A2PD_CS#3PD_A1
PD_CS#1
PD_DREQ#
PD_DREQ#
IDECS#A3IDESAA2
IDESAA1IDECS#A3<27>
IDEIOW#A<27>
IDEIRQA<27>
IDEREQA<27>
IDEDA[0..15]<27>
IDEDACK#A<27>
PCI_RST#<11,26,31,33,34,38,41,44>
IDERST_CD#<27>
IDERST_HD#<27>
IDEIOR#A<27>
IDESAA0<27>
IDESAA1<27>
IDESAA2<27>
ACT_LED# <44>
CD_AGND <36>
CDROM_R <36>CDROM_L<36>
IDECS#B3<27>
IDESAB0<27>
IDESAB2<27>
IDEIRQB<27>
IDEIOW#B<27>IDEIOR#B<27>
IDESAB1<27>
IDEREQB<27>
IDEDACK#B<27>
IDEDB[0..15]<27>
IDEIORDYA<27>
IDEIORDYB<27>
IDECS#B1<27>
IDECS#A1<27>
+5VS
+5VS
+5VS+5VS
+5VS
+5VS
+5VS
+5VS
+5VS+5VS
+5VS
+5VS
+5VS
+5VS+5VS
+3VS
+3VS
+5VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
LA-2411 0.1
HDD & CDROM Connector
30 65, 07, 2004星期三 七月
Compal Electronics, Inc.+5VCD trace to CONN W=100mils
W=100mils
HDD/CD-ROM Module
Placea caps. near CDROM CONN.
W=100mils
+5VCD trace to CONN W=100milsPlacea caps. near CDROM CONN.
Placea caps. near HDD CONN.
W=80mils
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
32 65星期 , 07, 2004三 七月MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
xD PU and PD. Close to SocketSD CLK
40mil
20mil
MS CLK
SD PWR Control
Close toCardBus Conn.
Reserve for Debug.
PCMCIA Power ControllerCardBus Socket
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
R771
24.576MHz Crystalor External Colck
MODE14.318MHz ExternalStuff
No-Stuff
40mil
10mil
GND GNDA
40mil
R736150K_0603_1%
12
C735 1U_0603_10V4Z1 2
R771 0_0402_5%1 2C751@1U_0603_10V4Z
1 2
C7501U_0603_10V4Z
1 2
R1143@10_0402_5%
12
C737 1U_0603_10V4Z1 2
R1199 0_0402_5%1 2
C73010U_0805_10V4Z
1
2
C985 4.7U_0805_10V4Z1 2
Y6 @24.576MHz_16P_3XG-24576-43E11 2
R1200 @47K_0402_5%1 2
C7200.1U_0402_16V4Z
1
2
C10180.1U_0402_16V4Z
1
2
C991 1U_0603_10V4Z1 2
R757 2.7K_0402_5%1 2
C10 27P_0402_50V8J1 2
C747
0.01U_0402_16V7K
1
2
C992 1U_0603_10V4Z1 2
C1025@22P_0402_50V8J
1
2
R749 4.7K_0402_5%1 2
C71522U_1206_10V4Z
1
2
R7622.4K_0402_5%
12
C986 4.7U_0805_10V4Z1 2
C102410U_0805_10V4Z
1
2C1023
0.1U_0402_16V4Z
1
2
C904 1U_0603_10V4Z1 2
C1026@22P_0402_50V8J
1
2
C71610U_0805_10V4Z
1
2
C7460.1U_0402_16V4Z
1
2
R120122_0402_5%12
C1021 1000P_0402_50V7K1 2
R1202 22_0402_5%12
C736 1U_0603_10V4Z1 2
C7521000P_0402_50V7K
1
2
R1205@1M_0402_5%
12
C7451U_0603_10V4Z
1
2
R1196 0_0805_5%1 2
C749 1U_0603_10V4Z1 2
R755 2.7K_0402_5%12
C10221U_0603_10V4Z
1 2
C1020 1000P_0402_50V7K1 2
U46
SI9182DH-AD_MSOP8
VIN4
SD8
VOUT 5
GND 3
SENSE or ADJ 6
ERROR7 CNOISE 1
DELAY2
R1197 0_0805_5%1 2
C9841000P_0402_50V7K
1
2
R1198 0_0805_5%1 2
R71M_0402_5%
12
C729
0.1U_0402_16V4Z
1
2
R1295 0_0402_5%12
C9900.1U_0402_16V4Z
1
2
L30KC FBM-L11-201209-221LMAT_0805
1 2
C71710U_0805_10V4Z
1
2
R761
10K_0402_5%
12
L31CHB2012U170_0805
1 2
C734 1U_0603_10V4Z1 2
C989
0.1U_0402_16V4Z1
2
R752 4.7K_0402_5%12
L29KC FBM-L11-201209-221LMAT_0805
1 2
R73751K_0603_1%
12
C1019 @0.1U_0402_16V4Z12
R751 4.7K_0402_5%1 2
R748 4.7K_0402_5%12
C973@15P_0402_50V8JC905
0.1U_0402_16V4Z1
2
U47
ALC250_LQFP48
AUX_L14
AUX_R15
JD117
JD216
LINE_IN_L23
LINE_IN_R24
CD_L18
CD_R20
CD_GND19
MIC121
MIC222
PHONE13
PC_BEEP12
LINE_OUT_L 35
LINE_OUT_R 36
MONO_OUT/VREFOUT3 37
RESET#11
SYNC10
BIT_CLK 6
SDATA_OUT5
SDATA_IN 8
XTL_IN 2
XTL_OUT 3
AFILT1 29
AFILT2 30
VREFOUT 28
VREF 27
DVD
D1
1
DVD
D2
9
AVD
D1
25
AVD
D2
38
DCVOL 32
XTLSEL46
SPDIFI/EAPD47
SPDIFO48
DVSS14DVSS27
NC 31VREFOUT2 33
VAUX 34SCK 43SDA 44
NC45
NC 40AVSS1 26AVSS2 42
HP_OUT_L 39
HP_OUT_R 41
C10171U_0603_10V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
MONO_IN1
EAPD
SHUTDOWN#
NBA_PLUGVOL_AMP
NBA_PLUG
LEFT_2
HP_L
LINE_OUTL
HP_R
RIGHT_2LINE_OUTR
SPKL+SPKR+
BYPASS
SPKR-SPKL-
VOL_AMP
NBA_PLUG
INTSPK_R1-2
INTSPK_L1-2
INTSPK_R1-3
INTSPK_L1-3
INTSPK_R1-4
INTSPK_L1-4SPKL+
SPKR+
LINE_IN_L-1
LINE_IN_R-1INT_MIC
LINE_IN_L-1
LINE_IN_R-1
SPKL+SPKL-SPKR+SPKR-
PCM_SPK#<31>
SB_SPKR<27>
BEEP#<44>
NBA_PLUG<36>
LINE_OUTR<36>
LINE_OUTL<36>
EAPD <36>
MONO_IN <36>
MIC_IN<36>
LINE_IN_L<36>
LINE_IN_R<36>
+3VALW
+3VALW
+3VALW
+VDDA
+3VALW
+3VALW
+5VAMP
+5VAMP
+5VAMP
+5VAMP
+AUD_VREF
Title
Size Document Number Rev
Date: Sheet o f
LA-2411 0.1
AMP & Audio Jack
37 65, 07, 2004星期三 七月
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
W=40Mil
(0.65V -> 10dB )
LOW
HIGH
PIN 5,23 ACTIVE
PIN 6,20 ACTIVEPin 2
Internal MIC
EXT.MICPHONEJACK
R739
560_0402_5%
1 2
R733
10K_0402_1%
12
C712
1U_0603_10V6K
12
C1012
0.47U_0603_16V4Z
1
2C8950.47U_0603_16V4Z1 2
L28FBM-11-160808-700T_0603
1 2
C1063220P_0402_50V7K
1
2
R973100K_0402_5%
12
L68 FBM-11-160808-700T_0603
1 2
R741
560_0402_5%
1 2
U45C
SN74LVC14APWLE_TSSOP14
O 6I5
P14
G7
C714 1U_0603_10V6K12
C891
0.1U_0402_16V4Z
1
2
JP51
AMP_1-1470184-2
12
3
4
5
6
C1132@220P_0402_50V7K
1
2
+
C1058150U_D2_6.3VM
1 2
R974 100K_0402_5%1 2
L65 FBM-11-160808-700T_0603
1 2
R124147_0402_5%
1 2
C
BE
Q56
2SC2411K_SOT23
1
2
3
C722
1U_0603_10V6K
12
JP50
AMP_1-1470184-2
12
3
4
5
6
R74210K_0402
12
C7744.7U_0805_10V4Z
1
2
R124047_0402_5%
1 2
C1011
1U_0603_10V4Z 1
2
R732
560_0402_5%
1 2
C1131
@220P_0402_50V7K
1
2
D46
RB751V_SOD323
21
C257220P_0402_50V7K
1
2
R1063
39K_0603_1%1 2
U18B
SN74LVC32APWLE_TSSOP14
A4
B5 O 6
P14
G7 L27
FBM-11-160808-700T_0603
1 2
C1014 0.1U_0402_16V4Z1 2
R729
@100K_0402_1%
12
C713
0.22U_0603_10V7K
1
2
R12452.2K_0402_5%
12
L24FBM-11-160808-700T_0603
1 2
C979
0.1U_0402_10V6K
1
2
C773
0.1U_0402_16V4Z
1
2
C719
1U_0603_25V4Z
1 2
C8940.47U_0603_16V4Z
1 2
+
C1059150U_D2_6.3VM
1 2
R738
10K_0402_5%
1 2
U52
TPA0232PWP_TSSOP24
HP/LINE#2VOLUME3LOUT+4ROUT+21LLINEIN5
LHPIN6RHPIN20
PVDD7PVDD18VDD19
RLINEIN23
GND 24GND 13GND 12GND 1
RIN 8LIN 10ROUT- 16LOUT- 9BYPASS 11PC-BEEP 14SE/BTL# 15
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
40 65星期 , 07, 2004三 七月MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Compal Electronics, Inc.
(GRN) (GRN) (GRN)(GRN)
D62
HT-170UYG-DT GRN_0805
21 D60
HT-170UYG-DT GRN_0805
21
D65
HT-170UYG-DT GRN_0805
21
R889360_0603_5%
12
R885360_0603_5%
12
R925360_0603_5%
12
R890360_0603_5%
12
D63
HT-170UYG-DT GRN_0805
21
R923360_0603_5%
12
JP53
ACES_85201-2005
11223344556677889910101111121213131414
161617171818
1515
2020 1919
R882360_0603_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
WLAN_PME#
PCI_AD18
PCI_PIRQD#
PCI_AD18
CLK_PCI_MINIPCI_AD22
CLK_PCI_MINI
PCI_PIRQC#
WL_ON
PCI_AD14<26,31,33,34>
PCI_GNT#3 <26>
PCI_CLKRUN#<26,33,38,44>
PCI_AD18 <26,31,33,34>
PCI_PERR#<26,31,33,34>
PCI_AD16 <26,31,33,34>
PCI_AD3<26,31,33,34>
PCI_AD29<26,31,33,34>
PCI_AD21<26,31,33,34>
PCI_PAR <26,31,33,34>PCI_AD20 <26,31,33,34>
PCI_PIRQD#<26,33>
PCI_AD15 <26,31,33,34>
PCI_AD17<26,31,33,34>
PCI_AD5<26,31,33,34>
PCI_CBE#2<26,31,33,34>
PCI_SERR#<26,31,33>
PCI_AD11 <26,31,33,34>
PCI_AD23<26,31,33,34>
PCI_AD8<26,31,33,34>
WLAN_PME# <33,34,44,45>
PCI_AD28 <26,31,33,34>
PCI_STOP# <26,31,33,34>
PCI_AD2 <26,31,33,34>
PCI_AD12<26,31,33,34>
PCI_AD26 <26,29,31,33,34>
PCI_AD9 <26,31,33,34>
PCI_AD31<26,31,33,34>
PCI_RST# <11,26,30,31,33,34,38,44>
PCI_AD30 <26,31,33,34>
PCI_AD7<26,31,33,34>
PCI_AD25<26,31,33,34>
PCI_AD10<26,31,33,34>
PCI_REQ#3<26>
PCI_IRDY#<26,31,33,34>
PCI_AD6 <26,31,33,34>
PCI_AD24 <26,31,33,34>
PCI_CBE#0 <26,31,33,34>
PCI_AD0 <26,31,33,34>
PCI_DEVSEL# <26,31,33,34>
PCI_FRAME# <26,31,33,34>
PCI_CBE#3<26,31,33,34>
PCI_GNT#4 <26>PCI_REQ#4<26>
PCI_TRDY# <26,31,33,34>
PCI_AD27<26,31,33,34>
PCI_AD13 <26,31,33,34>
PCI_AD22 <26,31,33,34>PCI_AD19<26,31,33,34>
PCI_AD4 <26,31,33,34>
PCI_AD1<26,31,33,34>
CLK_PCI_MINI<26>
PCI_CBE#1<26,31,33,34>
WL_ON<44>
WLAN_BT_CLK <42>
WLAN_BT_DATA<42>
PCI_PIRQC# <26>
+5VS
+3VS
+3V
+5VS
+5VS
+3V
+3V
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
LA-2411 0.1
Mini PCI Slot
41 65, 07, 2004星期三 七月
Compal Electronics, Inc.
W=40mils
W=40mils
LAN RESERVED LAN RESERVEDTIP
W=40mils
W=40mils
IDSEL : AD18
RING
W=30mils
W=30mils
W=30mils
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Internet ButtonConsole/E-MAIL Button USER Button1 USER Button 2
(60mil)
Vishay populate two 4.7 Ohm resistorAgilent populate one 4.7 Ohm resistor
SD/MODE: SHUTDOWN MODE, HIGH ACTIVEMODE: HIGH/LOW SPEED SELECT
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
For EC Tools
I/O Address
SHBM(KBA5)=1: Enable shared memory with host BIOS
0
1
0
4E
Reserved
ENV1 (KBA1)
0
ENV0 (KBA0) TRIS (KBA4)
(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
11
PROG0
2E 2F
4F
DEV 0
0
Data
OBD 0
1
Index
IRE
TRIS(KBA4)=1: While in IRE and OBD, float all the signals for clip-on ISE use
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
R188
75_0402_5%
12
D20
@DAN217_SOT23
2 31
U32E
SN74LVC14APWLE_TSSOP14
O 10I11
P14
G7
R603
330K_0603_5%1 2
C111
@68P_0402_50V8K
1
2
L7 CHB1608B121_06031 2
R1106
330K_0402_5%1 2
R610
47K_0402_5%
12
R1107
1K_0402_5%
12
R608
1K_0402_5%
12
U18D
SN74LVC32APWLE_TSSOP14
A12
B13 O 11
P14
G7
L8 CHB1608B121_06031 2
R190
75_0402_5%
12
U32D
SN74LVC14APWLE_TSSOP14
O 8I9
P14
G7
G
D
S
Q110
@2N7002_SOT23
2
13
R189
75_0402_5%
12
C110
@68P_0402_50V8K
1
2
G
D
S
Q52
2N7002_SOT23
2
13
R605
1M_0402_5%1
2
U32B
SN74LVC14APWLE_TSSOP14
O 4I3
P14
G7
U32C
SN74LVC14APWLE_TSSOP14
O 6I5
P14
G7
C115
@68P_0402_50V8K
1
2
C606
0.1U_0402_16V7K
1
2
R601
10K_0402_5%
12
R606
10K_0402_5%
12
D19
@DAN217_SOT23
2 31
R604 47_0603_5%1 2
L4 CHB1608B121_06031 2
C607
0.47U_0603_10V7K
1
2
G
D
S
Q111
@2N7002_SOT23
2
13
C114
@68P_0402_50V8K
1
2
C112
@68P_0402_50V8K
1
2
C113@68P_0402_50V8K
1
2
JP7
SUYIN_35138S-07T1-DF
1234567
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SYSON
SUSP SUSP
SUSP
SUSP
SYSON#
SUSPSUSP
SUSP
SYSON#
SYSON# SUSP
SUSP SUSP
SUSP
SYSON#
SUSP SYSON# SYSON#SYSON#
SUSP#<44,45>
SUSP<46,53>
SYSON<44>
SYSON#<35>
+2.5VALW
+3VALW
+1.8VS
+2.5V
+5VALW
+2.5VS
+5VS
+12VALW
+5VALW
+3VS
+2.5VS
+5VALW
+3VS +5VS+1.25VS
+12VALW
+2.5VALW
+3V+3VALW
+5V+5VALW
+12VALW
+12VALW +12VALW
+12VALW
+1.5VSP +1.5VS+12VALW
+1.2VS_VGA+2.5V+5V+1.5VS +3V
Title
Size Document Number Rev
Date: Sheet o f
LA-2411 0.1
DC/DC Circuits
47 65, 07, 2004星期三 七月
Compal Electronics, Inc.
+3VALW to +3VS Transfer
+2.5VALW to +2.5V Transfer
Discharge circuit
+5VALW to +5VS Transfer
+2.5V to +2.5VS Transfer
+3VALW to +3V Transfer
+5VALW to +5V Transfer
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
(6A,240mils ,Via NO.= 12)
+1.5VSP to +1.5VS Transfer
Place close to PJP4L(0.5A(VGA)+0.83A(VGA_RAM)+0.14A(SB)=1.5A,60mils,)
G
D
S
Q39
2N7002 1N_SOT23
2
13
C350
10U_0805_6.3V6M
1
2
U23
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
C959
10U_0805_6.3V6M
1
2R362
100K_0402_5%1
2
R1101
68K_0402_5%
12
C346
10U_0805_6.3V6M
1
2
G
D
S
Q43
2N7002 1N_SOT23
2
13
R1102
470_0402_5%
12
R1094
470_0402_5%
12
G
D
S
Q41
2N7002 1N_SOT23
2
13
G
D
S
Q382N7002 1N_SOT23
2
13
G
D
S
Q40
2N7002 1N_SOT23
2
13
R369
10K_0402_5%
12
R376
470_0402_5%
12
C347
0.1U_0402_10V6K
1
2
C355
10U_0805_6.3V6M
1
2
G
D
S
Q322N7002 1N_SOT23
2
13
U56
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
C627
0.1U_0402_10V6K
1
2
G
D
S
Q102
2N7002 1N_SOT23
21
3
U24
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
C357
10U_0805_6.3V6M
1
2
G
D
S
Q109
2N7002 1N_SOT23
2
13
C342
10U_0805_6.3V6M
1
2
R373
10K_0402_5%
12
R363
95.3K_0603_1%
12
C344
10U_0805_6.3V6M
1
2
G
D
S
Q42
2N7002 1N_SOT23
2
13
G
D
S
Q732N7002 1N_SOT23
2
13
R902
95.3K_0603_1%
12
G
D
S
Q742N7002 1N_SOT23
2
13
C844
0.1U_0402_10V6K
1
2
C358
0.1U_0402_10V6K
1
2
U25
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
U22
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
C352
0.1U_0402_10V6K
1
2
R372
470_0402_5%
12
R1095
470_0402_5%
12
C625
0.1U_0402_10V6K
1
2
C359
10U_0805_6.3V6M
1
2
C356
0.1U_0402_10V6K
1
2
R904
47K_0402_5%
12
C354
0.1U_0402_10V6K
1
2
C360
0.1U_0402_10V6K
1
2
R375
470_0402_5%
12
C341
10U_0805_6.3V6M
1
2
U26
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
C353
10U_0805_6.3V6M
1
2
C960
0.1U_0402_10V6K
1
2
C343
0.1U_0402_10V6K
1
2
G
D
S
Q115
2N7002 1N_SOT23
2
13
G
D
S
Q36
2N7002 1N_SOT23
2
13
G
D
S
Q103
2N7002 1N_SOT23
2
13
R374
470_0402_5%
12
C351
10U_0805_6.3V6M
1
2
G
D
S
Q762N7002 1N_SOT23
2
13
R901
6.8K_0402_5%1
2
C626
10U_0805_6.3V6M
1
2
C961
10U_0805_6.3V6M
1
2
U36
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
C962
0.1U_0402_10V6K
1
2
R378
470_0402_5%
12
C348
0.1U_0402_10V6K
1
2
G
D
S
Q752N7002 1N_SOT23
2
13
R377
470_0402_5%
12
R1116
470_0402_5%
12
G
D
S
Q312N7002 1N_SOT23
2
13
C345
0.1U_0402_10V6K
1
2
R903
100K_0402_5%
12
G
D
S
Q108
2N7002 1N_SOT232
13
C624
10U_0805_6.3V6M
1
2
G
D
S
Q342N7002 1N_SOT23
2
13
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
ADPIN
PACIN
PACIN
N2
CHGRTCP
N3
ACIN <27,46,53>
PACIN <52>
MAINPWON<7,51,53>
DCSRD<52>
EC_PWR_ON#<45>
DC_IN
VL B+
DC_IN DC_IN
VS
VL
VS
ADPIN
+5VALW
RTCVREF
RTCVREF
DC_IN
BATT+
CHGRTC
B+
VS
Title
Size Document Number Rev
Date: Sheet o f
0.1
Detector
48 65, 07, 2004星期三 七月
Compal Electronics, Inc.
Detector
Vin Detector
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTYOF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT ASAUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NORTHE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
INC.
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
BMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
PC
8122
00P_
0402
_50V
7K
12
PR11416.9K_0603_1%
12
PR1050_0603_5%
1 2
PD21
SKS10-04AT_TSMA 2
1
PR1020_0603_5%
12
PR236
0_0603_5%12
PR248
@0_0402_5%1 2
PC
99
0.22
U_0
603_
16V7
K
12
PJP24JUMP_43X118
11 2 2
+
PC93220U_D2_4VM
1
2
PJP22JUMP_43X118
11 2 2
PR11515.4K_0603_1%
12
PL9
4.7U_SPC-1204P4R7_5.7A_20%
1 2
PR
117
100K
_060
3_1%
12
PU7
MAX1845EEI_QSOP28
OUT2 15
BST2 19
FB2 14
CS2 16
VDD 21
UVP
9
SKIP
6
V+4
GN
D23
ON111
DH126
LX127
ILIM2 13
DL124
VCC
22
PGOOD 7
FB12 ON2 12
ILIM1 3
OVP
8
REF
10
LX2 17DL2 20
TON 5
CS128
BST125
DH2 18
OUT11
PC
211
@10
0P_0
402_
50V8
K
12
PC
8522
00P_
0402
_50V
7K
12
PC
874.
7U_1
206_
25V6
K
12
PJP4JUMP_43X118
11 2 2
PC844.7U_1206_25V6K
12
PR2490_0402_5%
12
PR116100K_0603_1%
12
PJP6
JUMP_43X39
11 2 2
PQ17SI4800DY_SO8
365 7 8
2
4
1
PC
183
4.7U
_120
6_25
V6K
12
PQ18SI4810DY_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC890.1U_0805_25V7K
12
PD
23SK
S10-
04AT
_TSM
A
21
PJP10JUMP_43X118
11 2 2
PC
184
4.7U
_120
6_25
V6K
12
PC
944.
7U_0
805_
6.3V
6K
12
PD20DAP202U_SOT323
1
23
PC
834.
7U_1
206_
25V6
K
12
PR1080_0603_5%
1 2PQ19SI4810DY_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PJP2JUMP_43X118
11 2 2
PR1030_0603_5%
12
+PC
9522
0U_D
2_4V
M
1
2
PR
268
0_06
03_5
%
12
PJP21JUMP_43X118
11 2 2
PR1070_0603_5%
1 2
PJP8
JUMP_43X39
11 2 2
PR
267
@0_
0603
_5%1
2
PL8
4.7U_SPC-1204P4R7_5.7A_20%
12
PJP5JUMP_43X118
11 2 2
PC
964.
7U_0
805_
6.3V
6K
12
PC920.1U_0805_25V7K
12
PC884.7U_0805_10V4Z
12
PR1060_0603_5%
1 2PC
91
1U_0
805_
16V7
K
12P
C90
0.1U
_080
5_25
V7K
12
PJP1JUMP_43X118
11 2 2
PJP3JUMP_43X118
11 2 2
PR104
20_0603_1%
12
PQ16
SI4800DY_SO8
36 578
2
4
1
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
VR_ON<46>
VID_PWRGD<5,56>
SUSP37,42
SUSP
+VCCVIDP+3VALWP
+3VS +1.8VSP
+3VALW
+1.25VSP
+2.5V
+1.2VS_VGA
+5VALW
Title
Size Document Number Rev
Date: Sheet o f0.1
VGA/1.8V/VCCVID/1.25VCompal Electronics, Inc.
53 65, 07, 2004星期三 七月BDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1. When mode control signal ishigh/ low, the VR will operate toNorthwood/ Prescott load line. 2. VID5(12.5) should be pulledhigh, when the VR operates toNothwood load line.
change to correct layout pad on PU7, PU8, PU9, PU10, PU11, PU16 and PQ24
54,55, 56,57 03/25/2003 Compal
DPRSLPVR56 03/25/2003Reserve two resistors for voltage of Deep-sleeper mode Reserver PR231, PR232, PR233, PR234
for deeper-sleeper mode voltage setting
03/25/2003 Reserve a jumper for power consumption measurement56 CPU VR-Cont.
4
Add PJP14
57 Compal Change Netname of +5VS_CORE
5 51 RTC charger Add PR230
wrong layout pad
wrong layout pad
Compal
Compal
CPU VR-Cont. 03/25/2003 Change the netname +5VS_CORE for powerconsumption measurement
03/25/2003 Compal use two resistors for RTC charger protection
0.2
0.2
0.2
6 re-located both PL10 and PQ21, PQ23 as well as 1.2VS_VGA related power circitry
55 1.2VS_VGA 03/25/2003 Compal re-layout 1.2V_VGA requested by ME
7 55 1.2VS_VGA 03/26/2003 Compal Reserve a jumper for power consumption measurement Add PJP15
0.2
0.2
8 55 +1.25VSP 03/26/2003 Compal Change power time-sequence of 1.25VSP input power Change VD, and VDD of PU16 from +2.5VALWPto +2.5VS; Connect PR235.2 to +2.5VSadd a resistor PR235 for Stand/By pin for test
0.2
9 03/27/2003 Compal Add PR237, PR238 for force PWM function control, and add PR236 for SUSP# signal
54 +1.5VALWP Reserve Force PWM function of 1.5V/2.5V and add a PR236 for SUSP# signal 0.2
1
1
2
2
3
3
4
4
5
5
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o fLA-2411 0.1
H/W2 EE Dept. PIR SHEET(1)
57 65, 07, 2004星期三 七月
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
----PLEASE SEE NEXT PAGE
BHR60 from DB-1 to DB-2 STEP LA-1811 REV:0.1 -> 0.2 Modify <92.03.17.~92.03.24. >
-Add U53(SI9185),C913,R1023,C912,C914 and related net . (Modify CKT,BOM&Layout)1.Add an independent power source for VGA chip because of ATI request . <Page 12> 92.03.17.
6.Modify the USB2.0 related for Compal ATI/NEC Dual Layout request . <Page 27,44> 92.03.21.
5.Modify the MiniPCI and BlueTooth conn related schematic for Customer request . <Page 43,44> 92.03.21.-Add R1083,R1084,R1085(@0_0402_5%) . (Modify CKT&Layout)-Change R300 from 100_0402_5% to @100_0402_5% . (Modify CKT&BOM)
-Change R976,R977,R978,R979,R982,R983 from 0_0402_5% to ATI@0_0402_5% and the net . (Modify CKT,BOM&Layout)
-Change R1083,R1084 from @0_0402_5% to 100_0402_5% . (Modify CKT&BOM)-Add C957(10U_0805_10V3M),C958(0.1U_0402_10V6K) . (Modify CKT,BOM&Layout)
12. Del Via Hole on schematic for ME modify . <Page 41> 92.03.24.-Del H15(H_C374D295),H29(H_C197D91) . (Modify CKT,BOM&Layout)
7.Add De-coupling capacitor for AGP power pins on RC300M and VGA chip because of ATI request . <Page 10> 92.03.21.
10. Modify the ON1 related to speed up the power sequence for ATI request . <Page 48,54> 92.03.23.
8. Reserve the SMBus1/2 swap Resistors for ATI request . <Page 27> 92.03.23.-Add RP150(0_0404_4P2R_5%) . (Modify CKT,BOM&Layout)
-Change R1010 from @0_0603_5% to 0_0603_5%;R1011 from 0_0603_5% to @0_0603_5%;Q15 from 2SC2411K_SOT23 to @2SC2411K_SOT23;R145 from 4.7K_0402_5% to @4.7K_0402_5%;R146 from @4.7K_0402_5% to 4.7K_0402_5%;R967 from @10K_0402_5% to 10K_0402_5%;R833 from @0_0402_5% to 0_0402_5% . (Modify CKT&BOM)
11. Modify power source CAP.'s value by Brian . <Page 26,49> 92.03.24.
-Change R972 from 100K_0402_5% to @100K_0402_5% . (Modify CKT&BOM)
16.Modify the schematic H_BOOTSELECT related by Power Team . <Page 04> 92.03.25.-Add Q106(2SC2411K_SC59),Q107(MMBT3904_SOT23),R1099,R1100(47K_0402_5%) . (Modify CKT,BOM&Layout)-Change R899 from 0_0402_5% to 22K_0402_5%,R900 from @0_0402_5% to 100K_0402_5% . (Modify CKT&BOM)
17.Add a power transfer circuit to fix +1.5VS leakage issue . <Page 49> 92.03.25.-Add U56(SI4800DY_SO8),Q108(2N7002 1N_SOT23),R1101(100K_0402_5%),C960(0.1U_0402_10V6K),C961(10U_1206_6.3V6M),C962(3900P_0402_50V7K) . (Modify CKT,BOM&Layout)
-Change C347,C360,C962 from 3900P_0402_50V7K to 0.1U_0402_10V6K;C356,C348 from 2200P_0402_25V7K to 0.1U_0402_10V6K;C627,C844 from 1000P_0402_50V7K to 0.1U_0402_10V6K . (Modify CKT&BOM)
18. Modify power source Resistor and CAP.'s value for power sequence . <Page 49> 92.03.26.
-Change R903,R362 from 100K_0402_5% to 91K_0402_5% . (Modify CKT&BOM)-Change R902,R363 from 100K_0402_5% to 95.3K_0603_1% . (Modify CKT,BOM&Layout)
19. Modify the ON1 related to speed up the power sequence for ATI request by Brian/James/CT . <Page 48,54> 92.03.26.-Del R1096,R1097(10K_0402_5%),Q1043(2N7002 1N_SOT23),Q105(DTC124EK_SC59) . (Modify CKT,BOM&Layout)
20. Add the power source +3VS discharge circuit by Brian . <Page 49> 92.03.26.-Change Q42 from @2N7002 1N_SOT23 to 2N7002 1N_SOT23 . (Modify CKT&BOM)
21. Change the Resistor's value for ATI recommend . <Page 17 > 92.03.26.-Change R264 from 169_0603_1% to 2N7002 1N_SOT23 . (Modify CKT&BOM)
23. Add the power source +3V discharge circuit for ATI request . <Page 49> 92.03.27.-Add R1102(470_0402_5%),Q109(2N7002 1N_SOT23) . (Modify CKT,BOM&Layout)
22. Correct material layout footprint and pin define . <Page 26,34 > 92.03.26.-Change Y1,Y3 PCB Footprint and JP32 pin define . (Modify CKT&Layout)
24. Change the power sequence related part's power source by Brian . <Page 5,37,48> 92.03.27.-Change U32's power source from +3VS to +3VALW . (Modify CKT&Layout)
25. Modify the power sequence related schematic for timing by Brian . <Page 48> 92.03.27.-Change R605 from 1M_0402_5% to @1M_0402_5%;C606 from 1U_0603_10V6K to @1U_0603_10V6K . (Modify CKT&BOM)-Add Q110(2N7002_SOT23) . (Modify CKT,BOM&Layout)
26. Modify the SPDIF related schematic for Customer request . <Page 37,41> 92.03.28.-Add R1103(0_0402_5%),C963(0.01U_0402_50V7K) . (Modify CKT,BOM&Layout)
27. Modify the NEC USB2.0 Controller Chip related schematic for Customer request . <Page 36> 92.03.28.-Add Y7(30MHZ_30PPM),R1105(100_0402_5%),C964(12P_0402_50V8J),C965(10P_0402_50V8K) . (Modify CKT,BOM&Layout)-Add R1104(@0_0402_5%) . (Modify CKT&Layout)-Change R1024 from 0_0402_5% to @0_0402_5% . (Modify CKT&BOM)
28. Update the material's Layout Footprint for error correction . <Page 36> 92.03.28.-Update JP29,JP14,SW1,SW3~SW8,JP40,Q65 . (Modify CKT&Layout)
29. Modify the related schematic after Brian Review <Page 7,24,26,29,30,39,43,45> 92.03.31.-Del R288(56_0402_5%) . (Modify CKT,BOM&Layout)
30. Modify the related schematic after Layout check <Page 44> 92.03.31.-Modify JP16(RJ11 Conn.).5 and JP16.6 from GND to NC . (Modify CKT&Layout)
31. Update the material's Layout Footprint for error correction . <Page 41> 92.04.02.-Update JP40 . (Modify CKT&Layout)
32. Modify the schematic for cost down . <Page 10,12,26,37,> 92.04.04.-Change to @(R1005,D79~D82,U53,C912,C913,R1023,Q98,R769,R771,) . (Modify CKT&BOM)
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Title
Size Document Number Rev
Date: Sheet o fLA-2411 0.1
H/W2 EE Dept. PIR SHEET(2)
58 65, 07, 2004星期三 七月
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
----PLEASE SEE NEXT PAGE
BHR60 from DB-2 to SI-1 STEP LA-1811 REV:0.3 -> 0.4 EE Modify <92.04.08.~92.04.18. >
2.LED Circuit to Power Button(PRES)modify . <Page 42, Page 46> 92.04.09.-Move Q66.1-R883-D56 -> Q62.1-R883-D56(PRES). (Modify EE Circuit)-Rename Q62.2 net PWR_BACK# change to PWR_ACTIVE# connect to EC U15.119. (Modify EE Circuit)
3.Add +1.2VS_VGA Discharge Circuit. <Page 49> 92.04.09.-Add +1.2VS_VGA Discharge Circuit(R1116 , Q115 to SUSP). (Modify EE Circuit)
BHR60 from DB-2 to SI-1 STEP LA-1811 REV:0.3 -> 0.4 Layout Modify <92.04.08.~92.04.18. >
4.Add 3VDDCDA & 3VDDCCL pull hing CRT_VCC circuit. <Page 25> 92.04.09.-Add Q13.1-R1117 to +CRT_VCC & Q14.1-R1118 to CRT_VCC. (Modify EE Circuit)
5.PCMCIA U37 NET S1_CE2# & S1_CE1# Sweep. <Page 31> 92.04.09.
6. MDC(JP17) Net AC97_SData_In1/AC97_SData_In2 to AC97_Data_In. <Page 44> 92.04.10.-Update BOM add R326. (Modify EE Circuit)
7. Change NB DDR Bus Net for basic on ATI NB DDR Bus Layout rule. <Page 9, 14, 15, 16> 92.04.11.-Add R1122(DDRA_CKE_R3), R1121(DDRA_CKE_R2). (Modify EE Circuit)-Del R399(DDRA_CS#0), R400(DDRA_CS#2). (Modify EE Circuit)
8. Check BOM USB OUVUR R893&R895 470K change to 330K. <Page 44> 92.04.12.
9. Add SUSP# pull Down. <Page 46> 92.04.14.-Add EC U15.115 to SUSP# pull Down @R1123 to GND. (Modify EE Circuit)
10. Add CPUCLK_STP# pull High Circuit. <Page 26, 5> 92.04.14.-BOM Q113 -> @ , Add R1124 to Q113.1 & Q113.3. (Modify EE Circuit)-Add CPUCLK_STP# pull High @R1126 to +3VS . (Modify EE Circuit)
12. SIO Circuit All Power Plan +3V -> +3VS. <Page 39> 92.04.15.
-Add CPUCLK_STP# serial resistor R1125 to Q96.2. (Modify EE Circuit)
5. Change BOM & Layout LED D57 Footprint . <Page 42> 92.04.15.-Change D57 HSMG-C170 to LED_12-21SYGC_S530-E1_TR8. (Modify Layout)
13. Add NEC USB Corstralor U54.P19(SRMOD) pull Low. <Page 36> 92.04.16.-Add USB Constralor U54.P19(SRMOD) pull Low R1127 to GND. (Modify EE Circuit)-Update BOM R1046 -> @. (Modify EE Circuit)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
----PLEASE SEE NEXT PAGE
BHR60 from DB-2 to SI-1 STEP LA-1811 REV:0.3 -> 0.4 EE Modify <92.04.08.~92.04.18. >
BHR60 from DB-2 to SI-1 STEP LA-1811 REV:0.3 -> 0.4 Layout Modify <92.04.08.~92.04.18. >
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
BHR60 from SI-1 to DB(15.4") LA-1811 REV:0.4 -> 0.5 HW PIR <92.05.07.~92.05.30. >
0 .5Add Nets: NMCSA1# and NMCSB1#18, 19,22, 236 Add CS1# for Hynix 8Mx32 VGA DRAM
1 Prevent CPUCLK_STP# abnormal state happened 5 Change R1125 from 4.7K to 12K
26 Delete R1126
29 Change R40 from 10K to 1K
7 Change the power of U8 from +3VS to +3VALW
M.B. Ver.
0 .5
0 .5Prevent power leakage
Power saving 7 Change the power of Fans from +5VALW to +5VS 0 .5
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3
Reason for change PAGE Modify ListFixed IssueItem
ATI recommendation 8 Add C974 0 .54
Add VGA DRAM size detect function5 1 7 Add R1149 for 128MB VGA DRAM (un-populate for 64MB) 0 .5
7 Change M9+X VGA_CORE from +1.5VS to individual power source 2 1 Delete JOPEN3 0 .5
8 Delete useless components
2 5 Delete C96
0 .5
25 Change R619.1 and R622.1 net from +5VS to CRT_VCC 0 .5Solve power leakage from CRT9
2610 Prevent DPRSLPVR abnormal state happened Change R1001 from 100K to 47K, R1002 from 0 to 47K 0 .5
11 Using rechargeable RTC battery for HP's request Delete D66, D71 and D72; Add D91 (BAS40-04, the same as LA-1761 D30); ChangeBATT1 from CR1220 to ML1220 (the same as LA-1761 BATT1)
0 .52 6
12 Prevent +5V drop while plug SPR for HP's request 4 1 Change JP40.3, C798.1, C800.1 and C801.1 net from +5V to USB_VCCA; Change C798from 22u to @10u; Change C801 from 1000p to @1000p
0 .5
5 Delete R538
13 Enhance brightness of blue LEDs 0 .5Delete Q67, R883, R884, R942 and R943; Add Q117 and R1146; Change R881, R882,R885, R888, R889, R890, R925 and R1136 to 220
42, 45
Change JP42.2 from BATLED_0 to BATLED_0#; Change JP42.7 from N.C. to +5VALW;Change JP42.12 from PAV_GND to PAV_LEDVCC; Change JP42.13 from PMLED_1 toPMLED_1#; Change JP42.14 from PAV_GND to +5VS; Change JP45.7 from PRES_GND toPRES_LEDVCC; Change JP45.8 from PRES_GND to +5VS
44
14 Solve PWR_ACTIVE LED function fail issue 4 2 Change power from +3VS to +5V for PWR_ACTIVE LED (D52 and D56) 0 .5
4 6 Add R1147 and R1148; Change U15.76 net from N.C. to PWR_ACTIVE_PRES#; ChangeU15.87 net from N.C. to PRES_DETECT; Change U15.119 net from PWR_ACTIVE# toPWR_ACTIVE_PAV#
15 Solve M10 can't power up issue 4 9 Change R1101 from 100K to 56K; Change R901 from 91K to 27K 0 .5
17 Material change for ME's request 4 4 Change JP47 from ACES_88231_0200 to MOLEX_53398_0290 (the same as LA-1761 JP2) 0 .5
1 8 Using NEC USB2.0 to support BT for HP's request 4 4 Change R1082.2 net from USB3+ to USB5+; Change R1081.2 net from USB3- to USB5- 0 .5
27 Delete Q114, Add R1145
19 Increase MONO_IN voltage level 3 7 Change R738 from 2.4K to 10K 0 .5
20 Decrease Audio AMP Gain 3 8 Change R971 from 100K to @100K; Change R973 from @100K to 100K 0 .5
Update with Item23
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Title
Size Document Number Rev
Date: Sheet o fLA-2411 0.1
H/W2 EE Dept. PIR SHEET(5)
61 65, 07, 2004星期三 七月
Compal Electronics, Inc.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
BHR60 from SI-1 to DB(15.4") LA-1811 REV:0.4 -> 0.5HW PIR <92.05.07.~92.05.30. >
21 RTL8101L no need transistor for 3.3V to 2.5V anymore 3 4 Delete Q55, R944 and C668
44Change PCB Footprint from SUYIN_020167MR004SX01ZR_4P tosuyin_020167mr004s511zu_4p for JP18, JP19 and JP20
M.B. Ver.
0 .5
0 .5Connector Spec. change for ME's request
Solve Tr and Tf of H-sync/V-sync over Spec issue for high resolution CRT 25 Delete Q68, Q64, R619, R620, R621 and R612; Add U57, U58 and R1150 0 .5
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Reason for change PAGE Modify ListFixed IssueItem
Change R704 from 5.6K_0402_5% to 5.6K_0402_1%REALTEK recommendation
Delete useless components with BOM 10 Delete R574, R1086 and C952 0 .524
24 Delete R210 for UMA only
Add SB to control H_PROCHOT# for HP's request 2 6 Add Q118 and R1151 0 .525
Add components for EMI 37 Add R1152 0 .526
40 Add L65 ~ L78
Solve DOS cold-boot shunt down issue 7 Delete C256 0 .527
12 Delete U53, C912~C914, D79~D82, R954, R1010~R1012 and R1023
17 Delete Q15 and R251
20 Delete R1022
24 Delete R211 and R216
25 Delete C93~C95 and C930
26 Delete Q113, R1124 and D91; Add D93
0 .6
27 Delete RP149, RP150, R1145 and Q114
29 Delete R53
37 Delete L45, R1019, Y6, R756, C740 and C741
Add components for EMI38 37 Add L98 and L99 0 .6
38 Delete R1142
40 Add C975, C976, CP15~CP17
0 .636 To improve RTC accuracy 2 6 Change Y1 from +/-20ppm to +/-10ppm
37 Solve Cardbus controller can't reset well issue 3 1 Delete R905, R941 and C906; Connect U37.C11 to G_RST#
39 Improve Audio quality3 8 Add R1158 and R1164; Exchange the nets of JP41.2 and JP41.3
0 .6
39 Delete RP153 and R1132
41 Add R1161
40 42 Add D92Add components for ID & ME
41 Change R904 from 91K to 47K49Modify +5V power-up timing to lead +3V
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
BHR60 from DB to SI LA-1811 REV:0.5 -> 0.6HW PIR <92.06.20.~92.07.03. >
Delete C753~C756; Add R1165~R1168 and C97937
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Title
Size Document Number Rev
Date: Sheet o fLA-2411 0.1
H/W2 EE Dept. PIR SHEET(6)
62 65, 07, 2004星期三 七月
Compal Electronics, Inc.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
BHR60 from SI-1 to PV LA-1811 REV:0.6 -> 0.7HW PIR <92.07.03.~92.08.08. >
42 Correct Y1 and Y3 pin-out 2 6 Using pin-1 and pin-2 of these crystals
67 Improve NIC transmit return loss 3 4 Change U41 to NS0019 1 .0
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Title
Size Document Number Rev
Date: Sheet o fLA-2411 0.1
H/W2 EE Dept. PIR SHEET(2)
63 65, 07, 2004星期三 七月
Compal Electronics, Inc.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
BHR60 LA-1811 REV:1.0 ->1AHW PIR
6716 Add R1180
43 Connect MiniPCI clamp (pin127 and pin128) to GND
M.B. Ver.
1A
68
69
Reason for change PAGE Modify ListFixed IssueItem
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MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
77
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1A
reserve Hynix DDR blue screen issue when boot to Win XP
F or EMI
Add D94 and R117846For EC NS97551 +3VALW undershoot issue 1A
Delete unnecessary component4 6 Delete JP21
47 Delete JP22
1A
46 Add R1179 and C995 1A
54 Delete PJP10 than short it directly
Reserve for when you connect the dock station cable in unit playing an audio occur a speaker switch
The region is ME height limited zero 1A
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Title
Size Document Number Rev
Date: Sheet o fLA-2411 0.1
64 65, 07, 2004星期三 七月
Compal Electronics, Inc.
Changed-List History-1
Version Change List ( P. I. R. List ) for Power Circuit
change to correct layout pad on PU7, PU8, PU9, PU10, PU11, PU16 and PQ24
54,55, 56,57 03/25/2003 Compal
DPRSLPVR56 03/25/2003Reserve two resistors for voltage of Deep-sleeper mode Reserver PR231, PR232, PR233, PR234
for deeper-sleeper mode voltage setting
03/25/2003 Reserve a jumper for power consumption measurement56 CPU VR-Cont.
4
Add PJP14
57 Compal Change Netname of +5VS_CORE
5 51 RTC charger Add PR230
wrong layout pad
wrong layout pad
Compal
Compal
CPU VR-Cont. 03/25/2003 Change the netname +5VS_CORE for powerconsumption measurement
03/25/2003 Compal use two resistors for RTC charger protection
6 re-located both PL10 and PQ21, PQ23 as well as 1.2VS_VGA related power circitry
55 1.2VS_VGA 03/25/2003 Compal re-layout 1.2V_VGA requested by ME
7 55 1.2VS_VGA 03/26/2003 Compal Reserve a jumper for power consumption measurement Add PJP15
8 55 +1.25VSP 03/26/2003 Compal Change power time-sequence of 1.25VSP input power Change VD, and VDD of PU16 from +2.5VALWPto +2.5VS; Connect PR235.2 to +2.5VSadd a resistor PR235 for Stand/By pin for test
9 03/27/2003 Compal Add PR237, PR238 for force PWM function control, and add PR236 for SUSP# signal
54 +1.5VALWP Reserve Force PWM function of 1.5V/2.5V and add a PR236 for SUSP# signal
10 54 +1.5VALWP04/16/2003 Compal
11 04/16/2003 Compal
Compal
Change power time-sequence of 1.5VSP input power
Add two transistor PQ44,PQ45 for voltage of Deep-sleeper mode
12 Change power JUMP SIZE to follow new jump role
56 CPU DPRSLPVR
565554
PWR JUMP
13 CPU DPRSLPVR56
04/16/2003
04/18/2003 Compal Reserve DPRSLPVR function and add a PR136 for +5VS_CORE signal
14
15
50 Vin DETECTOR 04/30/2003 CompalChange PR8 form 10k_0603 to 0K_0603
50 Precharge 04/30/2003 Compal Change PR1 from 10k_0603 to 100k_0603
16 04/30/2003 CompalChange PC20 from .22u to 1u ;PR40&PR42 from 100k to150k; PC80 from 1u to .47uBattery OTP
to make ACIN to enable to pull low
BOM error
To change feekbeck time
17
51
51 04/30/2003 Compal change component Change PU3 from S-81233SGUP-T1 to S-812C33AUA-C2N
18 52 Battery_OVP 04/30/2003 Compal To avoide the BATT_OVP output to oscillate Delet PC44&PR71
19 53 5V/3.3V/12V 04/30/2003 Compal BOM error Change PD16 from EC31Q04 to EC11FS2
04/30/2003 Compal To improve the 3V output ripple Voltage Delet PC7720 53 5V/3.3V/12V
change 1.5V time sequence
Change DPRSLPVR design
For DFX issuse
Change DPRSLPVR design
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.4
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0.3
0.3
0.3
0.3
0.3
0.3
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Title
Size Document Number Rev
Date: Sheet o fLA-2411 0.1
65 65, 07, 2004星期三 七月
Compal Electronics, Inc.
Changed-List History-1
Version Change List ( P. I. R. List ) for Power Circuit
07/4/2003 Compal To modify THE CPU Load line form -1.5mV/A to -2.2mV/AChange PR158,PR180 from 2k to 3.4k 0.6
29 56,57CPU_CORE(1&2) 07/4/2003
CompalTo improve the CPU_CORE effecient
Change PL12,PL13,PL14,PL15 from TOHO to PANASONIC 0.6
30
31
32
0.7
0.7
50 DC_in 08/4/2003 Compal For Gibson issue ,add two schottky diodes add PD43(SBM1040-13_powermite3) ,PD44(SBM1040-13_powermite3)
Charger 08/4/2003 Compal
53 3V/5V/12V 08/4/2003 Compal To solve the DCR sense for 5V OCP issuechange PR81(1.27k) ,PR78(1.54K),PR79(0_0402),PR85(0_0402),PC67(0.47U_0603) ,PC68(0.47U_0603);addPR241(1.24k),PR242(620 ohm),PR243(698 ohm)
33 56 CPU_CORE 08/4/2003 Compal To modify THE CPU Load line form -2.2mV/A to-1.5mV/A, and senes CPU VCC and VSS
Change PR158,PR180 from 3.4k to 2.2k and add PR244 (0 ohm)and PR245(0 ohm)
