A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
1 55,星期四 09, 2006三月
2005/05/09 2006/03/08
HCW50 Schematics DocumentAMD/Sempron/ATI RX485/SB460 W/s M52/54/56P
Rev:0.3 (For PVT)
Compal Confidential
2006 / 02 / 28
Compal Electronics, inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
2 55, 星期四 三 09, 2006月
2005/03/08 2006/03/08
FIR modulepage 41
2 x PCIE
Power On/Off CKT / LID switch / Power OK CKT
Project Code: HCW50
LPC BUS
page 44
Compal confidential
465 BGA
page 27
H_A#(3..31)
ENE Controller
H_D#(0..63)
CB714
page 45
page 39USB conn x 2 / New card
HT 16x16 800MHZ
A-Link Express
page 37
DC/DC Interface CKT.
Power Circuit DC/DC
PCI BUS
AMD Turion/Sempron CPU
page 42
page 46
ATI-RX485M
page 5,6,7,8
RTC CKT.
549 BGA
AC-LINK
page 11,12,13,14
ATI-SB460
page 22,23,24,25,26
AMP & Audio Jack
page 22
page 34
Slot 0page 38
BT Conn
PATA
6in1 CardReaderSlot page 38
page 46~
page 36
Mini PCI Socket
page 32RJ45 CONN
HDD Conn.
Touch Pad CONN.
ENE KB910page 33
page 34
Int. KBDpage 34
BIOSpage 35
File Name : LA-3151P
page 27
SATA HDD Conn.
page 40Conn.1394
page 40
1394 ControllerVT6311S
ALC883Audio CKT
page 31
RealtekRTL8100CL
page 41
SMsC LPC47N207
CDROM Conn.
page 34MDC Conn.
USB 2.0
USB 2.0
SATA
Clock GeneratorICS951462
page 7 page 15
Thermal SensorADM1032ARM
DDRII DDRII-SO-DIMM X2
Dual Channel DDR-II
page 9,10Socket S1 638P
ATI M52PG/M54P/M56Pwith 64/128/256MB VRAMpage 16,17,18,19,20,21
PCI-Express
page 28
CRT & TV-OUTLCD CONNpage 29page 30
DVI-D Conn.
One Channel
Mini card / CAM RTL8110SCL
CIR/LEDpage 43
Compal Electronics, inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
3 55, 星期四 三 09, 2006月
2005/03/08 2006/03/08
1101 001Xb
FIR
1 394 AD16 0 PIRQE
VRAM 256M
+0.9V 0.9V switched power rail for DDRII terminator
+RTCVCC RTC power
+1.5VS
+1.8VS 1.8V switched power rail+2.5VS
+5VS
+3VS+5VALW
+1.8V
2.5V switched power rail+3VALW
1.8V power rail for DDRII
3.3V always on power rail
5V always on power rail3.3V switched power rail
5V switched power rail+VSB VSB always on power rail ON ON*
ON*ONONON
CIR
Sub-woofer
UMA's DVI
BOARD ID Table
EC SM Bus1 addressDevice
SKU ID Table SKU ID
01234567
SKU
GRAPEVINE
GENEVA
MEDIA/B
ONOFF
OFF
DDR DIMM0 1001 000XbDDR DIMM2 1001 010Xb
1.5V switched power rail
+CPU_CORE
STATESIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
PATA
Vcc 3.3V +/- 5%100K +/- 5%Ra/Rc/Re
Board ID Rb / Rd / Rf V min0123
08.2K +/- 5%
0 V0.216 V 0.250 V 0.289 V0.436 V0.712 V
0.503 V0.819 V
0.538 V0.875 V
AD_BID V typAD_BID VAD_BID max
18K +/- 5%33K +/- 5%56K +/- 5%100K +/- 5%200K +/- 5%
3.300 V
0 V 0 V
4567 NC
1.036 V1.453 V 1.650 V 1.759 V1.935 V2.500 V
2.200 V3.300 V
2.341 V
1.185 V 1.264 V
Board ID01234567
PCB Revision0.1
Board ID / SKU ID Table for AD channel
SB460 SM Bus addressDevice
Clock Generator(ICS9LPRS325AKLFT_MLF72)
Address
Address Address
Voltage Rails
VINB+
+1.2V_HT
G73 Only
ON OFF OFF
G72MV Only
Adapter power supply (19V)AC or battery power rail for power circuit.Core voltage for CPU
1.2V switched power rail
External PCI Devices
LAN(GIGA)
Device IDSEL# REQ#/GNT# InterruptsUMACardBus(SD)
Mini-PCI(WLAN/TV-Tuner)
AD20
AD18
1010 000X b
GMT G781-1 1001 101X b
PIRQF3LAN(10/100) AD17
Fintek F75383M
BTO Option Table
SATA-to-IDE
MINI CARD1MINI CARD2
BTO Item BOM Structure
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
2
OFF
OFF
LOW
LOW LOW LOW LOW
LOWLOWLOW
LOW
LOW
LOW
HIGH HIGH HIGH
VRAM
1
PIRQE/PIRQH
PIRQG/PORQH
HIGH
HIGHHIGHHIGH
HIGH
HIGH
HIGH
ON ON*
ON OFF OFF
S0 S3 S5
ON OFFON ON
VRAM 64MVRAM 128M
N/A N/A N/AN/AN/AN/A
Power Plane Description
VGA
LAN(10/100)
LCM
EC SM Bus2 addressDevice
Smart Battery
OFFOFF
ONOFF
OFF
OFFON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
OFFON
PMGM
ON
ONON
OFF
ON*OFF
OFFON
ON
EEPROM(24C16/02)
1001 100X b0001 011X b
+1.2VS 1.2V switched power rail for PCIE ON OFF OFF+0.9VS 0.9V switched power rail for VRAM terminator ON OFF OFF+1.8VALW 1.8V switched power rail ON ON ON*+VDD_CORE 1.0~1.2V switched power rail for VGA ON OFF OFF
Compal Electronics, inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
4 55, 星期四 三 09, 2006月
2005/03/08 2006/03/08
+1.8V(S0, S1)
HD CODEC
5V ANALOG 0.1A
3.3V CORE 0.3A
CONTROL SIGNAL:
DESKTOP: ATXMOBILE: BATTERY
VCCA 2.5V
+3.3V (S0, S1) 0.01A
+3.3VALW
+5VSUS
POW
ER S
WIT
CH
MAIN PWR SW REGULATOR
+3.3VSUS_NTB
+5VSUS_NTB
+3.3V_NTB
+5V_NTB
CPU_VDDIO_SUS (S0, S1, S3)
CPU_VDD_RUN (S0, S1)
+1.2VALW
VDDA_1V2(S0, S1)
+3.3VALW_ATX
+3.3VDUAL_ATX
+3.3V_ATX
+5VALW_ATX
+5V_ATX
+5VDUAL_ATX
+VDC
SWIT
CH
SW
1.5V SWREGULATOR
VDDCORE0.375-1.500V 30A
VLDT 1.2V 3A
1.2V S5 PW 0.22A
+3.3VDUAL (S3) 0.01ASUPER I/O
X4 PCI-E 0.8A
NB RS485
PCI-E CORE&PCI-E IO 3.5A
HT VLDT 1.2V 1A
TRANSFORMER400mA
PLL & DAC-Q(1.8V)200mA
SB SB600
1.8V SWREGULATOR
PCI-E PVDD 80mA
NB CORE 10A
DDRII SODIMMX2
3.3Vaux 0.1A
VDD MEM 4A
0.1A0.5A
0.5A1.0A
1.0A1.0A
5VDual-12V3.3Vaux12V
5V
USB CORE I/O 0.2A
CNR CONNECTOR
ATA PLL 0.01A
3.3V 3.0A3.0A
5.5A
3.3V
12V12V
DAC 300mA
3.3V S5 PW 0.01A
0.5A
NB CORE SWREGULATOR
3.3V I/O 0.45A
ATA I/O 0.2A
SB CORE 0.6A
VCC_NB (S0, S1)
X16 PCIEX1 PCIE per
0.5A
+3.3VALW
7.6A5.0A
-12V
3.3V
3.3Vaux12V
3.3V5V
PCI Slot (per slot)
+5V (S0, S1) 0.1A
0.1A0.375A
(S0, S1, S3, S4, S5)
GBIT ENTHENET 3.3V 0.5A
AMD CPU
SW REGULATOR
CPU
PWR
12V
+/-5
%
5V (S0, S1) 0.1A
MINI PCI SLOT
1.5V (S0, S1) 0.7APCI-E CARD
3.3V (S0, S1) 1.3A
3.3V
+/-5
%5V +/
-5%
12V
+/-5
%5V
SB+/
-5%
ATX
PO
WER
SU
PPLY
-12V
+/-5
%
VLDT_RUN (S0, S1)
AVDD (S0, S1)
CPU_VTT_SUS (S0, S1,S3)
+3.3VALW_NTB
+5VALW_NTB
3.3V (S3, S5) 0.3A+3.3V
+3.3VALW LDOREGULATOR
SW
3.3V(S0, S1)1.5A
3.3V(S3, S5) 0.2A
+3.3VSUS
+3.3V
+5VALW
+5V
+5V
+3.3V
+3.3VALW
+3.3V
+5VALW
+VIN
+VIN
VTT_MEM 0.5A
VLDT 1.2V SWREGULATOR
HTPLL (1.8V) 200mA
+5V
+VIN
PCIE&SB SWREGULATOR
+5V
+5V
+VIN+5V
+VIN+5V
+5V
+3.3V
1.2V LDOREGULATOR
1.8V VDD&VTTSW REGULATOR+5VSUS
+3.3VALW
+5V
5VDualVDD
USB X7 FR
1.0A3.5A5VDualVDD
2XPS/2USB X2 RL
1.0A
5VDual
+5V
BATT
ERY
BATT
ERY
CHAR
GER
SWIT
CH
+VIN
CPU_VDDA_RUN (S0, S1)
VC
C_S
B (S
0, S
1)
+VIN_MEMSW
+5VSUS
Compal Electronics, inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CADON5H_CADOP5
H_CADON1H_CADOP1
H_CADON15H_CADIN15
H_CADIN11
H_CLKIP0
H_CADIP11
H_CADIN4H_CADIP4
H_CADIN0H_CADIP0
H_CADON12H_CADOP12
H_CADON8H_CADOP8
H_CADON4H_CADOP4
H_CADON0H_CADOP0
H_CTLOP0
H_CADIN14
H_CTLON0
H_CADIP14
H_CADIN10H_CADIP10
H_CLKOP0
H_CADIN7H_CADIP7
H_CADIN3
H_CTLIN0
H_CADIP3
H_CTLIP0
H_CTLIP1
H_CADON11H_CADOP11
H_CADON7H_CADOP7
H_CLKIN1
H_CLKIN0
H_CLKIP1
H_CADON3H_CADOP3
H_CLKON0
H_CLKOP1H_CLKON1
H_CADIP15
H_CADIN13H_CADIP13
H_CADIN9H_CADIP9
H_CADIN6H_CADIP6
H_CADIN2H_CADIP2
H_CTLIN1
H_CADON14H_CADOP14
H_CADON10H_CADOP10
H_CADON6H_CADOP6
H_CADON2H_CADOP2
H_CADOP15
H_CADIN12H_CADIP12
H_CADIN8H_CADIP8
H_CADIN5H_CADIP5
H_CADIN1H_CADIP1
H_CADON13H_CADOP13
H_CADON9H_CADOP9
+VCC_FAN1EN_DFAN1
+VCC_FAN1
H_CADIP[0..15]H_CADIN[0..15]
H_CADOP[0..15]H_CADON[0..15]
FAN_SPEED1<33>
EN_DFAN1<33>
H_CTLOP0 <11>H_CTLON0 <11>
H_CADIP[0..15]<11>H_CADON[0..15] <11>H_CADIN[0..15]<11>H_CADOP[0..15] <11>
H_CLKOP1 <11>H_CLKON1 <11>H_CLKOP0 <11>H_CLKON0 <11>
H_CTLIP0<11>H_CTLIN0<11>
H_CLKIP1<11>H_CLKIN1<11>H_CLKIP0<11>H_CLKIN0<11>
+1.2V_HT
+1.2V_HT
+1.2V_HT
+5VS
+3VS
+5VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
5 55, 星期四 三 09, 2006月
2005/10/11 2006/10/11
PROCESSOR HYPERTRANSPORT INTERFACE
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
Athlon 64 S1Processor Socket
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWERSUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
PLACE CLOSE TO VLDT0 POWER PINSTO OTHER HT POWER PINS
LAYOUT: Place bypass cap on topside of boardNEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLYTO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
40mil
FAN1 Conn
Compal Electronics, inc.
C6
10U_0805_10V4Z
1
2
R110K_0402_5%
12
C9
0.22U_0603_10V7K
1
2
C10
180P_0402_50V8J
1
2
C51000P_0402_50V7K
1
2
D11SS355_SOD323
12
R3 51_0402_1%
1 2
HTT Interface
JP72A
VLDT_A3D4VLDT_A2D3VLDT_A1D2VLDT_A0D1
VLDT_B3 AE5VLDT_B2 AE4VLDT_B1 AE3VLDT_B0 AE2
L0_CADIN_H15N5L0_CADIN_L15P5L0_CADIN_H14M3L0_CADIN_L14M4L0_CADIN_H13L5L0_CADIN_L13M5L0_CADIN_H12K3L0_CADIN_L12K4L0_CADIN_H11H3L0_CADIN_L11H4L0_CADIN_H10G5L0_CADIN_L10H5L0_CADIN_H9F3L0_CADIN_L9F4L0_CADIN_H8E5L0_CADIN_L8F5L0_CADIN_H7N3L0_CADIN_L7N2L0_CADIN_H6L1L0_CADIN_L6M1L0_CADIN_H5L3L0_CADIN_L5L2L0_CADIN_H4J1L0_CADIN_L4K1L0_CADIN_H3G1L0_CADIN_L3H1L0_CADIN_H2G3L0_CADIN_L2G2L0_CADIN_H1E1L0_CADIN_L1F1L0_CADIN_H0E3L0_CADIN_L0E2
L0_CADOUT_H15 T4L0_CADOUT_L15 T3L0_CADOUT_H14 V5L0_CADOUT_L14 U5L0_CADOUT_H13 V4L0_CADOUT_L13 V3L0_CADOUT_H12 Y5L0_CADOUT_L12 W5L0_CADOUT_H11 AB5L0_CADOUT_L11 AA5L0_CADOUT_H10 AB4L0_CADOUT_L10 AB3L0_CADOUT_H9 AD5L0_CADOUT_L9 AC5L0_CADOUT_H8 AD4L0_CADOUT_L8 AD3L0_CADOUT_H7 T1L0_CADOUT_L7 R1L0_CADOUT_H6 U2L0_CADOUT_L6 U3L0_CADOUT_H5 V1L0_CADOUT_L5 U1L0_CADOUT_H4 W2L0_CADOUT_L4 W3L0_CADOUT_H3 AA2L0_CADOUT_L3 AA3L0_CADOUT_H2 AB1L0_CADOUT_L2 AA1L0_CADOUT_H1 AC2L0_CADOUT_L1 AC3L0_CADOUT_H0 AD1L0_CADOUT_L0 AC1
L0_CLKIN_H1J5L0_CLKIN_L1K5L0_CLKIN_H0J3L0_CLKIN_L0J2
L0_CTLIN_H0N1L0_CTLIN_L0P1 L0_CTLOUT_H0 R2
L0_CTLOUT_L0 R3
L0_CLKOUT_H0 Y1L0_CLKOUT_L0 W1
L0_CLKOUT_H1 Y4L0_CLKOUT_L1 Y3
L0_CTLIN_H1P3L0_CTLIN_L1P4 L0_CTLOUT_H1 T5
L0_CTLOUT_L1 R5
U2
G993P1UF_SOP8
VEN1VIN2
GND 5GND 6
GND 8
VO3VSET4
GND 7
R2 51_0402_1%
1 2
C14.7U_0805_10V4Z
1 2
C41000P_0402_50V7K
1 2
C310U_0805_10V4Z
1 2
D21N4148_SOT23
1 2
C8
0.22U_0603_10V7K
1
2
C11
180P_0402_50V8J
1
2
C2 10U_0805_10V4Z
1 2
JP73
ACES_85205-03001
123
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
DDR_B_CLK#1
DDR_CS2_DIMMA#
DDR_CS1_DIMMB#
DDR_CS0_DIMMA#
DDR_CS3_DIMMB#DDR_CS2_DIMMB#
DDR_CS3_DIMMA#
DDR_CKE0_DIMMBDDR_CKE1_DIMMA
DDR_CKE1_DIMMB
DDR_CKE0_DIMMA
DDR_CS0_DIMMB#
DDR_CS1_DIMMA#
DDR_A_BS#0
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
DDR_A_BS#1DDR_A_BS#2
DDR_A_MA15
DDR_B_BS#2DDR_B_BS#1DDR_B_BS#0
DDR_B_RAS#DDR_B_CAS#DDR_B_WE#
DDR_B_D40
DDR_B_D6
DDR_B_D38
DDR_B_D50
DDR_B_D35
DDR_B_D47
DDR_B_D41
DDR_B_D44
DDR_B_D54
DDR_B_D13
DDR_B_D28
DDR_B_D17
DDR_B_D58
DDR_B_D26
DDR_B_D37
DDR_B_D60
DDR_B_D55
DDR_B_D34
DDR_B_D49
DDR_B_D56
DDR_B_D4
DDR_B_D12
DDR_B_D53
DDR_B_D46
DDR_B_D19
DDR_B_D22
DDR_B_D25
DDR_B_D16
DDR_B_D0
DDR_B_D31
DDR_B_D43
DDR_B_D11
DDR_B_D33
DDR_B_D10
DDR_B_D23
DDR_B_D36
DDR_B_D18
DDR_B_D8DDR_B_D7
DDR_B_D52
DDR_B_D15
DDR_B_D63
DDR_B_D24
DDR_B_D62
DDR_B_D21
DDR_B_D27
DDR_B_D1
DDR_B_D61
DDR_B_D5
DDR_B_D30
DDR_B_D32
DDR_B_D42
DDR_B_D9
DDR_B_D39
DDR_B_D48
DDR_B_D3
DDR_B_D51
DDR_B_D14
DDR_B_D20
DDR_B_D45
DDR_B_D2
DDR_B_D29
DDR_B_D59
M_ZPM_ZN
DDR_B_DM1
DDR_B_DM3
DDR_B_DM5
DDR_B_DM7
DDR_B_DM2
DDR_B_DM4
DDR_B_DM6
DDR_B_DM0
DDR_B_DQS6DDR_B_DQS#6
DDR_B_DQS2DDR_B_DQS#2
DDR_B_DQS5DDR_B_DQS#5
DDR_B_DQS1DDR_B_DQS#1
DDR_B_DQS4DDR_B_DQS#4
DDR_B_DQS0DDR_B_DQS#0
DDR_B_DQS7DDR_B_DQS#7
DDR_B_DQS3DDR_B_DQS#3
DDR_A_DM1DDR_A_DM2DDR_A_DM3DDR_A_DM4DDR_A_DM5DDR_A_DM6DDR_A_DM7
DDR_A_DM0
DDR_A_DQS0DDR_A_DQS#0
DDR_A_DQS7DDR_A_DQS#7
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS6DDR_A_DQS#6
DDR_A_DQS2DDR_A_DQS#2
DDR_A_DQS5DDR_A_DQS#5
DDR_A_DQS1DDR_A_DQS#1
DDR_A_DQS4DDR_A_DQS#4
DDR_A_D4
DDR_A_D23
DDR_A_D60
DDR_A_D34
DDR_A_D50
DDR_A_D3
DDR_A_D7
DDR_A_D27
DDR_A_D44
DDR_A_D35
DDR_A_D40
DDR_A_D43
DDR_A_D29
DDR_A_D59
DDR_A_D48
DDR_A_D2
DDR_A_D63
DDR_A_D10
DDR_A_D30
DDR_A_D16
DDR_A_D20
DDR_A_D39
DDR_A_D41
DDR_A_D12
DDR_A_D24
DDR_A_D17
DDR_A_D54
DDR_A_D58
DDR_A_D56
DDR_A_D32
DDR_A_D57
DDR_A_D55
DDR_A_D9
DDR_A_D37
DDR_A_D42
DDR_A_D6
DDR_A_D51
DDR_A_D13
DDR_A_D38
DDR_A_D0
DDR_A_D19
DDR_A_D21
DDR_A_D1
DDR_A_D15
DDR_A_D62DDR_A_D61
DDR_A_D5
DDR_A_D31
DDR_A_D46
DDR_A_D53
DDR_A_D36
DDR_A_D52
DDR_A_D8
DDR_A_D25
DDR_A_D11
DDR_A_D14
DDR_A_D22
DDR_A_D49
DDR_A_D45
DDR_A_D47
DDR_A_D33
DDR_A_D28
DDR_A_D26
+0.9VREF_CPU
DDR_B_MA1
DDR_B_MA5
DDR_B_CLK#2
DDR_A_CLK#2
DDR_B_MA8
DDR_B_ODT1
DDR_B_CLK2
DDR_B_MA14
DDR_B_MA3
DDR_B_CLK1
DDR_A_CLK2
DDR_B_MA9
DDR_B_MA4
DDR_B_MA15
DDR_A_ODT0
DDR_B_MA6
DDR_B_ODT0
DDR_B_MA0
DDR_B_MA12
DDR_A_ODT1
DDR_B_MA10
DDR_A_CLK1
DDR_B_MA7
DDR_B_MA2
DDR_B_MA13
DDR_B_MA11
DDR_B_D57
DDR_A_D18
DDR_A_CLK#1
DDR_A_CLK2
DDR_A_CLK1
DDR_A_CLK#1
DDR_A_CLK#2
DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK1
DDR_B_CLK#1
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
DDR_A_MA[0..15]
DDR_A_MA5DDR_A_MA4
DDR_A_MA12DDR_A_MA13DDR_A_MA14
DDR_A_MA9
DDR_A_MA6
DDR_A_MA0
DDR_A_MA3
DDR_A_MA8
DDR_A_MA10
DDR_A_MA1
DDR_A_MA11
DDR_A_MA2
DDR_A_MA7
DDR_A_D[0..63] <9>
DDR_A_DM[0..7] <9>
DDR_A_DQS[0..7]<9>
DDR_A_DQS#[0..7]<9>
DDR_B_D[0..63]<10>
DDR_B_DM[0..7]<10>
DDR_B_DQS[0..7]<10>
DDR_B_DQS#[0..7]<10>
DDR_B_MA[0..15] <10>
DDR_CS0_DIMMA#<9>DDR_CS1_DIMMA#<9>DDR_CS2_DIMMA#<9>DDR_CS3_DIMMA#<9>
DDR_CS0_DIMMB#<10>DDR_CS1_DIMMB#<10>DDR_CS2_DIMMB#<10>DDR_CS3_DIMMB#<10>
DDR_CKE0_DIMMA<9>DDR_CKE1_DIMMA<9>DDR_CKE0_DIMMB<10>DDR_CKE1_DIMMB<10>
DDR_A_RAS#<9>
DDR_A_BS#0<9>DDR_A_BS#1<9>DDR_A_BS#2<9>
DDR_A_WE#<9>DDR_A_CAS#<9>
DDR_A_CLK2 <9>DDR_A_CLK#2 <9>DDR_A_CLK1 <9>DDR_A_CLK#1 <9>
DDR_B_BS#2 <10>DDR_B_BS#1 <10>DDR_B_BS#0 <10>
DDR_B_RAS# <10>
DDR_B_CLK2 <10>DDR_B_CLK#2 <10>DDR_B_CLK1 <10>DDR_B_CLK#1 <10>
DDR_B_ODT1 <10>DDR_B_ODT0 <10>DDR_A_ODT1 <9>DDR_A_ODT0 <9>
DDR_B_CAS# <10>DDR_B_WE# <10>
DDR_A_MA[0..15]<9>
+0.9VREF_CPU
+0.9VREF_CPU
+1.8V
+1.8V
+0.9V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
6 55, 09, 2星期四 三月 006
2005/10/11 2006/10/11
VDD_VREF_SUS_CPU
To n
orm
al S
OD
IMM
soc
ket
To re
vers
e SO
DIM
M s
ocke
t
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWERSUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
Athlon 64 S1ProcessorSocket
A1
AF1
Athlon 64 S1g1
A26
uPGA638Top View
Athlon 64 S1Processor Socket
LAYOUT:PLACE CLOSE TO CPU
PLACE THEM CLOSE TO CPU WITHIN 1"
Processor DDR2 Memory Interface
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
ATI check ,Use +0.9V PWR , can delete or not
Compal Electronics, inc.
C20
1U_0402_6.3V4Z
1
2
R7
1K_0402_1%
12
C121.5P_0402_50V8C
1
2
DDRII Data
DDR: DATA
JP72C
MB_DM7AD12MB_DM6AC16MB_DM5AE22MB_DM4AB26MB_DM3E25MB_DM2A22MB_DM1B16MB_DM0A12
MA_DM7 Y13MA_DM6 AB16MA_DM5 Y19MA_DM4 AC24MA_DM3 F24MA_DM2 E19MA_DM1 C15MA_DM0 E12
MA_DATA0 G12MA_DATA1 F12MA_DATA2 H14MA_DATA3 G14MA_DATA4 H11MA_DATA5 H12MA_DATA6 C13MA_DATA7 E13MA_DATA8 H15MA_DATA9 E15MA_DATA10 E17MA_DATA11 H17MA_DATA12 E14MA_DATA13 F14MA_DATA14 C17MA_DATA15 G17MA_DATA16 G18MA_DATA17 C19MA_DATA18 D22MA_DATA19 E20MA_DATA20 E18MA_DATA21 F18MA_DATA22 B22MA_DATA23 C23MA_DATA24 F20MA_DATA25 F22MA_DATA26 H24MA_DATA27 J19MA_DATA28 E21MA_DATA29 E22MA_DATA30 H20MA_DATA31 H22MA_DATA32 Y24MA_DATA33 AB24MA_DATA34 AB22MA_DATA35 AA21MA_DATA36 W22MA_DATA37 W21MA_DATA38 Y22MA_DATA39 AA22MA_DATA40 Y20MA_DATA41 AA20MA_DATA42 AA18MA_DATA43 AB18MA_DATA44 AB21MA_DATA45 AD21MA_DATA46 AD19MA_DATA47 Y18MA_DATA48 AD17MA_DATA49 W16MA_DATA50 W14MA_DATA51 Y14MA_DATA52 Y17MA_DATA53 AB17MA_DATA54 AB15MA_DATA55 AD15MA_DATA56 AB13MA_DATA57 AD13MA_DATA58 Y12MA_DATA59 W11MA_DATA60 AB14MA_DATA61 AA14MA_DATA62 AB12MA_DATA63 AA12
MA_DQS_L0 H13
MA_DQS_L1 G15
MA_DQS_L2 C21
MA_DQS_L3 G21
MA_DQS_L4 AC23
MA_DQS_L5 AB20
MA_DQS_L6 W15
MA_DQS_L7 W13
MA_DQS_H0 G13
MA_DQS_H1 G16
MA_DQS_H2 C22
MA_DQS_H3 G22
MA_DQS_H4 AD23
MA_DQS_H5 AB19
MA_DQS_H6 Y15
MA_DQS_H7 W12
MB_DATA0C11 MB_DATA1A11 MB_DATA2A14 MB_DATA3B14 MB_DATA4G11 MB_DATA5E11 MB_DATA6D12 MB_DATA7A13 MB_DATA8A15 MB_DATA9A16 MB_DATA10A19 MB_DATA11A20 MB_DATA12C14 MB_DATA13D14 MB_DATA14C18 MB_DATA15D18 MB_DATA16D20 MB_DATA17A21 MB_DATA18D24 MB_DATA19C25 MB_DATA20B20 MB_DATA21C20 MB_DATA22B24 MB_DATA23C24 MB_DATA24E23 MB_DATA25E24 MB_DATA26G25 MB_DATA27G26 MB_DATA28C26 MB_DATA29D26 MB_DATA30G23 MB_DATA31G24 MB_DATA32AA24 MB_DATA33AA23 MB_DATA34AD24 MB_DATA35AE24 MB_DATA36AA26 MB_DATA37AA25 MB_DATA38AD26 MB_DATA39AE25 MB_DATA40AC22 MB_DATA41AD22 MB_DATA42AE20 MB_DATA43AF20 MB_DATA44AF24 MB_DATA45AF23 MB_DATA46AC20 MB_DATA47AD20 MB_DATA48AD18 MB_DATA49AE18 MB_DATA50AC14 MB_DATA51AD14 MB_DATA52AF19 MB_DATA53AC18 MB_DATA54AF16 MB_DATA55AF15 MB_DATA56AF13 MB_DATA57AC12 MB_DATA58AB11 MB_DATA59Y11 MB_DATA60AE14 MB_DATA61AF14 MB_DATA62AF11 MB_DATA63AD11
MB_DQS_L0B12
MB_DQS_L1C16
MB_DQS_L2A23
MB_DQS_L3E26
MB_DQS_L4AC26
MB_DQS_L5AF22
MB_DQS_L6AD16
MB_DQS_L7AE12
MB_DQS_H0C12
MB_DQS_H1D16
MB_DQS_H2A24
MB_DQS_H3F26
MB_DQS_H4AC25
MB_DQS_H5AF21
MB_DQS_H6AE16
MB_DQS_H7AF12
DDRII Cmd/Ctrl//Clk
JP72B
VTT1 D10VTT2 C10VTT3 B10VTT4 AD10
VTT6 AC10VTT7 AB10VTT8 AA10VTT9 A10
M_VREFW17
VTT_SENSEY10
M_ZNAE10M_ZPAF10
MA0_CS_L3V19MA0_CS_L2J22MA0_CS_L1V22MA0_CS_L0T19
MB_CKE1H26MB_CKE0J23MA_CKE1J20MA_CKE0J21
MA_ADD13V24MA_ADD12K24MA_ADD11L20MA_ADD10R19MA_ADD9L19MA_ADD8L22MA_ADD7L21MA_ADD6M19MA_ADD5M20MA_ADD4M24MA_ADD3M22MA_ADD2N22MA_ADD1N21MA_ADD0R21
MA_BANK1R20MA_BANK0T22
MA_RAS_LT20MA_CAS_LU20MA_WE_LU21
MB_RAS_L U24MB_CAS_L V26MB_WE_L U22
MB_BANK1 T26MB_BANK0 U26
MB_ADD13 W25MB_ADD12 L23MB_ADD11 L25MB_ADD10 U25
MB_ADD9 L24MB_ADD8 M26MB_ADD7 L26MB_ADD6 N23MB_ADD5 N24MB_ADD4 N25MB_ADD3 N26MB_ADD2 P24MB_ADD1 P26MB_ADD0 T24
MA0_CLK_H2 Y16MA0_CLK_L2 AA16MA0_CLK_H1 E16MA0_CLK_L1 F16
MB0_CLK_H2 AF18MB0_CLK_L2 AF17MB0_CLK_H1 A17MB0_CLK_L1 A18
MB0_CS_L3Y26MB0_CS_L2J24MB0_CS_L1W24MB0_CS_L0U23
MA0_ODT0 U19MA0_ODT1 V20
MA_BANK2K22
MA_ADD15K19MA_ADD14K20
MB0_ODT0 W26MB0_ODT1 W23
MB_BANK2 K26
MB_ADD14 J26MB_ADD15 J25
VTT5 W10
C18
0.1U_0402_16V4Z
1
2
C16
1000P_0402_50V7K
1
2
C19
1000P_0402_50V7K
1
2
R6
1K_0402_1%
12
C131.5P_0402_50V8C
1
2
C151.5P_0402_50V8C
1
2
R439.2_0402_1%~D
12
C141.5P_0402_50V8C
1
2
R539.2_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU_LDTSTOP#CPU_ALL_PWROKCPU_HT_RESET#
CPU_CLKIN_SC_P
CP
U_P
H_G
CPU_CLKIN_SC_N
CPU_VCC_SENSECPU_VSS_SENSE
CPU_TEST29_H_FBCLKOUT_P
CPU_HTREF1CPU_HTREF0 VID0
VID5
CPU_PROCHOT#_1.8
CPU_PRESENT#
CPU_DBRDY
CPU_TMSCPU_TCKCPU_TRST#CPU_TDI
CPU_TDO
PSI#
VID2
VID4VID3
CPU_TEST25_H_BYPASSCLK_HCPU_TEST25_L_BYPASSCLK_L
CPU_THERMDC
CPU_TEST29_L_FBCLKOUT_N
CPU_DBREQ#
CPU_LDTSTOP#
CPU_ALL_PWROK
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST25_H_BYPASSCLK_HCPU_PRESENT#
CPU_THERMDA
CPU_PROCHOT#_1.8
H_THERMTRIP_S#
VID1
CPU_SIC_R
CPU_HT_RESET#
+VDDA_25V
H_THERMTRIP_S# H_THERMTRIP#
CPU_TMSCPU_TDI
CPU_DBRDYCPU_DBREQ#
CPU_TCK
CPU_TDOCPU_TRST#
CPU_THERMDA
CPU_THERMDC
VDDIOFB_LVDDIOFB_H
SB_PWROK_R
CPU_TEST26_BURNIN#
CPU_TEST26_BURNIN#
CPU_TEST19_PLLTEST0CPU_TEST18_PLLTEST1
CPU_TEST19_PLLTEST0CPU_TEST18_PLLTEST1
CPU_TEST21_SCANEN
CPU_TEST21_SCANEN
3V_LDT_RST#
LDT_RST# 3V_LDT_RST#
MAINPWON <47,48,50>
H_THERMTRIP# <23>
CPU_VCC_SENSE<54>CPU_VSS_SENSE<54>
EC_SMB_CK2 <33>
EC_SMB_DA2 <33>
EC_THERM# <23,33>
CPU_PWRGD<23>
LDT_STOP#<13,23>
CPUCLK<15>
CPUCLK#<15>
LDT_RST#<22>
VID1 <54>VID0 <54>
VID3 <54>VID2 <54>
VID5 <54>VID4 <54>
PSI# <54>
SB_PWRGD<23,42>
+3VS
+1.8V
+1.8V+3VALW
+3VS
+3VALW
+1.8V
+1.8VS
+1.8VS
+1.8VS
+1.8V
+1.8V
+1.8V
+1.8V
+1.2V_HT
+2.5VS
+1.8V
+3VS
+1.8V
+1.8V
+1.8VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
C
7 55, 09, 2星期四 三月 006
2005/03/08 2006/03/08
LAYOUT: ROUTE VDDA TRACE APPROX.50 mils WIDE (USE 2x25 mil TRACES TOEXIT BALL FIELD) AND 500 mils LONG.
AMD NPT S1 SOCKETProcessor Socket
ATHLON Control and Debug
place them to CPU within 1"
PLACE IT CLOSE TO CPU WITHIN 1"ROUTE AS 80 Ohm DIFFERENTIAL PAIR
SB460 ONLY
SMBus Address: 1001110X (b)
HDT Connector
NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.
F75383M_MSOP8
50mil width(600mA)
25mil/6mil/6mil/6mil/25milPlace within 0.5" from CPU
Modify 11/22
Compal Electronics, inc.
U50
NC7SZ08P5X_NL_SC70-5
B2
A1 Y 4
P5
G3
R23
10K_0402_5%
12
R12 44.2_0603_1%1 2
R10 300_0402_5%
1 2
Q1
MMBT3904_SOT232
3 1
EB
C
Q3
MMBT3904_SOT23
2
3 1
R14300_0402_5%
12
R808 0_0402_5%@1 2
T30PADT28PAD
R34 510_0402_5%
1 2
R304.7K_0402_5%
12
T25PADT23PAD
R26
220_
0402
_5%
@ 12
R29
10K_0402_5%
12
C243300P_0402_50V7K
1
2
EB
C
Q47
MMBT3904_SOT23@
2
3 1
C25
3900P_0402_50V7K
1 2
C300.1U_0402_16V4Z
1 2
R211K_0402_5%@
12R28
220_
0402
_5%
@ 12
R33 1K_0402_5%
1 2
R8454.7K_0402_5%@
12
U51
NC7SZ08P5X_NL_SC70-5
B2
A1 Y 4
P5
G3
R22
300_0402_5%
12
R8
300_0402_5%
12
T1PAD
U49
NC7SZ08P5X_NL_SC70-5
B2
A1 Y 4
P5
G3
R44 300_0402_5%1 2
Q2MMBT3904_SOT23@
2
3 1
R27
220_
0402
_5%
@ 12
R25
220_
0402
_5%
@ 12
R18300_0402_5%
12
T2PAD
C31
2200P_0402_50V7K
1
2
R13 44.2_0603_1%1 2
R9
300_0402_5%
12
C23
0.22U_0603_10V7K
1
2
R19300_0402_5%
12
R43 300_0402_5%1 2
T31 PADT29 PAD
T27 PADT26 PADT24 PAD
R32 300_0402_5%
1 2
T21 PAD
C27
3900P_0402_50V7K
1 2
T18 PAD
L1
FBM-L11-321611-260-LMT_1206
12
T16 PADT14 PAD
R806 0_0402_5%@1 2
C26
0.1U_0402_16V4Z
1 2
SAMTEC_ASP-68200-07
JP74
@
2468
101214161820222423
21191715131197531
26
R15
4.7K_0402_5%@
12
R42 510_0402_5%
1 2
C28
0.1U_0402_16V4Z
1 2
R20
1K_0402_5%
12
T20PADT19PADT17PADT15PADT13PAD
U4
ADM1032ARMZ-2REEL_MSOP8
VDD1
ALERT# 6
THERM#4 GND 5
D+2
D-3
SCLK 8
SDATA 7
R24
220_
0402
_5%
@ 12
R16169_0402_1%
12
R17
80.6_0402_1%
1 2
R804 0_0402_5%1 2
C22
4.7U_0805_10V4Z
1
2
R807 0_0402_5%@1 2
MISC
JP72D
VDDA2F8VDDA1F9
RESET_LB7PWROKA7LDTSTOP_LF10
HTREF1P6HTREF0R6
VDDIO_FB_HW9VDDIO_FB_LY9
CLKIN_HA9CLKIN_LA8
DBRDYG10
TMSAA9TCKAC9TRST_LAD9TDIAF9
TDO AE9
DBREQ_L E10
VID4 C6VID3 A6VID2 A4VID1 C5VID0 B5
THERMTRIP_L AF6
CPU_PRESENT_L AC6
SICAF4SIDAF5
VDD_FB_HF6VDD_FB_LE6
VID5 A5
PROCHOT_L AC7
PSI_L A3
TEST2AB6 TEST3Y6 THERMDAW8 THERMDCW7 TEST6AA6 TEST7C3
TEST8 C4TEST10 K8TEST26 AE6TEST27 AF8TEST28_L H8TEST28_H J7
TEST20 AF7TEST21 AB8TEST22 AE8TEST23 AD7TEST24 AE7
TEST12AC8 TEST14C7 TEST15F7 TEST16E7 TEST17D7 TEST9C2 TEST13AA7 TEST18H10 TEST19G9 TEST25_LE8 TEST25_HE9 TEST29_H C9TEST29_L C8
RSVD0P20RSVD1P19RSVD2N20RSVD3N19
RSVD4R26RSVD5R25RSVD6P22RSVD7R22
RSVD8 H16RSVD9 B18
RSVD10 B3RSVD11 C1
RSVD12 H6RSVD13 G6RSVD14 D5
RSVD15 R24RSVD16 W18RSVD17 R23RSVD18 AA8RSVD19 H18RSVD20 H19
C29
0.1U_0402_16V4Z
1 2
R35 300_0402_5%1 2
R844
10K_0402_5%@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8V
+CPU_CORE+CPU_CORE
+1.8V
+1.8V
+0.9V
+CPU_CORE
+CPU_CORE
+CPU_CORE
+0.9V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
C
8 55, 09, 2星期四 三月 006
2005/03/08 2006/03/08
uPGA638Top View
BOTTOMSIDE DECOUPLING
A1
AF1
A26
Athlon 64 S1g1
PROCESSOR POWER AND GROUND
Athlon 64 S1Processor Socket
Athlon 64 S1Processor Socket
DECOUPLING BETWEEN PROCESSOR AND DIMMsPLACE CLOSE TO PROCESSOR AS POSSIBLE
CPU left-hand side CPU right-hand side
Compal Electronics, inc.
C50
4.7U_0805_10V4Z
1
2
+ C795
220U_D2_4VM
1
2
C38
22U_0805_6.3V6M
1
2
C74
180P_0402_50V8J
1
2
+ C799
330U_D2E_2.5VM_R9
1
2
+ C796
820U_E9_2.5V_M_R745@
1
2
C53
0.22U_0603_10V7K
1
2
C76
180P_0402_50V8J
1
2
C43
0.22U_0603_10V7K
1
2
C41
0.22U_0603_10V7K
1
2
C924
180P_0402_50V8J
1
2
Power
JP72E
VDD1AC4VDD2AD2VDD3G4VDD4H2VDD5J9VDD6J11VDD7J13VDD8K6VDD9K10VDD10K12VDD11K14VDD12L4VDD13L7VDD14L9VDD15L11VDD16L13VDD17M2VDD18M6VDD19M8VDD20M10VDD21N7VDD22N9VDD23N11VDD24P8VDD25P10VDD26R4VDD27R7VDD28R9VDD29R11VDD30T2VDD31T6VDD32T8VDD33T10VDD34T12VDD35T14VDD36U7VDD37U9VDD38U11VDD39U13VDD40V6VDD41V8VDD42V10
VDD43 V12VDD44 V14VDD45 W4VDD46 Y2VDD47 J15VDD48 K16VDD49 L15VDD50 M16VDD51 P16VDD52 T16VDD53 U15VDD54 V16
VDDIO1 H25VDDIO2 J17VDDIO3 K18VDDIO4 K21VDDIO5 K23VDDIO6 K25VDDIO7 L17VDDIO8 M18VDDIO9 M21
VDDIO10 M23VDDIO11 M25VDDIO12 N17VDDIO13 P18VDDIO14 P21VDDIO15 P23VDDIO16 P25VDDIO17 R17VDDIO18 T18VDDIO19 T21VDDIO20 T23VDDIO21 T25VDDIO22 U17VDDIO23 V18VDDIO24 V21VDDIO25 V23VDDIO26 V25VDDIO27 Y25
C60
180P_0402_50V8J
1
2
C58
0.01U_0402_16V7K
1
2
C57
0.01U_0402_16V7K
1
2
C71
1000P_0402_50V7K
1
2
C923
0.01U_0402_16V7K
1
2
C63
4.7U_0805_10V4Z
1
2
C4622U_0805_6.3V6M
1
2
C48
0.22U_0603_10V7K
1
2
C32
10U_0805_10V4Z
1
2
C61
4.7U_0805_10V4Z
1
2
C44
0.22U_0603_10V7K
1
2
C59
180P_0402_50V8J
1
2
C36
10U_0805_10V4Z
1
2
C56
0.22U_0603_10V7K
1
2
C42
0.22U_0603_10V7K
1
2
C34
10U_0805_10V4Z
1
2
C51
4.7U_0805_10V4Z
1
2
C39
22U_0805_6.3V6M
1
2
C54
0.22U_0603_10V7K
1
2
C69
1000P_0402_50V7K
1
2
Ground
JP72F
VSS1AA4VSS2AA11VSS3AA13VSS4AA15VSS5AA17VSS6AA19VSS7AB2VSS8AB7VSS9AB9VSS10AB23VSS11AB25VSS12AC11VSS13AC13VSS14AC15VSS15AC17VSS16AC19VSS17AC21VSS18AD6VSS19AD8VSS20AD25VSS21AE11VSS22AE13VSS23AE15VSS24AE17VSS25AE19VSS26AE21VSS27AE23VSS28B4VSS29B6VSS30B8VSS31B9VSS32B11VSS33B13VSS34B15VSS35B17VSS36B19VSS37B21VSS38B23VSS39B25VSS40D6VSS41D8VSS42D9VSS43D11VSS44D13VSS45D15VSS46D17VSS47D19VSS48D21VSS49D23VSS50D25VSS51E4VSS52F2VSS53F11VSS54F13VSS55F15VSS56F17VSS57F19VSS58F21VSS59F23VSS60F25VSS61H7VSS62H9VSS63H21VSS64H23VSS65J4
VSS66 J6VSS67 J8VSS68 J10VSS69 J12VSS70 J14VSS71 J16VSS72 J18VSS73 K2VSS74 K7VSS75 K9VSS76 K11VSS77 K13VSS78 K15VSS79 K17VSS80 L6VSS81 L8VSS82 L10VSS83 L12VSS84 L14VSS85 L16VSS86 L18VSS87 M7VSS88 M9VSS89 M11VSS90 M17VSS91 N4VSS92 N8VSS93 N10VSS94 N16VSS95 N18VSS96 P2VSS97 P7VSS98 P9VSS99 P11
VSS101 R8VSS102 R10VSS103 R16VSS104 R18VSS105 T7VSS106 T9VSS107 T11VSS108 T13
VSS123 V13VSS124 V15VSS125 V17VSS126 W6VSS127 Y21VSS128 Y23VSS129 N6
VSS109 T15VSS110 T17VSS111 U4VSS112 U6VSS113 U8VSS114 U10VSS115 U12VSS116 U14VSS117 U16VSS118 U18VSS119 V2VSS120 V7VSS121 V9VSS122 V11
VSS100 P17
C40
22U_0805_6.3V6M
1
2
C37
22U_0805_6.3V6M
1
2
C55
0.22U_0603_10V7K
1
2
C65
0.22U_0603_10V7K
1
2
C4522U_0805_6.3V6M
1
2
+ C797
820U_E9_2.5V_M_R7
45@
1
2
C35
10U_0805_10V4Z
1
2
C33
10U_0805_10V4Z
1
2
C68
0.22U_0603_10V7K
1
2
C49
4.7U_0805_10V4Z
1
2
C47
0.22U_0603_10V7K
1
2
+ C798
330U_D2E_2.5VM_R9
1
2
C52
4.7U_0805_10V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_BS#0
DDR_A_D26
DDR_A_D29
DDR_A_D27DDR_A_D30
DDR_A_D33
DDR_A_D31
DDR_A_D32
DDR_A_D28
DDR_A_D34DDR_A_D35
DDR_A_D38
DDR_A_D36
DDR_A_D39
DDR_A_D37
DDR_A_D41
DDR_A_D42
DDR_A_D44DDR_A_D40
DDR_A_D43 DDR_A_D47
DDR_A_D48
DDR_A_D45
DDR_A_D46
DDR_A_D49 DDR_A_D53
DDR_A_D51 DDR_A_D55DDR_A_D50
DDR_A_D52
DDR_A_D56
DDR_A_D54
DDR_A_D59
DDR_A_D57
DDR_A_D58
DDR_A_D61
DDR_A_D63
DDR_A_D60
DDR_A_D3
DDR_A_D8
DDR_A_D6DDR_A_D7
DDR_A_D5
DDR_A_D14
DDR_A_D9
DDR_A_D11DDR_A_D10
DDR_A_D13
DDR_A_D16
DDR_A_D15
DDR_A_D12
DDR_A_D17DDR_A_D20
DDR_A_D18 DDR_A_D22DDR_A_D19
DDR_A_D24
DDR_A_D21
DDR_A_D23
DDR_A_BS#2
DDR_A_BS#1
DDR_A_D25
DDR_A_D62
DDR_A_DM7
DDR_A_DM2
DDR_A_DM4
DDR_A_DM3
DDR_A_DM1
DDR_A_DM0
DDR_A_DM6
DDR_A_DM5
DDR_A_MA4
DDR_A_D0
DDR_A_D2
DDR_A_D1
DDR_A_D4
DDR_A_MA11
DDR_A_MA10
DDR_A_MA12DDR_A_MA9
DDR_A_MA6DDR_A_MA8
DDR_A_MA5
DDR_A_MA7
DDR_A_MA3DDR_A_MA0
DDR_A_MA13
DDR_A_MA15
DDR_A_MA2DDR_A_MA1
DDR_A_MA14
DDR_A_DQS2
DDR_A_DQS#0
DDR_A_DQS4
DDR_A_DQS0
DDR_A_DQS#1
DDR_A_DQS5
DDR_A_DQS7
DDR_A_DQS3
DDR_A_DQS6
DDR_A_DQS#7
DDR_A_DQS#4
DDR_A_DQS#2
DDR_A_DQS#6
DDR_A_DQS#3
DDR_A_DQS1
DDR_A_DQS#5
DDR_A_ODT1
DDR_CKE0_DIMMA
DDR_CS1_DIMMA#
DDR_A_RAS#DDR_A_WE#
DDR_CKE1_DIMMA
DDR_A_CAS#
DDR_CS0_DIMMA#
DDR_A_CLK#2
DDR_A_ODT0
DDR_A_CLK#1DDR_A_CLK1
DDR_A_CLK2
DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
SB_CK_SDATSB_CK_SCLK
DDR_A_MA7
DDR_A_MA10
DDR_A_WE#
DDR_CS3_DIMMA#
DDR_A_ODT0DDR_A_ODT1
DDR_A_MA5
DDR_A_MA8
DDR_A_MA6
DDR_CKE1_DIMMA
DDR_A_BS#0DDR_A_BS#1
DDR_A_CAS#
DDR_A_MA12
DDR_A_MA9
DDR_A_MA0
DDR_A_MA3
DDR_CKE0_DIMMA
DDR_A_BS#2
DDR_A_RAS#
DDR_A_MA4
DDR_A_MA2
DDR_A_MA13
DDR_A_MA11
DDR_A_MA1
DDR_CS2_DIMMA#
DDR_CS0_DIMMA#DDR_CS1_DIMMA#
DDR_A_MA14DDR_A_MA15
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]DDR_A_MA[0..15]<6>
DDR_A_D[0..63]<6>
DDR_A_DQS[0..7]<6>
DDR_A_DM[0..7]<6>
DDR_A_DQS#[0..7]<6>
DDR_A_CLK1 <6>DDR_A_CLK#1 <6>
DDR_CKE0_DIMMA<6>
DDR_CS2_DIMMA#<6>DDR_A_BS#2<6>
DDR_A_BS#0<6>DDR_A_WE#<6>
DDR_A_CAS#<6>DDR_CS1_DIMMA#<6>
DDR_A_ODT1<6>
DDR_A_CLK2 <6>DDR_A_CLK#2 <6>
DDR_CS3_DIMMA# <6>
DDR_CS0_DIMMA# <6>
DDR_A_ODT0 <6>
DDR_A_RAS# <6>DDR_A_BS#1 <6>
DDR_CKE1_DIMMA <6>
SB_CK_SCLK<10,15,23>SB_CK_SDAT<10,15,23>
+0.9V
+0.9V
+1.8V
+1.8V+DIMM_VREF+1.8V+1.8V
+3VS
+0.9V
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
9 55, 09, 2006星期四 三月
2005/10/11 2006/10/11
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
11/01 modify
Layout Note:Place one 0.1uF cap close to every 2 pullup resistors terminated to +0.9V
11/3 Modify
Compal Electronics, inc.
C102
0.1U_0402_16V4Z
1
2
C80
4.7U_0805_10V4Z
1
2
C97
0.1U_0402_16V4Z
1
2 C99
0.1U_0402_16V4Z
1
2
C927
0.1U_0402_16V4Z
1
2
JP1
P-TWO_A5692C-A0G16
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144DQS5# 146
DQS5 148VSS 150
DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
R47 47_0402_5%
1 2
R68 47_0402_5%
1 2
C88
4.7U_0805_10V4Z
1
2
C83
4.7U_0805_10V4Z
1
2
R57 47_0402_5%
1 2
C79
4.7U_0805_10V4Z
1
2
C928
0.1U_0402_16V4Z
1
2
R75 47_0402_5%
1 2
R66 47_0402_5%
1 2
R55 47_0402_5%
1 2
R60 47_0402_5%
1 2
C103
0.1U_0402_16V4Z
1
2
R78 10K_0402_5%
1 2
C100
0.1U_0402_16V4Z
1
2
C929
0.1U_0402_16V4Z
1
2
R64 47_0402_5%
1 2
C96
0.1U_0402_16V4Z
1
2
R72 47_0402_5%
1 2
C104
0.1U_0402_16V4Z
1
2
R58 47_0402_5%
1 2
C77
4.7U
_080
5_10
V4Z
1
2
C86
4.7U_0805_10V4Z
1
2
C930
0.1U_0402_16V4Z
1
2
C92
0.1U_0402_16V4Z
1
2
R65 47_0402_5%
1 2
C78
0.1U_0402_16V4Z
1
2
C91
0.1U_0402_16V4Z
1
2
C84
4.7U_0805_10V4Z
1
2
C82
4.7U_0805_10V4Z
1
2
C98
0.1U_0402_16V4Z
1
2
R50 47_0402_5%
1 2
R73 47_0402_5%
1 2
C931
0.1U_0402_16V4Z
1
2
C90
0.1U_0402_16V4Z
1
2
R59 47_0402_5%
1 2
C89
0.1U_0402_16V4Z
1
2
R70 47_0402_5%
1 2
R52 47_0402_5%
1 2
C932
0.1U_0402_16V4Z
1
2
C101
0.1U_0402_16V4Z
1
2
R69 47_0402_5%
1 2
R54 47_0402_5%
1 2
R48 47_0402_5%
1 2
C81
4.7U_0805_10V4Z
1
2
R56 47_0402_5%
1 2
R45
1K_0402_1%
12
C94
0.1U_0402_16V4Z
1
2
C933
0.1U_0402_16V4Z
1
2
+ C802
220U_D2_4VM
1
2
R67 47_0402_5%
1 2
R53 47_0402_5%
1 2
R51 47_0402_5%
1 2
R46
1K_0402_1%
12
R61 47_0402_5%
1 2
R71 47_0402_5%
1 2
C93
0.1U_0402_16V4Z
1
2
C87
4.7U_0805_10V4Z
1
2
R77 10K_0402_5%
1 2
R62 47_0402_5%
1 2
C926
0.1U_0402_16V4Z
1
2
R63 47_0402_5%
1 2
R49 47_0402_5%
1 2
C95
0.1U_0402_16V4Z
1
2
C85
4.7U_0805_10V4Z
1
2
R76 47_0402_5%
1 2
R74 47_0402_5%
1 2
+ C925
150U_D2_6.3VM
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_BS#0
DDR_B_D26
DDR_B_D29
DDR_B_D27DDR_B_D30
DDR_B_D33
DDR_B_D31
DDR_B_D32
DDR_B_D28
DDR_B_D34DDR_B_D35
DDR_B_D38
DDR_B_D36
DDR_B_D39
DDR_B_D37
DDR_B_D41
DDR_B_D42
DDR_B_D44DDR_B_D40
DDR_B_D43 DDR_B_D47
DDR_B_D48
DDR_B_D45
DDR_B_D46
DDR_B_D49 DDR_B_D53
DDR_B_D51 DDR_B_D55DDR_B_D50
DDR_B_D52
DDR_B_D56
DDR_B_D54
DDR_B_D59
DDR_B_D57
DDR_B_D58
DDR_B_D61
DDR_B_D63
DDR_B_D60
DDR_B_D3
DDR_B_D8
DDR_B_D6DDR_B_D7
DDR_B_D5
DDR_B_D14
DDR_B_D9
DDR_B_D11DDR_B_D10
DDR_B_D13
DDR_B_D16
DDR_B_D15
DDR_B_D12
DDR_B_D17DDR_B_D20
DDR_B_D18 DDR_B_D22DDR_B_D19
DDR_B_D24
DDR_B_D21
DDR_B_D23
DDR_B_BS#2
DDR_B_BS#1
DDR_B_D25
DDR_B_D62
DDR_B_DM7
DDR_B_DM2
DDR_B_DM4
DDR_B_DM3
DDR_B_DM1
DDR_B_DM0
DDR_B_DM6
DDR_B_DM5
DDR_B_MA4
DDR_B_D0
DDR_B_D2
DDR_B_D1
DDR_B_D4
DDR_B_MA11
DDR_B_MA10
DDR_B_MA12DDR_B_MA9
DDR_B_MA6DDR_B_MA8
DDR_B_MA5
DDR_B_MA7
DDR_B_MA3DDR_B_MA0
DDR_B_MA13
DDR_B_MA15
DDR_B_MA2DDR_B_MA1
DDR_B_MA14
DDR_B_DQS2
DDR_B_DQS#0
DDR_B_DQS4
DDR_B_DQS0
DDR_B_DQS#1
DDR_B_DQS5
DDR_B_DQS7
DDR_B_DQS3
DDR_B_DQS6
DDR_B_DQS#7
DDR_B_DQS#4
DDR_B_DQS#2
DDR_B_DQS#6
DDR_B_DQS#3
DDR_B_DQS1
DDR_B_DQS#5
DDR_B_ODT1
DDR_CKE0_DIMMB
DDR_CS1_DIMMB#
DDR_B_RAS#DDR_B_WE#
DDR_CKE1_DIMMB
DDR_B_CAS#
DDR_CS0_DIMMB#
DDR_B_CLK#2
DDR_B_ODT0
DDR_B_CLK#1DDR_B_CLK1
DDR_B_CLK2
DDR_CS3_DIMMB#
DDR_CS2_DIMMB#
SB_CK_SDATSB_CK_SCLK
DDR_B_MA7
DDR_B_MA10
DDR_B_WE#
DDR_CS3_DIMMB#
DDR_B_ODT0DDR_B_ODT1
DDR_B_MA5
DDR_B_MA8
DDR_B_MA6
DDR_CKE1_DIMMB
DDR_B_BS#0DDR_B_BS#1
DDR_B_CAS#
DDR_B_MA12
DDR_B_MA9
DDR_B_MA0
DDR_B_MA3
DDR_CKE0_DIMMB
DDR_B_BS#2
DDR_B_RAS#
DDR_B_MA4
DDR_B_MA2
DDR_B_MA13
DDR_B_MA11
DDR_B_MA1
DDR_CS2_DIMMB#
DDR_CS0_DIMMB#DDR_CS1_DIMMB#
DDR_B_MA14DDR_B_MA15
DDR_B_D[0..63]
DDR_B_MA[0..15]
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]DDR_B_MA[0..15]<6>
DDR_B_D[0..63]<6>
DDR_B_DQS[0..7]<6>
DDR_B_DM[0..7]<6>
DDR_B_DQS#[0..7]<6>
DDR_B_CLK1 <6>DDR_B_CLK#1 <6>
DDR_CKE0_DIMMB<6>
DDR_CS2_DIMMB#<6>DDR_B_BS#2<6>
DDR_B_BS#0<6>DDR_B_WE#<6>
DDR_B_CAS#<6>DDR_CS1_DIMMB#<6>
DDR_B_ODT1<6>
DDR_B_CLK2 <6>DDR_B_CLK#2 <6>
DDR_CS3_DIMMB# <6>
DDR_CS0_DIMMB# <6>
DDR_B_ODT0 <6>
DDR_B_RAS# <6>DDR_B_BS#1 <6>
DDR_CKE1_DIMMB <6>
SB_CK_SCLK<9,15,23>SB_CK_SDAT<9,15,23>
+0.9V
+0.9V
+1.8V
+DIMM_VREF+1.8V+1.8V
+3VS+3VS
+0.9V
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
10 55, 09, 2006星期四 三月
2005/10/11 2006/10/11
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
Layout Note:Place one 0.1uF cap close to every 2 pullup resistors terminated to +0.9V
11/3 Modify
Compal Electronics, inc.
R105 47_0402_5%
1 2R104 47_0402_5%
1 2
R108 47_0402_5%
1 2
C130
0.1U_0402_16V4Z
1
2C
110
4.7U_0805_10V4Z
1
2
C105
4.7U_0805_10V4Z
1
2
C107
4.7U_0805_10V4Z
1
2
C938
0.1U_0402_16V4Z
1
2
R107 47_0402_5%
1 2
C108
4.7U_0805_10V4Z
1
2
JP2
P-TWO_A5652C-A0G16
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144DQS5# 146
DQS5 148VSS 150
DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
R89 47_0402_5%
1 2
R102 47_0402_5%
1 2
R91 47_0402_5%
1 2
C109
4.7U_0805_10V4Z
1
2
C120
0.1U_0402_16V4Z
1
2
R96 47_0402_5%
1 2
C939
0.1U_0402_16V4Z
1
2R95 47_0402_5%
1 2
R103 47_0402_5%
1 2
C121
0.1U_0402_16V4Z
1
2
R92 47_0402_5%
1 2
C940
0.1U_0402_16V4Z
1
2
C113
4.7U_0805_10V4Z
1
2
C119
0.1U_0402_16V4Z
1
2
R85 47_0402_5%
1 2
R87 47_0402_5%
1 2
R83 47_0402_5%
1 2
R79 47_0402_5%
1 2R80 47_0402_5%
1 2
R100 47_0402_5%
1 2
C127
0.1U_0402_16V4Z
1
2
C941
0.1U_0402_16V4Z
1
2
R81 47_0402_5%
1 2
C116
4.7U_0805_10V4Z
1
2
R84 47_0402_5%
1 2
C118
0.1U_0402_16V4Z
1
2
R86 47_0402_5%
1 2
C123
0.1U_0402_16V4Z
1
2 C129
0.1U_0402_16V4Z
1
2
C112
4.7U_0805_10V4Z
1
2
C934
0.1U_0402_16V4Z
1
2
R82 47_0402_5%
1 2
R93 47_0402_5%
1 2
R88 47_0402_5%
1 2
C115
4.7U_0805_10V4Z
1
2
R109 10K_0402_5%
1 2
C125
0.1U_0402_16V4Z
1
2
C106
0.1U_0402_16V4Z
1
2
R94 47_0402_5%
1 2
C122
0.1U_0402_16V4Z
1
2
R97 47_0402_5%
1 2
C935
0.1U_0402_16V4Z
1
2
C131
0.1U_0402_16V4Z
1
2C124
0.1U_0402_16V4Z
1
2 C128
0.1U_0402_16V4Z
1
2
R90 47_0402_5%
1 2
R110 10K_0402_5%
1 2
R101 47_0402_5%
1 2
R106 47_0402_5%
1 2
R98 47_0402_5%
1 2
C936
0.1U_0402_16V4Z
1
2
C126
0.1U_0402_16V4Z
1
2
C114
4.7U_0805_10V4Z
1
2
C132
0.1U_0402_16V4Z
1
2
C117
0.1U_0402_16V4Z
1
2
R99 47_0402_5%
1 2
C937
0.1U_0402_16V4Z
1
2
C111
4.7U_0805_10V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CADOP5
HT_TXCALP
H_CADOP3
H_CADOP1
H_CADOP15
H_CTLIN0H_CTLIP0H_CTLOP0
H_CTLON0
H_CLKOP1H_CLKON1
H_CADOP13
H_CLKIN0H_CLKIP0H_CLKOP0
H_CLKON0
H_CADIP14H_CADIN14
H_CADIP8H_CADIN8
H_CADIP9H_CADIN9
H_CADON12
H_CADOP10
H_CADOP8
H_CADON7
H_CADON5
H_CADON3
H_CADON1
H_CADON15
H_CADON10
HT_TXCALN
H_CADON8
H_CADOP6
H_CADOP4
H_CADOP2
H_CADOP0
H_CADOP14
H_CADIP15
H_CADIP12H_CADIN12
H_CADIP13H_CADIN13H_CADON13
H_CADOP11
H_CADOP9
H_CADON6
H_CADON4
H_CADON2
H_CADON0
H_CADON14
H_CADIN15
H_CADIP10H_CADIN10
H_CADIP11H_CADIN11
H_CADOP12
H_CADON11
H_CADON9
H_CADOP7
HT_RXCALPHT_RXCALN
H_CADOP[0..15]H_CADON[0..15] H_CADIN[0..15]
H_CADIP[0..15]
H_CADIP2
H_CADIP6
H_CADIN4
H_CADIP0
H_CADIN3
H_CADIN7
H_CADIP4
H_CLKIP1H_CLKIN1
H_CADIN1
H_CADIP3
H_CADIP7
H_CADIP1
H_CADIN5
H_CADIN2
H_CADIN6
H_CADIN0
H_CADIP5
H_CADON[0..15] <5>H_CADOP[0..15] <5> H_CADIP[0..15]<5>
H_CADIN[0..15]<5>
H_CTLOP0<5>H_CTLON0<5>
H_CLKOP1<5>H_CLKON1<5>
H_CLKOP0<5>H_CLKON0<5>
H_CTLIP0 <5>H_CTLIN0 <5>
H_CLKIP1 <5>H_CLKIN1 <5>
H_CLKIP0 <5>H_CLKIN0 <5>
+1.2V_HT
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
11 55, 星期四 三 09, 2006月
2005/03/08 2006/03/08Compal Electronics, inc.
PART 1 OF 5
HYP
ER T
RA
NSP
OR
T C
PUI/F
U58A
215NSA4ALA11FG RS485M_BGA465
HT_TXCAD15P P21HT_TXCAD15N P22HT_TXCAD14P P18HT_TXCAD14N P19HT_TXCAD13P M22HT_TXCAD13N M21HT_TXCAD12P M18HT_TXCAD12N M19HT_TXCAD11P L18HT_TXCAD11N L19HT_TXCAD10P G22HT_TXCAD10N G21
HT_TXCAD9P J20HT_TXCAD9N J21HT_TXCAD8P F21HT_TXCAD8N F22
HT_TXCAD7P N24HT_TXCAD7N N25HT_TXCAD6P L25HT_TXCAD6N M24HT_TXCAD5P K25HT_TXCAD5N K24HT_TXCAD4P J23HT_TXCAD4N K23HT_TXCAD3P G25HT_TXCAD3N H24HT_TXCAD2P F25HT_TXCAD2N F24HT_TXCAD1P E23HT_TXCAD1N F23HT_TXCAD0P E24HT_TXCAD0N E25
HT_TXCLK1P L21HT_TXCLK1N L22
HT_TXCLK0P J24HT_TXCLK0N J25
HT_TXCTLP N23HT_TXCTLN P23
HT_TXCALP C25HT_TXCALN D24
HT_RXCAD15PR19HT_RXCAD15NR18HT_RXCAD14PR21HT_RXCAD14NR22HT_RXCAD13PU22HT_RXCAD13NU21HT_RXCAD12PU18HT_RXCAD12NU19HT_RXCAD11PW19HT_RXCAD11NW20HT_RXCAD10PAC21HT_RXCAD10NAB22HT_RXCAD9PAB20HT_RXCAD9NAA20HT_RXCAD8PAA19HT_RXCAD8NY19
HT_RXCAD7PT24HT_RXCAD7NR25HT_RXCAD6PU25HT_RXCAD6NU24HT_RXCAD5PV23HT_RXCAD5NU23HT_RXCAD4PV24HT_RXCAD4NV25HT_RXCAD3PAA25HT_RXCAD3NAA24HT_RXCAD2PAB23HT_RXCAD2NAA23HT_RXCAD1PAB24HT_RXCAD1NAB25HT_RXCAD0PAC24HT_RXCAD0NAC25
HT_RXCLK1PW21HT_RXCLK1NW22
HT_RXCLK0PY24HT_RXCLK0NW25
HT_RXCTLPP24HT_RXCTLNP25
HT_RXCALNC24 HT_RXCALPA24 R112100_0402_1%
1 2R111 49.9_0402_1%
1 2R113 49.9_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
A_MTX_SRX_N1A_MTX_C_SRX_P1A_MTX_SRX_P1A_MTX_C_SRX_N1
PCIE_MRX_PTX_P1_R
PCIE_MRX_PTX_P0_RPCIE_MRX_PTX_N0_R
PCIE_MTX_GRX_N15
PCIE_MTX_PRX_N1PCIE_MTX_C_PRX_P1PCIE_MTX_C_PRX_N1
PCIE_MTX_PRX_P1
PCIE_MTX_PRX_N0PCIE_MTX_C_PRX_P0PCIE_MTX_C_PRX_N0
PCIE_MTX_PRX_P0
A_MRX_STX_P0A_MRX_STX_N0 A_MTX_SRX_N0
A_MTX_C_SRX_P0A_MTX_SRX_P0A_MTX_C_SRX_N0
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P2
A_MRX_STX_P1A_MRX_STX_N1
PCIE_MRX_PTX_N1_R
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P8
PCIE_GTX_C_MRX_N14PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P0PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P9PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P1PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P10PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P2PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P11PCIE_GTX_C_MRX_N11PCIE_GTX_C_MRX_P12PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P3PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N8PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P13PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P7PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P5PCIE_GTX_C_MRX_N5PCIE_GTX_C_MRX_P6PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P14PCIE_MTX_C_GRX_N14PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_P0PCIE_MTX_C_GRX_N0PCIE_MTX_C_GRX_P1PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P6PCIE_MTX_C_GRX_N6PCIE_MTX_C_GRX_P7PCIE_MTX_C_GRX_N7PCIE_MTX_C_GRX_P8PCIE_MTX_C_GRX_N8PCIE_MTX_C_GRX_P9PCIE_MTX_C_GRX_N9PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12PCIE_MTX_C_GRX_N12PCIE_MTX_C_GRX_P13PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P5
PCIE_GTX_C_MRX_P[0..15]<16>
PCIE_GTX_C_MRX_N[0..15]<16>
PCIE_MTX_C_GRX_P[0..15]<16>
PCIE_MTX_C_GRX_N[0..15]<16>
PCIE_MRX_PTX_N0<39>PCIE_MRX_PTX_P0<39>
PCIE_MRX_PTX_N1<36>PCIE_MRX_PTX_P1<36>
A_MRX_STX_N1<22>A_MRX_STX_P1<22>
A_MRX_STX_N0<22>A_MRX_STX_P0<22>
PCIE_MTX_C_PRX_P0 <39>PCIE_MTX_C_PRX_N0 <39>
PCIE_MTX_C_PRX_P1 <36>PCIE_MTX_C_PRX_N1 <36>
A_MTX_C_SRX_P0 <22>A_MTX_C_SRX_N0 <22>
A_MTX_C_SRX_P1 <22>A_MTX_C_SRX_N1 <22>
+1.2V_HT
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
12 55, 星期四 三 09, 2006月
2005/03/08 2006/03/08
8.25KOhm FOR RS485DNI FOR RS690
10KOhm FOR RS4851.47KOhm FOR RS690 150 Ohm FOR RS485
562 Ohm FOR RS690100 Ohm FOR RS4852KOhm FOR RS690
R121:
R119:R213:
R214:
ATI side check , use +1.2V or not
Compal Electronics, inc.
R121 100_0402_1%
1 2
C151 0.1U_0402_16V7K
1 2
C155 0.1U_0402_16V7K
1 2
C152 0.1U_0402_16V7K
1 2
C135 0.1U_0402_16V7K
1 2
C168 0.1U_0402_16V7K
1 2
C171 0.1U_0402_16V7K
1 2
C169 0.1U_0402_16V7K
1 2
C156 0.1U_0402_16V7K
1 2
C160 0.1U_0402_16V7K
1 2
C142 0.1U_0402_16V7K
1 2
C138 0.1U_0402_16V7K
1 2
PART 2 OF 5
PCIE
I/F
GFX
PCIE I/F GPP
PCIE I/F SB
U58B
215NSA4ALA11FG RS485M_BGA465
GFX_TX0P J1GFX_TX0N H2GFX_TX1P K2GFX_TX1N K1GFX_TX2P K3GFX_TX2N L3GFX_TX3P L1GFX_TX3N L2GFX_TX4P N2GFX_TX4N N1GFX_TX5P P2GFX_TX5N P1GFX_TX6P P3GFX_TX6N R3GFX_TX7P R1GFX_TX7N R2GFX_TX8P T2GFX_TX8N U1GFX_TX9P V2GFX_TX9N V1
GFX_TX10P V3GFX_TX10N W3GFX_TX11P W1GFX_TX11N W2GFX_TX12P Y2GFX_TX12N AA1GFX_TX13P AA2GFX_TX13N AB2GFX_TX14P AB1GFX_TX14N AC1GFX_TX15P AE3GFX_TX15N AE4
GFX_RX0PG5GFX_RX0NG4GFX_RX1PJ8GFX_RX1NJ7GFX_RX2PJ4GFX_RX2NJ5GFX_RX3PL8GFX_RX3NL7GFX_RX4PL4GFX_RX4NL5GFX_RX5PM8GFX_RX5NM7GFX_RX6PM4GFX_RX6NM5GFX_RX7PP8GFX_RX7NP7GFX_RX8PP4GFX_RX8NP5GFX_RX9PR4GFX_RX9NR5GFX_RX10PR7GFX_RX10NR8GFX_RX11PU4GFX_RX11NU5GFX_RX12PW4GFX_RX12NW5GFX_RX13PY4GFX_RX13NY5GFX_RX14PV9GFX_RX14NW9GFX_RX15PAB7GFX_RX15NAB6
GPP_TX0P AD8GPP_TX0N AE8
GPP_TX1P AD7GPP_TX1N AE7
GPP_TX2P AD4GPP_TX2N AE5
GPP_TX3P AD5GPP_TX3N AD6
GPP_RX0PW11GPP_RX0NW12
GPP_RX1PAA11GPP_RX1NAB11
GPP_RX2PY7GPP_RX2NAA7
GPP_RX3PAB9GPP_RX3NAA9
SB_TX0P AE9SB_TX0N AD10
SB_TX1P AC8SB_TX1N AD9
SB_RX0PW14SB_RX0NW15
SB_RX1PAB12SB_RX1NAA12
PCEH_PCAL AD11PCEH_NCAL AE11PCEH_ISETAA14
PCEH_TXISETAB14
C159 0.1U_0402_16V7K
1 2
C163 0.1U_0402_16V7K
1 2
R120 8.25K_0402_1%1 2R118 10K_0402_1%
1 2
C146 0.1U_0402_16V7K
1 2
R117 0_0402_5%
1 2
C157 0.1U_0402_16V7K
1 2
C166 0.1U_0402_16V7K
1 2
C164 0.1U_0402_16V7K
1 2
C139 0.1U_0402_16V7K
1 2
C153 0.1U_0402_16V7K
1 2
C172 0.1U_0402_16V7K
1 2
C161 0.1U_0402_16V7K
1 2
C167 0.1U_0402_16V7K
1 2
C147 0.1U_0402_16V7K
1 2
C133 0.1U_0402_16V7K
1 2
C136 0.1U_0402_16V7K
1 2
C170 0.1U_0402_16V7K
1 2
C143 0.1U_0402_16V7K
1 2
C149 0.1U_0402_16V7K
1 2C150 0.1U_0402_16V7K
1 2
R116 0_0402_5%
1 2
C162 0.1U_0402_16V7K
1 2
C165 0.1U_0402_16V7K
1 2
C140 0.1U_0402_16V7K
1 2
C137 0.1U_0402_16V7K
1 2
C134 0.1U_0402_16V7K
1 2
C154 0.1U_0402_16V7K
1 2
C148 0.1U_0402_16V7K
1 2
R114 0_0402_5%
1 2R115 0_0402_5%
1 2
C145 0.1U_0402_16V7K
1 2
R119 150_0402_1%
1 2
C158 0.1U_0402_16V7K
1 2
C141 0.1U_0402_16V7K
1 2
C144 0.1U_0402_16V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LOAD_ROM#
DFT_GPIO3DFT_GPIO4DFT_GPIO5
DFT_GPIO0
DFT_GPIO2
LDT_STOP#_NBNB_PWRGD<42>LDT_STOP#<7,23>
NB_RST#<16,22,27,33,36,41>
ALLOW_LDTSTOP<22>
HTREFCLK<15>
NB_OSC<15>
NBSRC_CLKP<15>NBSRC_CLKN<15>
SBLINK_CLKP<15>SBLINK_CLKN<15>
BMREQ#<22>
+1.8VS
+1.8VS
+3VS
PLLVDD
HTPVDD
PLLVDD
HTPVDD
+1.8VS
+3VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
13 55, 星期四 三 09, 2006月
2005/03/08 2006/03/08
High, LOAD ROM STRAP DISABLE
LOAD_ROM#: LOAD ROM STRAP ENABLE
Low, LOAD ROM STRAP ENABLE
ATI check , CRT / TV/ LVDS can delete or not when I use RX485
Modify : 11/07
Modify : 11/07
Modify 11/29
Modify 11/29
Compal Electronics, inc.
L63
MBK1608800YZF_08051 2
C9481U_0402_6.3V4Z@
1
2
R81010K_0402_5%
1
2
R130 2.7K_0402_5%@1 2
D33 1N4148_SOT23
12
EB
C
Q4
MMBT3904_SOT23
2
3 1
R8470_0603_5%1 2
C9491U_0402_6.3V4Z@
1
2
T6 PAD
R1344.7K_0402_5%
12
R128 2.7K_0402_5%@1 2
C9501U_0402_6.3V4Z@
1
2
T9PAD
R123 715_0402_1%@1 2
C176
4.7U_0805_10V4Z
1
2
R127 10K_0402_5%
12
C173
10U_0805_10V4Z
1
2
R848
0_0603_5%1 2
R809 0_0603_5%1 2
R850
0_0603_5%1 2
T11PAD
R133 2.7K_0402_5%@1 2
C9471U_0402_6.3V4Z@
1
2
R131 2.7K_0402_5%@1 2
R129
3K_0402_5%@1 2
T5 PAD
T7PAD
C9511U_0402_6.3V4Z@
1
2
R1251K_0402_5%
12
C174
4.7U_0805_10V4Z
1
2
T4 PAD
R126 0_0402_5%
1 2
T10PAD
L67
MBK1608800YZF_0805
1 2R849
0_0603_5%1 2
R8460_0603_5%1 2
C175
10U_0805_10V4Z
1
2
PART 3 OF 5
PMC
LOC
Ks
PLL
PW
RM
IS.
CR
T/TV
OU
T
U58C
215NSA4ALA11FG RS485M_BGA465
HTPVDDB24HTPVSSB25
SYSRESET#C10POWERGOODC11LDTSTOP#C5ALLOW_LDTSTOPB5
OSCINB11OSCOUTA11
DFT_GPIO3C7
DFT_GPIO1D7DFT_GPIO2C8
BMREQbB2I2C_CLKA2I2C_DATAB4THERMALDIODE_PAA15THERMALDIODE_NAB15
DFT_GPIO4B8DFT_GPIO5A8
DFT_GPIO0D6
STRP_DATAA3
GFX_CLKPF2GFX_CLKNE1
SB_CLKPG1SB_CLKNG2
DVO_D0 AD14DVO_D1 AD15DVO_D2 AE15DVO_D3 AD16DVO_D4 AE16DVO_D5 AC17DVO_D6 AD18DVO_D7 AE19DVO_D8 AD19DVO_D9 AE20
DVO_D10 AD20DVO_D11 AE21
DVO_VSYNC AD13DVO_DE AC13
DVO_HSYNC AE13DVO_IDCKP AE17DVO_IDCKN AD17
PLLVDDA10PLLVSSB10
TXOUT_L0P B14TXOUT_L0N B15TXOUT_L1P B13TXOUT_L1N A13TXOUT_L2P H14TXOUT_L2N G14TXOUT_L3P D17
TXOUT_U0P A15
TXOUT_L3N E17
TXOUT_U0N B16TXOUT_U1P C17TXOUT_U1N C18TXOUT_U2P B17TXOUT_U2N A17TXOUT_U3P A18TXOUT_U3N B18
TXCLK_LP E15TXCLK_LN D15TXCLK_UP H15TXCLK_UN G15
LPVDD D14LPVSS E14
C_RC21Y_GC20COMP_BD19
REDE19
TMDS_HPDC14DDC_DATAB3TESTMODEC3
HTREFCLKB23 HTTSTCLKC23
TVCLKINC2
GREENF19BLUEG19DACVSYNCC6DACHSYNCA5
RSETB21
DACSCLB6DACSDAA6
AVDD1B22AVDD2C22AVSSN1G17AVSSN2H17AVDDDIA20AVSSDIB20
AVDDQA21AVSSQA22
LVDDR18D_1 A12
LVDDR18A_1 C12LVDDR18A_2 C13
LVSSR1 A16LVSSR3 A14
LVDDR18D_2 B12
LVSSR5 D12LVSSR6 C19LVSSR7 C15LVSSR8 C16
LVDS_DIGON E12LVDS_BLON G12LVDS_BLEN F12
LVSSR12 F14LVSSR13 F15
R132 2.7K_0402_5%@1 2
T8PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8VS
+1.8VS
+1.8VS
+3VS
+VDD_HT
VDD18
VDDA18
+1.2V_HT
+VDDA_12
+1.2V_HT+1.2V_HT+1.2V_HT
+1.2V_HT
VDDR
VDDR3
+1.2V_HT+VDDA_12
+1.2V_HT
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
14 55, 星期四 三 09, 2006月
2005/03/08 2006/03/08
S3
OFF
OFF
OFF
OFF
OFF
OFF
G3
OFF
S0
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFFAVDD
VDDC
VDDR3
VDDHT
NB RS485 POWER STATES
VDDA12
VDD18
Power Signal
VDDA18
HTPVDD
PLLVDD
S1
AVDDDI
VDDR
LVDDR18D
LPVDD
LVDDR18A OFFON ON OFF OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
S4/S5
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
RS690: VDDA18=1.2VRS485: VDDA18=1.8V
CURRENT MEASUREMENT
RS485: 0 Ohm RESISTORRS690: 220 Ohm 500mA FERRITE BEAD
OFF
3A bead
Modify 11/07 for EMI Close to U58.M1
Compal Electronics, inc.
L70
KC FBM-L11-201209-221LMAT_0805
1 2
C192
10U_0805_10V4Z
1
2
C211
1U_0402_6.3V4Z@
1
2
C19810U_0805_10V
4Z
1
2
C209
1U_0402_6.3V
4Z
@1
2
C193
10U_0805_10V4Z
1
2
C190
2.2U_0603_6.3V6K
1
2
C178
1U_0402_6.3V4Z
1
2
C204
1U_0402_6.3V4Z
1
2
C181
10U_0805_10V4Z
1
2
C191
2.2U_0603_6.3V6K
1
2
C183
10U_0805_10V4Z
1
2
C203
1U_0402_6.3V4Z
1
2
GR
OU
ND
PAR 5 OF 5
U58E
215NSA4ALA11FG RS485M_BGA465
VSS1A25VSS2F11VSS3D23VSS4E9VSS5G11VSS6Y23VSS7P11VSS8R24VSS9AE18VSS10M15VSS11J22VSS12G23VSS13J12VSS14L12VSS15L14VSS16L20VSS17L23VSS18M11VSS19M20VSS20M23VSS21M25VSS22N12VSS23N14
VSS25L24VSS26P13VSS27P20VSS28P15VSS29R12VSS30R14VSS31R20VSS32W23VSS33Y25VSS34AD25VSS35U20VSS36H25VSS37W24VSS38Y22VSS39AC23VSS40D25VSS41G24VSS42AC14
VSS44AC22
VSSA2 V12VSSA3 V11VSSA4 V14VSSA5 F3VSSA6 V15VSSA7 A1VSSA8 H1VSSA9 G3
VSSA10 J2VSSA11 H3
VSSA13 J6
VSSA15 F1VSSA16 L6VSSA17 M2VSSA18 M6VSSA19 J3VSSA20 P6VSSA21 T1VSSA22 N3
VSSA24 R6VSSA25 U2VSSA26 T3VSSA27 U3VSSA28 U6
VSSA30 Y1
VSSA32 W6VSSA33 AC2VSSA34 Y3VSSA35 Y9VSSA36 Y11
VSSA37 R9VSSA38 AD1VSSA39 AC5VSSA40 AC6VSSA41 AC7VSSA42 AD3VSSA43 AC9VSSA44 AC10VSSA45 G6
VSSA31 Y15
VSSA29 AC4
VSSA23 P9
VSSA14 AE6
VSSA12 AE10
VSSA1 M3
VSSA93 Y12VSSA94 Y14VSSA95 AA3
VSS45R23VSS46C4VSS47AE22VSS48T23VSS49T25VSS50AE14
VSS52H23
VSS54A23
VSS56F17VSS57D4
VSS59M13 VSS58AC16
VSS43H12
VSS55AC15
VSS53M17
VSS51R17
VSS24B7
C213
4.7U_0805_10V
4Z
1
2
C185
1U_0402_6.3V4Z
1
2
C21210U_0805_10V4Z
1
2C214
1U_0402_6.3V4Z
1
2
C184
10U_0805_10V4Z
1
2
C201
1U_0402_6.3V4Z
1
2
C194
1U_0402_6.3V4Z
1
2
L2
MBK1608800YZF_08051 2
C206
1U_0402_6.3V4Z
1
2
C196
1U_0402_6.3V4Z
1
2
C182
10U_0805_10V4Z
1
2
C200
1U_0402_6.3V4Z
1
2
C186
1U_0402_6.3V4Z
1
2
C188
1U_0402_6.3V4Z
1
2
C179
1U_0402_6.3V4Z
1
2
POW
ER
PART 4 OF 5U58D
215NSA4ALA11FG RS485M_BGA465
VDD_HT1AE24VDD_HT2AD24VDD_HT5AD22VDD_HT6AB17VDD_HT9AE23VDD_HT10Y17VDD_HT11W17VDD_HT12AC18VDD_HT13AD21VDD_HT14AC19VDD_HT15AC20VDD_HT16AB19VDD_HT17AD23VDD_HT18AA17VDD_HT19AE25
VDD18_1J14VDD18_2J15
VDDA12/VDDPLL_1E7
VDDA_12_1 D1VDDA_12_2 G7VDDA_12_3 E2VDDA_12_4 C1VDDA_12_5 E3VDDA_12_6 D2VDDA_12_7 M9VDDA_12_8 F4
VDDA_12_11 L9
VDDA18_8AE1 VDDA18_7AD2 VDDA18_6AC3 VDDA18_5AB4 VDDA18_4W7
VDDC_1 L11VDDC_2 L13VDDC_3 L15VDDC_4 M12VDDC_5 R15VDDC_6 M14VDDC_7 N11VDDC_8 N13VDDC_9 N15
VDDC_10 J11VDDC_11 H11VDDC_12 P12VDDC_13 P14VDDC_14 R11
VDDA18_1AE2VDDA18_2AB3VDDA18_3U7
VDDA12/VDDPLL_2F7
VDDC_15 R13
VDDR3_1D11 VDDR3_2E11
VSSA12/VSSPLL_1F9VSSA12/VSSPLL_2G9
VDDR_1AC12VDDR_2AD12VDDR_3AE12
VDDC_16 A19VDDC_17 B19VDDC_18 U11VDDC_19 U14VDDC_20 P17VDDC_21 L17VDDC_22 J19VDDC_23 D20VDDC_24 G20VDDC_25 A9VDDC_26 B9VDDC_27 C9VDDC_28 D9VDDC_29 A7VDDC_30 A4
VDDA_12_10 D3VDDA_12_9 B1
VDDHT_PKGD22VDDA12_PKG1M1VDDA12_PKG2AC11
VDDA_12_12 E6
VDDC_31 U12VDDC_32 U15
C189
1U_0402_6.3V4Z
1
2
C208
4.7U_0805_10V4Z
1
2
L4
MBK1608800YZF_08051 2
L69
KC FBM-L11-201209-221LMAT_0805
1 2
C210
1U_0402_6.3V4Z@
1
2
+ C803
220U_D2_4VM
1
2
C205
1U_0402_6.3V4Z
1
2
L3
MBK1608800YZF_08051 2
C180
1U_0402_6.3V4Z
1
2
C199
10U_0805_10V4Z
1
2
C195
1U_0402_6.3V4Z
1
2
C202
1U_0402_6.3V4Z
1
2
C187
1U_0402_6.3V4Z
1
2
C197
1U_0402_6.3V4Z
1
2L64
KC FBM-L11-201209-221LMAT_0805
1 2
C207
1U_0402_6.3V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SB_CK_SDAT
CLK_VDDA
CPUCLK_EXT_RCPUCLK#_EXT_R
SB_CK_SCLK
SB_OSCIN_R
NBSRC_CLKP_R
GPP_CLK4P_R
GFX_CLKP_R
GPP_CLK0P_RGPP_CLK4N_R
GFX_CLKN_R
SBSRC_CLKP_RSBSRC_CLKN_R
NBSRC_CLKN_R
HTREFCLK_R
NB_OSCIN_R
SBLINK_CLKP_RSBLINK_CLKN_R
CLK_48M_USB_RCLK_48M_SIO_R
FS0
SB_CK_SDAT
SB_CK_SCLK
ICH_SMBDATA
ICH_SMBCLK
GPP_CLK0N_R
CPUCLK <7>CPUCLK# <7>
CLK_PCIE_VGA <16>CLK_PCIE_VGA# <16>
CLK_14M_SIO <41>
CLK_SD_48M <37>CLK_USB_48M <23>
EXP_CLKREQ# <39>
SB_OSCIN <23>
MINI1_CLKREQ# <36>
HTREFCLK <13>
NB_OSC <13>
SBSRC_CLKP <22>SBSRC_CLKN <22>
NBSRC_CLKP <13>NBSRC_CLKN <13>
SBLINK_CLKP <13>SBLINK_CLKN <13>
SB_CK_SCLK<9,10,23>SB_CK_SDAT<9,10,23>
ICH_SMBDATA<36,39>
ICH_SMBCLK<36,39>
CLK_PCIE_CARD <39>CLK_PCIE_CARD# <39>CLK_PCIE_MINI1 <36>CLK_PCIE_MINI1# <36>
+3VS
+3VS
+3VS
CLK_VDD
CLK_VDD
CLK_VDD
+3VS
CLK_VDD
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
15 55, 星期四 三 09, 2006月
2005/03/08 2006/03/08
Reserved
48.0048.00
USB
48.0048.0048.0048.0048.00
Reserved
FS2
Hi-Z
SRCCLK
X/6X/3
CPUFS1
X
EXT CLK FREQUENCY SELECT TABLE(MHZ)
180.00220.00100.00133.33200.00
HTTFS0 PCI
0 0 1
0 1 1 1 0 0
1 0 1 1 1 1
0 0 0
0 1 0 30.0060.0036.56 73.1266.66 33.3366.66 33.3366.66 33.33 Normal ATHLON64 operation
ReservedReserved
[2:1]
Reserved
Hi-Z Hi-Z100.00 Reserved
COMMENT
100.00100.00100.00100.00100.00100.00
Parallel Resonance Crystal
1- PLACE ALL SERIAL TERMINATIONRESISTORS CLOSE TO U800
2- PUT DECOUPLING CAPS CLOSE TO U800POWER PIN
Ioh = 5 * Iref(2.32mA)Voh = 0.71V @ 60 ohm
Compal Electronics, inc.
R177
2.2K_0402_5%
12
L8
MBK2012121YZF_08051 2
L6
MBK2012121YZF_08051 2
C227
2.2U_0603_6.3V6K
1
2
C218
0.1U_0402_16V4Z
1
2
R180 8.2K_0402_5%
1 2
C225
10U_0805_10V4Z
1
2
R16
949
.9_0
402_
1%
12
R16
049
.9_0
402_
1%
12C230
0.1U_0402_16V4Z@
1
2
Y1
14.31818MHz_20P_1BX14318BE1A
12
R181 0_0402_5%@12
R151 33_0402_1%
1 2
R139261_0402_1%
1 2
C229
33P_0402_50V8J
1 2
C221
0.1U_0402_16V4Z
1
2
R143 33_0402_1%
1 2
R184 8.2K_0402_5%
1 2
C228
33P_0402_50V8J
1 2
R16
449
.9_0
402_
1%
12
R152 33_0402_1%
1 2
C216
0.1U_0402_16V4Z
1
2
R148
1M_0402_5%
@
12
R182 8.2K_0402_5%
1 2
R140 47_0402_1%1 2
R144 33_0402_1%
1 2
R16
349
.9_0
402_
1%
12
U8
ICS951462AGLFT_TSSOP64
X13
X24
VDDCPU54
GNDCPU53
RESET_IN#11
VDDSRC14
GND488
VDDATIG39
NC61
CPUCLK8T1 52CPUCLK8C1 51
CPUCLK8C0 55CPUCLK8T0 56
IREF48
GNDA 49VDDA 50
ATIGCLKT3 30
VDD485
ATIGCLKC3 31
VDDSRC23
GNDATIG38GNDREF1
SRCCLKT6 16SRCCLKC6 17ATIGCLKT0 41ATIGCLKC0 40
ATIGCLKT2 35ATIGCLKC2 34
SRCCLKT5 18SRCCLKC5 19SRCCLKT4 20SRCCLKC4 21SRCCLKT3 24SRCCLKC3 25SRCCLKT2 26SRCCLKC2 27
CLKREQA# 57CLKREQB# 32
48MHz_0 6
FS1/REF1 63FS0/REF0 64
SMBDAT10 SMBCLK9
VDDREF2
SRCCLKT0 47SRCCLKC0 46
FS2/REF2 62
GNDSRC15
GNDSRC29
VDDSRC28
ATIGCLKT1 37ATIGCLKC1 36GNDSRC22
SRCCLKT1 43SRCCLKC1 42SRCCLKT7 12SRCCLKC7 13
48MHz_1 7
CLKREQC# 33
HTTCLK0 59
VDDSRC44
GNDSRC45
VDDHTT60
GNDHTT58
R171 0_0402_5%
1 2
C217
0.1U_0402_16V4Z
1
2
C223
0.1U_0402_16V4Z
1
2
R15310K_0402_5%
12
R155 33_0402_1%
1 2
R175 33_0402_1%
1 2
R186 33_0402_1%
1 2
R190 33_0402_1%
1 2
R147 33_0402_1%
1 2
R192 0_0402_5%
1 2
L5
MBK2012121YZF_08051 2
R16
649
.9_0
402_
1%
12
R142 33_0402_1%
1 2
R176 33_0402_1%
1 2
R16
749
.9_0
402_
1%
12
C219
0.1U_0402_16V4Z
1
2C224
0.1U_0402_16V4Z 1
2
R156 33_0402_1%
1 2
R141 47_0402_1%1 2
R178
2.2K_0402_5%
12
R158 0_0402_5%
1 2
R185 0_0402_5%@12
C215
10U_0805_10V4Z
1
2
C226
2.2U_0603_6.3V6K
1
2
R188 33_0402_1%
1 2
R15
949
.9_0
402_
1%
12
R145 33_0402_1%
1 2
R16
249
.9_0
402_
1%
12
R17
049
.9_0
402_
1%
12
C220
0.1U_0402_16V4Z
1
2
R154 0_0402_5%
12
R16
149
.9_0
402_
1%
12
R149 33_0402_1%
1 2
L7
MBK2012121YZF_08051 2
R193 0_0402_5% 1 2
R173475_0402_1%
12
R183 0_0402_5%@12
R19151.1_0402_1%
12
R16
849
.9_0
402_
1%
12
R146 33_0402_1%
1 2
C222
0.1U_0402_16V4Z
1
2
R179
2.2K_0402_5%
12
R16
549
.9_0
402_
1%
12
R187 33_0402_1%
1 2
R150 33_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCIE_VGACLK_PCIE_VGA#
OSC_SPREAD
OSC_IN
OSC_IN
D+
D-
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
OSC_SPREADTHER_ALERT#
VGA_CRT_RVGA_CRT_GVGA_CRT_B
CRT_HSYNCCRT_VSYNC
VGA_CRT_DATVGA_CRT_CLK
VGA_TV_YVGA_TV_C
VGA_TV_COMP
I2C_DATI2C_CLK
MEMID0MEMID1MEMID2
THERM_SDATHERM_SCL
POWER_SEL
THERM_SCL
THER_ALERT#
THERM_SDA
D-
D+
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P2PCIE_MTX_C_GRX_N2PCIE_MTX_C_GRX_P3PCIE_MTX_C_GRX_N3PCIE_MTX_C_GRX_P4PCIE_MTX_C_GRX_N4PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7PCIE_MTX_C_GRX_P8PCIE_MTX_C_GRX_N8PCIE_MTX_C_GRX_P9PCIE_MTX_C_GRX_N9PCIE_MTX_C_GRX_P10PCIE_MTX_C_GRX_N10PCIE_MTX_C_GRX_P11PCIE_MTX_C_GRX_N11PCIE_MTX_C_GRX_P12PCIE_MTX_C_GRX_N12PCIE_MTX_C_GRX_P13PCIE_MTX_C_GRX_N13PCIE_MTX_C_GRX_P14PCIE_MTX_C_GRX_N14PCIE_MTX_C_GRX_P15PCIE_MTX_C_GRX_N15
PCIE_GTX_MRX_N0PCIE_GTX_C_MRX_P0PCIE_GTX_C_MRX_N0
PCIE_GTX_MRX_P1PCIE_GTX_MRX_N1
PCIE_GTX_C_MRX_P1PCIE_GTX_C_MRX_N1
PCIE_GTX_MRX_P2PCIE_GTX_MRX_N2
PCIE_GTX_C_MRX_P2PCIE_GTX_C_MRX_N2
PCIE_GTX_MRX_P3PCIE_GTX_MRX_N3
PCIE_GTX_C_MRX_P3PCIE_GTX_C_MRX_N3
PCIE_GTX_MRX_P4PCIE_GTX_MRX_N4
PCIE_GTX_C_MRX_P4PCIE_GTX_C_MRX_N4PCIE_GTX_C_MRX_P5PCIE_GTX_C_MRX_N5 PCIE_GTX_MRX_N5
PCIE_GTX_MRX_P5
PCIE_GTX_C_MRX_P6PCIE_GTX_C_MRX_N6 PCIE_GTX_MRX_N6
PCIE_GTX_MRX_P6
PCIE_GTX_C_MRX_P7PCIE_GTX_C_MRX_N7 PCIE_GTX_MRX_N7
PCIE_GTX_MRX_P7
PCIE_GTX_C_MRX_N8PCIE_GTX_C_MRX_P8 PCIE_GTX_MRX_P8
PCIE_GTX_MRX_N8PCIE_GTX_MRX_P9PCIE_GTX_MRX_N9
PCIE_GTX_C_MRX_P9PCIE_GTX_C_MRX_N9
PCIE_GTX_MRX_P10PCIE_GTX_MRX_N10
PCIE_GTX_C_MRX_P10PCIE_GTX_C_MRX_N10
PCIE_GTX_MRX_P11PCIE_GTX_MRX_N11
PCIE_GTX_C_MRX_P11PCIE_GTX_C_MRX_N11
PCIE_GTX_MRX_P12PCIE_GTX_MRX_N12
PCIE_GTX_C_MRX_P12PCIE_GTX_C_MRX_N12
PCIE_GTX_MRX_P13PCIE_GTX_MRX_N13
PCIE_GTX_C_MRX_P13PCIE_GTX_C_MRX_N13
PCIE_GTX_MRX_P15PCIE_GTX_MRX_N15
PCIE_GTX_C_MRX_P15PCIE_GTX_C_MRX_N15
PCIE_GTX_MRX_P14PCIE_GTX_C_MRX_P14
PCIE_GTX_MRX_P0
PCIE_GTX_MRX_N14PCIE_GTX_C_MRX_N14
CLK_PCIE_VGA<15>CLK_PCIE_VGA#<15>
PCIE_GTX_C_MRX_P[0..15]<12>
PCIE_GTX_C_MRX_N[0..15]<12>
PCIE_MTX_C_GRX_P[0..15]<12>
PCIE_MTX_C_GRX_N[0..15]<12>
NB_RST#<13,22,27,33,36,41>
POWER_SEL <53>
I2C_DAT <29>I2C_CLK <29>
VGA_CRT_R <28>VGA_CRT_G <28>VGA_CRT_B <28>
CRT_HSYNC <28>CRT_VSYNC <28>
VGA_CRT_DAT <28>VGA_CRT_CLK <28>
VGA_TV_Y <28>VGA_TV_C <28>VGA_TV_COMP <28>
+1.2VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
401412 B
SCHEMATIC, M/B LA-3151PCustom
16 55�星期 |, 09, 2006三月
2005/09/10 2006/09/10
Spread spectrum
Keep away from other signal at last 25mils
Minimize distance from X1 pin3 to U3 pin1
Low -> VDDC=1.2VHigh -> VDDC=1.0V
0: 50% TX output swing1: Full TX output swing
Straps: (Internal pull down)GPIO[0]
GPIO[1] 0: TX de-emphasis disable1: TX de-emphasis enable
Transmitter powersaving enableTransmitterde-emphasis enableDebug Access GPIO[4]
ROM ID Config GPIO[9, 13:11]
0: OFF Pad must be available1: ON
Thermal sensor
GPIO[6,5]PLL_IBIAS_RD Default : 01000X: No ROM,AP_SIZE=00001X: No ROM,AP_SIZE=01010X: No ROM,AP_SIZE=10011X: No ROM,AP_SIZE=11
128M shareMemory256M shareMemory64M shareMemoryReserved
PCIE Lane Reversal
MEMID[2:0]Vedio Memory Config. (VGA Internal PD)
Size Vender Chips
0 0 0Size64MB
256MB
0 0 10 1 00 1 11 0 0
1 1 0
64MB128MB128MB256MB
16M16 Hynix 2
1 0 1
1 1 1
16M16 Samsung 4
32M16 Samsung 4
Resreved
TBD
Need Level Shift
Need Level Shift
GENERICA NC,GENERICB Grounded -->Internal SS
16M16 Hynix 4
32M16 Hynix 4
FrequenceVGA
16M16 Samsung 2
Resreved
A-test
A-test
LVDS Bus
Memory Interface SS
C232 0.1U_0402_16V7K 1 2
R221 10K_0402_5% 1 2
R214 4.7K_0402_5% 1 2
C235 0.1U_0402_16V7K 1 2
R200 10K_0402_5%@1 2
R2244.7K_0402_5%
1 2
C244 0.1U_0402_16V7K 1 2C241 0.1U_0402_16V7K 1 2
C247 0.1U_0402_16V7K 1 2
R217 562_0603_1% 1 2
R227 121_0402_1% 1 2
C238 0.1U_0402_16V7K 1 2
X1
27MHZ_15P
OUT 3
GND 2
VDD4
OE1
C253 0.1U_0402_16V7K 1 2
C264
2200P_0402_50V7KTHM@
1 2
R198 10K_0402_5%@1 2C233 0.1U_0402_16V7K 1 2
C237 0.1U_0402_16V7K 1 2
R206 4.7K_0402_5% 1 2
C260 0.1U_0402_16V7K 1 2
R195 10K_0402_5%
1 2
C243 0.1U_0402_16V7K 1 2
R197 10K_0402_5%
1 2
C252 0.1U_0402_16V7K 1 2
U10
MAX6649MUA_8UMAXTHM@
VDD1
D+2
D-3
OVERT#4
SCLK 8
SDATA 7
ALERT# 6
GND 5
R229
71.5_0402_1%
12
PCI
EX
PRE
SS
CRT
XTAL
GPIO
VIP
HO
ST/ E
XTE
RN
AL
TMD
STV
THE
RM
AL
U9A
M56PM56@
PCIE_TX0PAK27PCIE_TX0NAJ27
PCIE_REFCLKPAL28PCIE_REFCLKNAK28
PCIE_CALRPAD24PCIE_CALIAB24
PERST#AG24
PCIE_TESTAA24PERST#_MASKAF24
RSET AL22
TESTEN AG22PLLTEST AG14
XTALOUTAM26
XTALINAL26
ROMCS# AC7
PCIE_TX1PAJ25PCIE_TX1NAH25PCIE_TX2PAH28PCIE_TX2NAG28PCIE_TX3PAG27PCIE_TX3NAF27PCIE_TX4PAF25PCIE_TX4NAE25PCIE_TX5PAE28PCIE_TX5NAD28PCIE_TX6PAD27PCIE_TX6NAC27PCIE_TX7PAC25PCIE_TX7NAB25PCIE_TX8PAB28PCIE_TX8NAA28PCIE_TX9PAA27PCIE_TX9NY27PCIE_TX10PY25PCIE_TX10NW25PCIE_TX11PW28PCIE_TX11NV28PCIE_TX12PV27PCIE_TX12NU27PCIE_TX13PU25PCIE_TX13NT25PCIE_TX14PT28PCIE_TX14NR28PCIE_TX15PR27PCIE_TX15NP27
PCIE_RX15PP31
GPIO_0 AD4GPIO_1 AD2GPIO_2 AD1GPIO_3 AD3GPIO_4 AC1GPIO_5 AC2GPIO_6 AC3
GPIO_7_BLON AB2GPIO_8 AC6GPIO_9 AC5
GPIO_10 AC4GPIO_11 AB3GPIO_12 AB4GPIO_13 AB5GPIO_14 AD5GPIO_15 AB8GPIO_16 AA8GPIO_17 AB7
NC AB6
VREFG AC8
PCIE_RX0PAJ31PCIE_RX0NAH31PCIE_RX1PAH30PCIE_RX1NAG30PCIE_RX2PAG32PCIE_RX2NAF32PCIE_RX3PAF31PCIE_RX3NAE31PCIE_RX4PAE30PCIE_RX4NAD30PCIE_RX5PAD32PCIE_RX5NAC32PCIE_RX6PAC31PCIE_RX6NAB31PCIE_RX7PAB30PCIE_RX7NAA30PCIE_RX8PAA32PCIE_RX8NY32PCIE_RX9PY31PCIE_RX9NW31PCIE_RX10PW30PCIE_RX10NV30PCIE_RX11PV32PCIE_RX11NU32PCIE_RX12PU31PCIE_RX12NT31PCIE_RX13PT30PCIE_RX13NR30PCIE_RX14PR32PCIE_RX14NP32
PCIE_RX15NN31
PCIE_CALRNAE24
R2SET AK14
NC_DVOVMODE_0 AK4NC_DVOVMODE_1 AL4
DVPCNTL_0 AF2DVPCNTL_1 AF1DVPCNTL_2 AF3
DVPCLK AG1DVPDATA_0 AG2DVPDATA_1 AG3DVPDATA_2 AH2DVPDATA_3 AH3DVPDATA_4 AJ2DVPDATA_5 AJ1DVPDATA_6 AK2DVPDATA_7 AK1DVPDATA_8 AK3DVPDATA_9 AL2
DVPDATA_10 AL3DVPDATA_11 AM3DVPDATA_12 AE6DVPDATA_13 AF4DVPDATA_14 AF5DVPDATA_15 AG4DVPDATA_16 AJ3DVPDATA_17 AH4DVPDATA_18 AJ4DVPDATA_19 AG5DVPDATA_20 AH5DVPDATA_21 AF6DVPDATA_22 AE7DVPDATA_23 AG6
DPLUSAG12
DMINUSAH12
DDC3DATAAE12DDC3CLKAF12
R2 AK15G2 AM15B2 AL15
R AK24G AM24B AL24
HSYNC AJ23VSYNC AJ22
DDC1DATA AH22DDC1CLK AH23
GENERICA AK22GENERICB AF23
H2SYNC AF15V2SYNC AG15
Y AJ15C AJ13
COMP AH15
TP4
C242 0.1U_0402_16V7K 1 2
R2102.2K_0402_5%THM@
12
TP1
R196 10K_0402_5%@1 2C231 0.1U_0402_16V7K 1 2
C236 0.1U_0402_16V7K 1 2
R207 10K_0402_5% X76@1 2
C257 0.1U_0402_16V7K 1 2
R230
1K_0
402_
5%
12
R215 2K_0402_1% 1 2
C2660.1U_0402_16V4Z
1 2
R211
2.2K_0402_5%THM@1
2
C240 0.1U_0402_16V7K 1 2
C246 0.1U_0402_16V7K 1 2
C261 0.1U_0402_16V7K 1 2
R22
2
0_06
03_5
%
SS
C@
12
C255 0.1U_0402_16V7K 1 2
R205 4.7K_0402_5% 1 2
R212 0_0402_5%THM@
1 2
C2500.1U_0402_16V4Z
1 2
C265
0.1U
_040
2_16
V4Z
SS
C@
1
2
R220 0_0402_5% 1 2
R218 1.47K_0603_1% 1 2
R223 715_0402_1% 12
C254 0.1U_0402_16V7K 1 2
R202 10K_0402_5%X76@1 2
C248 0.1U_0402_16V7K 1 2
R213 4.7K_0402_5% 1 2
C251 0.1U_0402_16V7K 1 2
C263 0.1U_0402_16V7K 1 2
R203 499_0402_1% 12
R216 1K_0402_5% 12
TP3
R228 1K_0402_5% 12
R219 499_0402_1% 12
R194 10K_0402_5% 1 2
R209 10K_0402_5% X76@1 2
R199 10K_0402_5%@1 2
R2254.7K_0402_5%
1 2
C249 0.1U_0402_16V7K 1 2
C256 0.1U_0402_16V7K 1 2
R208 10K_0402_5% X76@ 1 2
C262 0.1U_0402_16V7K 1 2
C234 0.1U_0402_16V7K 1 2
TP2
R201 10K_0402_5%X76@1 2C239 0.1U_0402_16V7K 1 2
R204 499_0402_1% 1 2
U11
ASM3P1819N-SR_SO8SSC@
XOUT8
REF 5
MODOUT 4XIN1
VDD7
NC 3
PD# 6VSS2
C259 0.1U_0402_16V7K 1 2
C245 0.1U_0402_16V7K 1 2
C258 0.1U_0402_16V7K 1 2
R226 22_0402_5%SSC@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_LVDSAC-VGA_LVDSAC+VGA_LVDSA0+VGA_LVDSA0-VGA_LVDSA1+VGA_LVDSA1-VGA_LVDSA2+VGA_LVDSA2-
ENVDD
VGA_DVI_CLKVGA_DVI_DAT
VGA_LVDSBC-VGA_LVDSBC+
VGA_LVDSB0+VGA_LVDSB0-VGA_LVDSB1+VGA_LVDSB1-VGA_LVDSB2+VGA_LVDSB2-
VGA_DVI_DET
DVI_TX1+
DVI_TX0+
DVI_TXC+
DVI_TX2+
DVI_TXC-
DVI_TX0-
DVI_TX1-
DVI_TX2-
DVI_TXC+_L
DVI_TX0-_L
DVI_TXC-_L
DVI_TX0+_L
DVI_TX1-_LDVI_TX1+_L
DVI_TX2-_LDVI_TX2+_L
DVI_TXC-DVI_TXC+
DVI_TX0-DVI_TX0+
DVI_TX1-DVI_TX1+
DVI_TX2-DVI_TX2+
VGA_LVDSBC+ <29>VGA_LVDSBC- <29>VGA_LVDSB0+ <29>VGA_LVDSB0- <29>VGA_LVDSB1+ <29>VGA_LVDSB1- <29>VGA_LVDSB2+ <29>VGA_LVDSB2- <29>
VGA_LVDSAC- <29>VGA_LVDSAC+ <29>VGA_LVDSA0+ <29>VGA_LVDSA0- <29>VGA_LVDSA1+ <29>VGA_LVDSA1- <29>VGA_LVDSA2+ <29>VGA_LVDSA2- <29>
ENBKL <33>
ENVDD <29>
VGA_DVI_DAT <30>VGA_DVI_CLK <30>
VGA_DVI_DET <30>
DVI_TXC- <30>DVI_TXC+ <30>
DVI_TX0- <30>DVI_TX0+ <30>
DVI_TX1- <30>DVI_TX1+ <30>
DVI_TX2- <30>DVI_TX2+ <30>
+3VS
+VDD25
+VDD_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
401412 B
SCHEMATIC, M/B LA-3151PCustom
17 55�星期 |, 09, 2006三月
2005/09/10 2006/09/10
Use 15mils traceconnect to GND
Need LevelShift
To EC
10/20/05"
10/20/05"
Close to connector
11/07/05"
100mA
100mAR629 0_0402_5% DVI@12
LVD
SE
XPA
ND
GPI
OF
OR
EA
RD
CO
MPA
TIB
ILIT
YIN
TER
GR
ATE
D T
MD
S
U9B
M56PM56@
DDC2DATA AH13DDC2CLK AG13
HPD1 AF11
TXCLK_UP AJ21TXCLK_UN AK21
TXOUT_U0P AG18TXOUT_U0N AH18TXOUT_U1P AK20TXOUT_U1N AJ20TXOUT_U2P AG20TXOUT_U2N AH20TXOUT_U3P AH21TXOUT_U3N AG21
TXCLK_LN AL18TXCLK_LP AM18
TXOUT_L0P AL19TXOUT_L0N AK19TXOUT_L1P AM20TXOUT_L1N AL20TXOUT_L2P AM21TXOUT_L2N AL21TXOUT_L3P AJ18TXOUT_L3N AK18
VARY_BL AD12DIGON AE11
GENERICD AD23
TXCM AL9TXCP AM9
TX0M AK10TX0P AL10
TX1M AL11TX1P AM11
TX2M AL12TX2P AM12
TX3M AK9TX3P AJ9
TX4M AK11TX4P AJ11
TX5M AK12TX5P AJ12
GPIO_18AE13GPIO_19AF13GPIO_20AF9GPIO_21AG7GPIO_22AE10GPIO_23AE9GPIO_24AF7GPIO_25AF8GPIO_26AH6GPIO_27AF10GPIO_28AG10GPIO_29AH9GPIO_30AJ8GPIO_31AH8GPIO_32AG9GPIO_33AH7GPIO_34AG8
GENERICCAE23
BBNY23BBNK15BBNR10BBNAC17
BBPAC14BBPM23BBPV10BBPK18
VDD25L10VDD25K22VDD25AA10
R630 0_0402_5% DVI@ 12
R235 180_0402_5% DVI@1 2
R237 6.8K_0402_5% 1 2
TMD
S G
ND
CRT
GN
DTV
GN
DPL
L G
ND
LVD
S PL
L&I/O
GN
D
PCIE
GN
D
U9G
M56PM56@
PCIE_VSSAH27PCIE_VSSAC23PCIE_VSSAL27PCIE_VSSR23PCIE_VSSP25PCIE_VSSR25PCIE_VSST26PCIE_VSSU26PCIE_VSSY26PCIE_VSSAB26PCIE_VSSAC26PCIE_VSSAD25PCIE_VSSAE26PCIE_VSSAF26PCIE_VSSAD26PCIE_VSSAG25PCIE_VSSAH26PCIE_VSSAC28PCIE_VSSY28PCIE_VSSU28PCIE_VSSP28PCIE_VSSAH29PCIE_VSSAF28PCIE_VSSV29PCIE_VSSAC29PCIE_VSSW27PCIE_VSSAB27PCIE_VSSV26PCIE_VSSAJ26PCIE_VSSAJ32PCIE_VSSAK29PCIE_VSSP26PCIE_VSSP29PCIE_VSSR29PCIE_VSST29PCIE_VSSU29PCIE_VSSW29PCIE_VSSY29PCIE_VSSAA29PCIE_VSSAB29PCIE_VSSAD29PCIE_VSSAE29PCIE_VSSAF29PCIE_VSSAG29PCIE_VSSAJ29PCIE_VSSAK26PCIE_VSSAK30PCIE_VSSAG26PCIE_VSSN30PCIE_VSSR31PCIE_VSSAF30PCIE_VSSAC30PCIE_VSSV31PCIE_VSSP30PCIE_VSSAA31PCIE_VSSU30PCIE_VSSAD31PCIE_VSSAK32PCIE_VSSAJ28PCIE_VSSY30PCIE_VSSAJ30PCIE_VSSAK31 PCIE_VSS AA23PCIE_VSS N24
TXVSSR AJ7TXVSSR AK7TXVSSR AL7TXVSSR AM7TXVSSR AK8
AVSSQ AK23AVSSN AK25AVSSN AJ24
VSS1DI AL23
TPVSS AL8
A2VSSN AM17A2VSSN AL17
VSS2DI AJ17
PVSS AH14
MPVSS A5
LPVSS AE18
A2VSSQ AK13
LVSSR AK17LVSSR AJ19LVSSR AF18LVSSR AH17LVSSR AG17LVSSR AG19LVSSR AH19LVSSR AF22LVSSR AF17LVSSR AF21
PCIE_VSS AB23PCIE_VSS P24PCIE_VSS R24PCIE_VSS T24PCIE_VSS U24PCIE_VSS V24PCIE_VSS W24PCIE_VSS Y24PCIE_VSS AC24PCIE_VSS AH24PCIE_VSS V25PCIE_VSS AA25PCIE_VSS R26PCIE_VSS AA26PCIE_VSS T27PCIE_VSS AE27PCIE_VSS AG31PCIE_VSS W26
PCIE_PVSS W23
R635 0_0402_5% [email protected]_0402_16V4Z
1
2
R236 6.8K_0402_5% 1 2
C268
0.1U_0402_16V4Z
1
2
R636 0_0402_5% DVI@12
R233 180_0402_5% DVI@ 1 2
R631 0_0402_5% DVI@12
CORE
GND
U9F
M56PM56@
VSSB1VSSH1VSSL1VSSP1VSSU1VSSY1VSSAD7VSSAE8VSSAL1VSSA2VSSAM2VSSAD10VSSE8VSSH5VSSK10VSSM8VSST10VSSE12VSSAC9VSSAF14VSSAD8VSSC5VSSF10VSSJ3VSSL6VSSM6VSSP6VSSAA4VSSAG11VSSV3VSSAG16VSSR3VSSC6VSSC9VSSF6VSSH7VSSJ6VSSAD16VSSAA6VSSP7VSSP5VSSM3VSSM9VSSL7VSSM7VSSAD17VSSAH11VSSA8VSSU7VSSC10VSSE9VSSF3VSSJ9VSSN7VSSN3VSSY5VSSAM13VSSAC10VSSY6VSSU6VSSE5VSSAL13VSSA11VSSU8VSSU9VSSU10VSSR6VSSAD6VSSV6VSSAD14VSSAD13VSSD11VSSJ12VSSK12VSSA13VSSF13VSSE13VSSF15VSSK16
VSS C27VSS E32VSS H28VSS J30VSS K17VSS K27VSS M32VSS A22VSS C20VSS E19VSS H20VSS J24VSS M28VSS J28VSS J16VSS F30VSS L29VSS A31VSS B32VSS E30VSS AE15VSS AG23VSS AD9VSS AF16VSS AH10VSS AJ10VSS AD15VSS AH16VSS K23VSS U18VSS AE16VSS AE17VSS A19VSS H32VSS F19VSS G19VSS N8VSS Y7VSS T19VSS V19VSS G21VSS C21VSS F21VSS AE14VSS AK16VSS U5VSS F22VSS F18VSS K30VSS C24VSS F24VSS M24VSS A25VSS D30VSS E25VSS G25VSS G20VSS G22VSS F27VSS E28VSS H21VSS J21VSS H16VSS T15VSS V17VSS C15VSS C4VSS U14VSS P15VSS A16VSS E16VSS G13VSS G16VSS P17VSS R16VSS R14VSS W16VSS C18VSS F16
VSSW18
R231 10K_0402_5% 1 2
R232 180_0402_5% DVI@1 2
R234 180_0402_5% DVI@ 1 2
R633 0_0402_5% DVI@12
R632 0_0402_5% DVI@12
R634 0_0402_5% DVI@ 12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MEMTEST
MEM_RST
+MVREFS_1+MVREFD_1
+MVREFD_1
FBCD38FBCD39FBCD40FBCD41FBCD42FBCD43FBCD44FBCD45FBCD46FBCD47FBCD48FBCD49FBCD50FBCD51FBCD52FBCD53FBCD54FBCD55FBCD56FBCD57FBCD58FBCD59FBCD60FBCD61
FBCD0
FBCD62FBCD63
FBCD1FBCD2FBCD3FBCD4FBCD5FBCD6FBCD7FBCD8FBCD9FBCD10FBCD11FBCD12FBCD13FBCD14FBCD15FBCD16FBCD17FBCD18FBCD19FBCD20FBCD21FBCD22FBCD23FBCD24FBCD25FBCD26FBCD27FBCD28FBCD29FBCD30FBCD31FBCD32FBCD33FBCD34FBCD35FBCD36FBCD37
FBCA2FBCA1FBCA0
FBCA3FBCA4FBCA5
FBCA8FBCA7
FBCA10FBCA9
FBCA11
FBCA6
FBCDQM#3
FBCDQM#1FBCDQM#2
FBCDQM#0
FBCDQM#4
FBCDQM#6FBCDQM#5
FBCDQM#7
FBCDQS1
FBCDQS3
FBCDQS6FBCDQS7
FBCDQS5FBCDQS4
FBCDQS0
FBCDQS2
FBCDQS#1
FBCDQS#3
FBCDQS#6FBCDQS#7
FBCDQS#5FBCDQS#4
FBCDQS#0
FBCDQS#2
FBCODT0FBCODT1
FBCCLK0FBCCLK0#
FBCCLK1FBCCLK1#
FBC_CKE0
FBC_CKE1
FBCRAS0#
FBCRAS1#
FBCCAS0#
FBCCAS1#
FBCWE0#
FBCWE1#
FBCCS0#
FBCCS1#
FBCDQS#[0..7]
FBCDQM#[0..7]
FBCDQS[0..7]
FBCA[0..12]
FBCD[0..63]
FBC_BA1
FBC_BA0
FBCA12
FBC_BA0FBC_BA1
FBCCLK0#
FBCCLK1
FBCCLK1#
FBCCLK0
FBCD[0..63]<20,21>
FBCA[0..12]<20,21>
FBCDQS[0..7]<20,21>
FBCDQS#[0..7]<20,21>
FBCDQM#[0..7]<20,21>
FBC_BA0<20,21>
FBC_BA1<20,21>
FBCODT0 <20>FBCODT1 <21>
FBCCLK0 <20>FBCCLK0# <20>
FBC_CKE0 <20>
FBCRAS0# <20>
FBCCAS0# <20>
FBCWE0# <20>
FBCCS0# <20>
FBCCLK1 <21>FBCCLK1# <21>
FBC_CKE1 <21>
FBCRAS1# <21>
FBCCAS1# <21>
FBCWE1# <21>
FBCCS1# <21>
+1.8VS+1.8VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
401412 B
SCHEMATIC, M/B LA-3151PCustom
18 55�星期 |, 09, 2006三月
2005/09/10 2006/09/10
(15mil)
(15mils)(15mils)
GDDR2
10/20/05"Close to Memory Side
Modify 11/22
R638 56_0402_5%12
R637 56_0402_5%12
R238100_0402_1%
12
R640 56_0402_5%64BIT@12
T32PAD
R242100_0402_1%
12
C805
470P_0402_50V7K64BIT@
1 2
R239100_0402_1%
12
R245243_0603_1%
1 2
R2434.7K_0402_5%
1 2
MEMORY A
U9C
M56PM56@
DQA_0M31DQA_1M30DQA_2L31DQA_3L30DQA_4H30DQA_5G31DQA_6G30DQA_7F31DQA_8M27DQA_9M29DQA_10L28DQA_11L27DQA_12J27DQA_13H29DQA_14G29DQA_15G27DQA_16M26DQA_17L26DQA_18M25DQA_19L25DQA_20J25DQA_21G28DQA_22H27DQA_23H26DQA_24F26DQA_25G26DQA_26H25DQA_27H24DQA_28H23DQA_29H22DQA_30J23DQA_31J22DQA_32E23DQA_33D22DQA_34D23DQA_35E22DQA_36E20DQA_37F20DQA_38D19DQA_39D18DQA_40B19DQA_41B18DQA_42C17DQA_43B17DQA_44C14DQA_45B14DQA_46C13DQA_47B13DQA_48D17DQA_49E18DQA_50E17DQA_51F17DQA_52E15DQA_53E14DQA_54F14DQA_55D13DQA_56H18DQA_57H17DQA_58G18DQA_59G17DQA_60G15DQA_61G14DQA_62H14DQA_63J14
MVREFD_0C31MVREFS_0C30
MAA_0 D26MAA_1 F28MAA_2 D28MAA_3 D25MAA_4 E24MAA_5 E26MAA_6 D27MAA_7 F25MAA_8 C26MAA_9 B26
MAA_10 D29MAA_11 B27MAA_12 B25MAA_13 C25MAA_14 E27MAA_15 E29
DQMA#_0 H31DQMA#_1 J29DQMA#_2 J26DQMA#_3 G23DQMA#_4 E21DQMA#_5 B15DQMA#_6 D14DQMA#_7 J17
QSA_0 J31QSA_1 K29QSA_2 K25QSA_3 F23QSA_4 D20QSA_5 B16QSA_6 D16QSA_7 H15
QSA_0# K31QSA_1# K28QSA_2# K26QSA_3# G24QSA_4# D21QSA_5# C16QSA_6# D15QSA_7# J15
ODTA0 F29ODTA1 D24
CLKA0 D31CLKA0# E31
CKEA0 B30
RASA0# B28
CASA0# C29
WEA0# B31
CSA0#_0 B29CSA0#_1 C28
CLKA1 B20CLKA1# C19
CKEA1 C22
RASA1# B24
CASA1# B22
WEA1# B21
CSA1#_0 B23CSA1#_1 C23
R240100_0402_1%
12
T33PAD
R2414.7K_0402_5%
1 2
R639 56_0402_5%64BIT@
12
C269
0.1U
_040
2_16
V4Z
1
2C270
0.1U
_040
2_16
V4Z
1
2
C804
470P_0402_50V7K
1 2
MEMORY B
U9D
M56PM56@
DQB_0B12DQB_1C12DQB_2B11DQB_3C11DQB_4C8DQB_5B7DQB_6C7DQB_7B6DQB_8F12DQB_9D12DQB_10E11DQB_11F11DQB_12F9DQB_13D8DQB_14D7DQB_15F7DQB_16G12DQB_17G11DQB_18H12DQB_19H11DQB_20H9DQB_21E7DQB_22F8DQB_23G8DQB_24G6DQB_25G7DQB_26H8DQB_27J8DQB_28K8DQB_29L8DQB_30K9DQB_31L9DQB_32K5DQB_33L4DQB_34K4DQB_35L5DQB_36N5DQB_37N6DQB_38P4DQB_39R4DQB_40P2DQB_41R2DQB_42T3DQB_43T2DQB_44W3DQB_45W2DQB_46Y3DQB_47Y2DQB_48T4DQB_49R5DQB_50T5DQB_51T6DQB_52V5DQB_53W5DQB_54W6DQB_55Y4DQB_56R8DQB_57T8DQB_58R7DQB_59T7DQB_60V7DQB_61W7DQB_62W8DQB_63W9
MVREFD_1B3MVREFS_1C3
MAB_0 G4MAB_1 E6MAB_2 E4MAB_3 H4MAB_4 J5MAB_5 G5MAB_6 F4MAB_7 H6MAB_8 G3MAB_9 G2
MAB_10 D4MAB_11 F2MAB_12 H2MAB_13 H3MAB_14 F5MAB_15 D5
DQMB#_0 B8DQMB#_1 D9DQMB#_2 G9DQMB#_3 K7DQMB#_4 M5DQMB#_5 V2DQMB#_6 W4DQMB#_7 T9
QSB_0 B9QSB_1 D10QSB_2 H10QSB_3 K6QSB_4 N4QSB_5 U2QSB_6 U4QSB_7 V8
QSB_0# B10QSB_1# E10QSB_2# G10QSB_3# J7QSB_4# M4QSB_5# U3QSB_6# V4QSB_7# V9
ODTB0 D6ODTB1 J4
CLKB0 B4CLKB0# B5
CKEB0 C2
RASB0# E2
CASB0# D3
WEB0# B2
CSB0#_0 D2CSB0#_1 E3
CLKB1 N2CLKB1# P3
CKEB1 L3
RASB1# J2
CASB1# L2
WEB1# M2
CSB1#_0 K2CSB1#_1 K3
DRAM_RSTAA3
TEST_MCLKAA5
TEST_YCLKAA2
MEMTESTAA7
R2444.7K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VDDRH0
+A2VDD
+VDDCI
+MPVDD
+VDD1DI
+AVDD
+VDDRH1
+PVDD
+PCIE_PVDD
+PCIE_VDDR
+VDDPLL
+VDDRH1
+LVDDR
+1.8VS
+1.8VS
+VDD_CORE +VDD_CORE +VDD_CORE
+2.5VS
+1.2VS
+VDD_CORE
+3VS+3VS
+1.8VS
+2.5VS
+2.5VS
+VDD1DI
+2.5VS
+2.5VS
+2.5VS
+VDD_CORE
+LPVDD
+VDD25
+2.5VS
+2.5VS
+LPVDD
+1.2VS
+1.2VS
+1.8VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
401412 B
SCHEMATIC, M/B LA-3151PCustom
19 55�星期 |, 09, 2006三月
2005/09/10 2006/09/10
1000mA for GDDR12400mA for GDDR3
150mA
60mA
20mA
300mA
240mA
60mA
160mA
100mA
1500mA
50mA
100mA
100mA
50mA
120mA
50mA
VDDC+VDDCI=18A
500mA
400mA
?mA
10/20/05"
For PCIE_PVDD_12 only
L need close to chip
10/20/05"
100mA
Modify 11/18
L47
BLM18PG121SN1D_0603 1 2
C3590.1U_0402_16V4Z
1
2
C303
0.1U_0402_16V4Z
1 2
C283
22U_0805_6.3V6M
1 2
C289
1U_0402_6.3V4Z
1
2
C323
0.1U_0402_16V4Z
1 2
C362
0.1U_0402_16V4Z
1
2
C361
22U_0805_6.3V6M
1
2
C3560.1U_0402_16V4Z
1
2
C274
22U_0805_6.3V6M
1 2
C330
0.1U_0402_16V4Z
1 2
C328
0.1U_0402_16V4Z
1 2
L9
MBK1608301YZF_06031 2
C310
0.1U_0402_16V4Z
1 2
C343
0.1U_0402_16V4Z
1
2
C275
1U_0402_6.3V4Z
1
2
C342
0.1U_0402_16V4Z
1
2
L15BLM15AG121SN1D_0402
1 2
C3690.1U_0402_16V4Z
1
2
C288
22U_0805_6.3V6M
1
2
C281
0.1U_0402_16V4Z
1 2
L17
BLM15AG121SN1D_0402 1 2
C305
0.1U_0402_16V4Z
1 2C306
0.1U_0402_16V4Z
1 2
C341
0.1U_0402_16V4Z
1
2
C3630.1U_0402_16V4Z 1
2
C370
0.1U_0402_16V4Z 1
2C366
22U_0805_6.3V6M
1
2
C351
0.1U_0402_16V4Z
1
2
C322
0.1U_0402_16V4Z
1 2
L11
BLM18PG121SN1D_0603 1 2
C291
0.1U_0402_16V4Z
1
2
L14
BLM15AG121SN1D_0402 1 2
C302
0.1U_0402_16V4Z
1 2
C278
1U_0402_6.3V4Z
1
2
L60
BLM18PG121SN1D_0603 1 2
C318
0.1U_0402_16V4Z
1 2
C293
0.1U_0402_16V4Z
1
2
C339
0.1U_0402_16V4Z
1 2
L16
BLM15AG121SN1D_0402 1 2
C314
22U_0805_6.3V6M
1 2
C319
0.1U_0402_16V4Z
1 2
L10
BLM15AG121SN1D_0402 1 2
C282
0.1U_0402_16V4Z
1 2
C307
22U_0805_6.3V6M
1 2
R641
0_0805_5% 1 2
C357
22U_0805_6.3V6M
1
2
C292
0.1U_0402_16V4Z
1
2
C300
22U_0805_6.3V6M
1 2
PC
I E
XPR
ESS
CO
RE
I/O
IN
TERN
ALLV
DS
PLL,
I/O
ME
MO
RY
I/O
I/O
MEM
I/O
CLO
CK
POWER
TMD
S
CR
TT
VPL
L
U9E
M56PM56@
VDDR1C1VDDR1J1VDDR1M1VDDR1R1VDDR1V1VDDR1AA1VDDR1A3VDDR1P9VDDR1J10VDDR1N9VDDR1P10VDDR1A9VDDR1Y10VDDR1P8VDDR1R9VDDR1Y9VDDR1J11VDDR1A21VDDR1M10VDDR1N10VDDR1Y8VDDR1J18VDDR1J19VDDR1K21VDDR1A12VDDR1H13VDDR1A15VDDR1J20VDDR1J13VDDR1K11VDDR1K19VDDR1A18VDDR1L23VDDR1K20VDDR1K24VDDR1L24VDDR1H19VDDR1A24VDDR1K13VDDR1J32VDDR1A30VDDR1C32VDDR1F32VDDR1L32
PCIE_PVDD_12 V23PCIE_PVDD_12 N23PCIE_PVDD_12 P23PCIE_PVDD_12 U23
PCIE_VDDR_12 N29PCIE_VDDR_12 N28PCIE_VDDR_12 N27PCIE_VDDR_12 N26PCIE_VDDR_12 N25
VDDC AC11VDDC AC12VDDC P14VDDC U15VDDC W14VDDC W15VDDC R17VDDC R15VDDC V15VDDC V16VDDC T16VDDC U16VDDC T17VDDC U17VDDC V14VDDC R18VDDC T18VDDC V18VDDC P18VDDC P19VDDC R19VDDC W19VDDC AD11
VDDR3AB9VDDR3AB10VDDR3AA9VDDR3AC19VDDR3AD18VDDR3AC20VDDR3AD19VDDR3AD20
VDDR4AJ5VDDR4AM5VDDR4AL5VDDR4AK5
VDDR5AE2VDDR5AE3VDDR5AE4VDDR5AE5
VDD25 AC13VDD25 AC16VDD25 AC18
VDDCI W10VDDCI T14VDDCI W17VDDCI P16VDDCI T23VDDCI K14VDDCI U19
VDDPLL AC15
LPVDD/VDDL0 AE19
LVDDR/VDDL0 AF20LVDDR/VDDL0 AE20LVDDR/VDDL0 AF19
LVDDR/VDDL1 AC21LVDDR/VDDL1 AC22LVDDR/VDDL1 AD22
LVDDR/VDDL2 AE21LVDDR/VDDL2 AD21LVDDR/VDDL2 AE22
VDDRH0A27VDDRH1F1
VSSRH0A28VSSRH1E1
PCIE_VDDR_12 AL31PCIE_VDDR_12 AM31PCIE_VDDR_12 AM30PCIE_VDDR_12 AL32PCIE_VDDR_12 AL30PCIE_VDDR_12 AM28PCIE_VDDR_12 AL29PCIE_VDDR_12 AM29PCIE_VDDR_12 AM27
TXVDDR AJ6TXVDDR AK6TXVDDR AL6TXVDDR AM6
TPVDD AM8AVDDAL25AVDDAM25
VDD1DIAM23
A2VDDAM16A2VDDAL16
NC_A2VDDQAL14
VDD2DIAJ16
PVDD AJ14
MPVDD A6
C313
0.1U_0402_16V4Z
1 2
C92222U_0805_6.3V6M
1
2
C336
0.1U_0402_16V4Z
1 2
L13
BLM15AG121SN1D_0402 1 2
C277
1U_0402_6.3V4Z
1
2
C337
0.1U_0402_16V4Z
1 2
C273
0.1U_0402_16V4Z
1 2
C315
0.1U_0402_16V4Z
1 2
C333
22U_0805_6.3V6M
1
2
C352
0.1U_0402_16V4Z
1
2
L71
BLM18PG121SN1D_0603 1 2
+
C271220U_D2_4VM@12
C324
0.1U_0402_16V4Z
1 2
C368
22U_0805_6.3V6M
1
2
C285
0.1U_0402_16V4Z
1 2
C312
0.1U_0402_16V4Z
1 2
C309
0.1U_0402_16V4Z
1 2
C349
0.1U_0402_16V4Z
1
2
L18
BLM15AG121SN1D_0402 1 2
C347
0.1U_0402_16V4Z
12
C3380.1U_0402_16V4Z
1
2
C360 0.1U_0402_16V4Z 12
C308
0.1U_0402_16V4Z
1 2
C332
22U_0805_6.3V6M
1 2
C290
1U_0402_6.3V4Z
1
2
C365
0.1U_0402_16V4Z
1
2
C3530.1U_0402_16V4Z
1
2
C299
0.1U_0402_16V4Z
1 2
C344
0.1U_0402_16V4Z
1
2
C334
0.1U_0402_16V4Z
1
2
C808
22U_0805_6.3V6M
@
1
2
C296
0.1U_0402_16V4Z
1 2
C340
0.1U_0402_16V4Z
1 2
C350
0.1U_0402_16V4Z
1
2L12
BLM18PG121SN1D_0603 1 2
C806
0.1U_0402_16V4Z
1
2
C348
22U_0805_6.3V6M
1
2
+C317
220U_D2_4VM@
12
C358
0.1U_0402_16V4Z
1
2
C364
22U_0805_6.3V6M
1
2
C325
0.1U_0402_16V4Z
1 2C327
0.1U_0402_16V4Z
1 2
C3670.1U_0402_16V4Z
1
2
C297
0.1U_0402_16V4Z
1 2
C321
22U_0805_6.3V6M
1 2
C331
0.1U_0402_16V4Z
1 2
C295
0.1U_0402_16V4Z
1 2
C326
0.1U_0402_16V4Z
1 2
C280
22U_0805_6.3V6M
1
2
C355
0.1U_0402_16V4Z
1
2
C301
0.1U_0402_16V4Z
1 2
C279
1U_0402_6.3V4Z
1
2
C35422U_0805_6.3V6M
1
2
C298
0.1U_0402_16V4Z
1 2
C286
0.1U_0402_16V4Z
1 2
C807
0.1U_0402_16V4Z
1
2
C276
1U_0402_6.3V4Z
1
2
C320
0.1U_0402_16V4Z
1 2
C316
0.1U_0402_16V4Z
1 2
C346
0.1U_0402_16V4Z
1 2
C311
0.1U_0402_16V4Z
1 2
C294
0.1U_0402_16V4Z
1 2
C284
0.1U_0402_16V4Z
1 2
C272
0.1U_0402_16V4Z
1 2
C304
0.1U_0402_16V4Z
1 2
C287
22U_0805_6.3V6M
1
2
C3350.1U_0402_16V4Z
1
2
C345
0.1U_0402_16V4Z
1 2
C329
0.1U_0402_16V4Z
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBCODT0
FBCCS0#
FBCCAS0#
FBCWE0#
FBCRAS0#
FBC_CKE0
FBCODT0
FBCCLK0FBCCLK0#
FBCCLK0FBCCLK0#
FBCDQM#2
FBCODT0
FBCCS0#
FBCCAS0#
FBCWE0#
FBCRAS0#
FBC_CKE0
FBCCS0#
FBCCAS0#
FBCWE0#
FBCRAS0#
FBC_CKE0
FBCA2FBCA1FBCA0
FBCA3FBCA4FBCA5
FBCA8FBCA7
FBCA10FBCA9
FBCA11
FBCA6
FBCA12
FBCA2FBCA1FBCA0
FBCA3FBCA4FBCA5
FBCA8FBCA7
FBCA10FBCA9
FBCA11FBCA12
FBCA6
FBC_BA0FBC_BA0FBC_BA1FBC_BA1
FBC_BA1
FBC_BA0
FBCDQS#[0..7]
FBCDQM#[0..7]
FBCDQS[0..7]
FBCA[0..12]
FBCD[0..63]
FBCDQM#0
FBC_CKE0
FBCODT0
FBCRAS0#
FBCCAS0#
FBCWE0#
FBCCS0#
FBC_BA0
FBC_BA1
FBCA2
FBCA1
FBCA0
FBCA3
FBCA4
FBCA5
FBCA8
FBCA7
FBCA10
FBCA9
FBCA11
FBCA12
FBCA6
FBCDQS2FBCDQS#2
FBCDQS0FBCDQS#0
FBCD4
FBCD23FBCD22
FBCD21
FBCD20FBCD17
FBCD19
FBCD18
FBCD16
FBCD5
FBCD6FBCD3FBCD2
FBCD1
FBCD0FBCD7
FBCCLK0
FBCCLK0#
FBCDQS#3FBCDQS3
FBCDQS#1FBCDQS1
FBCDQM#1FBCDQM#3
FBCD27
FBCD25
FBCD30
FBCD31
FBCD24
FBCD26
FBCD28FBCD29
FBCD10FBCD13
FBCD11
FBCD12FBCD8
FBCD9FBCD15
FBCD14
FBCODT0<18>
FBC_CKE0<18>
FBCRAS0#<18>
FBCCAS0#<18>
FBCWE0#<18>
FBCCS0#<18>
FBC_BA0<18,21>
FBC_BA1<18,21>
FBCD[0..63]<18,21>
FBCDQS[0..7]<18,21>
FBCDQM#[0..7]<18,21>
FBCA[0..12]<18,21>
FBCDQS#[0..7]<18,21>
FBCCLK0<18>
FBCCLK0#<18>
+1.8VS+1.8VS
+VRAM_VREFC
+1.8VS
+VRAM_VREFC
+1.8VS+1.8VS
+0.9VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PCustom
20 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
(SSTL-1.8) VREF = .5*VDDQ(SSTL-1.8) VREF = .5*VDDQ
Close to U12Close to U13
DDR2 BGA MEMORY DDR2 BGA MEMORY
M56 Only
11/03/05' SWAP NET
11/03/05' SWAP NET11/04/05' SWAP NET11/08/05' SWAP NET
R256 56_0402_5%M56@ 12
C3760.047U_0402_16V4Z
1
2
C380
0.1U_0402_16V4Z
1
2
R2471K_0402_1%
12
C3741U_0402_6.3V4Z
1
2
C383
0.1U_0402_16V4Z
1
2
R257 56_0402_5%M56@ 12
R249 56_0402_5%M56@ 12
C382
0.1U_0402_16V4Z
1
2
C3710.1U_0402_16V4Z
1
2
C390
0.1U_0402_16V4Z
1
2
R251 56_0402_5%M56@ 12
R2481K_0402_1%
12
C387
0.01U_0402_16V7K
1
2
C391
0.1U_0402_16V4Z
1
2
C3840.01U_0402_16V7K
1
2
C385
1000P_0402_50V7K
1
2
C379
0.01U_0402_16V7K
1
2
R267 56_0402_5%M56@ 12
C388
0.1U_0402_16V4Z
1
2
R263 56_0402_5%M56@ 12
R258 56_0402_5%M56@ 12
R268 56_0402_5%M56@ 12
C389
1U_0402_6.3V4Z
1
2
R254 56_0402_5%M56@ 12
R269 56_0402_5%M56@ 12
R255 56_0402_5%M56@ 12
C3750.047U_0402_16V4Z
1
2
C377
1000P_0402_50V7K
1
2
R262 56_0402_5%M56@ 12
U13
HY5PS561621AFP-25X76@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
C3920.01U_0402_16V7K
1
2
R253 56_0402_5%M56@ 12
C381
1U_0402_6.3V4Z
1
2
C378
0.01U_0402_16V7K1
2
C3721U_0402_6.3V4Z
1
2
R252 56_0402_5%M56@ 12
C386
0.01U_0402_16V7K1
2
R265 56_0402_5%M56@ 12
R260 56_0402_5%M56@ 12
C3730.1U_0402_16V4Z
1
2
R261 56_0402_5%M56@ 12
U12
HY5PS561621AFP-25X76@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
R250 56_0402_5%M56@ 12
R259 56_0402_5%M56@ 12
R266 56_0402_5%M56@ 12
R264 56_0402_5%M56@ 12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBCA1FBCA0
FBCA8FBCA7
FBCA10FBCA9
FBCA11FBCA12
FBCA6
FBCA1FBCA0
FBCA8FBCA7
FBCA10FBCA9
FBCA11FBCA12
FBCA6
FBCCLK1FBCCLK1#
FBCODT1
FBCCAS1#
FBCCS1#
FBCWE1#
FBCRAS1#
FBC_CKE1
FBCODT1
FBCCAS1#
FBCCS1#
FBCWE1#
FBCRAS1#
FBC_CKE1
FBCCAS1#
FBCCS1#
FBCWE1#
FBCRAS1#
FBC_CKE1
FBCODT1
FBCCLK1FBCCLK1#
FBC_BA0FBC_BA0FBC_BA1FBC_BA1
FBCCLK1
FBCDQS#[0..7]
FBCDQM#[0..7]
FBCDQS[0..7]
FBCA[0..12]
FBCD[0..63]
FBC_BA1
FBC_BA0
FBCCLK1#
FBCDQS#7FBCDQS7
FBCDQM#7
FBCDQS#5FBCDQS5
FBCDQM#5
FBCDQS#6FBCDQS6
FBCDQS#4FBCDQS4
FBCDQM#4FBCDQM#6
FBCRAS1#
FBC_CKE1
FBCODT1
FBCCAS1#
FBCWE1#
FBCCS1#
FBCA2FBCA3FBCA4FBCA5
FBCA2FBCA3FBCA4FBCA5
FBCD56
FBCD61
FBCD63
FBCD60
FBCD58
FBCD59
FBCD57
FBCD62
FBCD44
FBCD46
FBCD42FBCD47
FBCD45FBCD41
FBCD40
FBCD43
FBCD37
FBCD32FBCD39
FBCD36FBCD35
FBCD38FBCD33
FBCD54
FBCD51
FBCD53
FBCD49
FBCD52
FBCD55
FBCD48
FBCD50
FBCD34
FBCCAS1#<18>
FBCWE1#<18>
FBCCS1#<18>
FBCODT1<18>
FBC_CKE1<18>
FBCRAS1#<18>
FBCCLK1#<18>
FBCCLK1<18>
FBCD[0..63]<18,20>
FBCDQS[0..7]<18,20>
FBCDQM#[0..7]<18,20>
FBCA[0..12]<18,20>
FBCDQS#[0..7]<18,20>
FBC_BA0<18,20>
FBC_BA1<18,20>+1.8VS+1.8VS
+VRAM_VREFD
+1.8VS
+VRAM_VREFD
+1.8VS+1.8VS
+0.9VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PCustom
21 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
Close to U14 Close to U15
(SSTL-1.8) VREF = .5*VDDQ(SSTL-1.8) VREF = .5*VDDQ
DDR2 BGA MEMORY DDR2 BGA MEMORY
M56 Only
11/03/05' SWAP NET 11/03/05' SWAP NET
R276 56_0402_5%M56@ 12
C408
0.01U_0402_16V7K1
2
R274 56_0402_5%M56@ 12
C405
0.1U_0402_16V4Z
1
2
C4140.01U_0402_16V7K
1
2
R2711K_0402_1%
64BIT@
12
C412
0.1U_0402_16V4Z
1
2
U15
HY5PS561621AFP-25X76@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
C402
0.1U_0402_16V4Z
1
2
R277 56_0402_5%M56@ 12
R273 56_0402_5%M56@ 12
U14
HY5PS561621AFP-25X76@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
C3961U_0402_6.3V4Z64BIT@
1
2
R275 56_0402_5%M56@ 12
C403
1U_0402_6.3V4Z
1
2
C413
0.1U_0402_16V4Z
1
2
C400
0.01U_0402_16V7K1
2
C410
0.1U_0402_16V4Z
1
2
C4060.01U_0402_16V7K
1
2
C401
0.01U_0402_16V7K
1
2
C3950.1U_0402_16V4Z64BIT@
1
2
C407
1000P_0402_50V7K
1
2
R2701K_0402_1%64BIT@
12
C409
0.01U_0402_16V7K
1
2
C3930.1U_0402_16V4Z64BIT@
1
2
C411
1U_0402_6.3V4Z
1
2
C3970.047U_0402_16V4Z64BIT@
1
2
C3980.047U_0402_16V4Z64BIT@
1
2
C404
0.1U_0402_16V4Z
1
2
C3941U_0402_6.3V4Z64BIT@
1
2
C399
1000P_0402_50V7K
1
2
R278 56_0402_5%M56@ 12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A ALPC_DRQ#0LPC_DRQ#1
LPC_AD1LPC_AD2LPC_AD3
A_MRX_STX_N0A_MRX_STX_P0
A_MRX_STX_N1A_MRX_STX_P1
PCIRST#
VBAT_IN
A_RST#
SERIRQ
PCI_PLOCK#
PCI_PIRQH#
PCI_AD19PCI_AD18
CLK_PCI_LAN_R
BMREQ#
PCI_PIRQF#
PCI_AD29
PCI_FRAME#
CLK_PCI_LPC_R
PCI_CBE#[3..0]
PCI_AD23
PCI_GNT#2PCI_GNT#1
PCI_CBE#0
A_MTX_C_SRX_P1
PCI_AD10
PCI_AD[31..0]
PCI_PIRQE#
PCI_AD30
CLK_PCI_SIO_R
LPC_AD2
A_MRX_C_STX_P0
PCI_REQ#2
PCI_AD22
PCI_AD5PCI_AD4
LPC_FRAME#
PCI_PERR#
PCI_AD26
PCI_AD12
PCI_AD3
PCI_TRDY#
PCI_DEVSEL#
PCI_CBE#3
CLK_PCI_MINI_R
PCI_AD2
A_MRX_C_STX_N0
A_MTX_C_SRX_N0
PCI_REQ#4
PCI_AD13
LPC_AD1
PCI_STOP#
32K_X2
A_MTX_C_SRX_P0
PCI_AD20
PCI_REQ#3
PCI_CBE#1
PCI_AD11
PCI_AD27
PCI_AD24
PCI_AD14
PCI_AD1
CLK_PCI_1394_R
LPC_AD3
LPC_AD0
PCI_SERR#PCI_REQ#0
PCI_PAR
A_MTX_C_SRX_N1
PCI_AD0
PCI_GNT#3
A_MRX_C_STX_N1A_MRX_C_STX_P1
PCI_AD31
PCI_AD16
PCI_GNT#0
PCI_REQ#1
CLK_PCI_PCM_R
PCI_PIRQG#
PCI_AD28
PCI_CLK6_R
LPC_DRQ#0
PM_CLKRUN#
LPC_DRQ#1
PCI_AD25
PCI_AD21
PCI_AD17
PCI_AD15
PCI_AD8
PCI_AD6
PCI_IRDY#
PCI_CBE#2
PCI_AD9
PCI_AD7
32K_X1
+RTCBATT
PCI_REQ#1
PCI_DEVSEL#
PCI_PLOCK#PCI_IRDY#PCI_PERR#
PCI_STOP#
PCI_SERR#
PCI_FRAME#PCI_TRDY#
PCI_PIRQG#
PCI_REQ#3
PCI_PIRQE#PCI_PIRQF#
LPC_AD0
32K_X2
32K_X1
PCI_PIRQH#
PCI_REQ#0PCI_REQ#2
A_RST#
PCIRST#
NB_RST#
PCI_RST#
PCI_REQ#4
PM_CLKRUN#PCI_PAR
SB_TX2PSB_TX2N
SB_TX3NSB_TX3P
BMREQ#
CLK_PCI_PCM_R
CLK_PCI_LAN_RCLK_PCI_LPC_R
CLK_PCI_SIO_R
CLK_PCI_MINI_R
CLK_PCI_1394_R
CLK_PCI_LAN_R
CLK_PCI_PCMCLK_PCI_MINI
CLKOUT1CLKOUT2CLKOUT3CLKOUT4CLKOUT5CLKOUT6
CLK_PCI_LANCLK_PCI_LPC
CLK_PCI_SIOCLK_PCI_1394
CLK_PCI_LAN <31>CLK_PCI_LPC <33>CLK_PCI_MINI <36>CLK_PCI_PCM <37>CLK_PCI_1394 <40>CLK_PCI_SIO <41>PCI_CLK6 <26>SB_SPDIFO <26>
LPC_DRQ#0 <41>
ALLOW_LDTSTOP<13>
PCI_PIRQF# <31>PCI_PIRQE# <37,40>
PCI_PIRQH# <36,37>PCI_PIRQG# <36>
PM_CLKRUN# <31,36,41>
LPC_FRAME# <26,33,41>
LPC_AD0 <33,41>LPC_AD1 <33,41>LPC_AD2 <33,41>LPC_AD3 <33,41>
SERIRQ <33,37,41>BMREQ# <13>
RTC_IRQ# <26>RTC_CLK <26>
LDT_RST#<7>
A_MRX_STX_P0<12>A_MRX_STX_N0<12>A_MRX_STX_P1<12>A_MRX_STX_N1<12>
SBSRC_CLKP<15>SBSRC_CLKN<15>
A_MTX_C_SRX_P0<12>A_MTX_C_SRX_N0<12>A_MTX_C_SRX_P1<12>A_MTX_C_SRX_N1<12>
PCI_CBE#[3..0] <31,36,37,40>
PCI_FRAME# <31,36,37,40>PCI_DEVSEL# <31,36,37,40>PCI_IRDY# <31,36,37,40>PCI_TRDY# <31,36,37,40>PCI_PAR <31,36,37,40>PCI_STOP# <31,36,37,40>PCI_PERR# <31,36,37,40>PCI_SERR# <31,36,37>
PCI_AD[31..0] <26,31,36,37,40>
PCI_GNT#0 <40>PCI_GNT#1 <36>PCI_GNT#2 <37>PCI_GNT#3 <31>
PCI_REQ#1 <36>PCI_REQ#0 <40>
PCI_REQ#3 <31>PCI_REQ#2 <37>
NB_RST# <13,16,27,33,36,41>
PCI_RST# <31,36,37,39,40>
CLK_PCI_LAN_R <26>CLK_PCI_LPC_R <26>CLK_PCI_MINI_R <26>CLK_PCI_PCM_R <26>CLK_PCI_1394_R <26>CLK_PCI_SIO_R <26>
+RTCVCC
+CHGRTC
+RTCBATT
+3VALW
+3VALW
+3VS
+3VS
+3VS
+3VS
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
+3VS
+1.8VS
+1.8VS
+1.2V_HT
+3VS
+3VS +3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
22 55¬P , 09, 2006期四 三月
2005/03/08 2006/03/08LPC PULL UPS
SB460 ONLY
C608 AND C609 CLOSETO U600.U29
PLACE THESE PCIE AC COUPLINGCAPS CLOSE TO U600
PLACE THESE COMPONENTS CLOSE TO U600, ANDUSE GROUND GUARD FOR 32K_X1 AND 32K_X2
FOR SB460, THIS BALLIS LDT_RST# ONLY
FOR SB600 VCC_SB= 1.2VFOR SB460 VCC_SB= 1.8VR294 CALRP: SB600=562R 1%, SB460=150R 1%R295 CALRN: SB600=2.05K 1%, SB460=150R 1%R296 CALRN: SB600=0R 1%, SB460=4.12K 1%
FOR SB600, CONNECT TO CPU_PG/LDT_PGFOR SB460, CONNECT TO SSMUXSEL/GPIO0 +
RTC Battery
Please Closed RAMDoor
Modify 11/07
EMI 11/2 Modify
12/26:Modify
12/26:Modify
Compal Electronics, inc.
R295 150_0402_1%1 2 R838 22_0402_5%1 2
C4320.1U_0402_16V4Z
1
2
R282 22_0402_5%@1 2
R30320M_0603_5%
12
PCI E
XPR
ESS
INTE
RFA
CE
Part 1 of 4SB460
PCI I
NTE
RFA
CE
LPC
RTC
CP
U
XTAL
PC
I CLK
S
U16A
218S4RASA11GS SB460_BGA549
A_RST#AG10
PCIE_TX0PP29PCIE_TX0NP28
PCIE_RX0PT25
PCIE_TX1PM29PCIE_TX1NM28
PCIE_RX1PT22PCIE_RX1NT23
PCIE_TX2PK29PCIE_TX2NK28
PCIE_RX2PM25PCIE_RX2NM26
PCIE_TX3PH29PCIE_TX3NH28
PCIE_RX3PM22PCIE_RX3NM23
PCIE_RCLKPJ24PCIE_RCLKNJ25
PCIE_CALRPE29PCIE_CALRNE28
PCIE_CALIE27
PCIE_PVDDU29
PCIE_VDDR_2F28PCIE_VDDR_3F29PCIE_VDDR_4G26
PCIE_VDDR_1F27
PCIE_VDDR_5G27PCIE_VDDR_6G28PCIE_VDDR_7G29
NCB24 CPU_STP#/DPSLP_3V#AH9
X1D2
X2C1
VBAT E1
INTR/LINT0W26
SMI#AA24
STPCLK#/ALLOW_LDTSTPAA25
NMI/LINT1W24
FERR#Y27
IGNNE#AA22A20M#AA26
NCAA23
INIT#W25
LDT_RST#/DPRSTP#/PROCHOT#AC25
PCICLK0 U2PCICLK1 T2PCICLK2 U1PCICLK3 V2
PCIRST# AJ9
CBE0#/ROMA10 AB9CBE1#/ROMA1 AF9
CBE2#/ROMWE# AJ5CBE3# AG3
FRAME# AA2DEVSEL#/ROMA0 AH6
IRDY# AG5TRDY#/ROMOE# AA1
PAR/ROMA19 AF7STOP# Y2PERR# AG8
REQ0# AJ8REQ1# AE2REQ2# AG9
REQ3#/PDMA_REQ0# AH8
GNT0# AD11GNT1# AF2GNT2# AH7
GNT3#/PLL_BP66/PDMA_GNT0# AB12
SERR# AC11
CLKRUN# AG7
LAD0 AG24LAD1 AG25LAD2 AH24LAD3 AH25
LFRAME# AF24LDRQ0# AJ24
SERIRQ AF23
RTC_GND D1
PCICLK4 W3PCICLK5 U3PCICLK6 V1
AD0/ROMA18 W7AD1/ROMA17 Y1AD2/ROMA16 W8AD3/ROMA15 W5AD4/ROMA14 AA5AD5/ROMA13 Y3AD6/ROMA12 AA6AD7/ROMA11 AC5
AD8/ROMA9 AA7AD9/ROMA8 AC3
AD10/ROMA7 AC7
AD12/ROMA5 AD4AD13/ROMA4 AB11AD14/ROMA3 AE6AD15/ROMA2 AC9AD16/ROMD0 AA3AD17/ROMD1 AJ4AD18/ROMD2 AB1AD19/ROMD3 AH4AD20/ROMD4 AB2AD21/ROMD5 AJ3AD22/ROMD6 AB3AD23/ROMD7 AH3
AD24 AC1AD25 AH2AD26 AC2AD27 AH1AD28 AD2AD29 AG2AD30 AD1AD31 AG1
AD11/ROMA6 AJ7
REQ4#/PLL_BP33/PDMA_REQ1# AH5
GNT4#/PLL_BP50/PDMA_GNT1# AG4
LDRQ1# AH26
DPRSLPVRW23
CPU_PGAC26
PCIE_VDDR_8J27PCIE_VDDR_9J29
RTCCLK D3RTC_IRQ#/ACPWR_STRAP F5
PCIE_RX0NT26
INTE#/GPIO33 AD3INTF#/GPIO34 AF1INTG#/GPIO35 AF4INTH#/GPIO36 AF3
LOCK# AF6
PCIE_VDDR_10L25PCIE_VDDR_11L26
NCU28
SPDIF_OUT/GPIO41 T1
BMREQ# W22
PCIE_VDDR_12L29PCIE_VDDR_13N29
R841 22_0402_5%1 2
U59
ASM3P623S00EF-16-TR_TSSOP16
DLY CNTRL8CLKIN1VDD3
CLKOUT1 2
GND12
VDD13SSON9SS%4GND5
CLKOUT2 6
CLKOUT7 15
CLKOUT3 7CLKOUT4 10CLKOUT5 11CLKOUT6 14
CLKOUT8 16R
298
20M
_060
3_5%
12
R306 10K_0402_5%
1 2
C423
22U_0805_6.3V6M
1
2
C425
1U_0402_6.3V4Z
1
2
R296 4.12K_0402_1%1 2
U17
74LVC1G125GW_SOT3535
I2 O 4
P5
G3
OE#
1
R286 22_0402_5%
1 2
R837 22_0402_5%1 2
R285 22_0402_5%@1 2
BATT1
RTCBATT
45@
12
R812
10K_0402_5%
1 2
C4200.1U_0402_16V4Z
1 2
R297
8.2K_0402_5%
12
L19
KC FBM-L11-201209-221LMAT_0805
1 2
C422
1U_0402_6.3V4Z
1
2
C9441U_0402_6.3V4Z
1
2
Y2
32.768KHZ_12.5PF_6H03200468
OUT4
IN1
NC 3
NC 2
C426
1U_0402_6.3V4Z
1
2
C427
1U_0402_6.3V4Z
1
2
R279 33_0402_5% 1 2
R284 22_0402_5%@1 2
R777 10K_0402_5%@1 2
C942
15P_0402_50V8J
1
2
R289 49.9_0402_1%@1 2
C43010P_0402_50V8K
1 2
C418 0.01U_0402_16V7K
1 2
R840 22_0402_5%1 2
R301 100K_0402_5%
1 2R300 10K_0402_5%
1 2
C431
1U_0402_6.3V4Z
1
2
R2928.2K_0402_5%
12
RP1
8.2K_1206_8P4R_5%
1 82 73 64 5
RP5
8.2K_1206_8P4R_5%
1 82 73 64 5
R83910K_0402_5%
1 2
C421
10U_0805_10V4Z
1
2
R305 100K_0402_5%
1 2
R302 100K_0402_5%
1 2
R291 49.9_0402_1%@1 2
R3080_0603_5%
12
RP3
8.2K_1206_8P4R_5%
1 82 73 64 5
C417 0.01U_0402_16V7K
1 2
R280 22_0402_5%
1 2
R288 33_0402_5%
1 2
U18
74LVC1G125GW_SOT3535
I2 O 4
P5
G3
OE#
1
R294 150_0402_1%1 2
R287 0_0402_5%
1 2
C4340.1U_0402_16V4Z
1
2
L68FBM-L11-160808-800LMT_0603
12
R281 22_0402_5%@1 2
R293 49.9_0402_1%@1 2
R304 100K_0402_5%
1 2
R83410K_0402_5%@
12
R283 22_0402_5%@1 2
JOPEN1
JUMP_43X39 @
1 122
C42910P_0402_50V8K
1 2
R3071K_0603_5%
12
R299 10K_0402_5%
1 2
RP2
8.2K_1206_8P4R_5%
1 82 73 64 5
C416 0.01U_0402_16V7K
1 2
R835 22_0402_5%@1 2
R646 0_0402_5%@1 2
R645 0_0402_5%@1 2
R290 49.9_0402_1%@1 2
R842
10K_0402_5%
12
L20
KC FBM-L11-201209-221LMAT_0805
1 2
D3
BAS40-04_SOT23
1
23
C4190.1U_0402_16V4Z
1 2
C428
1U_0402_6.3V4Z
1
2
RP4
8.2K_1206_8P4R_5%
1 82 73 64 5
C424
1U_0402_6.3V4Z
1
2
R836 22_0402_5%1 2
C415 0.01U_0402_16V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SB_CK_SCLK
SYS_RESET#
CLK_USB_48M
USB_OC#6EC_SMI#
AZ_RST#
EC_SWI#
PBTN_OUT#
SB_PCIE_WAKE#
EC_FLASH#_R
EC_KBRST#LPC_PME#
PM_SLP_S3#PM_SLP_S5#
EC_LID_OUT#
EC_THERM#
SB_CK_SDAT
SB_PWRGDPBTN_OUT#PM_SLP_S5#
EC_SCI#EC_SWI#
PM_SLP_S3#
CPU_PWRGD
SB_CK_SCLKSB_CK_SDAT
USB20_N5
USB20_P4USB20_N4
USB20_N6
USB20_N2
USB20_N0
USB20_P6
USB20_P5
USB20_N1
USB20_P2
USB20_N3USB20_P3
USB20_P1
LPC_SMI#LPC_PME#
SYS_RESET#
EC_KBRST#EC_GA20
USB_OC#0
AZ_BIT_CLK
AZ_SYNC
AZ_SDATA_OUT
ICH_AC_SDIN2ICH_AC_SDIN1ICH_AC_SDIN0
EC_RSMRST#
SB_OSC_INT
USB_OC#1
SB_INT_FLASH_SEL#
H_THERMTRIP#
S3_STATE_R
S3_STATE_R
LPC_SMI#
SUS_STAT#
EC_SCI#
SB_PCIE_WAKE#
CP_PE#
AZ_BIT_CLK
AZ_RST#AZ_SYNCAZ_SDATA_OUT
AZ_SDATA_OUT
AZ_RST#
AZ_BIT_CLK
AZ_SYNC
ICH_AC_SDIN2ICH_AC_SDIN1ICH_AC_SDIN0
USB20_P0
EC_SMI#USB_OC#0USB_OC#1USB_OC#3CP_PE#USB_OC#6
BLINK/GPM6#
BLINK/GPM6#
SB_INT_FLASH_SEL#
GPIO13
GPIO13
AC_SDATA_OUT
AC_RST#
AC_RST#
IDE_HRESET#
IDE_HRESET#
EC_FLASH# USB_OC#3
EC_FLASH#_R
ICH_BITCLK_AUDIOICH_BITCLK_MDC
SB_CK_SCLK<9,10,15>SB_CK_SDAT<9,10,15>
EC_RSMRST#<33>
H_THERMTRIP#<7>
SB_INT_FLASH_SEL#<35>
CPU_PWRGD<7>
CLK_USB_48M <15>
EC_KBRST#<33>EC_GA20<33>
EC_SWI#<33>EC_SCI#<33>
PM_SLP_S5#<33>PM_SLP_S3#<33>
PBTN_OUT#<33>SB_PWRGD<7,42>
SB_PCIE_WAKE#<36,39>
SB_OSCIN<15>
SUS_STAT#<35>
SB_SPKR<44>
EC_SMI#<33>
EC_LID_OUT#<33>
USB_OC#0<39>
EC_THERM#<7,33>
ICH_SYNC_AUDIO<44>
ICH_SDOUT_AUDIO<44>
ICH_RST_AUDIO#<44>
ICH_BITCLK_AUDIO<44>
ICH_BITCLK_MDC<34>
ICH_AC_SDIN0<44>
ICH_SDOUT_MDC<34>
ICH_SYNC_MDC<34>
ICH_RST_MDC#<34> ICH_AC_SDIN1<34>
LDT_STOP#<7,13>
USB20_N0 <39>USB20_P0 <39>
USB20_N2 <39>USB20_P2 <39>
USB20_N1 <39>USB20_P1 <39>
USB20_N5 <34>USB20_P5 <34>
USB20_N3 <43>USB20_P3 <43>
USB20_N4 <36>USB20_P4 <36>
USB20_N6 <43>USB20_P6 <43>
CP_PE#<39>
AC_SDATA_OUT<26>
S3_STATE<33>
IDE_HRESET#<27>
EC_FLASH#<35>
+3VALW
+3VALW
AVDD_USB
+3.3V_AVDDC
+3VS
+3VS
+3VALW
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
23 55, 星期四 三 09, 2006月
2005/03/08 2006/03/08
TEST POINT TP602 FORSB460_FANOUT0
SB600 ONLY(NC for SB460)
BALLS(C6 AND C5) ARE FOR SB600 ONLY (NC FOR SB460)
SB460 ONLY
SB460 ONLY
PLACE C443,C444 ANDC445 CLOSE TO U16
Modify : 11/07
Modify 11/27
01/03/05" modify
Compal Electronics, inc.
C439
0.1U_0402_16V4Z
1
2
R357 10K_0402_5%@12
R340 10K_0402_5%
12
R313 10K_0402_5%
12
R326 10K_0402_5%
12R813 0_0402_5%@
12
C946
10P_0402_50V8K@
1
2
R333 10K_0402_5%
12
C441
0.1U_0402_16V4Z
1
2
R325 10K_0402_5%
12
R314 10K_0402_5%
12
R320 10K_0402_5%
12
USB
INTE
RFA
CE
Part 4 of 4SB460
US
B P
WR
OSC / RST
ACPI
/ W
AKE
UP
EVEN
TSG
PIO
AC
97AZ
ALIA
US
B O
C
U16D
218S4RASA11GS SB460_BGA549
USBCLK A17
USB_RCOMP A14
USB_ATEST1 A11USB_ATEST0 A10
USB_OC0#/GPM0#A8
USB_HSDP5+ D16USB_HSDM5- E16
USB_HSDP4+ D18USB_HSDM4- E18
USB_HSDP3+ G16USB_HSDM3- H16
USB_HSDP2+ G18USB_HSDM2- H18
USB_HSDP1+ D19USB_HSDM1- E19
USB_HSDP0+ G19USB_HSDM0- H19
AVSSC A13
AVSS_USB_1 A16
AVDDRX_0 A9AVDDRX_1 B10
AVDDTX_3 B16
AVDDTX_0 B9AVDDTX_1 B11
AVDDRX_2 B12
AVDDC A12
USB_OC4#/GPM4#A6USB_OC3#/GPM3#C8
AVSS_USB_16 E21AVSS_USB_15 E11AVSS_USB_14 D21
AVSS_USB_12 C20AVSS_USB_11 C19
AVSS_USB_9 C17
AVSS_USB_3 C10AVSS_USB_2 C9
AVSS_USB_17 F11
AVSS_USB_5 C12
USB_OC1#/GPM1#B8 USB_OC2#/FANOUT1/LLB#/GPM2#C7
USB_HSDP7+ E14USB_HSDM7- D14
USB_HSDP6+ G14USB_HSDM6- H14
AVDDTX_2 B13
AVDDRX_3 B14
AVSS_USB_13 D11
AVSS_USB_8 C16
USB_OC6#/GEVENT6#B4 USB_OC7#/GEVENT7#C4
AVSS_USB_6 C13AVSS_USB_7 C14
AVSS_USB_4 C11
AVSS_USB_18 F12AVSS_USB_19 F14AVSS_USB_20 F16AVSS_USB_21 F18
AVSS_USB_10 C18
NCC28
NCK2
PCI_PME#/GEVENT4#A3RI#/EXTEVNT0#B2SLP_S3#F7SLP_S5#A5PWR_BTN#E3PWR_GOODB5SUS_STAT#B3
TEST1E9TEST0G9GA20INAF26KBRST#AG26
SMBALERT#/THRMTRIP#/GEVENT2#G7
LPC_PME#/GEVENT3#D7LPC_SMI#/EXTEVNT1#C25S3_STATE/GEVENT5#D9SYS_RESET#/GPM7#F4WAKE#/GEVENT8#E7
RSMRST#E2
14M_OSCB23
ROM_CS#/GPIO1A26GHI#/GPIO6B29VGATE/GPIO7A23GPIO4B27GPIO5D23SPKR/GPIO2B26SCL0/GPOC0#C27SDA0/GPOC1#B28
DDC1_SCL/GPIO9D26DDC1_SDA/GPIO8C26
AZ_BITCLKN2AZ_SDOUTM2
AZ_SYNCL3
AC_BITCLK/GPIO38L1AC_SDOUT/GPIO39L2ACZ_SDIN0/GPIO42L4ACZ_SDIN1/GPIO43J2ACZ_SDIN2/GPIO44J4AC_SYNC/GPIO40M3AC_RST#/GPIO45L5
NCK3
AVDDTX_4 B18
AVDDRX_4 B17
NC H12NC G12
NC E12NC D12
NCA4
NCC5 NCC6
USB_OC5#/AZ_RST#/GPM5#B6
BLINK/GPM6#C2
NCC3NCF3
FANOUT0/GPIO3E23GPIO31AC21GPIO13AD7DPSLP_OD#/GPIO37AE7GPIO14AA4 AVSS_USB_22 F19
AVSS_USB_23 F21AVSS_USB_24 G11AVSS_USB_25 G21AVSS_USB_26 H11AVSS_USB_27 H21
TALERT#/GPIO10T4SLP#/LDT_STP#D4NCAB19
AVSS_USB_28 J11AVSS_USB_29 J12
NCF9
LDT_PG/SSMUXSEL/GPIO0A27
AVSS_USB_30 J14AVSS_USB_31 J16AVSS_USB_32 J18AVSS_USB_33 J19
R316 10K_0402_5%
12
R34233_0402_1%
1 2
C436
10U_0805_10V4Z
1
2
R323 4.7K_0402_5%
12
R328 10K_0402_5%
12
R322 4.7K_0402_5%
12
R330 10K_0402_5%
12
C438
1U_0402_6.3V4Z
1
2
L22
KC FBM-L11-201209-221LMAT_0805
1 2
R34933_0402_1%
1 2
C443
0.1U_0402_16V4Z
1
2
C442
0.1U_0402_16V4Z
1
2
R315 10K_0402_5% @12
R34733_0402_1%
1 2
C437
1U_0402_6.3V4Z
1
2
C945
10P_0402_50V8K@
1
2
R318 10K_0402_5%
12
R334 10K_0402_5%
12
R358 10K_0402_5%@12
R830 0_0402_5%12
R354 10K_0402_5%@12
R647 10K_0402_5%
12
R356 10K_0402_5%@12
R309 10K_0402_5%
12
R351 10K_0402_5%@12
R34133_0402_1%
1 2
C444
2.2U_0603_6.3V6K
1
2
R324 4.7K_0402_5%
12
R34333_0402_1%
1 2
R338 2.2K_0402_5%
12
T12PAD
R831 10K_0402_5%
12
R353 0_0402_5%
12
R331 10K_0402_5%
12
R319 10K_0402_5%
12
R352 10K_0402_5%@12
R329 10K_0402_5%
12
R337 2.2K_0402_5%
12
R832 0_0402_5%@12
L21
KC FBM-L11-201209-221LMAT_0805
1 2
R34633_0402_1%
1 2
R310 10K_0402_5% 12
R35033_0402_1%
1 2
C440
0.1U_0402_16V4Z
1
2
R312 11.3K_0402_1%
12
R814 10K_0402_5%
12
R332 10K_0402_5%
12
1U_0402_6.3V4Z
C4451
2
C435
10U_0805_10V4Z
1
2
R321 10K_0402_5%
12
R336 10K_0402_5%
12
R648 10K_0402_5%12
R355 10K_0402_5%12
R335 10K_0402_5%
12
R339 10K_0402_5%
12
R34833_0402_1%
1 2
R644 10K_0402_5% 12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_X2
SATA_X1
SATA_DTX_C_SRX_N0SATA_DTX_C_SRX_P0
SATA_STX_C_DRX_N0SATA_STX_C_DRX_P0
SATA_LED#
SATA_DTX_SRX_N0
IDE_D14
IDE_A1
IDE_DACK#
IDE_IRQ
SATA_X1
SATA_STX_DRX_N0
IDE_A0
IDE_D11
IDE_A2
SATA_STX_DRX_P0
IDE_D8
IDE_D1
IDE_IOW#
SATA_CALIDE_D12
IDE_D3IDE_D2
IDE_D15
IDE_D6
IDE_DREQ
IDE_D10IDE_D9
IDE_CS1#
IDE_D7
SATA_DTX_SRX_P0
IDE_IOR#
IDE_D13
SATA_X2
IDE_D0
IDE_CS3#
IDE_IORDY
IDE_D5IDE_D4
IDE_D[0..15]
IDE_A[0..2]
SATA_STX_C_DRX_P0<27>SATA_STX_C_DRX_N0<27>
SATA_DTX_C_SRX_N0<27>SATA_DTX_C_SRX_P0<27>
SATA_LED#<33>
IDE_D[0..15]<27>
IDE_A[0..2]<27>
IDE_CS1# <27>
IDE_DREQ <27>
IDE_IOW# <27>IDE_IOR# <27>
IDE_IORDY <27>
IDE_DACK# <26,27>
IDE_IRQ <27>
IDE_CS3# <27>
+1.8VS
+3VS PLLVDD_ATA
XTLVDD_ATA
AVDD_SATA
PLLVDD_ATA
XTLVDD_ATA
AVDD_SATA
+1.8VS
+1.8VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
24 55, 星期四 三 09, 2006月
2005/03/08 2006/03/08
PLACE SATA_CALRES & CAP VERYCLOSE TO BALL OF U16
R360 IS 1K 1% FOR 25MHzXTAL, 4.99K 1% FOR 100MHzINTERNAL CLOCK
NOTE:
PLACE SATA AC COUPLINGCAPS CLOSE TO U16
C649 CLOSE TO THEBALL OF U600
VCC_SB=1.2V WHEN SB600VCC_SB 1.8V WHEN SB460
C650 CLOSE TO THEBALL OF U600
Compal Electronics, inc.
C458
1U_0402_6.3V4ZSATA@
1
2
R7780_0402_5%PATA@
12
R363
10M_0603_5%SATA@
12
L61MBK2012121YZF_0805SATA@
1 2
C454
22U_0805_6.3V6MSATA@
1
2
R360 1K_0402_1%SATA@
12
C4480.01U_0402_16V7KSATA@ 1 2
Y325MHZ_20PF_6X25000017SATA@
12
R7790_0402_5%PATA@
12
R362 4.7K_0402_5% 1 2
C4460.01U_0402_16V7KSATA@ 1 2
C4490.01U_0402_16V7KSATA@
1 2
C451
1U_0402_6.3V
4Z
SATA@
1
2
C456
0.1U_0402_16V4ZSATA@1
2
C450
1U_0402_6.3V
4Z
SATA@
1
2
C453
1U_0402_6.3V4ZSATA@
1
2
L62
KC FBM-L11-201209-221LMAT_0805
SATA@ 1 2
ATA
66/1
00
Part 2 of 4SB460
SER
IAL
ATA
POW
ERSE
RIA
L AT
A
SPI R
OM
HW
MO
NIT
OR
U16B
218S4RASA11GS SB460_BGA549
PIDE_IORDY AB29PIDE_IRQ AA28PIDE_A0 AA29PIDE_A1 AB27PIDE_A2 Y28
PIDE_DACK# AB28PIDE_DRQ AC27PIDE_IOR# AC29PIDE_IOW# AC28PIDE_CS1# W28PIDE_CS3# W27
PIDE_D0 AD28PIDE_D1 AD26PIDE_D2 AE29PIDE_D3 AF27PIDE_D4 AG29PIDE_D5 AH28PIDE_D6 AJ28PIDE_D7 AJ27PIDE_D8 AH27PIDE_D9 AG27
PIDE_D10 AG28PIDE_D11 AF28PIDE_D12 AF29PIDE_D13 AE28PIDE_D14 AD25PIDE_D15 AD29
AVDD_SATA_2AE16
XTLVDD_SATAAC16
AVDD_SATA_3AE18
PLLVDD_SATA_2AJ10
AVSS_SATA_10AE12
AVSS_SATA_12AF11AVSS_SATA_13AF14
AVDD_SATA_4AE19
PLLVDD_SATA_1AD14
AVSS_SATA_14AF16AVSS_SATA_15AF18AVSS_SATA_16AG11AVSS_SATA_17AG12AVSS_SATA_18AG13AVSS_SATA_19AG14AVSS_SATA_20AG16AVSS_SATA_21AG17
AVSS_SATA_2AB16
AVDD_SATA_1AE14
SATA_TX2+AH13SATA_TX2-AH14
SATA_RX2+AJ16 SATA_RX2-AH16
SATA_TX3+AJ11SATA_TX3-AH11
SATA_RX3+AJ13 SATA_RX3-AH12
SATA_TX0+AH21SATA_TX0-AJ21
SATA_RX0-AH20SATA_RX0+AJ20
SATA_TX1+AH18SATA_TX1-AJ18
SATA_RX1-AH17SATA_RX1+AJ17
SATA_CALAF12
SATA_X1AD16
SATA_X2AD18
SATA_ACT#AC12
AVDD_SATA_5AF19AVDD_SATA_6AF21AVDD_SATA_7AG22AVDD_SATA_8AG23
AVSS_SATA_5AC18AVSS_SATA_6AC19AVSS_SATA_7AD12AVSS_SATA_8AD19AVSS_SATA_9AD21
AVSS_SATA_1AB14
AVSS_SATA_3AB18AVSS_SATA_4AC14
AVSS_SATA_11AE21
NC J3NC J6NC G3NC G2NC G6
NC T3NC V4
NC N3NC P2NC W4
NC C23NC G5
NC V5NC L7NC M8NC V6NC M6NC P4NC M7NC V7
NC P7NC P8NC T8NC T7
NC M4
NC N1
NC M1
NC P5
AVDD_SATA_9AH22AVDD_SATA_10AH23AVDD_SATA_11AJ12AVDD_SATA_12AJ14
AVSS_SATA_22AG18AVSS_SATA_23AG19AVSS_SATA_24AG20
AVDD_SATA_13AJ19
AVSS_SATA_25AG21AVSS_SATA_26AH10
AVDD_SATA_14AJ22
AVSS_SATA_27AH19
AVDD_SATA_15AJ23
R361 0_0402_5%SATA@
12
C460
27P_0402_50V8JSATA@
1 2
C4470.01U_0402_16V7KSATA@
1 2
C455
0.1U_0402_16V4ZSATA@
1
2
L23
MBK2012121YZF_0805
SATA@
1 2
R7800_0402_5%PATA@
12
C457
0.1U_0402_16V4ZSATA@
1
2
C459 27P_0402_50V8JSATA@
1 2
R781
0_0402_5%PATA@
1 2
C4522.2U_0603_6.3V6K@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
V5_VREF
+3VS
+5VS
+USB_PHY_18
+1.8VS
+1.2V_HT
+3VALW
+1.8VS
+3VS
+1.8VALW
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
25 55, 星期四 三 09, 2006月
2005/03/08 2006/03/08
VCC_SB=1.8V WHEN SB460
CPU_PWR=1.2V WHEN SB460
Compal Electronics, inc.
C479
0.1U_0402_16V4Z
1
2
C476
1U_0402_6.3V4Z
1
2
C463
1U_0402_6.3V4Z
1
2
C468
0.1U_0402_16V4Z
1
2
C485
0.1U_0402_16V4Z 1
2
C470
0.1U_0402_16V4Z
1
2
C475
1U_0402_6.3V4Z
1
2
C47222U_0805_6.3V6M
1
2
C467
1U_0402_6.3V4Z
1
2
C477
22U_0805_6.3V6M
1
2
C481
0.1U_0402_16V4Z
1
2
C486
1U_0402_6.3V4Z
1
2
C473
1U_0402_6.3V4Z
1
2
+ C461
220U_D2_4VM
1
2
C465
1U_0402_6.3V4Z
1
2
C4872.2U_0603_6.3V6K
1
2
L24
MBK1608800YZF_08051 2
C462
1U_0402_6.3V4Z
1
2
R815 0_0805_5%1 2
D4CH751H-40_SC76
2 1
C484
0.1U_0402_16V4Z
1
2
C480
22U_0805_6.3V6M
1
2
C471
0.1U_0402_16V4Z
1
2
C474
1U_0402_6.3V4Z
1
2
C478
0.1U_0402_16V4Z
1
2
C469
0.1U_0402_16V4Z
1
2
Part 3 of 4SB460
POW
ER
U16C
218S4RASA11GS SB460_BGA549
VSS_51 AD23VSS_50 AD9VSS_49 AC24VSS_48 AC6VSS_47 AA18
VSS_45 AA11VSS_46 AA14
VSS_43 W9
VSS_41 V21VSS_40 V18VSS_39 V15VSS_38 V12
VSS_36 V3
VSS_34 U13
VSS_32 T6VSS_31 R18
VSS_29 R12VSS_28 P21VSS_27 P6VSS_26 P1VSS_25 N17VSS_24 N13
VSS_21 M12VSS_20 M9VSS_19 L8VSS_18 L6
VDDQ_1A25VDDQ_2A28VDDQ_3C29VDDQ_4D24VDDQ_5L9VDDQ_6L21VDDQ_7M5VDDQ_8P3VDDQ_9P9VDDQ_10T5VDDQ_11V9VDDQ_12W2VDDQ_13W6VDDQ_14W21VDDQ_15W29VDDQ_16AA12VDDQ_17AA16VDDQ_18AA19VDDQ_19AC4VDDQ_20AC23
CPU_PWRAA27
V5_VREFAE11
S5_1.8V_2H1
USB_PHY_1.8V_1A18
VDD_5N18
VDD_2M17
VDD_4N15
VDD_7R17
VDD_9U15
VDD_6R13
VDD_1M13
VDD_3N12
VDD_8U12
VSS_17 J8VSS_16 J1VSS_15 G1VSS_14 F23
S5_1.8V_1G4
S5_1.8V_4H3 S5_1.8V_3H2
AVDDCKA24
AVSSCKB22
VSS_54 AG6VSS_55 AJ1VSS_56 AJ25VSS_57 AJ29
VDD_10U18VDD_11V13VDD_12V17
S5_3.3V_1A2
VDDQ_22AE1VDDQ_23AE9VDDQ_24AE23VDDQ_25AH29VDDQ_26AJ2
VSS_35 U17
S5_3.3V_2A7S5_3.3V_3F1S5_3.3V_4J5S5_3.3V_5J7S5_3.3V_6K1
USB_PHY_1.8V_2A19USB_PHY_1.8V_3B19USB_PHY_1.8V_4B20
VSS_44 Y29
VSS_52 AE3
VDDQ_21AD27
VSS_1 A1VSS_2 A20VSS_3 A21VSS_4 A29VSS_5 B1VSS_6 B7VSS_7 B25VSS_8 C21VSS_9 C22
VSS_10 C24VSS_11 D6
VSS_13 F2VSS_12 E24
VSS_23 M18VSS_22 M15
USB_PHY_1.8V_5B21
NCA22
VDDQ_27AJ6VDDQ_28AJ26
PCIE_VSS_1 D27PCIE_VSS_2 D28PCIE_VSS_3 D29
PCIE_VSS_5 G23PCIE_VSS_6 G24PCIE_VSS_7 G25PCIE_VSS_8 H27PCIE_VSS_9 J23
PCIE_VSS_11 J28PCIE_VSS_12 K27PCIE_VSS_13 L22PCIE_VSS_14 L23PCIE_VSS_15 L24PCIE_VSS_16 L27PCIE_VSS_17 L28PCIE_VSS_18 M21PCIE_VSS_19 M24PCIE_VSS_20 M27PCIE_VSS_21 N27PCIE_VSS_22 N28PCIE_VSS_23 P22PCIE_VSS_24 P23PCIE_VSS_25 P24PCIE_VSS_26 P25PCIE_VSS_27 P26PCIE_VSS_28P27 PCIE_VSS_29T21 PCIE_VSS_30T24 PCIE_VSS_31T27 PCIE_VSS_32T28 PCIE_VSS_33T29 PCIE_VSS_34U27 PCIE_VSS_35V22 PCIE_VSS_36V23 PCIE_VSS_37V24 PCIE_VSS_38V25 PCIE_VSS_39V26 PCIE_VSS_40V27 PCIE_VSS_41V28
VSS_30 R15
VSS_33 T9
VSS_37 V8
VSS_42 W1
VSS_53 AE27
PCIE_VSS_4 F26
PCIE_VSS_10 J26
PCIE_VSS_42V29
C466
1U_0402_6.3V4Z
1
2
C483
0.1U_0402_16V4Z
1
2
R3641K_0402_5% 1 2
C464
1U_0402_6.3V4Z
1
2
C482
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_LPC_R<22>
CLK_PCI_PCM_R<22>
CLK_PCI_1394_R<22>
CLK_PCI_SIO_R<22>
CLK_PCI_LAN_R<22>
CLK_PCI_MINI_R<22>
PCI_CLK6<22>
SB_SPDIFO<22>RTC_IRQ#<22>
LPC_FRAME#<22,33,41>
RTC_CLK<22>
IDE_DACK#<24,27>
PCI_AD23<22,31,36,37,40>PCI_AD24<22,31,36,37,40>PCI_AD25<22,31,36,37,40>PCI_AD26<22,31,36,37,40>PCI_AD27<22,31,36,37,40>PCI_AD28<22,31,36,37,40>
AC_SDATA_OUT<23>
+3VS +3VS +3VS +3VS +3VS +3VS +3VS
+3VS +3VS +3VS +3VS+3VALW
+3VALW +3VS +3VS +3VS +3VS
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
26 55, 星期四 三 09, 2006月
2005/03/08 2006/03/08
2.2K IF USED FOR SB600.
PCI_AD23
USE INT.PLL48 H, H = PCI ROM
ROM TYPE:
L, L = FWH ROM
CPU IF=K8
CPU IF=P4
DEFAULT
EXTERNALRTC
PCI_CLK1PCI_CLK0
PULLLOW
DEBUG STRAPS
PULLHIGH
OVERLAP COMMON PADS WHEREPOSSIBLE FOR DUAL-OP RESISTORS.
AC_SDATA_OUT
REQUIRED STRAPS
PCI_AD25
INTERNALRTC
DEFAULT
RTC_CLK
PCI_AD24
USE EEPROMPCIE STRAPS
USE DEFAULTPCIE STRAPS
DEFAULT
BYPASSACPIBCLK
USE ACPIBCLK
DEFAULT
IDE_DACK#
USE IDEPLL
USELONGRESET
USESHORTRESET
USE PCIPLL
DEFAULT
DEFAULT
BYPASS IDEPLL
PULLHIGH
DEFAULT
USE EXT.48MHZ
BYPASSPCI PLL
PCI_AD27 PCI_AD26
PULLLOW
PCI_CLK4PCI_CLK6
USELONGRESETDEFAULT
USESHORTRESET
DEFAULT
H, H = PCI ROM
NOTE: FOR SB460, PCICLK[8:7] ARECONNECTED TO SUBSTRATEBALLS PCICLK[1:0]
ROM TYPE:
L, L = FWH ROM
DEFAULT
PCI_CLK1PCI_CLK0
SB600 SB460
H, L = SPI ROM
L, H = LPC ROM DEFAULT
H, L = LPC I ROM
L, H = LPC II ROM
PULLLOW
PULLHIGH
RTC_IRQ#
AUTOPWRON
MANUALPWR ON
DEFAULT
SB_SPDIFO
SIO 48MHz
DEFAULT
SIO 24MHz
DEFAULT
48MHZ OSCMODE
CLK_PCI_MINI
USB PHYPOWERDOWNDISABLE
CLK_PCI_PCM
DEFAULT
USB PHYPOWERDOWNENABLE
N OTSUPPORTED
SB460 ONLY
LPC_FRAME#
DEFAULT
ENABLETHERMTRIP#
DISABLETHERMTRIP#
XTAL MODELOW
PCIE_CM_SETHIGH
CLK_PCI_SIO
DEFAULT
PCIE_CM_SET
PCI_AD28
10K IF USED FOR SB460.
SB600 ONLYSB460 ONLY
BOOTFAILTIMERENABLED
BOOTFAILTIMERDISABLED
NOTE: FORSB460,PCI_AD23 ISRESERVED
SB600 ONLY
SB600 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
DEFAULT
SB600 HAS 15K INTERNAL PD FOR AC_SDATA_OUT, 15K PU FOR RTC_CLK, EXTERNAL PU/PD IS NOT REQUIRED; FOR SB460, EXTERNAL PU/PD ARE REQUIRED
NOTE: R365 PU RESISTOR FOR RTC_IRQ# IS REQUIRED FOR SB460TO KEEP THE INPUT FROM FLOATING.
DEFAULT
USE DEBUG
STRAPS
IGNORE DEBUG
STRAPS
CLK_PCI_1394
ACPWRON PCI_CLK2 PCI_CLK3 PCI_CLK5 LFRAME#SPDIF_OUT
CLK_PCI_LPCCLK_PCI_LAN CLK_PCI_LPCCLK_PCI_LAN
Compal Electronics, inc.
R38410K_0402_5%
12
R37110K_0402_5%@
12
R37310K_0402_5%@
12
R39510K_0402_5%@
12
R36810K_0402_5%
12
R39410K_0402_5%@
12
R39810K_0402_5%@
12
R37510K_0402_5%@
12
R39310K_0402_5%@
12
R38110K_0402_5%
12
R39910K_0402_5%@
12
R39610K_0402_5%@
12
R37010K_0402_5%
12
R38510K_0402_5%@
12
R38310K_0402_5%@
12
R38610K_0402_5%
12
R38710K_0402_5%
12
R39010K_0402_5%@
12
R36910K_0402_5%
12
R38910K_0402_5%
12
R38810K_0402_5%
12
R36710K_0402_5%
12
R39710K_0402_5%@
12
R37610K_0402_5%
12
R38010K_0402_5%@
12
R36510K_0402_5%
12
R37810K_0402_5%@
12
R37910K_0402_5%@
12
R65010K_0402_5%
12
R37710K_0402_5%
12
R38210K_0402_5%
12
R36610K_0402_5%@
12
R37410K_0402_5%
12
R64910K_0402_5% @
12 R372
10K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IDE_D[0..15]
IDE_LED#
IDE_A[0..2]
IDE_IORDY
IDE_CS1#
IDE_IOR#
IDE_DACK#IDE_IOW#
IDE_DREQ
IDE_A1IDE_A0 IDE_A2
IDE_CS3#
IDE_D12
IDE_D10IDE_D9
IDE_D15IDE_D14
IDE_D11
IDE_D8
IDE_D13
IDE_IRQ
IDE_D2IDE_D1
IDE_D3
IDE_D0
IDE_D5
IDE_D7
IDE_D4
IDE_D6
IDE_RESET#
IDE_LED#
IDE_DREQIDE_IOW#IDE_IOR#IDE_IORDYIDE_DACK#IDE_IRQIDE_A1IDE_A0IDE_CS1#
IDE_CSEL
PDIAG#IDE_A2IDE_CS3#
IDE_RESET#IDE_D7IDE_D6IDE_D5IDE_D4IDE_D3IDE_D2IDE_D1IDE_D0
IDE_D8IDE_D9IDE_D10IDE_D11IDE_D12IDE_D13IDE_D14IDE_D15
SATA_STX_C_DRX_P0SATA_STX_C_DRX_N0
SATA_DTX_C_SRX_P0SATA_DTX_C_SRX_N0
PDIAG#
SD_CSEL
IDE_HRESET#IDE_RESET#
NB_RST#
IDE_D[0..15]<24>
IDE_A[0..2]<24>
SATA_STX_C_DRX_N0<24>SATA_STX_C_DRX_P0<24>
SATA_DTX_C_SRX_P0<24>SATA_DTX_C_SRX_N0<24>
IDE_CS1#<24>
IDE_DREQ<24>IDE_IOW#<24>IDE_IOR#<24>IDE_IORDY<24>IDE_DACK#<24,26>IDE_IRQ<24>
IDE_CS3# <24>IDE_LED#<33>
IDE_HRESET#<23>
NB_RST#<13,16,22,33,36,41>
+5VS+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
+3VS
+5VS
+5VS+3VS
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
B
SCHEMATIC, M/B LA-3151P
27 55,星期四 09, 2006三月
Compal Electronics, Inc.
401412THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
HDD CONN
80mils
CDROM CONN
80mils80mils
(NEW)
SATA HDD Conn.
IDE_CSELGrounding for Master (When use SATA HDD)Open or High for Slaver (Normal)Modify 11/07 for EMI
C498
10U_0805_10V4Z
1
2
R403 470_0402_5%PATA@
1 2
C492
0.1U_0402_16V4Z
1
2
C493
1000P_0402_50V7K
1
2
C494
10U_0805_10V4Z
1
2
C9430.1U_0402_16V4Z@1 2
C499
0.1U_0402_16V4Z
1
2
JP6
OCTEK_CDR-50JL1G
113355779911111313151517171919212123232525272729293131333335353737393941414343454547474949
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 50
R402100K_0402_5%
12
C500
0.1U_0402_16V4Z
1
2
R406100K_0402_5%@
1 2
U60
SN74AHC1G08DCKR_SC70@
IN11
IN22 G3
O 4
P5
R783 470_0402_5%@12
C495
0.1U_0402_16V4Z
1
2
C496
0.1U_0402_16V4Z
1
2
R833
33_0402_5%1 2
R816 0_0805_5%1 2
+C489150U_D2_6.3VM@
1
2
R782100K_0402_5%@
1 2
C497
1000P_0402_50V7K
1
2
JP5
OCTEK_HDD-22SG1G_NRPATA@
11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 44
R817 0_0805_5%1 2
C49010U_0805_10V4Z
1
2
JP7
OCTEK_SAT-22SG1G_NRSATA@
GND1HTX+2HTX-3GND4HRX-5HRX+6GND7
VCC3.38VCC3.39VCC3.310GND11GND12GND13VCC514VCC515VCC516GND17RESERVED18GND19VCC1220VCC1221VCC1222
C491
1U_0603_10V4Z
1
2
C501
1000P_0402_50V7K
1
2
R405 470_0402_5%SATA@12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
VGA_CRT_G
TV_COMPS_LTV_CRMA_L
CRT_VSYNC_L
CRT_HSYNC_B
CRT_HSYNC_L
CRT_VSYNC CRT_VSYNC_B
DSUB_12
DSUB_15
CRT_R_L
CRT_B_L
CRT_G_L
DSUB_12
DSUB_15
CRT_HSYNC
TV_LUMA_L
VGA_TV_Y
VGA_TV_COMP
VGA_CRT_R
VGA_CRT_B
VGA_TV_C
CRT_HSYNC<16>
CRT_VSYNC<16>
VGA_TV_Y<16>
VGA_TV_COMP<16>
VGA_TV_C<16>
VGA_CRT_DAT <16>
VGA_CRT_CLK <16>
VGA_CRT_R<16>
VGA_CRT_G<16>
VGA_CRT_B<16>
+CRT_VCC+R_CRT_VCC+5VS
+CRT_VCC
+CRT_VCC
+CRT_VCC
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PB
28 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
W=40mils
CRT Connector
DDC_MD2
W=40mils
VGA:82P_0402_50V8JUMA:6P_0402_50V8J
Place closed to chipset
(ECQ60)
TV-OUT Conn.
VGA:8P_0402_50V8KUMA:10P_0402_50V8J
Place closed to chipset
2005/09/22
Close to ConnectorRoute 8mil width (for 37.5ohm)
Close to ConnectorRoute 8mil width (for 37.5ohm)
Modify 11/07 for EMI
L27FCM2012C-800_0805
1 2
R412
4.7K_0402_5%
12
C524
150P_0402_50V8JTVOUT@
1
2
JP9
SUYIN_030107FR007SX08FUTVOUT@
367
42
1
5
89
R408
75_0402_1%
12
F1
1.1A_6VDC_FUSE
21
C516 0.1U_0402_16V4Z
1 2
C511 0.1U_0402_16V4Z
1 2
C525
150P_0402_50V8JTVOUT@
1
2
L31 MBK1608301YZF_0603TVOUT@
1 2
D13
DAN217_SC59@
2 31
R410 10K_0402_5%
12
C522
150P_0402_50V8JTVOUT@
1
2
D9
DAN217_SC59@
2 31
L26FCM2012C-800_0805
1 2
C51310P_0402_50V8K
1
2
R414
75_0402_1%TVOUT@
12
C521
150P_0402_50V8JTVOUT@
1
2
D8
DAN217_SC59@
2 31
C518 22P_0402_50V8JTVOUT@
1 2
G
D S
Q72N7002_SOT23
2
1 3
G
D S
Q82N7002_SOT23
2
1 3
D7
RB411D_SOT23
2 1
L30 MBK1608301YZF_0603TVOUT@
1 2
R409
75_0402_1%
12
L29 MBK1608301YZF_0603
1 2
D12
DAN217_SC59@
2 31
R415
75_0402_1%TVOUT@
12
C51268P_0402_50V8K
1
2
L25FCM2012C-800_0805
1 2
C5098P_0402_50V8K
1
2
JP8
SUYIN_070549FR015S208CR
611
17
1228
1339
144
1015
5
C51568P_0402_50V8K
1
2
R818 0_0805_5%TVOUT@1 2
C5088P_0402_50V8K
1
2
C523
150P_0402_50V8JTVOUT@
1
2
R413
75_0402_1%TVOUT@
12
L56 MBK1608301YZF_0603TVOUT@
1 2
C510
100P_0402_50V8J
1
2
C517 22P_0402_50V8JTVOUT@
1 2
C519 22P_0402_50V8JTVOUT@
1 2
D11
DAN217_SC59@
2 31
C504
8P_0402_50V8K
1
2
C506
8P_0402_50V8K
1
2
C5030.1U_0402_16V4Z
1
2
R4114.7K_0402_5%
12
C505
8P_0402_50V8K
1
2
D10
DAN217_SC59@
2 31
U21
SN74AHCT1G125DCKR_SC70-5
A2 Y 4OE#
1
G3
P5
R407
75_0402_1%
12
U20
SN74AHCT1G125DCKR_SC70-5
A2 Y 4OE#
1
G3
P5
C520
150P_0402_50V8JTVOUT@
1
2
C5078P_0402_50V8K
1
2
C514
10P_0402_50V8K
1
2
L28 MBK1608301YZF_0603
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BKOFF# DISPOFF#
INVT_PWM
I2C_CLKI2C_DAT
DAC_BRIGINVT_PWMDISPOFF#
TZOUT1+TZOUT1-
VGA_LVDSA1-VGA_LVDSA1+
VGA_LVDSA0-VGA_LVDSA0+TZOUT0+
TZOUT0-
VGA_LVDSAC+VGA_LVDSAC-
VGA_LVDSA2+VGA_LVDSA2-
TZCLK+TZCLK-
TZOUT2+TZOUT2-
+LCDVDD
ENVDD
BKOFF#<33>
I2C_DAT<16>I2C_CLK<16>
INVT_PWM <33>DAC_BRIG <33>
VGA_LVDSBC+<17>VGA_LVDSBC-<17>
VGA_LVDSB0+<17>VGA_LVDSB0-<17>
VGA_LVDSB1-<17>VGA_LVDSB1+<17>
VGA_LVDSB2+<17>VGA_LVDSB2-<17>
ENVDD<17>
VGA_LVDSA0- <17>VGA_LVDSA0+ <17>
VGA_LVDSA1- <17>VGA_LVDSA1+ <17>
VGA_LVDSA2+ <17>VGA_LVDSA2- <17>
VGA_LVDSAC- <17>VGA_LVDSAC+ <17>
+3VS+3VS
+INVPWR_B+
+3VS
+LCDVDD
+LCDVDD +5VALW
+INVPWR_B+
B+
+3VS +LCDVDD
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
29 55,星期四 09, 2006三月
2005/03/08 2006/03/08
LCD POWER CIRCUIT
(SAME AS ACES_87216-4016)
(60 MIL)
LCD/PANEL BD. Conn.
07/07/'05
W=60mils
W=60mils
Modify 11/07 for EMIModify 11/07 for EMI
Modify 11/22
Compal Electronics, inc.
C5301U_0402_6.3V4Z@
1
2
R416360_0402_5%
12
L45KC FBM-L11-201209-221LMAT_0805
12
C894
0.1U_0402_16V4Z
1
2
R418
1K_0402_5%
12
L73KC FBM-L11-201209-221LMAT_0805
12
G
D
SQ11
BSS138_SOT23
2
13
D15
1N4148_SOT23@
12
C5260.047U_0402_16V4Z
1
2
JP10
ACES_88107-4000G
123456789
1011121314151617181920
2122232425262728293031323334353637383940
D14RB751V_SOD323
21
C893
4.7U_0805_10V4Z
1
2R41910K_0402_5%
12
G
D
S
Q10SI2301BDS_SOT23 7.3
2
13
G
D
S
Q92N7002_SOT23
2
13
L46KC FBM-L11-201209-221LMAT_0805
12
R417
100K_0402_5%
12
C5290.1U_0402_16V4Z
1
2
C790
68P_0402_50V8K
1
2
L72KC FBM-L11-201209-221LMAT_0805
12
R420
4.7K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_DVI_DET
DVI_SCLK
DVI_SDATA
DVI_SCLK
DVI_SDATAVGA_DVI_DAT <17>
VGA_DVI_CLK <17>
VGA_DVI_DET<17>
DVI_TX0-<17>DVI_TX0+<17>
DVI_TX1-<17>DVI_TX1+<17>
DVI_TX2-<17>DVI_TX2+<17>
DVI_TXC+<17>DVI_TXC-<17>
+DVI_VCC
+3VS
+5VS
+DVI_VCC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PB
30 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
DVI-D Connector
(HDQ70)
W=40mils
FD1
@1
CF16
@1
D32RB411D_SOT23DVI@
21
H12H_O134X118D55X39
@1
H25H_S354D138
@1
CF11
@1
CF5
@1
H10H_C236D165
@1
CF17
@1
R422
4.7K_0402_5%
DVI@
12
H14H_S394D138
@1
H5H_C177D144
@1
H17H_O134X118D55X39
@1
CF14
@1
FD3
@1
C5310.1U_0402_16V4ZDVI@
1
2
CF6
@1
H32H_S315D138
@1
H3H_C236D161
@1
H15H_S394D138
@1
FD2
@1
CF1
@1
G
D S
Q132N7002_SOT23DVI@
2
1 3CF12
@1
H18H_O134X118D55X39
@1
H33H_C315D236
@1
CF18
@1
FD4
@1
H6H_C236D161
@1
CF2
@1
H28H_S394D138
@1
H16H_C276D118
@1JP11
SUYIN_070939FR024S531PL DVI@
TMDS_DATA2-1TMDS_DATA2+2
TMDS_DATA2/4 shield 3
TMDS_DATA4-4TMDS_DATA4+5
DDC_CLOCK 6
DDC_DATA 7
Analog VSYNC8
TMDS_DATA1-9TMDS_DATA1+10
TMDS_DATA1/3 shield 11
TMDS_DATA3-12TMDS_DATA3+13
+5V 14
GND 15
Hot Plug Detect 16
TMDS_DATA0-17TMDS_DATA0+18
TMDS_DATA0/5 shield 19
TMDS_DATA5-20TMDS_DATA5+21
TMDS_Clock shield 22
TMDS_Clock+23TMDS_Clock-24
CF9
@1
CF21
@1
H34H_O217X157D217X157N
@1
H4H_S394D138
@1
H1H_S394D138
@1
D17SKS10-04AT_TSMA@
21
CF22
@1
H29H_C236D161
@1
CF4
@1
CF15
@1
H19H_C276D118
@1
H7H_C236D165
@1
G
D S
Q122N7002_SOT23DVI@
2
1 3
H21H_S394D138
@1
CF19
@1
H2H_S394D138
@1
FD5
@1
H30H_C177D144
@1
H31H_S315D118
@1
R424
100K_0402_5% DVI@
12
H13H_S354D138
@1
CF13
@1
CF7
@1
H8H_C236D165
@1
CF3
@1
CF23
@1
H22H_S394D138
@1
R4214.7K_0402_5%
DVI@
12
H11H_O134X118D55X39
@1
H20H_C163D163N
@1
CF10
@1
FD6
@1
CF20
@1
H24H_S354D138
@1
R423
20K_0402_5% DVI@ 1 2
CF24
@1
H9H_C236D165
@1
H23H_S394D138
@1
CF8
@1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_LAN
V_12P
CTRL25
ACTIVITY#LINK_100#
LAN_EECLK
LAN_EEDOLAN_EEDI
LAN_EECS
+LAN_AVDDL
+LAN_AVDDH
LAN_X1LAN_X2
LINK_1000#
+LAN_DVDD
CTRL12
+LAN_AVDDH
CTRL12
+LAN_AVDDL25
PCI_AD2PCI_AD3
PCI_AD0
PCI_AD7
PCI_AD5
PCI_AD8
PCI_AD1
PCI_AD6
PCI_AD4
PCI_AD16
PCI_AD13
PCI_AD11
PCI_AD15
PCI_AD12
PCI_AD14
PCI_AD19
PCI_AD10
PCI_AD17
PCI_AD9
PCI_AD21
PCI_AD23
PCI_AD18
PCI_AD22
PCI_AD26
PCI_AD24
PCI_AD20
PCI_AD30
PCI_AD25
PCI_AD28
PCI_AD31
PCI_AD29
PCI_AD27
PCI_AD17 LAN_IDSEL
LAN_X2LAN_X1
PCI_AD[0..31]
LAN_MDI3-LAN_MDI3+
LAN_MDI0-LAN_MDI0+
LAN_MDI2-LAN_MDI2+
LAN_MDI1-LAN_MDI1+
PM_CLKRUN#
CLK_PCI_LAN
CTRL25
PCI_AD[0..31]<22,26,36,37,40>
PCI_CBE#0<22,36,37,40>PCI_CBE#1<22,36,37,40>
PCI_CBE#3<22,36,37,40>PCI_CBE#2<22,36,37,40>
PCI_SERR#<22,36,37>
PCI_FRAME#<22,36,37,40>PCI_IRDY#<22,36,37,40>PCI_TRDY#<22,36,37,40>
PCI_DEVSEL#<22,36,37,40>PCI_STOP#<22,36,37,40>
PCI_PAR<22,36,37,40>
LAN_PME#<33>
PCI_PIRQF#<22>
PCI_REQ#3<22>PCI_GNT#3<22>
LAN_MIDI3+ <32>LAN_MIDI3- <32>
LAN_MIDI2+ <32>LAN_MIDI2- <32>
LAN_MIDI1+ <32>LAN_MIDI1- <32>
LAN_MIDI0+ <32>LAN_MIDI0- <32>
LAN_ACTIVITY# <32>LAN_LINK# <32>
PCI_RST#<22,36,37,39,40>
CLK_PCI_LAN<22>PM_CLKRUN#<22,36,41>
PCI_PERR#<22,36,37,40>
+3VALW
+3VALW
+3VALW
+3VS
+2.5V_LAN
+3VALW
+1.2V_LAN
+3VALW
+3VALW
+3VALW
+2.5V_LAN
+1.2V_LAN
+2.5V_LAN
+2.5V_LAN
+1.2V_LAN
+2.5V_LAN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PB
31 55,星期四 09, 2006三月
2005/07/29 2006/07/29Compal Electronics, Inc.
8100CL(10/100 LAN) 8110SBL(10/100/1000 LAN)
RSET 5.6K 2.49K
8100C@
8100CL(10/100 LAN) 8110SBL(10/100/1000 LAN)BOM structure
Stuff No_Stuff
8110S@ StuffNo_Stuff
@ No_Stuff No_Stuff
RSET 5.6K for 8100CL 2.49K for 8110S(B)
40mils
40mils
40mils40mils
20mils
20mils
PIN
20mils
RTL8110SBL change to Ver.D
R427 0_0402_5%@12
C90027P_0402_50V8J
1
2
R4350_0805_5%8100C@
1 2
C5520.1U_0402_16V4Z
1
2
R7850_0402_5%8110S@12
C9010.1U_0402_16V4Z
1
2
C913
0.1U_0402_16V4Z8110S@1
2
C54027P_0402_50V8J
1
2
C9070.1U_0402_16V4Z
1
2R436
0_0805_5%8110S@1 2
C912
0.1U_0402_16V4Z8110S@1
2
C536
22U_0805_6.3V6M
1
2
R78610_0402_5%@
12
C555
0.1U_0402_16V4Z8110S@1
2
E
CB
Q152SB1197K_SOT23
2
31
PCI I/F
Power
LAN I
/F
U22
RTL8110SBL_LQFP1288110S@
AD0104AD1103AD2102AD398AD497AD596AD695AD793AD890AD989AD1087AD1186AD1285AD1383AD1482AD1579AD1659AD1758AD1857AD1955AD2053AD2150AD2249AD2347AD2443AD2542AD2640AD2739AD2837AD2936AD3034AD3133
C/BE#344
IDSEL46
C/BE#260
FRAME#61IRDY#63TRDY#67DEVSEL#68STOP#69
PERR#70SERR#75
PAR76
C/BE#177 C/BE#092
ISOLATE# 23
EECS 106
RTSET 127
CTRL12 125PME#31
LED0 117LED1 115LED2 114
X2 122
INTA#25
RST#27
CLK28
GNT#29 REQ#30
TXD+/MDI0+ 1TXD-/MDI0- 2
RXIN+/MDI1+ 5RXIN-/MDI1- 6
AUX/EEDI 109EESK 111
NC/VSS 9
NC/AVDDH 10
NC/HSDAC+ 11
NC/VSS 13
NC/MDI2+ 14NC/MDI2- 15
NC/M66EN 88
NC/MDI3+ 18NC/MDI3- 19
NC/GND 22
NC/VDD12 24
NC/GND 48NC/GND 62
CLKRUN#65
NC/SMBCLK 72
NC/GND 73
NC/SMBDATA 74
NC/VDD12 110
NC/GND 112NC/GND 118
AVDDH 120
NC/HG 123NC/LG2 124
VDD12 126
NC/VDD12 45NC/VDD12 64
VDD33 41VDD33 56VDD33 71VDD33 84VDD33 94VDD33 107
AVDDL 3
AVDDL 20AVDDL 7
VDD12 54VDD12 78VDD12 99
NC 12
CTRL25 8
GND/VSS4GND/VSS17
GND/VSSPST21
GND35
GND/VSSPST38GND/VSSPST51
GND52
GND/VSSPST66
GND80
GND/VSSPST81GND/VSSPST91
GND100
GND/VSSPST101GND/VSSPST119
GND/VSS128
VDD33 26
X1 121
NC/VDD12 116
VDD12 32
LWAKE 105
EEDO 108
NC/LED3 113
AVDDL 16
C534
0.1U_0402_16V4Z8110S@
1
2
C9090.1U_0402_16V4Z
1
2
C914
0.1U_0402_16V4Z8110S@
1
2
C9100.1U_0402_16V4Z
1
2
C9080.1U_0402_16V4Z
1
2
C8960.1U_0402_16V4Z8110S@
1
2
R425 3.6K_0402_5%
1 2
C898
22U_0805_6.3V6M8110S@
1
2
R434 100_0402_5%
1 2
R4312.49K_0603_1%8110S@1 2
Y4
25MHZ_20P
1 2
C91118P_0402_50V8J@
1
2
R7870_0402_5%8110S@
1 2
R429 15K_0402_5%
1 2
C5410.1U_0402_16V4Z
1
2
R4390_0805_5%8110S@
1 2
U23
AT93C46-10SU-2.7_SO8
CS1 SK2 DI3 DO4
VCC 8NC 7NC 6GND 5
C5510.1U_0402_16V4Z
1
2
C915
0.1U_0402_16V4Z8110S@1
2
R4370_0402_5%8110S@
1 2
R4400_0805_5%8100C@
1 2
C895 0.1U_0402_16V4Z
1
2
R426 0_0402_5% 1 2
E
CB
Q14
2SB1197K_SOT238110S@
2
31
C560
0.1U_0402_16V4Z
1
2
C9030.1U_0402_16V4Z
1
2
R4410_0402_5%8100C@
1 2
C9050.1U_0402_16V4Z
1
2
R428 1K_0402_5%
1 2
C9040.1U_0402_16V4Z
1
2
C9020.1U_0402_16V4Z
1
2
C9060.1U_0402_16V4Z
1
2
R4320_0805_5%8110S@
1 2
C8971U_0402_6.3V4Z
12
C899
0.1U_0402_16V4Z8110S@
1
2
R7845.6K_0603_1%8100C@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RJ45_GND
LAN_MDI3-LAN_MDI3+
LAN_MDI2-LAN_MDI2+
LAN_MDI1-LAN_MDI1+
LAN_MDI0-LAN_MDI0+
RJ45_MDI3-RJ45_MDI3+
RJ45_MDI0-RJ45_MDI0+
RJ45_MDI2-RJ45_MDI2+
RJ45_MDI1-RJ45_MDI1+
RJ45_MDI3+RJ45_MDI3-
RJ45_MDI2-
RJ45_GND LANGND
RJ45_MDI2-
RJ45_MDI2+
RJ45_MDI1+
RJ45_MDI3-
RJ45_MDI3+
RJ45_MDI0-
RJ45_MDI1-
RJ45_MDI2+
RJ45_MDI0+
LAN_LINK#
LAN_ACTIVITY#
LAN_LINK#<31>
LAN_MIDI3-<31>
LAN_MIDI2-<31>
LAN_MIDI1-<31>
LAN_MIDI0-<31>
LAN_MIDI3+<31>
LAN_MIDI2+<31>
LAN_MIDI1+<31>
LAN_MIDI0+<31>
LAN_ACTIVITY#<31>+2.5V_LAN
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PB
32 55,星期四 09, 2006三月
2005/07/29 2006/07/29Compal Electronics, Inc.
LAN RTL8110SBL/RTL8100CL
24HST1041A-3(SP050002110) for RTL8110SBL(GbE)24ST0023-3(SP050005000) for RTL8100CL(10/100)
unpop when use RTL8100CL(10/100)
reseved for RTL8100CL(10/100)
24ST0023-3: Half port(TD[3:4], MX[3:4])
HBL-50
R449 0_0402_5%8110S@1 2
C9181000P_1206_2KV7K
1 2
R44649.9_0402_1%8110S@
12
R46175_0402_1%
12
R450 300_0603_5%
12
C570
0.01U_0402_16V7K
1
2
R794 0_0402_5%8100C@1 2
R459 0_0402_5%8100C@1 2
C564
0.01U_0402_16V7K8110S@
1
2
T3
0.5u_GST50098110S@
TCT11TD1+2TD1-3
TCT24TD2+5TD2-6 MX2- 19MX2+ 20MCT2 21
MX1- 22MX1+ 23MCT1 24
TCT37TD3+8TD3-9
TCT410TD4+11TD4-12
MCT3 18MX3+ 17MX3- 16
MCT4 15MX4+ 14MX4- 13
R791
49.9_0402_1%
12
R79675_0402_1%
12
R460 0_0402_5%8100C@1 2
JP75
SUYIN_100073FR012S100ZL
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Green LED+9
Green LED-10
Amber LED+11
Amber LED-12
SHLD1 13
SHLD2 14
SHLD4 16
SHLD3 15
C919
0.01U_0402_16V7K
1
2
C917
0.01U_0402_16V7K8110S@
1
2
R790
49.9_0402_1%
12
R45449.9_0402_1%
12
C920
0.1U_0402_16V4Z
1
2
R45349.9_0402_1%
12 R792
75_0402_1%
12
R44849.9_0402_1%8110S@
12
R44749.9_0402_1%8110S@
12
C571
0.01U_0402_16V7K
1
2
C9214.7U_0805_10V4Z
1
2
R79375_0402_1%
12
R795 0_0402_5%8100C@1 2
R788 300_0603_5%
12
R4440_0603_5%8110S@
12
R78949.9_0402_1%8110S@
12
C567
0.01U_0402_16V7K8110S@
1
2
C565
0.01U_0402_16V7K8110S@
1
2
C916
0.01U_0402_16V7K8110S@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FRD#SELIO#FSEL#
E51_RXDE51_TXD
LPC_AD0
+EC_VCCA
EC
AG
ND
KSI1
KSI6KSI5
KSI7
KSO1KSO0
KSO2
KSO4KSO3
KSO5KSO6KSO7KSO8
KSO12
KSO10
KSO13
KSO11
KSO9
KSO15KSO14
TP_DATA
FSEL#
EC_LID_OUT#
PBTN_OUT#
ADB[0..7]
KBA[0..19]
CAPS_LED#
ECAGND
TEST_TP
TP_CLK
KBA5
KBA1
KBA4
ECAGND
KB_CLKKB_DATAPS_CLKPS_DATA
E51_TXDE51_RXD
TP_DATA
C RY1C RY2
TEST_TP
DPLL_TP
DPLL_TP
KSI2
KBA3
ADB5
FRD#
ADB7
ON/OFF
EC_SMB_DA2
EC_SMB_CK1
TP_CLK
LPC_AD1
ACOFF
PWR_LED
EC_SCI#IREF
INVT_PWM
KBA12
ADB3
KB_CLK
KBA13
KSI0
KBA4
ADB6
FWR#
ENBKL
KBA14
ADB2
EC_MUTE
BEEP#
KBA9
KSO17
KBA17
EC_PME#
EC_THERM#
EC_SMI#
BKOFF#
DAC_BRIG
PS_DATA
PM_SLP_S3#
KBA0
FSTCHG
LID_SW#
KBA7
LPC_AD3
EC_PME#
KBA16
ADB1
AD_BID0
PS_CLK
KSI3
KBA10
KBA5
KBA18
KSI4
KBA6
KBA2
SELIO#
EC_SMB_DA1
PM_SLP_S5#
EC_SMB_CK2
KBA1
LPC_AD2
EN_DFAN1
KBA11
KBA8
ADB0
BATT_OVP
AD_BID0
KB_DATA
EC_ON
ADB4
VR_ON
SYSONSUSP#
KBA15
NUM_LED#
SKU_ID
SKU_ID
C RY1 C RY2
EC_SMB_DA1EC_SMB_CK1
EC_SMB_DA2EC_SMB_CK2
EAPD
KSO[0..15]
KSI[0..7]
EC_RCIRRX
EC_RCIRRX
KSO16
IE_BTN#EMPWR_BTN#E-MAIL_BTN#USER_BTN#
WL_LED#
PWR_SUSP_LED#
MEDIA_LED#
BATT_GRN_LED#BATT_AMB_LED#
BT_LED#E-MAIL_LED#
BT_ON#
IDE_LED#
SATA_LED#
EMPWR_BTN#
E-MAIL_BTN#
USER_BTN#
IE_BTN#
BATT_TEMP
5IN1_LED#
TV_THERM#
KBA19 TV_THERM#
FAN_SPEED1
BTSW_EN#
WLSW_EN#
EAPD
BTSW_EN#
WLSW_EN#
VGATE
POUT
VLDT_EN
S3_STATE
MINI_PME#<36>
LAN_PME#<31>
LPC_FRAME#<22,26,41>
LPC_AD2<22,41>
LPC_AD0<22,41>
LPC_AD3<22,41>
LPC_AD1<22,41>
CLK_PCI_LPC<22>
EC_KBRST#<23>EC_GA20<23>
TP_DATA<34>TP_CLK<34>
EC_SWI#<23>
FSEL#<35>
EC_SMB_DA1<35,50>
KBA[0..19] <35>
ADB[0..7] <35>
FWR#<35>FRD#<35>
CAPS_LED#<43>
DAC_BRIG <29>
BEEP# <44>
EN_DFAN1 <5>
EC_ON <42>
FSTCHG<49>
ON/OFF <42>
EC_SMI#<23>
INVT_PWM <29>
EC_MUTE <45>
BATT_OVP <49>
IREF <49>
NUM_LED#<43> EAPD <44>
KSI[0..7] <34>
KSO[0..15] <34>
ENBKL<17>BKOFF#<29>
EC_SMB_CK2<7>EC_SMB_DA2<7>
EC_SMB_CK1<35,50>
NB_RST#<13,16,22,27,36,41>
PM_SLP_S3# <23>PM_SLP_S5# <23>
SERIRQ<22,37,41>
EC_LID_OUT# <23>
EC_SCI#<23>
PBTN_OUT#<23> EC_THERM# <7,23>
LID_SW#<42>
BATT_TEMP <50>
ACOFF <47,49>
ACIN <50>
VR_ON<54>
SYSON<39,46>SUSP#<35,39,46,51,53>
RCIRRX<43>
KSO17 <34>KSO16 <34>
PWR_LED <43>
EC_RSMRST# <23>
WL_OFF# <36>
WL_LED# <43>
PWR_SUSP_LED# <43>
MEDIA_LED# <43>
BATT_GRN_LED# <43>BATT_AMB_LED# <43>
BT_LED# <43>E-MAIL_LED# <43>
BT_ON#<34>
IDE_LED#<27>
SATA_LED#<24>
5IN1_LED#<37>
EMPWR_BTN#<43>
E-MAIL_BTN#<43>
USER_BTN#<43>
IE_BTN#<43>
USB_EN# <39,43>
TV_THERM# <36>
FAN_SPEED1 <5>
MINI1_OFF# <36>
POUT <54>
BTSW_EN#<43>
WLSW_EN# <43>
VGATE<54>
VLDT_EN <42,46>
S3_STATE <23>
+3VALW
+3VALW
+5VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW+5VS
+3VALW
+5VS
+3VALW +3VALW
+3VALW
+3VALW
+3VS
+3VS
+3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PB
33 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
For EC Tools
Ra
Rb
Rc
Rd
20mil
20mil20mil
KB910 C1 VERSION
Board ID Ra Rb Rc Rd
W/S SATA
W/O SATA
VGA
UMA
SATA Status
V X
VX
V
VX
X
R463 33_0402_5%@12
R801
0_0402_5%PATA@1
2
LPC Interface
X-BUS Interface
PS2 Interface
Internal Keyboard
SMBus
ENE-KB910-B4
Pulse Width
Wake Up Pin
Timer Pin
Analog To Digital
Digital To Analog
Expanded I/O
MISC
FAN
GPIO
**
****
********
U24
KB910Q B4_LQFP176
GPOK0/KSO0 49GPOK1/KSO1 50GPOK2/KSO2 51GPOK3/KSO3 52GPOK4/KSO4 53GPOK5/KSO5 56GPOK6/KSO6 57GPOK7/KSO7 58GPOK8/KSO8 59GPOK9/KSO9 60
GPOK10/KSO10 61GPOK11/KSO11 64GPOK12/KSO12 65GPOK13/KSO13 66GPOK14/KSO14 67GPOK15/KSO15 68GPOK16/KSO16 153GPOK17/KSO17 154
GPIK0/KSI0 71GPIK1/KSI1 72GPIK2/KSI2 73GPIK3/KSI3 74GPIK4/KSI4 77GPIK5/KSI5 78GPIK6/KSI6 79GPIK7/KSI7 80
GPOW0/PWM0 32GPOW1/PWM1 33
FAN2PWM/GPOW2/PWM2 36GPOW3/PWM3 37GPOW4/PWM4 38GPOW5/PWM5 39GPOW6/PWM6 40
FAN1PWM/GPOW7/PWM7 43
GPWU0 2GPWU1 26GPWU2 29GPWU3 30GPWU4 44GPWU5 76
TIN1/GPWU6 172TIN2/FANFB2/GPWU7 176
GPIAD0/AD0 81GPIAD1/AD1 82GPIAD2/AD2 83GPIAD3/AD3 84GPIAD4/AD4 87GPIAD5/AD5 88GPIAD6/AD6 89GPIAD7/AD7 90
GPODA0/DA0 99GPODA1/DA1 100GPODA2/DA2 101GPODA3/DA3 102GPODA4/DA4 1GPODA5/DA5 42GPODA6/DA6 47GPODA7/DA7 174
GPIO18/XIO8CS# 85GPIO19/XIO9CS# 86GPIO1A/XIOACS# 91GPIO1B/XIOBCS# 92GPIO1C/XIOCCS# 93GPIO1D/XIODCS# 94GPIO1E/XIOECS# 97GPIO1F/XIOFCS# 98
GPIO2E/TOUT1/FANFB1 171DPLL_TP/GPIO06/FANFB3 12
TEST_TP/GPIO05/FAN3PWM 11
TOUT2/GPIO2F 175
LAD015LAD114LAD213LAD310LFRAME#9LRST#/GPIO2C165LCLK18SERIRQ7CLKRUN#/GPIO0C25LPCPD#/GPIO0B24
FnLock#/GPIO1255CapLock#/GPIO01154NumLock#/GPIO0A23ScrollLock#/GPIO0F41ECRST#19GA20/GPIO025KBRST#/GPIO036ECSCI#31
GPIO048GPIO0720GPIO0821GPIO0922GPIO0D27GPIO0E28GPIO1048GPIO1362GPIO1463GPIO1569GPIO1670GPIO1775GPIO24109GPIO25118GPIO26119GPIO27148GPIO28149GPIO29155GPIO2A156GPIO2B162GPIO2D168
SCL1163SDA1164SCL2169SDA2170
PSCLK1110PSDAT1111PSCLK2114PSDAT2115PSCLK3116PSDAT3117
RD#150WR#151MEMCS#173IOCS#152D0138D1139D2140D3141D4144D5145D6146D7147A0124A1/XIOP_TP125A2126A3127A4/DMRP_TP128A5/EMWB_TP131A6132A7133A8143A9142A10135A11134A12130A13129A14121A15120A16113A17112A18104A19103A20/GPIO23108E51CS#/GPIO20/ISPEN105
GN
D17
GN
D35
GN
D46
GN
D12
2G
ND
137
GN
D16
7VC
CBA
T16
1
BATG
ND
159
VCC
16VC
C34
VCC
45VC
C12
3VC
C13
6VC
C15
7VC
C16
6
VCC
A95
AGN
D96
E51IT0/GPIO00 3E51IT1/GPIO01 4
E51RXD/GPIO21/ISPCLK 106E51TXD/GPIO22/ISPDAT 107
XCLKI 158XCLKO 160
R800
0_0402_5%@1
2
C584 0.01U_0402_16V7K
12
R474 100K_0402_5% 1 2
RP6
4.7K_1206_8P4R_5%
1 82 73 64 5
C579
0.1U_0402_16V4Z
1
2
C572
0.1U_0402_16V4Z
1
2
R4831K_0402_5%
12
C587 0.1U_0402_16V4Z
12
R481100K_0402_5%@
12
R477 0_0402_5%
1 2
R79810K_0402_5%
12
C580
1U_0402_6.3V4Z
1
2
R4794.7K_0402_5%
12
C583
0.1U_0402_16V4ZPATA@
1
2
C5730.1U_0402_16V4Z
1
2
C574
0.1U_0402_16V4Z
1
2
C585
10P_0402_50V8K
1
2
R465100K_0402_5%SATA@
12
R799 0_0402_5%
1 2
R473 100K_0402_5%
12
R475 100K_0402_5% 1 2
RP8
100K_1206_8P4R_5%
1 82 73 64 5
L57
FBM-L11-160808-800LMT_0603
1 2
R476 10K_0402_5%
1 2
C58122P_0402_50V8J@
12R797100K_0402_5%
12
C5771000P_0402_50V7K
1
2
R4821K_0402_5%
12
C582
0.1U_0402_16V4Z
1
2
R486 1K_0402_5%
1 2
RP7
10K_1206_8P4R_5%
1 82 73 64 5
R478 47K_0402_5%
12
R4804.7K_0402_5%
12
C575
0.1U_0402_16V4Z
1
2
C586
10P_0402_50V8K
1
2
JP76
ACES_85205-0400@
1 12 23 34 4
C578
0.1U_0402_16V4Z
1
2L58
FBM-L11-160808-800LMT_0603
1 2
D18
RB751V_SOD323
21
R4851K_0402_5%
12
R472100K_0402_5%
12
R470 0_0402_5%
1 2
R47110K_0402_5%
12
RP9
4.7K_1206_8P4R_5%
1 82 73 64 5
X2
32.768KHZ_12.5P_1TJS125DJ2A073
OU
T4
IN1
NC
3
NC
2
C5761000P_0402_50V7K
1
2
R484 1K_0402_5%
1 2
ICH_BITCLK_MDC
ICH_SDOUT_MDC
ICH_RST_MDC#
ICH_SYNC_MDC
USB20_P5_RUSB20_N5_R
KSI7
KSO10
KSO1
KSI5
KSI7
KSO14
KSO[0..15]
KSO3
KSO7
KSO11
KSI1
KSO4
KSI2
KSO12
KSO5KSO2
KSO9
KSO1
KSI0
KSO14
KSI2
KSI6KSI6
KSO8
KSO8KSI4KSI3
KSO7
KSO0
KSO13
KSO15
KSO11
KSO0
KSO9
KSO2
KSO10
KSO15
KSI3
KSO3
KSO12KSI0
KSI1
KSI5
KSO13
KSO6
KSO4
KSI[0..7]
KSI4
KSO6
KSO5
BTN_R
SCRL_U
SCRL_D
SCRL_RSCRL_L
BTN_L
BTN_RSCRL_RSCRL_USCRL_LSCRL_DBTN_L
TP_DATATP_CLK
BTN_R
SCRL_R
SCRL_U
SCRL_L
SCRL_D
BTN_L
TP_DATA
TP_CLK
BTN_L
SCRL_D
SCRL_L
SCRL_U
SCRL_R
BTN_R
KSO17KSI2KSI5KSO16
KSI4KSI3
TP_CLK
TP_DATA
USB20_N5_RUSB20_P5_RUSB20_P5
USB20_N5
ICH_AC_SDIN1<23>ICH_RST_MDC#<23>
ICH_SDOUT_MDC<23>
ICH_BITCLK_MDC <23>
ICH_SYNC_MDC<23>
BT_ON#<33>
WLAN_BT_DATA<36>WLAN_BT_CLK<36>
KSO[0..15] <33>
KSI[0..7] <33>
TP_DATA<33>TP_CLK<33>
KSO17<33>
KSO16<33>
USB20_N5<23>USB20_P5<23>
+3VALW
+3VALW
+3VALW
+BT_VCC
+BT_VCC
+5VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
34 55,星期四 09, 2006三月
2005/03/08 2006/03/08
MDC Conn.
20mil
Bluetooth Conn.
W=40mils
INT_KBD Conn.
(Right)
(Left)
Scroll Down
Scroll RightScroll Left
Left Right
To TP/B Conn.
Scroll Up
2005/09/04
11/01 modify
Modify 11/07 for EMI
Compal Electronics, inc.
SW4EVQPLHA15_4P 3
2
1
4
5 6
C621 100P_0402_50V8J1 2
G
D
S
Q16
SI2301BDS_SOT23
2
13
SW1EVQPLHA15_4P 3
2
1
4
5 6
C605 100P_0402_50V8J1 2
C597 100P_0402_50V8J1 2
JP17
ACES_85201-24051
123456789101112131415161718192021222324
C591 100P_0402_50V8J1 2
C607 100P_0402_50V8J1 2
JP16
ACES_87151-1207
123456789101112
SW3EVQPLHA15_4P 3
2
1
4
5 6
R805
100K_0402_5%
12 JP18
ACES_87212-0800
12345678
R487 33_0402_5% 1 2
C625
0.1U_0402_16V4Z
C606 100P_0402_50V8J1 2
D34
PSOT24C_SOT23@
2 31
C610 100P_0402_50V8J1 2
C608 100P_0402_50V8J1 2
C599 100P_0402_50V8J1 2
C604 100P_0402_50V8J1 2C603 100P_0402_50V8J1 2
C592 100P_0402_50V8J1 2
C620 100P_0402_50V8J1 2
C616 100P_0402_50V8J1 2
D21
PSOT24C_SOT23@
2 31
C594 100P_0402_50V8J1 2
C617 100P_0402_50V8J1 2
C612 100P_0402_50V8J1 2
C624
4.7U_0805_10V4Z
1
2
C609 100P_0402_50V8J1 2
C619 100P_0402_50V8J1 2
C623 100P_0402_50V8J1 2
C593 100P_0402_50V8J1 2
C622 100P_0402_50V8J1 2
C590
0.1U_0402_16V4Z
Connector for MDC Rev1.5
JP14
ACES_88018-124G
GND11IAC_SDATA_OUT3GND25IAC_SYNC7IAC_SDATA_IN9IAC_RESET#11
RES0 2RES1 4
3.3V 6GND3 8GND4 10
IAC_BITCLK 12
GN
D13
GN
D14
GN
D15
GN
D16
GN
D17
GN
D18
C602 100P_0402_50V8J1 2
JP15
ACES_85201-10051Media@
12345678910
C588
1U_0402_6.3V4Z
1
2
C600 100P_0402_50V8J1 2
SW6EVQPLHA15_4P 3
2
1
4
5 6
D20
PSOT24C_SOT23@
2 31
SW5EVQPLHA15_4P 3
2
1
4
5 6
D19
PSOT24C_SOT23@
2 31
C601 100P_0402_50V8J1 2
C618 100P_0402_50V8J1 2
C613
1U_0402_6.3V4Z
1
2
L76
WCM2012F2S-900T04_0805
1 122
33 4 4
SW2EVQPLHA15_4P 3
2
1
4
5 6
C598 100P_0402_50V8J1 2
C595 100P_0402_50V8J1 2
C589
22P_0402_50V8J
1
2
C596 100P_0402_50V8J1 2
C611 100P_0402_50V8J1 2
C614 100P_0402_50V8J1 2 C615 100P_0402_50V8J1 2
FWE#
ADB[0..7]
KBA[0..19]
RESET#FWE#
FRD#
FSEL#
ADB0
ADB3ADB2ADB1
ADB4
ADB7ADB6ADB5
KBA0
INT_FLASH_EN#INT_FLASH_SEL
KBA1KBA2KBA3
KBA7
KBA4KBA5
KBA11
KBA8
KBA10
KBA6
KBA9
KBA14
KBA12
KBA15KBA16 KBA17
KBA18
KBA19KBA13
INT_FSEL#FRD#
KBA0
FWE#
KBA1
KBA6
KBA2KBA3KBA4
KBA10
KBA5
KBA7
KBA9
KBA13
KBA8
KBA11
KBA15KBA14
KBA16
KBA12
KBA17
ADB0
KBA18KBA19
ADB3
ADB1ADB2
ADB4
ADB6
RESET#
ADB7
ADB5
INT_FSEL#FSEL#
INT_FLASH_SEL
INT_FLASH_EN#
ADB4
ADB0ADB1
KBA10
KBA7
KBA16
KBA8
ADB3
KBA14KBA13
KBA4
KBA18
KBA5
KBA15
KBA11KBA3
ADB7
ADB2
KBA17
KBA6
KBA2
KBA9
KBA1
ADB5
KBA12
ADB6KBA0
FSEL#
FRD#
FWE#
FWR# <33>
EC_SMB_CK1<33,50>EC_SMB_DA1<33,50>
ADB[0..7]<33>
KBA[0..19]<33>
EC_FLASH# <23>
SUSP# <33,39,46,51,53>
SB_INT_FLASH_SEL# <23>
SUS_STAT#<23>
FRD# <33>
FSEL# <33>
+3VALW
+5VALW +5VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
35 55,星期四 09, 2006三月
2005/03/08 2006/03/08
1MB Flash ROM
1MB Flash ROM
FOR DEBUG ONLY(CL55)
R829 0_0402_5%1 2
C6260.1U_0402_16V4Z@
1
2
C628
0.1U_0402_16V4Z
1 2
G
D S
Q172N7002_SOT23
2
1 3
C630 0.1U_0402_16V4Z
1 2
U28
SST39VF080-70_TSOP40
A021A120A219A318A417A516A615A714A88A97A1036A116A125A134A143A152A161
A1813
CE#22OE#24
D0 25D1 26D2 27D3 28D4 32D5 33D6 34D7 35
GND1 39
A1740
WE#9
VCC1 30VCC0 31
GND0 23
A1937
NC0 29NC1 38
NC 11RP# 10
READY/BUSY# 12R493100K_0402_5%
1 2
C629
0.1U_0402_16V4Z
1
2
R491 22_0402_5%@1 2
R490
100K_0402_5%@
1 2
U29
AT24C16AN-10SU-2.7_SO8
A0 1A1 2
SDA5 SCL6
VCC8
A2 3GND 4
WP7
R492
100K_0402_5%
12
U27
TC7SH32FU_SSOP5
I0 2
I1 1O4
G3
P5
U61
SN74AHCT1G125DCKR_SC70-5@
A2 Y 4OE
#1
G3
P5
C6270.1U_0402_16V4Z@
1 2
R494
100K_0402_5%
12
R489100K_0402_5%
12
U26
SST39VF040-70-4C-NH_PLCC32@
A181A162A153A124A75A66A57A48A39A210A111A012DQ013DQ114DQ215
DQ3 17DQ4 18DQ5 19DQ6 20DQ7 21CE# 22A10 23OE# 24A11 25A9 26A8 27A13 28A14 29
WE# 31VDD 32
VSS16
A17 30
JP19
SUYIN_80065AR-040G2T@
1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40
U62
SN74AHCT1G125DCKR_SC70-5@
A2 Y 4OE
#1
G3
P5
R48810K_0402_5%@
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CLK_PCI_MINI
PCI_AD[0..31]
PCI_AD18
WL_OFF#
PCI_AD6
PCI_AD19
PCI_AD23
PCI_CBE#2
WLAN_BT_CLK
PCI_AD5
PCI_AD21
PCI_AD28
PCI_AD9
PCI_TRDY#
PCI_AD17
PCI_AD14
PCI_AD24WLAN_BT_DATA
PCI_AD27
CLK_PCI_MINI
PCI_AD20
PCI_AD4
PCI_CBE#0
PCI_AD10
PCI_AD29
PCI_AD12
PCI_AD15
PCI_AD1
PCI_AD11
PCI_REQ#1
PCI_AD3
PCI_AD16
PCI_AD25
PCI_AD31
PCI_AD7
PCI_AD13
PCI_CBE#1PCI_PERR#
PCI_AD18
PCI_AD26
PCI_AD30
PCI_STOP#
PCI_AD0
PCI_IRDY#
PCI_AD8
MINI_IDSEL1
PCI_AD2
PCI_DEVSEL#
PCI_SERR#
PCI_FRAME#
PCI_AD22
PCI_GNT#1
S_YIN S_CIN
CVBS_IN
AUDIO_INR
AUDIO_INL
MINI1_CLKREQ#
MINI1_OFF#NB_RST#
ICH_SMBCLKICH_SMBDATA
WLAN_BT_CLKWLAN_BT_DATASB_PCIE_WAKE#
+CAM_VDD
PCI_CBE#0 <22,31,37,40>
PCI_TRDY# <22,31,37,40>
PCI_PIRQH#<22,37>
PCI_REQ#1<22>
PCI_DEVSEL# <22,31,37,40>PCI_PERR#<22,31,37,40>
PCI_CBE#2<22,31,37,40>
CLK_PCI_MINI<22>
PCI_CBE#3<22,31,37,40>
PCI_AD[0..31] <22,26,31,37,40>
PCI_IRDY#<22,31,37,40>
PCI_PAR <22,31,37,40>
PCI_SERR#<22,31,37> PCI_STOP# <22,31,37,40>
PCI_FRAME# <22,31,37,40>
PCI_CBE#1<22,31,37,40>
PCI_PIRQG# <22>
WL_OFF#<33>
PCI_GNT#1 <22>
PCI_RST# <22,31,37,39,40>
PM_CLKRUN#<22,31,41>
MINI_PME# <33>
WLAN_BT_DATA<34>
WLAN_BT_CLK <34>
TV_THERM# <33>
CLK_PCIE_MINI1#<15>CLK_PCIE_MINI1<15>
MINI1_CLKREQ#<15>
ICH_SMBDATA <15,39>ICH_SMBCLK <15,39>
MINI1_OFF# <33>
S_YIN<43> S_CIN <43>
CVBS_IN<43>
AUDIO_INL<43>
AUDIO_INR <43>
PCIE_MTX_C_PRX_P1<12>PCIE_MTX_C_PRX_N1<12>
PCIE_MRX_PTX_N1<12>PCIE_MRX_PTX_P1<12>
SB_PCIE_WAKE#<23,39>
NB_RST# <13,16,22,27,33,41>
USB20_N4 <23>USB20_P4 <23>
+5VS
+5VS
+3VS
+3VS
+3VS
+5VS
+5VS
+3VALW
+3VALW
+3VALW
+3VS
+3VALW
+1.5VS
+3VALW+3VS +1.5VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PB
36 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
RINGTIP
W=30mils W=20mils
W=40mils
W=40mils
W=40mils
W=40mils
W=40mils
(Change to SP070003200)
W=40mils
(MINI1_LED#)
Mini Card Power Rating
+3VS+3VALW+1.5VS
Primary Power (mA)Peak Normal1000330500
750250375
Auxiliary Power (mA)Normal
250 (wake enable)5 (Not wake enable)
Power2006/02/20 modify
W=30mils
JP21
FOX_AS0B226-S99N-7F
33 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 16
1717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 52
11 2 2
G1
53G
254
G3
55G
356
C643
0.1U_0402_16V4Z
1
2
R495100_0402_5%
1 2
C645
0.1U_0402_16V4Z
1
2
C644
4.7U_0805_10V4Z
1
2
C63310U_0805_10V4Z
1
2
C632
0.1U_0402_16V4Z
1
2
C6384.7U_0805_10V4Z
1
2
C642
4.7U_0805_10V4Z
1
2
C647
0.1U_0402_16V4Z
1
2
C636
0.1U_0402_16V4Z
1
2
KEY KEY
JP20
P-TWO_A53921-A0G16-P
11 2 2
33 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 525353 54 545555 56 565757 58 585959 60 606161 62 626363 64 646565 66 666767 68 686969 70 707171 72 727373 74 747575 76 767777 78 787979 80 808181 82 828383 84 848585 86 868787 88 888989 90 909191 92 929393 94 949595 96 969797 98 989999 100 100101101 102 102103103 104 104105105 106 106107107 108 108109109 110 110111111 112 112113113 114 114115115 116 116117117 118 118119119 120 120121121 122 122123123 124 124
R851
0_0805_5%
1 2
C646
0.1U_0402_16V4Z
1
2
C635
1000P_0402_50V7K
1
2
R496
10_0402_5%@
12
C639
1000P_0402_50V7K
1
2
C648
10P_0402_50V8K@
1
2
JP43
ACES_88266-05001GND2 7GND1 6
1 12 23 34 45 5
C634
1000P_0402_50V7K
1
2
D22
RB751V_SOD323
21
C631
1000P_0402_50V7K
1
2
C9520.1U_0402_16V4Z
1
2
C6410.1U_0402_16V4Z
1
2
C637
0.1U_0402_16V4Z
1
2
C6400.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
VCCD0#
CLK_PCI_PCM
VPPD0VPPD1
S1_A16
S1_A0
S1_D4
S1_A6
S1_OE#S1_A11
S1_IOWR#
S1_D10
S1_A3
S1_D0
S1_REG#
S1_INPACK#
S1_RST
S1_A17
S1_A21
S1_A14
S1_A8
S1_A10
S1_D6
S1_D11
S1_D12
S1_WAIT#
S1_D5
S1_A20
S1_D13
S1_CE2#
S1_CE1#
S1_WE#
S1_D9
S1_D7
S1_D3
S1_A22
S1_A9
S1_A1S1_A2
S1_IORD#
S1_D1
S1_A24
S1_A23
S1_D8
S1_A13
S1_A12
S1_A4
S1_A7
S1_D15
S1_A5
S1_A25
S1_D14S1_A18
S1_CD2#
S1_VS2S1_CD1#
S1_VS1S1_D2
S1_BVD1
S1_RDY#
PCM_SPK#
S1_A19
S1_WP
S1_BVD2
S1_A15
PCI_AD3PCI_AD2
PCI_AD20
PCI_AD26
PCI_AD7
PCI_CBE#2
PCI_AD5
PCI_AD0
PCI_AD12
PCI_AD14
PCI_AD19
PCI_AD29
PCI_AD24
PCI_AD30
PCI_CBE#[0..3]
PCI_AD15
PCI_AD17
PCI_AD25
PCI_AD27
PCI_AD1
PCI_AD28
PCI_AD21
PCI_CBE#3
PCI_AD[0..31]
PCI_AD31
PCI_AD22
PCI_AD8
PCI_AD18
PCI_AD4
PCI_CBE#0
PCI_AD16
PCI_AD10
PCI_CBE#1
PCI_AD9
PCI_AD13
PCI_AD23
PCI_AD11
PCI_AD6
PCI_REQ#2
CLK_PCI_PCM
PCI_RST#
PCI_RST#
PCI_AD20
VCCD1#
S1_CD2# S1_CD1#
CLK_SD_48M
CLK_SD_48M
SD_CD#SD_WP#SD_PWREN#
SD_CLKSDCM_XDALESDDA0_XDD7SDDA1_XDD0SDDA2_XDCLSDDA3_XDD4
XD_PWREN#MSBS_XDD1MS_CLK
XD_CD#
MSD0_XDD2MSD1_XDD6MSD2_XDD5MSD3_XDD3
S1_D[0..15]
S1_A[0..25]
5IN1_LED#
SD_PULLHIGH
SM_CD#
SM_CD#
XD_WP#
SDOC#
PCI_CBE#[0..3]<22,31,36,40>
PCI_AD[0..31]<22,26,31,36,40>
CLK_PCI_PCM<22>
PCI_IRDY#<22,31,36,40>PCI_TRDY#<22,31,36,40>
PCI_DEVSEL#<22,31,36,40>
PCI_PAR<22,31,36,40>
PCI_STOP#<22,31,36,40>
PCI_FRAME#<22,31,36,40>
PCI_PERR#<22,31,36,40>
PCI_PIRQE#<22,40>
SERIRQ<22,33,41>
VPPD0<38>VPPD1<38>VCCD0#<38>VCCD1#<38>
CLK_SD_48M<15>
SD_CD#<38>SD_WP#<38>
SD_PWREN#<38>
SDOC#<38>
SDDA2_XDCL<38>SDDA3_XDD4<38>
SDDA0_XDD7<38>SDDA1_XDD0<38>
SDCM_XDALE<38>SDCK_XDWE#<38>
XD_PWREN# <38>
XD_BSY# <38>
XD_CE# <38>
MSCLK_XDRE# <38>MSD0_XDD2 <38>MSD1_XDD6 <38>MSD2_XDD5 <38>MSD3_XDD3 <38>
MSBS_XDD1 <38>
XD_WP# <38>XD_CD# <38>
MS_INS# <38>
S1_IOWR# <38>
S1_IORD# <38>
S1_CE2# <38>S1_OE# <38>
S1_REG# <38>
S1_CE1# <38>
S1_RST <38>
S1_WAIT# <38>
S1_INPACK# <38>S1_WE# <38>
S1_BVD1 <38>S1_WP <38>
S1_RDY# <38>
S1_CD2# <38>S1_CD1# <38>S1_VS2 <38>S1_VS1 <38>
S1_D[0..15] <38>
S1_A[0..25] <38>
S1_BVD2 <38>
5IN1_LED#<33>
PCI_PIRQH#<22,36>
PCI_REQ#2<22>PCI_GNT#2<22>
PCI_RST#<22,31,36,39,40>
PCI_SERR#<22,31,36>
PCM_SPK# <44>MS_PWREN#<38>
+3VS
+3VS
+3VS
+S1_VCC
+3VS
+S1_VCC
+VCC_SD
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PB
37 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
MFUNC5[3:0] = (0 1 0 1) MFUNC5[4] = 1
40mil
**CB714 use B0 version
R5030_0402_5%@
1 2
C650
0.1U_0402_16V4Z
1
2
R501 10K_0402_5% 1 2
C652
0.1U_0402_16V4Z
1
2
C662
10P_0402_50V8K 1
2
C654
0.1U_0402_16V4Z
1
2
CA
RD
BU
S
SD/MMC/MS/SM
PCI I
nter
face
U30
CB714_LFBGA16961@
PCIREQ#A1PCIGNT#B1
AD31C2AD30C1AD29D4AD28D2AD27D1AD26E4AD25E3AD24E2
CBE3#E1
IDSELF4
VCC
2G
1
AD23F2AD22F1AD21G2
VCC
A1G
13
AD20G3
PCIRST#G4
PCICLKH1
AD19H3AD18H4AD17J1AD16J2
CBE2#J3
FRAME#J4IRDY#K1
VCC
3K2
TRDY#K3DEVSEL#L1STOP#L2PERR#L3SERR#M1PARM2
CBE1#N1
AD15N2AD14M3AD13N3AD12K4AD11M4
VCC
A2A7
AD10K5AD9L5AD8M5
CBE0#N5
AD7K6
VCC
4N
4
AD6M6AD5N6AD4M7AD3N7AD2L7AD1K7AD0N8
RIOUT#_PME#L8
MFUNC0K8MFUNC1N9
SPKROUT M9
VCC
1F3
MFUNC2K9MFUNC3N10
GRST#M10
MFUNC4L10MFUNC5N11MFUNC6M11
SUSPEND#L11
VPPD
0N
12VP
PD1
M12
VC
CD
0#N
13V
CC
D1#
M13
CCD1#/CD1# L12
CAD0/D3 L13
CAD2/D11 K10CAD1/D4 K12
CAD4/D12 K13CAD3/D5 J10
CAD6/D13 J11CAD5/D6 J12
CAD7/D7 H10
VCC
5L6
CAD8/D15 H12
CCBE0#/CE1# H13
CAD9/A10 G12
VCC
9C
8
CAD10/CE2# G11CAD11/OE# G10
CAD13/IORD# F13CAD12/A11 F11
CAD15/IOWR# F10CAD14/A9 E13
CAD16/A17 E12
CCBE1#/A8 E11
CPAR/A13 D13
VCC
6L9
CBLOCK#/A19 D11
CPERR#/A14 C13CSTOP#/A20 C12
CGNT#/WE# C11
CDEVSEL#/A21 B13
CCLK/A16 B12
CTRDY#/A22 A13CIRDY#/A15 A12CFRAME#/A23 B11
CCBE2#/A12 A11
CAD17/A24 D10CAD18/A7 B10CAD19/A25 A10
CVS2/VS2# D9
CAD20/A6 C9
CRST#/RESET B9
CAD21/A5 A9CAD22/A4 D8
VCC
7H
11
CREQ#/INPACK# B8
CAD23/A3 A8
CCBE3#/REG# B7
VC
C10
B4
CAD24/A2 C7CAD25/A1 D7CAD26/A0 A6
CVS1/VS1 C6
CINT#/READY_IREQ# D6
CSERR#/WAIT# A5
CAUDIO/BVD2_SPKR# B5
CSTSCHG/BVD1_STSCHG# C5CCLKRUN#/WP_IOIS16# D5
CCD2#/CD2# A4
VCC
8D
12
CAD27/D0 C4CAD28/D8 A3CAD29/D1 B3CAD30/D9 C3CAD31/D10 B2
CRSV1/D14 J13CRSV2/A18 E10CRSV3/D2 A2
MFUNC7J9
MSINS# H7MSPWREN#/SMPWREN# J8VCC_SDE7
GND_SDG5
SDCLKIH5
MSCLK/SMRE# E9MSBS/SMDATA1 H8
MSDATA0/SMDATA2 G9MSDATA1/SMDATA6 H9MSDATA2/SMDATA5 G8MSDATA3/SMDATA3 F9
SMBSY# H6SMCD# J7SMWP# J6SMCE# J5
SDCD#E8SDWP/SMWPD#F8SDPWREN33#G7
GN
D1
D3
GN
D2
H2
GN
D3
L4G
ND
4M
8G
ND
5K1
1G
ND
6F1
2G
ND
7C
10G
ND
8B6
SDCLK/SMWE#F6SDCMD/SMALEE5SDDAT0/SMDATA7E6SDDAT1/SMDATA0F7SDDAT2/SMCLEF5SDDAT3/SMDATA4G6
R5062.2K_0402_5%61@
12
R500 33_0402_5% 1 2
R505 33_0402_5%61@1 2
C653
0.1U_0402_16V4Z
1
2
R502 100_0402_5% 1 2
R50433_0402_5%61@
1 2
C660
15P_0402_50V8J@
1
2
R49710_0402_5%@
12
R499 43K_0402_5%61@1 2
C649
0.1U_0402_16V4Z
1
2
R49810_0402_5%@
12
C656
4.7U_0805_10V4Z
1
2
C663
10P_0402_50V8K 1
2
C651
0.1U_0402_16V4Z
1
2
C658
0.1U_0402_16V4Z
1
2
C657
0.1U_0402_16V4Z
1
2
C655
0.1U_0402_16V4Z
1
2
C659
0.1U_0402_16V4Z
1
2C661
15P_0402_50V8J@
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
VCCD1#VPPD0
S1_WP
VCCD0#
VPPD1
S1_OE#
S1_CE2#
S1_CE1#
S1_RST
S1_A[0..25]
S1_D[0..15]
VCCD1#
VCCD0#
MSBS_XDD1SDDA1_XDD0
SDDA0_XDD7
MSD2_XDD5SDDA3_XDD4
MSD1_XDD6
MSD3_XDD3MSD0_XDD2
SDDA2_XDCL
MSCLK_XDRE#
SDCM_XDALE
SDCK_XDWE#
XD_CD#
XD_WP#
XD_CE#
XD_BSY#
SDOC#
XD_PWREN#
XD_PWREN#
XD_CD#
XD_BSY#
XD_CE#
SDCK_XDWE#
MSCLK_XDRE#
MSCLK_XDRE#
SDCK_XDWE#
SD_PWREN#
S1_D13
S1_A4
S1_CE2#
S1_D4
S1_A25
S1_D7
S1_A15
S1_A19
S1_A8
S1_D2
S1_BVD1
S1_A2
S1_D6
S1_RST
S1_A10
S1_A7
S1_A9
S1_A22
S1_A14
S1_IOWR#
S1_D9
S1_A0
S1_A11
S1_D12
S1_A5
S1_D15
S1_D3
S1_A24
S1_RDY#
S1_IORD#
S1_A16
S1_A18
S1_A21
S1_D1
S1_BVD2
S1_VS1
S1_D5
S1_VS2
S1_CE1#
S1_INPACK#
S1_A12
S1_A20
S1_A13
S1_WP
S1_D8
S1_A1
S1_CD2#
S1_WAIT#
S1_OE#
S1_D11
S1_A6
S1_D14
S1_A3
S1_A23
S1_WE#
S1_A17
S1_D10
S1_D0
S1_CD1#
S1_REG#
SD_WP#
MSD3_XDD3MSD2_XDD5
MS_INS#
MSCLK_XDRE#
SD_CD#
SDDA0_XDD7SDDA1_XDD0
SDCM_XDALE
SDCK_XDWE#
SDDA3_XDD4SDDA2_XDCL
MSD0_XDD2MSD1_XDD6
MSBS_XDD1
S1_D[0..15]<37>
S1_A[0..25]<37>
VPPD0 <37>VPPD1 <37>
VCCD0# <37>VCCD1# <37>
MSD0_XDD2<37>MSBS_XDD1<37>
SDDA3_XDD4<37>MSD3_XDD3<37>
MSD2_XDD5<37>MSD1_XDD6<37>
SDCM_XDALE<37>XD_WP#<37>
SDDA1_XDD0<37>
SDDA0_XDD7<37>
SDCK_XDWE#<37>
XD_CD#<37>
XD_CE#<37>MSCLK_XDRE#<37>
SDDA2_XDCL<37>
XD_BSY#<37>
SDOC# <37>XD_PWREN#<37>
S1_VS2<37>
S1_CE1#<37>
S1_RDY#<37>
S1_OE#<37>
S1_WE#<37>
S1_CD1#<37>
S1_VS1<37>
S1_IORD#<37>
S1_IOWR#<37>
S1_RST<37>
S1_WAIT#<37>
S1_INPACK#<37>
S1_REG#<37>
S1_BVD2<37>
S1_BVD1<37>
S1_CD2#<37>S1_WP<37>
S1_CE2#<37>
SD_PWREN#<37>
MS_PWREN#<37>
SD_WP# <37>
SD_CD# <37>
MS_INS# <37>
+S1_VCC
+S1_VPP
+5VS
+3VS
+S1_VCC
+S1_VPP
+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC
+VCC_XD
+3VS+3VS
+VCC_XD+3VS
+VCC_XD
+3VS
+VCC_XD
+VCC_SD
+VCC_SD+VCC_XD
+S1_VCC+S1_VCC+S1_VPP+S1_VPP
+VCC_SD
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PB
38 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
W=40mil
W=40mil
40mil
40mil
PCMCIA Power Control
PCMCIA Socket
4 IN 1 Socket40mil
XD Power ControlSD/MS Power Control
xD PU and PD. Close to Socket
Reserve for SD,MS CLK.Close to Socket
(HDQ70)
(NEW)
C676
10U_0805_10V4Z61@
1
2
R511 43K_0402_5% 1 2
R50810K_0402_5%
12
R519 2.2K_0402_5%61@1 2
C675
0.1U_0402_16V4Z61@
1
2
U31
CP2211FD3_SSOP16
VCCD0 1VCCD1 2
3.3V33.3V4
5V55V6
GN
D7
OC 8
12V9
VPP 10
VCC 11VCC 12VCC 13
VPPD1 14VPPD0 15
SHD
N16
C668
0.1U_0402_16V4Z
1
2
R517
10K_0402_5%61@
12
R520 2.2K_0402_5%61@1 2
R516 2.2K_0402_5%61@1 2
R507 43K_0402_5% 1 2
C669
10U_0805_10V4Z
1
2
C670
0.1U_0402_16V4Z
1
2
R510 43K_0402_5% 1 2
R512 43K_0402_5% 1 2
C664
10U_0805_10V4Z
1
2
C672
0.1U_0402_16V4Z
1
2
C6660.1U_0402_16V4Z
1
2
4 IN 1 CONN
JP23
TAITW_R007-530-L361@
XD-WP31
XD-D437
MS-DATA3 7
MS-DATA0 4
SD-DAT2 11
SD-DAT0 19
SD-CMD 13
MS-DATA1 3
XD-D639 SD-DAT3 12
SD-DAT1 20
SD-GND 17
XD-ALE29
XD-D033SD_CLK 16
XD-D235
SD-WP-COM 44
MS-INS 6
MS-DATA2 5
MS-SCLK 8
N.C.18
XD-RE26
MS-BS 2
XD-D538
MS-GND 10
XD-D740
XD-D134
XD-CE27
XD-R/B25
XD-D336
SD-GND 14
XD-WE30
MS-VCC 9
XD-GND32
XD-CLE28
XD-GND24
SD-VCC 15
SD-CD-COM 22
XD-VCC41
XD-CD23
N.C.42
SD-CD-SW 21
SD-WP-SW 43
MS-GND 1
C671
10U_0805_10V4Z
1
2
SANTA_130601-7_LT
JP22 GND1
DATA32
DATA43
DATA54
DATA65
DATA76
CE1#7
ADD108
OE#9
ADD1110
ADD911
ADD812
ADD1313
ADD1414
WE#15
READY16
VCC17
VPP18
ADD1619
ADD1520
ADD1221
ADD722
ADD623
ADD524
ADD425
ADD326
ADD227
ADD128
ADD029
DATA030
DATA131
DATA232
WP33
GND34
GND35
CD1#36
DATA1137
DATA1238
DATA1339
DATA1440
DATA1541
CE2#42
VS1#43
IORD#44
IOWR#45
ADD1746
ADD1847
ADD1948
ADD2049
ADD2150
VCC51
VPP52
ADD2253
ADD2354
ADD2455
ADD2556
VS2#57
RESET58
WAIT#59
INPACK#60
REG#61
BVD262
BVD163
DATA864
DATA965
DATA1066
CD2#67
GND68
GND 69GND 70
C673
10U_0805_10V4Z61@
1
2
C665
0.1U_0402_16V4Z
1
2
U32
G528_SO861@
GND1IN2
FLG 5OUT 6
OUT 8
IN3EN#4
OUT 7
C677
0.1U_0402_16V4Z61@
1
2
C674
0.1U_0402_16V4Z61@
1
2
C678 10P_0402_50V8K61@
1 2
R524 0_0603_5%61@
1 2
R51810K_0402_5%61@
12
R521 2.2K_0402_5%61@1 2
R514 10K_0402_5% 1 2
C679 10P_0402_50V8K61@
1 2
R5230_0402_5%61@
12
C667
10U_0805_10V4Z
1
2
R509 43K_0402_5% 12
R513 10K_0402_5% 1 2
G
D
S
Q182N7002_SOT2361@
2
13
R522300_0402_5%61@
12
R515 43K_0402_5%@12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUSP#SYSON
PERST1#RCLKEN1
CP_PE#
PCI_RST#
CP_USB#
PERST1#
CLKREQ1#
CP_USB#
RCLKEN1
CLKREQ1#
CP_PE#
+USB_VCCA
USB20_P2_RUSB20_N2_RUSB20_N1_R
USB20_P1_R
+USB_VCCA
USB_EN#
USB20_P2 USB20_N2USB20_P1 USB20_N1
USB20_P2USB20_N2
USB20_P2_RUSB20_N2_R
USB20_N1USB20_P1
USB20_N1_RUSB20_P1_R
SB_PCIE_WAKE#<23,36>
USB20_P0<23>USB20_N0<23>
CLK_PCIE_CARD#<15>CLK_PCIE_CARD<15>
PCI_RST#<22,31,36,37,40>
EXP_CLKREQ# <15>
SYSON<33,46>SUSP#<33,35,46,51,53>
PCIE_MRX_PTX_N0<12>
PCIE_MTX_C_PRX_N0<12>PCIE_MTX_C_PRX_P0<12>
PCIE_MRX_PTX_P0<12>
USB_EN#<33,43>
USB_OC#0 <23>
CP_PE#<23>
ICH_SMBDATA<15,36>ICH_SMBCLK<15,36>
USB20_N2<23>USB20_P2<23>USB20_N1<23>
USB20_P1<23>
+3VALW_CARD1 +3VS_CARD1 +1.5VS_CARD1
+3VALW_CARD1
+1.5VS
+3VALW
+3VS_CARD1
+1.5VS_CARD1
+3VS
+3VS
+3VALW_CARD1
+3VS_CARD1
+1.5VS_CARD1
+3VS +3VS
+3VS +1.5VS+3VALW
+USB_VCCA
+USB_VCCA+USB_VCCA
+USB_VCCA
+USB_VCCA+5VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PB
39 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
60mils
New Card Power Switch
40mil
40mil
Imax = 1.35A Imax = 0.75AImax = 0.275A
New Card Socket (Left)
(NEW)
W=80milsW=80mils
USB CONN. 1 & 2
SUYIN_020173MR004G533ZR_4PSUYIN_020173MR004G533ZR_4P
2005/09/06 2005/09/06
ECQ60 ECQ60
USB Component co-layout
C695
0.1U_0402_16V4Z@
1
2
+ C691
150U_D_6.3VM
1
2
R823 0_0402_5%USB@1 2
R526 100K_0402_5%NC@1 2
R822 0_0402_5% 1 2
R525 100K_0402_5%NC@1 2
JP25
SUYIN_020173MR004S312ZLUSB@
1234
C689
10U_0805_10V4ZNC@
1
2
R824 0_0402_5% 1 2
U35
G528_SO8
GND1IN2
FLG 5OUT 6
OUT 8
IN3EN#4
OUT 7
L65
WCM2012F2S-900T04_0805@
1 122
33 4 4
C681
0.1U_0402_16V4ZNC@
1
2
C683
0.1U_0402_16V4ZNC@
1
2
D24
PRTR5V0U2X_SOT143@
VCC 4
I/O 3
GND1
I/O2
C682
10U_0805_10V4ZNC@
1
2
C693
470P_0402_50V7K
1
2
C685
0.1U_0402_16V4ZNC@
1
2
C694
4.7U_0805_10V4Z
1
2
L66
WCM2012F2S-900T04_0805@
1 122
33 4 4
C686
0.1U_0402_16V4ZNC@
1
2
G
D
S
Q422N7002_SOT23NC@
2
13
JP26
SUYIN_020173MR004S312ZL
1234
C684
10U_0805_10V4ZNC@
1
2
C688
10U_0805_10V4ZNC@
1
2
U64
NC7SZ32P5X_NL_SC70-5NC@
B2
A1 Y 4
G3
Vcc
5
U63
TPS2231PWPR_PWP24NC@
GN
D11
OC# 23
3.3Vin153.3Vin26
1.5Vin1181.5Vin219
3.3Vaux_in21
3.3Vout1 73.3Vout2 8
Aux_out 20
1.5Vout1 161.5Vout2 17
CPUSB#14CPPE#15STBY#4SHDN#3 RCLKEN 22
PERST# 9
NC
11
NC
210
NC
312
NC
413
NC
524
SYSRST#2
JP24
TYCO_1759056-1NC@
GND1USB_D-2USB_D+3CPUSB#4RSV5RSV6SMB_CLK7SMB_DATA8+1.5V9+1.5V10WAKE#11+3.3VAUX12PERST#13+3.3V14+3.3V15CLKREQ#16CPPE#17REFCLK-18REFCLK+19GND20PERn021PERp022GND23PETn024PETp025GND26
GND27GND28
C680
10U_0805_10V4ZNC@
1
2
+ C690
150U_D_6.3VMUSB@
1
2
R52810K_0402_5%NC@
12
C692
470P_0402_50V7KUSB@
1
2
R5300_0402_5%
1 2
D23
PRTR5V0U2X_SOT143@
VCC 4
I/O 3
GND1
I/O2
R821 0_0402_5%USB@1 2
C687
10U_0805_10V4ZNC@
1
2
R52710K_0402_5%NC@
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCI_AD[0..31]
CLK_PCI_1394
TPBIAS0TPA0+
TPB0+TPB0-
TPA0-
1394_XI
1394_XO
PCI_AD15
PCI_AD6
PCI_AD9
PCI_AD16
PCI_AD24
PCI_AD4
PCI_AD13
PCI_AD20
PCI_AD0
PCI_AD14
PCI_AD8
PCI_AD23
PCI_AD27
PCI_AD3
PCI_AD12
PCI_AD19
PCI_AD28
PCI_AD7
PCI_AD22
PCI_AD26
PCI_AD1
PCI_AD18
PCI_AD2
PCI_AD11
PCI_AD29
PCI_AD17
PCI_AD25
PCI_AD31
PCI_AD10
PCI_AD30
1394_IDSEL
PCI_AD5
PCI_AD21
PCI_STOP#PCI_PERR#PCI_PARPCI_PIRQE#
CLK_PCI_1394PCI_GNT#0PCI_REQ#0
PCI_AD16 1394_IDSEL
PCI_IRDY#
PCI_DEVSEL#PCI_TRDY#
PCI_FRAME#
EECS
EECKEEDI
REG_FB
REG_OUT
XREXT
EEDIEECK
REG_FB
REG_OUT
TPBIAS0TPA0+
TPB0+TPB0-
TPA0-
+1394_PLLVDD
I2CEEN
PCI_AD[0..31]<22,26,31,36,37>
PCI_CBE#0<22,31,36,37>PCI_CBE#1<22,31,36,37>
PCI_CBE#3<22,31,36,37>PCI_CBE#2<22,31,36,37>
PCI_STOP#<22,31,36,37>PCI_PERR#<22,31,36,37>
PCI_PAR<22,31,36,37>PCI_PIRQE#<22,37>
PCI_RST#<22,31,36,37,39>CLK_PCI_1394<22>
PCI_REQ#0<22>PCI_GNT#0<22>
PCI_IRDY#<22,31,36,37>PCI_TRDY#<22,31,36,37>
PCI_DEVSEL#<22,31,36,37>PCI_FRAME#<22,31,36,37>
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+2.5VS_1394
+2.5VS_1394
+2.5VS_1394
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PCustom
40 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
15mils
(ECQ60)
20mils
10mils
IDSEL:PCI_AD16
EECK and EEDI is pull high internalExternal pull high circuit is unnecessary
When use external EEPROMPopulate U14, R246, R253Un-populate R261
When use external BJTPopulate Q35, R279
40mil
R531510_0402_5%@
12
C700
0.1U_0402_16V4Z1394@
1
2
C707
4.7U_0805_10V4Z1394@
1
2
C703
0.1U_0402_16V4Z1394@
1
2
R54110_0402_5%@
12
C713
0.33U_0603_10V7K1394@
1
2
E
CB
Q432SB1197K_SOT23@
2
31
R535 4.7K_0402_5%1394@1 2
C704
0.1U_0402_16V4Z1394@1
2
C697
0.1U_0402_16V4Z1394@
1
2
C715270P_0402_50V7K1394@
1
2
C696
0.1U_0402_16V4Z1394@
1
2
R54354.9_0402_1%1394@
12
C705
0.1U_0402_16V4Z1394@
1
2
C702
0.1U_0402_16V4Z1394@
1
2
R5444.99K_0402_1%1394@
12
R54254.9_0402_1%1394@
12
R5324.7K_0402_5%1394@
1 2
C701
0.1U_0402_16V4Z1394@
1
2
Y5
24.576MHZ_16P_X8A024576FG1H1394@
12
C699
0.1U_0402_16V4Z1394@
1
2
C706
0.1U_0402_16V4Z1394@1
2
C709 0.1U_0402_16V4Z1394@1 2
C708 1U_0402_6.3V4Z1394@1 2
R534 4.7K_0402_5%@1 2
VT6311S
PCI I/F
EEPROM
others
OSCILLATOR
PHY PORT0
PHY PORT1
U37
VT6311S_LQFP1281394@
FRAME#120
IRDY#121TRDY#123DEVSEL#124
STOP#125PERR#127PAR128INTA#88PCIRST#89PCICLK90GNT#92REQ#93IDSEL105PME#34
CBE3#104CBE2#119CBE1#1CBE0#12
AD3194AD3095AD2996AD2897AD2798AD26101AD25102AD24103AD23106AD22107AD21109AD20113AD19114AD18115AD17116AD16117AD152AD143AD134AD127AD118AD109AD910AD811AD714AD615AD516AD418AD319AD220AD124AD025
EECS 26EEDO 27
SDA/EEDI 28SCL/EECK 29
PHYRST# 55BJT_CTL 81
I2CEN 43PWRDET 32
REG_FB 84
REG_OUT 85
XCPS 60
XI 57
XO 58
XTPBIAS0 71
XTPB0M 67XTPB0P 68XTPA0M 69XTPA0P 70
XREXT 63
NC17 83NC16 82NC15 64NC14 54NC13 53NC12 52NC11 51NC10 50
NC9 49NC8 48NC7 45NC6 44NC5 42NC4 41NC3 40NC2 39NC1 37NC0 35
VDD
446
VDD
330
VDD
221
VDD
111
1VC
C6
99VC
C5
36VC
C4
17VC
C3
5VC
C2
122
VCC
111
0
PVA5
87PV
A486
PVA3
73PV
A272
PVA1
62PV
A059
GN
DAT
X166
GN
DAR
X165
GN
DAT
X280
GN
DAR
X279
GN
D19
118
GN
D18
112
GN
D17
108
GN
D16
100
GN
D15
91G
ND
1061
GN
D9
56G
ND
847
GN
D7
38G
ND
633
GN
D5
31G
ND
423
GN
D3
22G
ND
26
GN
D1
13G
ND
012
6
XTPB1M 74XTPB1P 75XTPA1M 76XTPA1P 77
XTPBIAS1 78
U36
AT24C02N-10SU-2.7_SO8@
A01A12
SDA 5SCL 6
VCC 8
A23GND4
WP 7
R533 4.7K_0402_5%@1 2
R53954.9_0402_1%1394@
12
R537 6.19K_0603_1%1394@1 2
JP27
FOX_UV31413-4R1-TR1394@
11
335 56 644
22
C711 47P_0402_50V8J1394@1 2
C71010P_0402_50V8K1394@
1 2R536 1K_0402_5%1394@1 2
C698
0.1U_0402_16V4Z1394@
1
2
R538 100_0402_5%1394@1 2
L59MBK1608301YZF_06031394@
1 2
C714
10P_0402_50V8K@
1
2
R54054.9_0402_1%1394@
12
C71210P_0402_50V8K1394@
1 2
CLK_14M_SIO CLK_PCI_SIO
+IR_3VS
IRTXOUTIRMODEIRRX
NB_RST#
SIO_PD#
CTS#1
RI#1
TXD1
DCD#1
DTR#1
DSR#1
RXD1
RTS#1
LPC_AD3
LPC_AD1LPC_AD2
LPC_AD0
LPC_DRQ#0LPC_FRAME#PM_CLKRUN#
SERIRQCLK_PCI_SIO
CLK_14M_SIO
RI#1
DSR#1RTS#1
DCD#1
CTS#1
RXD1
DTR#1
TXD1DCD#1RI#1CTS#1DSR#1
IRTXOUT
IRMODEIRRX
SIO_PME#
BASE_ADDRESS
LPC_AD3
LPC_AD0LPC_AD1LPC_AD2
LPC_FRAME#LPC_DRQ#0
NB_RST#
SIO_PD#
PM_CLKRUN#
CLK_PCI_SIO
SERIRQ
CLK_14M_SIO
IRTXOUTIRMODE
IRRX
NB_RST#<13,16,22,27,33,36>
LPC_AD2<22,33>
LPC_AD0<22,33>
LPC_AD3<22,33>
LPC_AD1<22,33>
LPC_DRQ#0<22>LPC_FRAME#<22,26,33>
PM_CLKRUN#<22,31,36>SERIRQ<22,33,37>
CLK_PCI_SIO<22>
CLK_14M_SIO<15>
+3VS
+IR_ANODE
+3VS
+IR_3VS
+3VS
+3VS
+3VS
+3VS
+5VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PB
41 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
SUPER I/O SMsC LPC47N207
W=40mil
FIR ModuleW=60mil
T = 12milT = 12mil
Base I/O Address0 = 02Eh1 = 04Eh
*
Place on the BOT side(near MINIPCI conn.)
For SW debug use when no seial port
RTS#1
Base I/O Address0 = 004Eh*
JP28
ACES_85201-10051@
12345678910
R554 0_1206_5%FIR@1 2
R550 10K_0402_5%@1 2
C723
0.1U_0402_16V4ZFIR@
1
2
R55110K_0402_5%
FIR@1 2
LPC
I/F
SERI
AL I
/F
DLPC
I/F
IRGP
IO
U38
LPC47N207-JN_STQFP64@
LAD064LAD12LAD24LAD37
LDRQ1#12LDRQ0#24LFRAME#14CLKRUN#16SERIRQ19PCI_CLK21PCIRST#22SIO_14M23
DLAD063DLAD11DLAD23DLAD36
DLPC_CLK_339DLDRQ1#11DLFRAME#13DCLKRUN#15DSER_IRQ18DSIO_14M26
LPCPD#25
LPC_CLK_3310
IO_PME#47
3.3V
53.
3V17
3.3V
313.
3V42
3.3V
60
VTR
48
IRRX2 50IRTX2 49
IRMODE/IRRX3 51
RXD1 52TXD1 53
DRSR1# 54RTS1#/SYSOPT0 55
CTS1# 56DTR1#/SYSOPT1 57
RI1# 58DCD1# 59
GPIO10 27GPIO11 28
GPIO12/IO_SMI# 30GPIO13/IRQIN1 32GPIO14/IRQIN2 33
GPIO15 34GPIO16 35GPIO17 36GPIO30 38GPIO31 39GPIO32 40GPIO33 41GPIO34 43GPIO35 44GPIO36 46GPIO37 61
GN
D0
8G
ND
120
GN
D2
29G
ND
337
GN
D4
45G
ND
562
IR1
TFDU6102-TR3_8PFIR@
IRED_C2
GND8 MODE 7SD/MODE 5
IRED_A 1
RXD4VCC6
TXD 3
R548 10K_0402_5%@1 2
C716
0.1U_0402_16V4Z
FIR@
1
2
R55210_0402_5%@
12
C721
4.7U_0805_10V4Z
FIR@
1
2
R55647_1206_5%
FIR@1 2
R802 10K_0402_5%@1 2
C71915P_0402_50V8J@
1
2
R547 10K_0402_5%1 2
C718
0.1U_0402_16V4ZFIR@
1
2
R545 10K_0402_5%@1 2
R803 10K_0402_5%SIO2@
1 2
RP10
4.7K_1206_8P4R_5%FIR@
1 82 73 64 5
R555 0_1206_5%FIR@1 2
C717
0.1U_0402_16V4Z
FIR@
1
2
R55333_0402_5%@
12
LPC
I/F
FIR
PAR
ALL
EL I/
F
GROUND PAD
U65
SIO1036-AEZG_QFN36SIO2@
PCI_RESET#9
LPCPD#10
CLKRUN#11
PCI_CLK12
SER_IRQ13
GPIO/SYSOPT118
CLOCKI1
VSS 37
VCC3VCC14VCC22
IRRX 15IRTX 16
IRMODE/ALT_IRRX 17
INIT# 19SLCTIN# 20
PD0 21PD1 23PD2 24PD3 25PD4 26PD5 27PD6 28PD7 29
SLCT 30PE 31
BUSY 32ACK# 33
ERROR# 34ALF# 35
STROBE# 36
LFRAME#7LDRQ#8LAD02LAD14LAD25LAD36
C722
10U_0805_10V4ZFIR@
1
2
C72022P_0402_50V8J@
1
2
R546 10K_0402_5%@1 2
R549 10K_0402_5%@1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
VLDT_EN
ON/OFFBTN#
EC_ON
51ON#
LID_SW# <33>
NB_PWRGD <13>
VLDT_EN<33,46> SB_PWRGD <7,23>
EC_ON<33>
ON/OFF <33>ON/OFFBTN#<43>
51ON# <47>
+3VALW
+3VALW
+3VALW +3VALW +3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
B
42 55,星期四 09, 2006三月
2005/03/08 2006/03/08
Power ON Circuit
Change P/N : SN111000207
Lid Switch
2005/09/04
T1
T2
VLDT_EN
NB_PWRGD
SB_PWRGD
note:T1 minimum 15ms,T2 minimum 33ms/maximum 500ms, SUSP# goes to low after SB_PWRGD goes to low for powerdown.
SUSP#
+1.8VS
TOP Side
Bottom Side
ON/OFF switch
Power Button
Compal Electronics, inc.
C7260.47U_0603_16V7K
1
2
D26
PSOT24C_SOT23@
2 31
D27
RLZ20A_LL34
12
C7250.1U_0402_16V4Z
1
2
U39DSN74LVC14APWLE_TSSOP14
O 8I9
P14
G7
R562
100K_0402_5%
12
R558200K_0402_5% 1 2
SW7
MPU-101-81_4P
1
2
3
4
R564
10K_0402_5%
12
U39CSN74LVC14APWLE_TSSOP14
O 6I5
P14
G7
C7240.1U_0402_16V4Z 1
2
G
D
S
Q44
2N7002_SOT23
2
13
R55910_0402_5% 1 2
R56010K_0402_5%
12
R563100K_0402_5%
12
C727
1000P_0402_50V7K
1
2
J3 JOPEN@12
R56110_0402_5% 1 2
R557470K_0402_5% 1 2
U39BSN74LVC14APWLE_TSSOP14
O 4I3
P14
G7
U39ASN74LVC14APWLE_TSSOP14
O 2I1
P14
G7
D25
DAN202U_SC70
2
31
J2 JOPEN@12
PWR_LED#
BT_LED#WL_LED#
USB20_P6USB20_N6
USB20_P3USB20_N3
RCIRRX
PWR_LED#
PWR_LED#
PWR_SUSP_LED#
BATT_GRN_LED#
BATT_AMB_LED#
WLSW_EN#BTSW_EN#
PWR_LED<33>
WL_LED# <33> BT_LED# <33>
PWR_SUSP_LED# <33>
BATT_GRN_LED# <33>
BATT_AMB_LED# <33>
USB20_N6 <23>USB20_P6 <23>
USB20_N3 <23>USB20_P3 <23>
USB_EN# <33,39>
CVBS_IN<36>AUDIO_INL <36>
AUDIO_INR <36>S_YIN<36>S_CIN<36>
MEDIA_LED#<33>CAPS_LED#<33>NUM_LED#<33>
E-MAIL_LED#<33>ON/OFFBTN#<42>E-MAIL_BTN#<33>
IE_BTN#<33>USER_BTN#<33>
EMPWR_BTN#<33>
RCIRRX <33>
WLSW_EN# <33>BTSW_EN# <33>
+5VS+5VS
+5VS
+5VALW
+5VALW
+5VALW
+5VALW
+5VALW
+5VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PB
43 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
KSI0KSI1KSI2KSI3KSI4KSI5
KSO16 KSO17
PLAY
STOP
NEXT
REV
LEFT
RIGHT
VOL_UP
VOL_DOWN
ENTER
To LED/B Conn.
RECORD
BT_SW
CIR
Geneva Grapevine
KSI2KSI3KSI4KSI5
KSO16
PLAY
STOP
REV
NEXT
KSO17
ARCADE_TV
VOL_UP
VOL_DOWN
Update Part Number to SCR36236000
KSI6
2005/09/04
2005/09/12 2005/09/12
WL_SW
R569
300_0402_5%
12
G
D
S Q452N7002_SOT23
2
13
R567300_0402_5% 1 2
C728
0.1U_0402_16V4Z
LED5HT-110NBQA_BULE_1204
21
3
C731
1000P_0402_50V7KCIR@
1
2
LED2
HT-110UD_1204
2 13
C730
4.7U_0805_10V4ZCIR@
1
2
R571100_0805_5%
CIR@
12
R566300_0402_5% 1 2
R565300_0402_5% 1 2
LED4HT-110UD_1204
21
3
LED6
HT-110UD_1204
2 13
LED3
HT-110UYG_1204
2 13
LED1
HT-110UYG_1204
2 13
JP29
ACES_88018-304G
GN
D31
GN
D32
GN
D33
GN
D34
GN
D35
GN
D36
11335577991111131315151717191921212323252527272929
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 30
SW9HSS110_4P
1 1
2 2
3 3
4 4
55
66
R570300_0402_5% 1 2
+ C729
150U_D_6.3VM
1
2
R568
300_0402_5%
12
IR2
TSOP36236TR_4PCIR@GND1 Vs3 OUT 4
GND 2
SW8HSS110_4P
1 1
2 2
3 3
4 4
55
66
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
MONO_IN
MIC1_L
CD_L_RC
MONO_IN
CD_AGND_RC
MIC1_C_L
LINE_C_R
LINE_C_L
CD_R_RC
LINE_R
LINE_L
AMP_RIGHT
AMP_LEFT
AC97_VREF
MIC1_R MIC1_C_R
BEEP#<33>
PCM_SPK#<37>
SB_SPKR<23>
MIC1_L<45>
LINE_L<45>
LINE_R<45>
ICH_SYNC_AUDIO<23>
ICH_SDOUT_AUDIO<23>
ICH_RST_AUDIO#<23>
AMP_RIGHT <45>
AMP_LEFT <45>
ICH_BITCLK_AUDIO <23>
ICH_AC_SDIN0 <23>
NBA_PLUG<45>
MIC1_R<45>
SPDIF<45>
EAPD<33>
+VDDA
+VDDA
+AVDD_AC97
+5VAMP
+5VS
+VDDA
MIC1_VREFO_L
MIC1_VREFO_R
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PCustom
44 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
GND GNDA
40mil(output = 250 mA)
60mil
28.7K for Module Design (VDDA = 4.702)
4.85V
DGND
20mil40mil
HD Audio Codec
10mil
AGND
10mil
2005/09/12
Modify 11/07 for EMI
Modify 11/07 for EMI
R430
560_0402_5%
1 2
U33
ALC883-LF_LQFP48
LINE2_L14
LINE2_R15
MIC2_R17
MIC2_L16
LINE1_L23
LINE1_R24
CD_L18
CD_R20
CD_GND19
MIC1_L21
MIC1_R22
SENSE A13
PCBEEP12
FRONT_OUT_L 35
FRONT_OUT_R 36
PIN37_VREFO 37
RESET#11
SYNC10
BIT_CLK 6
SDATA_OUT5
SDATA_IN 8
GPIO02GPIO13
LINE1_VREFO 29
MIC2_VREFO 30
MIC1_VREFO_L 28
VREF 27
DVD
D1
1
DVD
D2
9
AVD
D1
25
AVD
D2
38
MIC1_VREFO_R 32
SIDESURR_OUT_R 46
SPDIFI/EAPD47
SPDIFO48
DVSS14DVSS27
LINE2_VREFO 31
VAUX 33
SENSE B34
CEN_OUT 43
LFE_OUT 44
SIDESURR_OUT_L 45
JDREF 40
AVSS1 26AVSS2 42
SURR_OUT_L 39
SURR_OUT_R 41
C539
0.1U_0402_16V4Z
1
2
C547 1U_0603_10V4Z
1 2
C535
1U_0402_6.3V4Z
1 2
R589 0_0603_5%1 2
C550
10U_0805_10V4Z
1
2
R433
560_0402_5%
1 2
C544 1U_0603_10V4Z@1 2
C557 1U_0603_10V4Z
1 2C556 1U_0603_10V4Z
1 2
C55810U_0805_10V4Z
1
2C548
0.1U_0402_16V4Z
1
2
D16RB751V_SOD323
21
U34
SI9182DH-AD_MSOP8
VIN4
SD8
VOUT 5
GND 3
SENSE or ADJ 6
ERROR7 CNOISE 1
DELAY2
C546 1U_0603_10V4Z@1 2
R45230K_0402_1%
12
C5331U_0402_6.3V4Z
1 2
C553
0.1U_0402_16V4Z
1
2
R6872.4K_0402_5%
1 2
R443 33_0402_5% 1 2
C545
0.1U_0402_16V4Z
1
2
R590 0_0603_5%1 2
R68810K_0402_5%
12
R44520K_0402_1%
@1
2
C537
0.1U_0402_16V4Z
1
2
C554 1U_0603_10V4Z
1 2
L33KC FBM-L11-201209-221LMAT_0805
1 2
C54910U_0805_10V4Z
1
2
L75FBM-L11-160808-800LMT_0603
1 2
R68910K_0402_5%
12
C5271U_0402_6.3V4Z
1 2
C543 1U_0603_10V4Z@1 2
C
BE
Q19
2SC2411K_SC59
1
2
3
R44210K_0402_5%
12
L34FBM-L11-160808-800LMT_0603
1 2
L32KC FBM-L11-201209-221LMAT_0805
1 2
R827 0_0603_5%1 2
C5281U_0402_6.3V4Z
1 2
C56110U_0805_10V4Z
1
2
R592 0_0603_5%1 2
C542 1U_0603_10V4Z
1 2
L74FBM-L11-160808-800LMT_0603
1 2
C559
0.1U_0402_16V4Z
1
2
R45110K_0402_1%
12
R826 0_0603_5%1 2
C538 22P_0402_50V8J 1 2
C532
10U_0805_10V4Z
1
2
R438
560_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SPK_L-SPK_R+SPK_R-
SPK_L+
SPKR-SPKR+SPKL-SPKL+
VOL_AMP
SPDIF_PLUG#
SPDIF
INT_MIC_L
NBA_PLUG
SPDIF_PLUG#
SPDIF_PLUG#
LINE_L LINE_L_R
LINE_R
HPOUT_L_3
VOLMAX
EC_MUTE
AMP_RIGHT_CAMP_LEFT_C
NBA_PLUG
BYPASS
SPKL+
SPKR+
SPKL-
SPKR-
SPDIF_PLUG#
MIC1_L_1
HPOUT_R_3
VOL_AMP
LINE_R_R
SPKR+
SPKL+
HPOUT_R_2
HPOUT_L_2
MIC1_R_1
HPOUT_L_1
HPOUT_R_1
SPDIF<44>
LINE_R<44>
LINE_L<44>
NBA_PLUG<44>
AMP_LEFT<44>
AMP_RIGHT<44>
EC_MUTE <33>
MIC1_L<44>
MIC1_R<44>
+5VAMP
+5VSPDIF
+5VAMP
+5VSPDIF
+5VAMP
+5VAMP
+5VAMP+5VAMP
MIC1_VREFO_RMIC1_VREFO_L
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151PCustom
45 55, 09, 2006星期四 三月
2005/06/20 2006/06/20Compal Electronics, Inc.
MIC JACK
Speaker Conn.20mil
S/PDIF Out JACK
(0.65V -> 10dB )
15mil
Int MIC Conn.
20mil
LINE-IN JACK
W=40mil
20mil
C884220P_0402_50V7K
1
2
R6521K_0402_1%@
12
R7762.2K_0402_5%
1
2
R6511K_0402_1%@
12
L49 FBM-11-160808-700T_0603
1 2
R467100K_0402_5%
12
JP40
ACES_20234-0101
12
3
4
5
6
78
9
10
R455
5.1K_0402_1%@
12
C876220P_0402_50V7K
1
2
C566 1U_0402_6.3V4Z
1 2
C562
330P_0402_50V7K
1
2
C885220P_0402_50V7K
1
2
C563
330P_0402_50V7K
1
2
JP42
SUYIN_010164FR006G118ZL
12
3
4
5
6
C568 1U_0402_6.3V4Z
1 2
C882 0.1U_0402_16V4Z
12
L35FBM-11-160808-700T_0603
1 2
R457
1.5K_0402_1%
12
R702 47_0603_5% 1 2
R7752.2K_0402_5%
12
R462 0_0603_5%
1 2
C8864.7U_0805_10V4Z
1
2
L54FBM-11-160808-700T_0603
1 2
U56
APA2068KAI-TRL_SOP16
VOLUME7
LOUT+ 11
ROUT+ 14LIN-6RIN-3
VDD10
GND 5
MUTE 1
VOLMAX8 ROUT- 16
LOUT- 9
BYPASS4
SE/BTL#13
SHUTDOWN# 2
GND 12
VDD15
+
C891 150U_D_6.3VM
1 2
+
C888 150U_D_6.3VM
1 2
R456 100K_0402_5%
12
R698100K_0402_5%
12
C8924.7U_0805_10V4Z
1
2
C569220P_0402_50V7K
1
2
JP13
ACES_85204-0200
12
L50 FBM-11-160808-700T_0603 1 2
R699 47_0603_5% 1 2
C8810.1U_0402_16V4Z
1
2
L51 FBM-11-160808-700T_0603 1 2
G
D
SQ212N7002_SOT23
2
13
R468100K_0402_5%
1 2
R466 0_0603_5%
1 2
L48 FBM-11-160808-700T_0603
1 2
R469 0_0603_5%
1 2
JP41
SUYIN_010164FR006G118ZL
12
3
4
5
6
R458
10K_0402_5%
12
R464 0_0603_5%
1 2
G
D
S
Q22SI2301BDS_SOT23
2
13
JP12
ACES_85204-0400
1234
G
D
SQ20
2N7002_SOT23 @
2
13
R690 0_0402_5% 12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SYSON#
SUSP
SYSON#
VLDT_EN#
5VS
_GA
TE4
SUSP
SUSP
SUSP
5VS_GATE1
SUSP
SYSON
SUSP
SUSP
5VS_GATE0
5VS
_GA
TE3
SYSON#
VLDT_EN
5VS_GATE2
VLDT_EN#SUSP
5VS_GATE5
SUSP
SUSP
SYSON<33,39>
SUSP#<33,35,39,51,53>
SUSP<52>
SYSON#<52>
VLDT_EN<33,42>
+3VS
+VSB+5VALW
+3VS
+5VALW
+3VALW
+1.8VALW
+1.8VS
+1.8VS
+0.9VS
+1.8V
+1.2V_HT
+VSB
+5VALW +5VS
+VSB
+1.8VALW
+1.8V
+VSB
+5VALW
+1.2VS
+1.2V_HT
+VSB
+0.9VS
+VSB
+0.9V
+3VS
+5VS
+VDD_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
401412 B
SCHEMATIC, M/B LA-3151P
Custom
46 55,星期四 09, 2006三月
2005/03/08 2006/03/08
+1.8VALW TO +1.8VS
+5VALW TO +5VS
+3VALW TO +3VS
+1.8VALW TO +1.8V
+1.2VS TO +1.2V_HT +0.9V TO +0.9VS
11/17 modify
Compal Electronics, inc.
C792
1U_0402_6.3V4Z
1
2
C771
1U_0603_10V4Z
1
2
C778
10U_0805_10V4Z
1
2
100K
100KQ37DTC115EKA_SOT23
2
13
D29CH751H-40_SC76
2 1
C785
0.22U_0603_16V7K
1
2
R610470_0402_5%
12
U46
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
U44
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
R627100K_0402_5% 1 2
G
D
S Q342N7002_SOT23
2
13
R61610K_0402_5%
12
C779
1U_0402_6.3V4Z
1
2
G
D
S Q402N7002_SOT23
2
13
C772
4.7U_0805_10V4Z
1
2
C793
10U_0805_10V4Z
1
2
C7824.7U_0805_10V4Z
1
2
U43
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
R620470_0402_5%
12
C777
0.1U_0603_25V7K 1
2
100K
100KQ35DTC115EKA_SOT23
2
13
G
D
S Q312N7002_SOT23
2
13
C773
1U_0402_6.3V4Z
1
2
R624100K_0402_5% 1 2
R6281M_0402_1%@
12
R62210K_0402_5%
12
R618
47K_0402_5%
1 2
C770
4.7U_0805_10V4Z
1
2
G
D
S Q362N7002_SOT23
2
13
C7754.7U_0805_10V4Z
1
2
C791
10U_0805_10V4Z
1
2
R6171M_0402_1%@
12 R619
100K_0402_5% 1 2
C776
0.1U_0603_25V7K 1
2
C789
0.1U_0603_25V7K 1
2
D30CH751H-40_SC76
2 1
100K
100KQ38DTC115EKA_SOT23
2
13
G
D
S Q272N7002_SOT23
2
13
U47
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
S Q282N7002_SOT23
2
13
G
D
S Q302N7002_SOT23
2
13
C794
0.22U_0603_16V7K@
1
2
U45
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
S Q412N7002_SOT23
21
3
C7744.7U_0805_10V4Z
1
2
C781
1U_0402_6.3V4Z
1
2
R609470_0402_5%
12
C786
4.7U_0805_10V4Z
1
2
D31CH751H-40_SC76
2 1
R611100K_0402_5% 1 2
G
D
S Q462N7002_SOT23
2
13
R613470_0402_5%
12
R614470_0402_5%
12
C787
1U_0402_6.3V4Z
1
2
R615100K_0402_5% 1 2
G
D
S Q332N7002_SOT23
2
13
R612100K_0402_5% 1 2
U48
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
S Q392N7002_SOT23
2
13
C784
0.22U_0603_16V7K
1
2
G
D
S Q292N7002_SOT23
21
3
R843470_0402_5%
12
C783
10U_0805_10V4Z
1
2
R62110K_0402_5%
12
R623470_0402_5%
12
C7884.7U_0805_10V4Z
1
2
G
D
S Q322N7002_SOT23
2
13
C780
4.7U_0805_10V4Z
1
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
CHGRTCP
PR
G++
51ON#<42>
ACOFF<33,49>
ACON<49>MAINPWON<7,48,50>
PACIN <49,50>
VIN
VS
+CHGRTC
BATT+
VIN
RTCVREF
VL
VS
+5VALW
RTCVREF
B+
B+
ADPIN VIN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
B
SCHEMATIC, M/B LA-3151PB
47 55,星期四 09, 2006三月
2005/0926 2006/0926Compal Electronics, Inc.
401412
3.3V
Precharge detector Min. typ. Max.
H-->L 14.589V 14.84V 15.243V L-->H 15.562V 15.97V 16.388V
ACIN
Precharge detector Min. typ. Max.
H-->L 6.138V 6.214V 6.359V L-->H 7.196V 7.349V 7.505V
BATT ONLY
PR19499K_0402_1%
12
PL1
FBMA-L18-453215-900LMA90T_1812
1 2
PR933_1206_5%
12
PR17
560_0603_5%
1 2
PD1RLZ24B_LL34
12
PC60.1U_0603_25V7K
12
PC100.1U_0603_25V7K
12
PR
5
100K
_040
2_5%
12
PD2
RLS4148_LLDS2
12
PD4RB751V_SOD323
12
PC71U_0805_25V4Z
12
G
D
S
PQ5MF2N7002W-G_SOT323-3
2
13
PC
4
560P
_040
2_50
V7K
12P
C3
12P
_040
2_50
V8J
12
PC
1
560P
_040
2_50
V7K
12
PR31K_1206_5%
1 2
PR21K_1206_5%
1 2
PR8100K_0402_5%
12
PC
1110
00P
_040
2_50
V7K
32
.312
PD3RLS4148_LLDS2
12
PR110_1206_5%
12
PR10100K_0402_5%
12
PU2ALM393DR_SO8
+ 3
- 2O1
P8
G4
PR14100K_0402_1%
12
PR
6
100K
_040
2_5%
12
PR2147K_0402_5%
12
PU1G920AT24U_SOT89
IN 2
GND
1
OUT3
PR15200_0805_5%
12 PD5
RB715F_SOT323
2
31
PR2266.5K_0402_1%@
12
PR41K_1206_5%
1 2
PC
8
4.7U
_080
5_6.
3V6K
12
PC
50.
22U
_120
6_25
V7K
12
PQ4TP0610K-T1-E3_SOT23
2
13
PQ2DTC115EUA_SC70
2
13
PQ1TP0610K-T1-E3_SOT23
2
13
PQ6DTC115EUA_SC70
2
13
1
2GG 3
PJP1SINGA_2DC-G756-I06
PC
90.
01U
_040
2_25
V7K
12
PR1122K_0402_5%
1 2
PR18191K_0402_1%
12
PR2034K_0402_1%
12
PQ3DTC115EUA_SC70
2
13
PC
2
12P
_040
2_50
V8J
12
PR13499K_0402_1%
12
PR122.2M_0402_5%
12
PR71K_1206_5%
1 2
PR16560_0603_5%
1 2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
2VREF_1999
5HG
LX5
BST3A
BST3BBST5B
DL5
DH5
BST5A
DH3
3HG
LX3
DL3
MAINPWON <7,47,50>
SPOK<50>
B+++
B+++
+3VALWP
VL
+5VALWP
B+
VL
2VREF_1999
VS
B+++
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
B
SCHEMATIC, M/B LA-3151PCustom
48 55,星期四 09, 2006三月
2005/09/26 2006/09/26Compal Electronics, Inc.
401412
+5V Iocp = 5.35A ~8.65 A
+3.3V Iocp =5.36A ~ 9.03AIpeak=4.5AImax=3.5A
Ipeak=4.5AImax=3.5A
PC
201U
_080
5_16
V7K
12
PC
19
1U_1
206_
25V
7K
12
PR
264.
7_12
06_5
%
@
12
PC
240.
047U
_060
3_16
V7K
12
PR230_0603_5%
12
PR38
0_0402_5%
1 2
PC
27
4.7U
_080
5_10
V4Z
12
PD6CHP202UPT_SOT323-3
231
PC291U_0603_16V6K
12
PC120.1U_0603_25V7K
30.6
1 2
PR3747K_0402_5%
1 2
AO4916_SO8
PQ8
D22 G2 8
G13D1/S2/K 5
D21D1/S2/K 7
S1/A4 D1/S2/K 6
PL4
10UH_SIL104R-100PF_4.4A_30%
12
PR310_0603_5%
12
PR270_0603_5%
1 2
PC280.047U_0603_16V7K
12
PR
3410
.2K
_040
2_1%
@ 12
PU3
MAX8734AEEI+_QSOP28
LX515DL519
BST514
DH516
OUT521FB59
SHDN#6ON54
GN
D23
ILIM5 11
DH3 26
LX3 27
TON
13
DL3 24
OUT3 22
FB3 7PGOOD 2SKIP#12
ON33
REF8
PR
O#
10V
CC
17
V+
20
ILIM3 5
BST3 28
LDO
325
LD05
18
N.C.1
PC
260.
22U
_060
3_16
V7K
12
PC160.1U_0603_25V7K
12
PR4347K_0402_5%
1 2
PR
2910
0K_0
402_
1%
12
PR
3349
9K_0
402_
1%
12
PZD1RLZ5.1B_LL34
1 2
AO4916_SO8
PQ7
D2 2G28
G1 3D1/S2/K5
D2 1D1/S2/K7
S1/A 4D1/S2/K6
PL310UH_SIL104R-100PF_4.4A_30%
12
PR
32
499K
_040
2_1%
12
PC
1722
00P
_040
2_50
V7K
12
+
PC
2515
0U_D
_6.3
VM
1
2
PR
2447
_040
2_5%
12
PR
4010
0K_0
402_
5%
12P
R36
0_04
02_5
%
12
PR
3010
0K_0
402_
1%
12
PC
184.
7U_1
206_
25V
6K
12
PR
420_
0402
_5%
12
PC
220.
1U_0
603_
25V
7K
12P
C21
4.7U
_080
5_10
V4Z
12
PR280_0603_5%
12
+
PC
2315
0U_D
_6.3
VM
1
2
PR410_0402_5%
12
PC
1422
00P
_040
2_50
V7K
12
PL2
FBM
-L11
-322
513-
151L
MA
T_12
10
12
PC130.1U_0603_25V7K
1 2
PR350_0402_5%
1 2
PR
254.
7_12
06_5
% 12
PR
393.
57K
_040
2_1%
@12
PC
15
4.7U
_120
6_25
V6K
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CSSPACOFF#
ACOFF
ACOFF#
charger_DHI
CSIP
charger_DLO
CSIN
charger_BST
BATT+
charger_DLOV
charger_LX
CSSN
FSTCHG<33>
IREF<33>
BATT_OVP<33>
ACOFF <33,47>
PACIN<47,50>
ACON<47>
6C/8C#<50>
6C/8C# <50>
1908LDO
MAX1908-CCS
B+
1908LDO
P3
VIN
BATT+VS
CHG_B+
VIN
BATT+
VIN
P2
VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
B
SCHEMATIC, M/B LA-3151PCustom
49 55, 09, 2006星期四 三月
2005/09/26 2006/09/26Compal Electronics, Inc.
401412
Charger
Charge voltage
4S CC-CV MODE : 16.8V
2P4S:4800mAH/cell
BATT-OVP=0.111*BATT+
LI-3S :17.8V----BATT-OVP=1.9758V
0.8C=3.84A
Iadp=0~4.5A(90W)
OVP voltage :
IREF=0.73~3.3V
IREF=0.832*Icharge
BATT-OVP=0.111*BATT+
LI-4S :17.8V--BATT-OVP=1.9758V
CP Point:
Iinput=(90.0K/100.9K)*(75/15)=4.504A
PU4
MAX1908ETI+T_QFN28
CC
I6
VCTL15ICTL13
CLS3
REF4
CELLS17
REFIN12
ACIN10
ACOK#11SHDN#8
IINP28
DCIN1
CC
S5
CCV7
ICHG9
BATT 16
CSSP 27
PGN
D20
DLOV 22
CSSN 26
LDO 2
BST 24
DHI 25
DLO 21
CSIP 19
LX 23
CSIN 18
GN
D14
TP 29
PR539.31K_0402_1%
12
PR5824.9K_0402_1%
12
PR
5115
0K_0
402_
5%
12 PC40
0.1U_0402_16V7K
12P
R55
90.9
K_0
402_
0.1%
1
2
PC
434.
7U_1
206_
25V6
K
12
PQ10AO4407L_SO8~N
3 65
78
2
4
1
PR68511K_0402_1%1 2
PC
444.
7U_1
206_
25V6
K
12
PC530.01U_0402_25V7Z
12
PR440.015_2512_1%
1
3
4
2
PR59100K_0402_1%
12
47K
47K
PQ13DTA144EUA_SC70
2
13
PR
6410
K_04
02_5
% 1
2
PC381U_0603_10V6K
12
PC510.1U_0402_16V7K
12
PR
6010
K_04
02_1
%
12
PR490_0402_5%
@12
PC
424.
7U_1
206_
25V6
K
12
PC
500.
1U_0
402_
16V7
K
12
PQ9AO4407L_SO8~N
365
78
2
4
1
G
DS
PQ15SI2301DS_SOT23~D
2
13
PR560_0402_5%
1 2
PC
304.
7U_1
206_
25V6
K
12
PQ11AO4407L_SO8~N
3 65
78
2
4
1
PQ14DTC115EUA_SC70
2
13
PC
3322
00P_
0402
_25V
7K
12
PR
4810
K_04
02_1
%
12
G
D
S
PQ19MF2N7002W-G_SOT323-3
2
13
PC
480.
01U
_040
2_25
V7K
12
PL6
10UH_SIL104R-100PF_4.4A_30%
1 2
PR66300K_0603_0.1%
12
PC
520.
01U
_040
2_25
V7Z
12
PR69200K_0402_1%
12
PC471U_0805_25V4Z
12
PC370.1U_0603_25V7K
12
PC
490.
01U
_040
2_25
V7K
12
PC391000P_0402_50V7K@
12
PD111N4148_SOD80
1 2
PQ16DTC115EUA_SC70
2
13
PR6710K_0402_5%
12
PR4747K_0402_5%
12
PR4547K_0402_1%
1 2PR46
200K_0402_1%
12
PQ17
SI4
810B
DY
-T1-
E3_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
G
D
S PQ21MF2N7002W-G_SOT323-3
2
13
PR5415K_0402_1%
12
PR65845K_0603_1%
12
PC
314.
7U_1
206_
25V6
K
12
PR520.015_2512_1%
1
3
4
2
PL5
FBMA-L18-453215-900LMA90T_1812
1 2
G
D
S
PQ18MF2N7002W-G_SOT323-3
2
13
PU5B
LM358ADR_SO8
+ 5
- 607
P8
G4
PC340.1U_0603_25V7K
12
PD91SS355_SOD323
12
PR6122K_0402_5% 1 2
PC350.1U_0603_25V7K
12
PR620_0402_5% 1 2
PC461U_0603_10V6K
12
PD101SS355_SOD323
12
PQ12
SI4
810B
DY
-T1-
E3_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PR5733_1206_5%
12
G
D
S
PQ20MF2N7002W-G_SOT323-32
13
PC
320.
1U_0
603_
25V7
K
12
PR5010K_0402_0.1%
12
PC
450.
01U
_040
2_25
V7K
12
PC410.1U_0603_25V7K
12
PR63100K_0402_5%
12
PC
360.
1U_0
603_
25V7
K
12
PU5A
LM358ADR_SO8
+ 3
- 201
P8
G4
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
TM_REF1
PACIN
ACIN
BATT_TEMP
BATT++BA
TT+
SPOK<48>
MAINPWON <7,47,48>
ACIN <33>
PACIN <47,49>
BATT_TEMP <33>
EC_SMB_CK1 <33,35>
EC_SMB_DA1 <33,35>
6C/8C# <49>
B+ +VSBP
VL
VL
VLVS VL
RTCVREF
VIN VIN
VS
BATT++BATT+
+3VALWP
+3VALWP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
B
SCHEMATIC, M/B LA-3151PCustom
50 55,星期四 09, 2006三月
2005/09/26 2006/09/26Compal Electronics, Inc.
401412
Recovery at 70 degree CCPU thermal protection at 90 degree CPH1 under CPU botten side :
Vin Detector Min. typ. Max.
H-->L 16.976V 17.257V 17.728V L-->H 17.430V 17.901V 18.384V
SM ARTBattery:1 .GND2. SMC3.SMD4.TS5.B/I6. ID7.BATT+
PJP2 battery connector
PR711K_0402_5%
12
PR70100K_0402_5%1 2
PC611000P_0402_50V7K
12
PL7
FBMA-L18-453215-900LMA90T_1812
1 2
PR8822K_0402_5%
1 2
PH
110
0K_0
603_
1%_T
H11
-4H
104F
T
12
PR82150K_0402_1%
12
PC540.01U_0402_25V7Z
12
PC630.1U_0402_16V7K
@
12
G
D
S
PQ23MF2N7002W-G_SOT323-3
2
13
PC590.22U_1206_25V7K
12
PZD2RLZ4.3B_LL34
12
PR796.49K_0402_1%
1 2
PR8910K_0402_5%
1 2
PR751K_0402_5%
1 2
PC571000P_0402_50V7K
12
PR9510K_0402_5%
12
PC620.1U_0603_25V7K
12
PR8710K_0402_5%
12PU6A
LM393DR_SO8
+3
-2 O 1
P8
G4
PR749.76K_0402_1%
12 PR77
82.5K_0603_1%
1 2
PR930_0402_5%
1 2
PC
581U
_080
5_16
V7K
12
PR84
1M_0402_1%
1 2
PC551000P_0402_50V7K
12 PR73
150K_0402_1%
12
PR9122K_0402_5%
1 2
PQ22TP0610K-T1-E3_SOT23
2
13
PR8684.5K_0402_1%
12
PC600.1U_0603_25V7K
12
PR76442K_0603_1%
1 2
PU2B
LM393DR_SO8
+5
-6 O 7
P8
G4
PR81100_0402_5%
1 2
PR85100K_0402_5%
12
PR
9220
K_0
402_
1%
12
PU6B
LM393DR_SO8
+5
-6 O 7
P8
G4
PR80150K_0402_1%
12
PR781K_0402_5%
12
PR9410K_0402_5%
12
PR83100_0402_5%
1 2
PC560.1U_0603_25V7K
12
PR90100K_0402_5%
12
PJP2SUYIN_200275MR007G161ZL
1234567
PR721K_0402_5%@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
6269_VCC
6269_VCC PHASE_6269
UG_6269
LG_6269
ISEN_6269
BOOT_6269
6269_VCC
SUSP#<33,35,39,46,53>
B+
+1.2VSP
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
B
SCHEMATIC, M/B LA-3151PCustom
51 55,星期四 09, 2006三月
2005/09/26 2006/09/26Compal Electronics, Inc.
401412
Imax=5.7AIpeak=VGA_1.2V+(+1.2V_HT)=2.1A+6.067A=8.167A
Iocmin=9.23AIocmax=19.23A
PR10215.4K_0402_1%
1 2
PR994.7_0603_5%
1 2
PR
104
57.6
K_0
402_
1%
12
PR1000_0402_5%
1 2
PR
961K
_040
2_1%
12
PQ25SI4810BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC
7122
P_0
402_
50V
8J
12
PR10349.9K_0402_1%
12
PC
6410
U_1
206_
25V
AK
1
2
PR984.7_0603_5%@
12
PU7
ISL6269CRZ-T_QFN16
FCCM3
EN4
BO
OT
13
PVCC 12VIN1
VCC2
PG
OO
D16
PH
AS
E15
UG
14
LG 11
PGND 10
VO
8
CO
MP
5
FB6
FSE
T7
ISEN 9
GN
D17
PR101100K_0402_5%
1 2
PL8FBM-L11-322513-151LMAT_1210
1 2
+ PC68330U_D2E_2.5VM
1
2
PL9
1.8UH_SIL104R-1R8PF_9.5A_30%
1 2
PC690.22U_0603_16V7K
12
PC65 0.1U_0603_25V7K
1 2
PQ24
SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC66
2.2U_0603_6.3V6K
1 2
PC672.2U_0603_6.3V6K
12
PR1063K_0402_1%
12
PC726800P_0402_25V7K
12
PC700.01U_0402_25V7K
12
PR1053K_0402_1%
1 2
PR97
0_0603_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SYSON#<46>
SUSP <46>
SUSP <46>
+3VALW
+0.9VSP
+1.8VALW
+5VALW
+2.5VSP
RTCVREF
+3VALW
+3VALWP +3VALW
+5VALW
+1.2VS
+0.9V
+5VALWP
+1.2VSP
+0.9VSP
+1.8VALWP
+2.5VSP
+1.5VSP
+1.8VALW
+2.5VS
+1.5VS
+VDD_CORE+VGA_CORE_P
+5VALW
+1.5VSP
RTCVREF
+1.8VALW
+VSBP +VSB
+1.8V
+VDD_CORE+VGA_CORE_P
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
B
SCHEMATIC, M/B LA-3151P
Custom
52 55�星 |, 09, 2006薔 三月
2005/09/26 2006/09/26Compal Electronics, Inc.
401412
PC
800.
047U
_040
2_16
V7K
PC844.7U_1206_25V6K
12
PC
810.
1U_0
603_
25V7
K
12
PR11560.4K_0402_1%
12
CM8562IS_PSOP8PU9
VFB2
VIN1
VTT3
VTT4 REFEN 5
VCCA 6
AGND 7
PGND 8
AGN
D9
G
D
S
PQ26
MF2
N70
02W
-G_S
OT3
23-3
@
2
13
PR113100K_0402_5% 1 2
PR
114
10_0
603_
1%
12
PJP14
JUMP_43X113
1 122
PJP5
JUMP_43X113
1 122
PC1360.047U_0603_16V7K
12
PC
860.
1U_0
603_
25V7
K
12
PJP9
JUMP_43X113
1 122
PR
111
1K_0
402_
1%
12 PR
112
200K
_040
2_1%
12
PR
116
51K_
0402
_1%
12
PC7922U_1206_10V6M
12
PC
850.
047U
_040
2_16
V7K
G
D
S
PQ27MF2N7002W-G_SOT323-3
2
13
PC7410U_1206_25VAK
1
2
PJP3JUMP_43X79
11
22
PJP12
JUMP_43X113
1 122
PC
734.
7U_1
206_
25V6
K
12
PJP13
JUMP_43X113
1 122
PC
780.
1U_0
402_
16V7
K
12
PR1071K_0402_1%
12
PC
761U
_060
3_16
V6K
12
PJP10
JUMP_43X113
1 122
PC
831U
_060
3_16
V6K
12
PJP8
JUMP_43X113
1 122
PJP7JUMP_43X79
11
22
CM8562IS_PSOP8PU10
VFB2
VIN1
VTT3
VTT4 REFEN 5
VCCA 6
AGND 7
PGND 8
AGN
D9
PR1100_0402_5%@
1 2
PC1350.047U_0603_16V7K
12
PJP15
JUMP_43X113
1 122
PJP11
JUMP_43X113
1 122
PJP4JUMP_43X79
11
22
PR
108
10_0
603_
1%
12
PU8
APL5331KAC-TRL_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PR10960.4K_0402_1%
12
PC751U_0603_6.3V6M
12
PR117100K_0402_5%
1 2
PC774.7U_1206_25V6K
12
PC
824.
7U_1
206_
25V6
K
12
G
D
S
PQ28MF2N7002W-G_SOT323-3
2
13
PJP6
JUMP_43X113
1 122
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BS
T_V
GA
VSE_1.8V
BST_1.8V-1BST_VGA-1
DH_VGA
BST_1.8V
ISE_1.8V
LX_1.8V
DH_1.8V
DL_1.8V
ISL6227B+
LX_VGA
ISE_VGA
DL_VGA
VSE_VGA
POWER_SEL <16>
SUSP#<33,35,39,46,51>
+3VS +3VALW
+5VALW
B+
+5VALW
+VGA_CORE_P
+1.8VALWP
+5VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
B
SCHEMATIC, M/B LA-3151PCustom
53 55星期四, 09, 2006三月
2005/09/26 2006/09/26
401412
Ipeak=8.5A
Iocpmin=8.76A
Iocpmax=13.46A
Ipeak=16.40A
Iocpmin=22.07A
Iocpmax=38.67A
M52PG
PR123=1K
PR135=18.2K
PR132=17.8K
L=1.000V
H=0.949V
M56P
PR123=1K
PR135=18.2K
PR132=5.9K
L=1.102V
H=0.949V
M54P
PR123=1K
PR135=8.87K
PR132=8.87K
L=1.102V
H=1.001V
For VGA chipset type, that should be dynamic change by everytime load BOM.
Imax=12.25A
Imax=6A
Compal Electronics, inc.
PC940.1U_0603_25V7K
12
PC974700P_0402_25V7K 12
PR130
10K_0402_1%
@1 2
PC
107
0.01
U_0
402_
25V
7Z@
12
PR1340_0402_5%
@
12
PR129 10K_0402_1%@1 2
PC934.7U_0805_6.3V6K
12
PR
136
0_04
02_5
%
12
PR14110K_0402_5%
12
PR
123
1K_0
402_
1%
12
PC952.2U_0805_10V6K
12
PR
135
18.2
K_0
402_
1%
12
PR1261.5K_0402_1%
1 2
PR14010K_0402_5%
1 2
PC
102
680P
_060
3_50
V7K
@
12
PC
106
0.1U
_040
2_16
V7K
12
PD12DAP202U_SOT323
2 31 PR119
2.2_0603_5%
12
PR13310K_0402_1%
12
PR1210_0603_5% 1 2
PR13856.2K_0402_1%
12
PC96
0.01U_0402_25V7Z
12
PQ29SI7840DP-T1-E3_SO8
35
2
4
1
PC
134
0.01
U_0
402_
25V
7Z
12G
D
S
PQ
34M
F2N
7002
W-G
_SO
T323
-3
2
13
PC
8710
U_1
206_
25V
AK
12
PQ
44FD
S66
76A
S_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PC
105
0.1U
_040
2_16
V7K
12
PR13110K_0402_5%
12
PC
9110
U_1
206_
25V
AK
12
PC
101
0.01
U_0
402_
25V
7Z
12
PC990.1U_0402_16V7K 12
PR1240_0402_5%@
12
PC980.1U_0402_16V7K
12
+PC100330U_D2E_2.5VM
1
2
PR12810K_0402_1%
12
PR137100K_0402_5% 1 2
PC
9022
00P
_040
2_25
V7K
12
G
D
S
PQ
33M
F2N
7002
W-G
_SO
T323
-3
2
13
PQ32SI4810BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR139110K_0402_1%
12
PR1200_0603_5%
1 2
+ PC103220U_D2_4VM_R15
1
2
PR1251.5K_0402_1% 1 2
PC
9222
00P
_040
2_25
V7K
12
PQ30SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PQ
31FD
S66
76A
S_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PR18210K_0402_5% 1 2
PC1040.01U_0402_25V7Z
12
PL10FBM-L11-322513-151LMAT_1210
1 2
PR
122
4.7_
1206
_5%
@
12 PU11
ISL6227CA-T_SSOP28
GN
D1
LGATE12
PGND13
PHASE14
UGATE15
BOOT16
ISEN17
EN18
VOUT19VSEN110
OCSET111
SOFT112
DD
R13
VIN
14
PG115 PG2/REF 16
SOFT2 17
OCSET2 18
VSEN2 19VOUT2 20
EN2 21
ISEN2 22
BOOT2 23
UGATE2 24
PHASE2 25
PGND2 26
LGATE2 27
VC
C28PL11
1.4U_SSF-13056-1R4_15.5A_20%
1 2
3
PC
8910
U_1
206_
25V
AK
12P
C88
10U
_120
6_25
VA
K
12
PR
132
5.9K
_040
2_1%
12
PR11851_1206_5%
12
PR
127
0_04
02_5
% 1
2
PL121.8U_SIL104R-1R8_9.5A_30%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAX8774_VCC
LX1
DH1
DL1
DH2
LX2
DL2
CSP2
MAX8774_REF
MAX8774_VCC
MAX8774_REF
AGND
CSP2
FB
CPU_B+
AGND
VID0<7>
VID4<7>
VID3<7>
VID1<7>
VID2<7>
VGATE<33>
VR_ON<33>
VID5<7>
PSI#<7>
POUT<33>
CPU_VSS_SENSE<7>
CPU_VCC_SENSE<7>
+3VS
+5VSCPU_B+
B+
CPU_B+
+CPU_CORE
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
B
SCHEMATIC, M/B LA-3151P
Custom
54 55,星期四 09, 2006三月
2005/09/26 2006/09/26
401412
For EC ATE
Compal Electronics, inc.
PR181
0_0402_5%
1 2
PD
14SK
S30-
04AT
_TS
MA
21
PR1700_0402_5%
12
PL13FBMA-L18-453215-900LMA90T_1812
1 2
PC121
150P_0402_50V8J
12
PR16831.6K_0402_1%
1 2
PC1200.033U_0603_25V7K
1 2
PR15710_0402_5%
12
PR153 0_0402_5%1 2
PC
117
4700
P_0
402_
25V
7K
@
12
PR1480_0603_5%
1 2
PD
13SK
S30-
04AT
_TS
MA
21
PR17715K_0402_1%
12
PR17310_0402_1%
12
PC1324700P_0402_25V7K
@
1 2
PQ39SI7840DP-T1-E3_SO8
35
2
4
1
PR163 20K_0402_1% 1 2
+
PC
112
100U
_25V
_M
1
2
PR17915K_0402_1% 1 2
PR172200K_0402_1%
12
PR1660_0402_5% 1 2
PR
142
10_0
402_
5%
12
PR17810_0402_5%
12
G
D
S
PQ40MF2N7002W-G_SOT323-3
2
13
PR169169K_0603_1%
12
PC
127
4.7U
_120
6_25
V6K
12
PR165 10K_0402_1%
1 2
PC
125
2200
P_0
402_
50V
7K
12
PR149 0_0402_5%
12
PQ
37
FDS
6676
AS
_SO
8
S1
S2
S3
G4
D8
D7
D6
D5
PR1612.55K_0603_1% 1 2
PC
109
4.7U
_120
6_25
V6K
12
PL150.56UH_ETQP4LR56WFC_21A_20%
1 2
PR159
100K_0402_5%
@1 2
G
D
S
PQ
38M
F2N
7002
W-G
_SO
T323
-3
2
13
PC
130
0.22
U_0
603_
16V
7K
12
PR150 0_0402_5%
12
PH210KB_0603_ERTJ1VR103J
1 2
PQ35SI7840DP-T1-E3_SO8
35
2
4
1
PR160 71.5K_0402_1%
12
PC
110
0.01
U_0
402_
25V
7K
12
PR174200K_0402_1%
12
PL140.56UH_ETQP4LR56WFC_21A_20%
1 2
PQ
43FD
S66
76A
S_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PC
115
0.01
U_0
402_
25V
7K
12
PQ41FDV301N_NL 1N SOT23-3
2
13
PR1460_0603_5%
1 2
PC1142.2U_0603_10V6K
12
PR147 0_0402_5%
12
PR1580_0402_5%
1 2
PR155 100K_0402_1%
1 2
PR
176
4.7_
1206
_5%
@
12
PC122 470P_0402_50V8J
1 2
PC124 0.1U_0603_16V7K
1 2
PC
131
680P
_060
3_50
V8J
@
12
PR
154
15K
_040
2_1%
12
PR
171
0_06
03_5
%
12
PU12
MAX8774GTL+_TQFN40
TIME6
POUT3
VRHOT#4
PHASEGD17
TWO-PH37
SHDN#38
OFS2
REF10
TON7
VCC19
GN
DS
12
CCV8
PGND2 23
CCI 9
FB 11
IC 40
GND 18
SKIP#39
D536
D435
D334
D233
D132
D031
PWRGD1
BST1 30
LX1 28
DH1 29
DL1 26
VDD 25
PGND1 27
DL2 24
DH2 21
LX2 22
BST2 20
THRM 5
CSP1 16
CSN1 15
CSN2 14
CSP2 13
EP
41
PC1230.1U_0402_16V7K
1 2
PC
111
2200
P_0
402_
50V
7K
12
PR152 0_0402_5%
12
PC
113
2.2U
_060
3_6.
3V6K
12
PR
143
10K
_040
2_5%
@
12
PC1194700P_0402_25V7K 1
2
PQ
42FD
S66
76A
S_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PR145 0_0402_5%
12
PH310KB_0603_ERTJ1VR103J
1 2
PC
116
0.22
U_0
603_
16V
7K
12
PR144 0_0402_5%
12
PR167
200K_0402_1%
1 2
PC
126
4.7U
_120
6_25
V6K
12
PC1294700P_0603_50V7K
12
PQ
36
FDS
6676
AS
_SO
8
S1
S2
S3
G4
D8
D7
D6
D5
PR
151
4.7_
1206
_5%
@ 12
PC
128
0.01
U_0
402_
25V
7K
12
PR
162
10_0
402_
1% 1 2
PC
118
680P
_060
3_50
V8J
@
12
PR1800_0603_5% 1 2
PC
108
4.7U
_120
6_25
V6K
12
PR1750_0603_5%
1 2
PC1330.033U_0603_25V7K
1 2
J1 SHORT PADS1 2
PR164 0_0402_5%
1 2
PR15615K_0402_1% 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
401412 B
SCHEMATIC, M/B LA-3151P
Compal Electronics, Inc.
55 55�星 |, 09, 2006薔 三月
Version change list (P.I.R. List) Page 1 of 1 for PWR
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