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Acer Aspire 7738g

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5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date: Sheet of Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. JM70-MV SB BLOCK DIAGRAM A2 1 55 Saturday, December 20, 2008 UMA Title Size Document Number Rev Date: Sheet of Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. JM70-MV SB BLOCK DIAGRAM A2 1 55 Saturday, December 20, 2008 UMA Title Size Document Number Rev Date: Sheet of Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. JM70-MV SB BLOCK DIAGRAM A2 1 55 Saturday, December 20, 2008 UMA Mobile CPU Cantiga HOST BUS 667/800/[email protected] DDR3 800/1066 MHz DDR3 ICH9M X4 DMI 400MHz C-Link0 ODD SATA SATA HDD SATA SATA Mini USB Blue Tooth Camera USB 4 Port USB KBC WPCE773LA0DG Winbond INT. KB Touch Pad BIOS (2MB) DEBUG CONN. LPC LPC BUS Mini 1 Card Wire LAN PCIe BCM5764MKMLG LAN Giga LAN New Card PWR SW TPS2231 MS/MS Pro/xD /MMC/SD VGA Borad CLK GEN. ICS9LPRS365BKLFT SMSC Codec ALC888 MIC In MDC Card G1454R OP AMP AZALIA MODEM INT.SPKR Line Out (SPDIF) RJ11 AGTL+ CPU I/F DDR Memory I/F INTEGRATED GRAHPICS LVDS, CRT I/F 6 PCIe ports PCI/PCI BRIDGE ACPI 2.0 4 SATA 12 USB 2.0/1.1 ports PCIex16 800/1066 MHz CardBus USB ETHERNET (10/100/1000MbE) High Definition Audio LPC I/F Serial Peripheral I/F Matrix Storage Technology(DO) Active Managemnet Technology(DO) Penryn 3 4, 5 6,7,8,9,10,11 16,17 16,17 12,13,14,15 38 24 22 26 34 27 28 18 36 36 37 30 31 32 32 32 39 41 39 40 40 21 JM70 -MV Block Diagram Project code: 91.4AN01.001 PCB P/N : 48.4AN01.0SA REVISION : SB 08246 TOP GND S S GND BOTTOM PCB STACKUP DCBATOUT SYSTEM DC/DC 1.5V_S3 INPUTS SYSTEM DC/DC ISL62392 5V_S5(6A) 46 OUTPUTS RT9026 DDR_VREF_S3 (1.2A) 49 3D3V_S5(7A) 1D5V_S3(10A) 46 DCBATOUT 1D05V_S0(10A) INPUTS OUTPUTS TPS51124 G9198-15 3D3V_S5 1D5V_S5 (300mA) 14 50 51 VCC_CORE 0~1.3V 38A OUTPUTS CPU DC/DC INPUTS DCBATOUT CHARGER OUTPUTS INPUTS CHG_PWR DCBATOUT 18V 6.0A ISL88731A ADP3208C AU6433 Int MIC 32 1.5W (MXM 3.0 Connector) HDMI 20 CRT 19 LCD TXFM RJ45 29 29 SPI EMC2102 3D3V_AUX_S5 5V_AUX_S5 LINE IN 32 ESATA SATA 25 INT.SUBWOOFER 32 G1442RD SUBWOOFER AMP 32 Mini 2 Card TV TUNER 37 2nd HDD SATA 23 Level shift PS8101 Finger Printer 41 MEDIA KEY 42 0~1.3V 6.5A VCC_GFXCORE 48 DCBATOUT INPUTS GFX DC/DC OUTPUTS ISL6263 19 35 35
Transcript

5

4

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1

JM70 -MV Block DiagramD

Project code: 91.4AN01.001 PCB P/N : 48.4AN01.0SA REVISION : SB 08246

SYSTEM DC/DCISL62392INPUTS 46 OUTPUTS5V_S5(6A) 3D3V_S5(7A) DCBATOUT 5V_AUX_S5 3D3V_AUX_S5

CLK GEN.ICS9LPRS365BKLFT3

Mobile CPUPenryn4, 5

SMSCEMC210238

SYSTEM DC/DCTPS51124INPUTSDCBATOUT 1D5V_S3(10A)

46

D

OUTPUTS1D05V_S0(10A)

HOST BUS

667/800/[email protected] Level shift PS8101

RT90261.5V_S3

49DDR_VREF_S3 (1.2A)

DDR3800/1066 16,17 MHz

CantigaAGTL+ CPU I/F DDR Memory I/F INTEGRATED GRAHPICS LVDS, CRT I/F

PCIex16

VGA Borad

18

HDMI LCD CRT

21

G9198-153D3V_S5 1D5V_S5 (300mA)

14

DDR3800/1066 16,17 MHz

(MXM 3.0 Connector)6,7,8,9,10,11

19 20

32C

INT.SUBWOOFER LINE IN32

www.kythuatvitinh.comX4 DMI 400MHz C-Link0

CHARGERISL88731A

USB

CardBusAU6433

SUBWOOFER AMPG1442RD 32

MS/MS Pro/xD /MMC/SD

50

35

35

INPUTS

OUTPUTS CHG_PWR

C

DCBATOUT

ICH9M6 PCIe ports ACPI 2.0 4 SATA

18V

6.0A

PCI/PCI BRIDGE

Giga LAN

LAN

CPU DC/DCADP3208C

TXFM

RJ4529

BCM5764MKMLG 28

29

51

INPUTS

OUTPUTS0~1.3V 38A

12 USB 2.0/1.1 ports

Int MIC32

ETHERNET (10/100/1000MbE)

DCBATOUT

VCC_CORE

CodecALC88830

AZALIA

High Definition Audio LPC I/F Serial Peripheral I/F Matrix Storage Technology(DO) Active Managemnet Technology(DO)

New Card36

PWR SW TPS2231 36

GFX DC/DCISL6263 INPUTSDCBATOUT

48

MIC In32

PCIe

Mini 1 Card Wire LAN 37 Mini 2 Card TV TUNER 37

OUTPUTS VCC_GFXCORE0~1.3V 6.5A

12,13,14,15 32B

OP AMPG1454R31

INT.SPKR1.5W

B

LPC BUSTOP

PCB STACKUP SPI BIOS

32

Line Out (SPDIF)

SATA

USBMini USB Blue Tooth

RJ11

MODEM MDC Card34

HDD SATA 22

Camera26 19

KBC WinbondWPCE773LA0DG 39

(2MB)

LPCDEBUG 40 CONN.

GND S S

40

SATAODD SATA 24

Finger Printer

41

USB 4 Port

27

MEDIA KEY 42

GND BOTTOM

SATAESATA 25

Touch Pad 41

INT. KB 39

SATA2nd HDD 23A

Digitally signed by dd DN: cn=dd, o=dd, ou=dd, [email protected] Wistron Corporation com, c=US Date: 2009.12.04 BLOCK DIAGRAM SB JM70-MV 19:18:27 +07'00'UMA 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A2 Document Number Rev 55 Date: Saturday, December 20, 20081

A

Sheet

1

of

5

4

3

2

A

Bpage 92

C

ICH9M Functional Strap Definitions Rev.1.5 ICH9 EDS 642879Signal HDA_SDOUT Usage/When Sampled XOR Chain Entrance/ PCIE Port Config1 bit1, Rising Edge of PWROK Comment

ICH9M Integrated Pull-up and Pull-down ResistorsICH9 EDS 642879

Cantiga chipset and ICH9M I/O controller Hub strapping configurationRev.1.5Pin Name CFG[2:0]

D

E

Montevina Platform Design guide 22339page 218 Strap Description FSB Frequency Select Configuration 000 = FSB1067 011 = FSB667 010 = FSB800 others = Reserved

0.5

Allows entrance to XOR Chain testing when TP3 pulled low.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers: offset 224h). This signal has weak internal pull-down This signal has a weak internal pull-down. Sets bit0 of RPC.PC(Config Registers:Offset 224h) This signal has a weak internal pull-up. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) This signal should not be pulled high. ESI compatible mode is for server platforms only. This signal should not be pulled low for desttop and mobile. Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.

SIGNALCL_CLK[1:0] CL_DATA[1:0] CL_RST0# DPRSLPVR/GPIO16 ENERGY_DETECT HDA_BIT_CLK HDA_DOCK_EN#/GPIO33 HDA_RST# HDA_SDIN[3:0] HDA_SDOUT HDA_SYNC GLAN_DOCK# GPIO[20]GNT[3:0]#/GPIO[55,53,51]

Resistor Type/ValuePULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20KThe pull-up or pull-down active when configured for native GLAN_DOCK# functionality and determined by LAN controller

4

HDA_SYNC GNT2#/ GPIO53 GPIO20 GNT1#/ GPIO51

PCIE config1 bit0, Rising Edge of PWROK. PCIE config2 bit2, Rising Edge of PWROK. Reserved ESI Strap (Server Only) Rising Edge of PWROK

CFG[4:3] CFG8 CFG[15:14] CFG[18:17] CFG5 CFG6

Reserved

4

DMI x2 Select iTPM Host Interface Intel Management engine Crypto strap

0 = DMI x2 1 = DMI x4 (Default) 0= The iTPM Host Interface is enabled(Note2) 1=The iTPM Host Interface is disalbed(default) 0 = Transport Layer Security (TLS) cipher suite with no confidentiality 1 = TLS cipher suite with confidentiality (default) 0 = Reverse Lanes,15->0,14->1 ect.. 1= Normal operation(Default):Lane Numbered in order 0 = Enable (Note 3) 1= Disabled (default) 00 10 01 11 = = = =

GNT3#/ GPIO55

Top-Block Swap Override. Rising Edge of PWROK.

CFG7

GNT0#: SPI_CS1#/ GPIO58

SPI_MOSI

Boot BIOS Destination Selection 0:1. Rising Edge of PWROK. Integrated TPM Enable, Rising Edge of CLPWROK

3GPIO49

DMI Termination Voltage, The signal is required to be low for desktop Rising Edge of PWROK. applications and required to be high for mobile applications.

SATALED# SPKR

PCI Express Lane Reversal. Rising Edge of PWROK. No Reboot. Rising Edge of PWROK.

www.kythuatvitinh.comCFG9 PCIE Graphics Lane Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10). GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. Sample low: the Integrated TPM will be disabled. Sample high: the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enable.

PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 15K PULL-UP 20K

PULL-DOWN 20K

CFG10

PCIE Loopback enable XOR/ALL

GPIO[49]

CFG[13:12]

LDA[3:0]#/FHW[3:0]# LAN_RXD[2:0] LDRQ[0] PME#

Reserve XOR mode Enabled ALLZ mode Enabled (Note 3) Disabled (default)

CFG16

FSB Dynamic ODT

0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled (Default)

3

LDRQ[1]/GPIO23 PWRBTN#

CFG19

DMI Lane Reversal

0 = Normal operation(Default): Lane Numbered in Order

Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)

SATALED#If sampled high, the system is strapped to the "No Reboot" mode(ICH9 will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit. This signal should not be pull low unless using XOR Chain testing. Sampled low:the Flash Descriptor Security will be overridden. If high,the security measures will be in effect.This should only be enabled in manufacturing environments using an external pull-up resister. SPI_CS1#/GPIO58/CLGPIO6

1 = Reverse Lanes DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3) DMI x2 mode[MCH -> ICH]:(3->0,2->1) 0 = Only Digital Display Port or PCIE is operational (Default) 1 =Digital display Port and PCIe are operting simulataneously via the PEG port 0 =No SDVO Card Present (Default)

SPI_MOSI SPI_MISO SPKR TACH_[3:0] TP[3] USB[11:0][P,N]

PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 15K

CFG20

Digital Display Port (SDVO/DP/iHDMI) Concurrent with PCIe

TP3

XOR Chain Entrance. Rising Edge of PWROK. Flash Descriptor Security Override Strap Rising Edge of PWROK

SDVO_CTRLDATA

SDVO Present 1 = SDVO Card Present 0 = LFP Disabled (Default) Local Flat Panel (LFP) Present

GPIO33/ HDA_DOCK _EN#

L_DDC_DATA

1= LFP Card Present; PCIE disabled

2

NOTE: 1. All strap signals are sampled with respect to the leading edge of the (G)MCH Power OK (PWROK) signal. 2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6. Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

2

1

UMA

1

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

ReferenceSize A3 Document Number Rev

JM70-MVSheet 2 of 55

SB

Date: Saturday, December 20, 2008

A

B

C

D

E

3D3V_S0 3D3V_S0 R383 1 2 0R0603-PAD 3D3V_48MPWR_S0 1D05V_S0 R384 1 2 0R0603-PAD SCD1U16V2ZY-2GP 3D3V_S0 R393 1 2 Do Not Stuff 3D3V_CLKPLL_S0 3D3V_CLKGEN_S0 R402 1 2 0R0603-PAD C239 SCD1U16V2ZY-2GP

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

C556 Do Not Stuff

C555 C560 SC1U16V3ZY-GP

C222

C581

C580

C199

C557

C554

C569 SC4D7U6D3V3KX-GP

C576

C582

C566

C226

C250

DY

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

4

2

1

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

3D3V_48MPWR_S0 3D3V_CLKGEN_S0

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

4

3D3V_CLKPLL_S0

DY4 16 9 46 62 23 19 27 43 52 33 56 VDD96_IO VDDPLL3_IO VDDSRC_IO VDDSRC_IO VDDSRC_IO VDDCPU_IOU54

2008.12.08 SBCL=20pF0.2pFC260

VDDREF VDD48 VDDPCI VDDSRC VDDCPU VDDPLL3

CPUT0 CPUC0 CPUT1_F CPUC1_F

61 60 58 57

CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4 CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6 CLK_PCIE_ICH 13 CLK_PCIE_ICH# 13

1

2 1X2

GEN_XTAL_IN

3

4,7 CPU_SEL2

13 CLK_ICH14 39 PCLK_KBC 13 PCLK_ICH

www.kythuatvitinh.comSC33P50V2JN-3GP C238 1 2 GEN_XTAL_OUT_R X-14D31818M-44GP 35 CLK48_Cardreader 13 CLK48_ICH 4,7 CPU_SEL0 R378 2 R381 2 R374 2

R158 2 DY 1 Do Not Stuff 1 R157 2 0R0402-PAD

GEN_XTAL_OUT

3 2

X1 X2

1 22R2J-2-GP 1 22R2J-2-GP 1 2K2R2J-2-GP

2

CLK48 17

CPUT2_ITP/SRCT8 CPUC2_ITP/SRCC8 SRCT7/CR#_F SRCC7/CR#_E SRCT6 SRCC6

54 53

USB_48MHZ/FSLA

SC27P50V2JN-2-GP

3D3V_S0

82.30005.951 2nd = 82.30005.891

51 50

RN57

13 PM_STPPCI# 13 PM_STPCPU#

45 44

CLK_PCIE_NEW 36 CLK_PCIE_NEW# 36

PCI_STOP# CPU_STOP#

5 6 7 8

4 3 2 1

PCLKCLK2 CPU_SEL2_R PCLKCLK4 PCLKCLK5

48 47

CLK_PCIE_MINI1 37 CLK_PCIE_MINI1# 37 CLK_PCIE_LAN 28 CLK_PCIE_LAN# 28

15,16,17 SMBC_ICH 15,16,17 SMBD_ICH

7 6

SCLK SDATA

SRCT10 SRCC10

41 42 40 39

3

SRN10KJ-6-GP RN56

3D3V_S0

13 CLK_PWRGD

63

CK_PWRGD/PD#

SRCT11/CR#_H SRCC11/CR#_G SRCT9 SRCC9 SRCT4 SRCC4 SRCT3/CR#_C SRCC3/CR#_D SRCT2/SATAT SRCC2/SATAC

Do Not Stuff

1 2 3 4

8 7 6 5

CPU_SEL2_R

2 DY 1 R403

37 38 34 35

PCLKCLK4 PCLKCLK5

40 PCLK_FWH

SRN33J-7-GP CLK48 PCLKCLK2 PCLKCLK4 PCLKCLK5 EC56 EC61 EC59 EC57

R399 2 TP150 1 AFTE14P-GP

PCLKCLK2 1 22R2J-2-GP PCLKCLK3 PCLKCLK4 PCLKCLK5

8 10 11 12 13 14

CLK_PCIE_PEG 18 CLK_PCIE_PEG# 18

PCI0/CR#_A PCI1/CR#_B PCI2/TME PCI3 PCI4/27_SELECT PCI_F5/ITP_EN

CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7 CLK_PCIE_MINI2 37 CLK_PCIE_MINI2# 37 CLK_PCIE_SATA 12 CLK_PCIE_SATA# 12 DREFSSCLK_1 DREFSSCLK_1# DREFCLK_1 DREFCLK_1#

31 32 28 29

4,7 CPU_SEL1

CPU_SEL2_R

64 5 55

FSLB/TEST_MODE REF0/FSLC/TEST_SEL NC#55 GND GNDSRC GNDSRC GNDSRC GNDCPU GND GND48 GNDPCI GNDREF 27MHZ_NONSS/SRCT1/SE1 27MHZ_SS/SRCC1/SE2 SRCT0/DOTT_96 SRCC0/DOTC_96

UMA2 1 4 3

1

1

1

1

24 25 20 21

3 RN52 4 SRN0J-6-GP 1 RN53 2 SRN0J-6-GP

DY

DY

DY

DREFSSCLK 7 DREFSSCLK# 7 DREFCLK 7 DREFCLK# 7

Do Not Stuff

SC10P50V2JN-4GP

Do Not Stuff

Do Not Stuff Do Not Stuff

2

2

2

2

GND

UMA2

18 15 1

22 30 36 49 59 26

2

EMI capacitor

71.09365.A03

ICS9LPRS365BKLFT-GP-U

2nd = 71.08513.003

ICS9LPRS365YGLFT setting table PIN NAME DESCRIPTION PCI0/CR#_AByte 5, bit 7 0 = PCI0 enabled (default) 1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair Byte 5, bit 6 0 = CR#_A controls SRC0 pair (default), 1= CR#_A controls SRC2 pair Byte 5, bit 5 0 = PCI1 enabled (default) 1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair Byte 5, bit 4 0 = CR#_B controls SRC1 pair (default) 1= CR#_B controls SRC4 pair 0 = Overclocking of CPU and SRC Allowed 1 = Overclocking of CPU and SRC NOT allowed

65

SEL2 SEL1 SEL0 FSC FSB FSA PIN NAME SRCC3/CR#_D SRCC7/CR#_E DESCRIPTIONByte 5, bit 1 0 = SRC3 enabled (default) 1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair Byte 5, bit 0 0 = CR#_D controls SRC1 pair (default) 1= CR#_D controls SRC4 pair Byte 6, bit 7 0 = SRC7# enabled (default) 1= CR#_F controls SRC6 Byte 6, bit 6 0 = SRC7 enabled (default) 1= CR#_F controls SRC8 Byte 6, bit 5 0 = SRC11# enabled (default) 1= CR#_G controls SRC9 Byte 6, bit 4 0 = SRC11 enabled (default) 1= CR#_H controls SRC10

CPU100M 133M 166M 200M 266M

FSBX 533M 667M 800M 1067M1

PCI1/CR#_B PCI2/TME1

1 0 0 0 0UMA

0 0 1 1 0

1 1 1 0 0

PCI3 PCI4/27M_SEL PCI_F5/ITP_EN SRCT3/CR#_CA

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96# 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0# 0 =SRC8/SRC8# 1 = ITP/ITP# Byte 5, bit 3 0 = SRC3 enabled (default) 1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair Byte 5, bit 2 0 = CR#_C controls SRC0 pair (default), 1= CR#_C controls SRC2 pairB

SRCT7/CR#_F SRCC11/CR#_G SRCT11/CR#_H

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Clock GeneratorSize Document Number Rev

JM70-MVDate: Saturday, December 20, 2008 SheetE

SB3 of 55

C

D

A

B

C

D

E

6 H_A#[35..3]

H_A#[35..3] H_DINV#[3..0] CPU1A H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 1 OF 4 H_DINV#[3..0] H_DSTBN#[3..0] H_DSTBP#[3..0] H_D#[63..0] 6 6 6 64

1 ADS# BNR# BPRI# H1 E2 G5 H5 F21 E1 F1 D20 B3 H4 C1 F3 F4 G3 G2H_RS#0 H_RS#1 H_RS#2

TP85 AFTE14P-GP H_ADS# 6 H_BNR# 6 H_BPRI# 6 H_DEFER# 6 H_DRDY# 6 H_DBSY# 6 H_BREQ#0 6 H_IERR# H_INIT# 12 H_LOCK# 6 H_CPURST# 6,54 H_RS#[2..0] CPU1B 6 H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 2 OF 4 1D05V_S0 Place testpoint on H_IERR# with a GND 0.1" away R110 56R2J-4-GP

H_DSTBN#[3..0] H_DSTBP#[3..0] H_D#[63..0]

4

6 H_ADSTB#0 6 H_REQ#[4..0]

J4 L5 L4 K5 M3 N2 J1 N3 P5 P2 L2 P4 P1 R1 M1

A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB0# REQ0# REQ1# REQ2# REQ3# REQ4#

ADDR GROUP 0

CONTROL

DEFER# DRDY# DBSY# BR0# IERR# INIT# LOCK# RESET# RS0# RS1# RS2# TRDY# HIT# HITM#

1 2

QC = 64.49R95.6DL

3

www.kythuatvitinh.comH_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 6 H_ADSTB#1 12 H_A20M# 12 H_FERR# 12 H_IGNNE# 12 H_STPCLK# 12 H_INTR 12 H_NMI 12 H_SMI# R115 1

Y2 U5 R3 W6 U4 Y5 U1 R4 T5 T3 W2 W5 Y4 U2 V4 W3 AA4 AB2 AA3 V1 A6 A5 C4

A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# ADSTB1# A20M# FERR# IGNNE# STPCLK# LINT0 LINT1 SMI#

1

G6 E4

H_HIT# 6 H_HITM# 6

H_THERMDA

XDP/ITP SIGNALS

BPM0# BPM1# BPM2# BPM3# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR#

AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20

H_THERMDC

2

C514 Do Not Stuff

DY

XDP_BPM#5 1 XDP_TCK 1 XDP_TDI 1

TP52 AFTE14P-GP TP53 AFTE14P-GP 1D05V_S0 TP56 AFTE14P-GP TP55 AFTE14P-GP TP54 AFTE14P-GP TP93 AFTE14P-GP

Close to CPU

DATA GRP2

H_REQ#0 K3 H_REQ#1 H2 H_REQ#2 K2 H_REQ#3 J3 H_REQ#4 L1

H_TRDY# 6

XDP_TMS 1 XDP_TRST# 1 XDP_DBRESET# 1

6 H_DSTBN#0 6 H_DSTBP#0 6 H_DINV#0

1

E22 F24 E26 G22 F23 G25 E25 E23 K24 G24 J24 J23 H22 F26 K22 H23 J26 H26 H25

D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1# GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 BSEL0 BSEL1 BSEL2

D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DSTBN2# DSTBP2# DINV2# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DSTBN3# DSTBP3# DINV3#

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

DATA GRP0

THERMTRIP#

C7

PM_THRMTRIP-A#_CPU 1

2

PM_THRMTRIP-A# 7,12,44 PM_THRMTRIP# ICH9 and MCH PH @ page48 should connect to without T-ing

2H_STPCLK#_R D5 0R2J-2-GP C6 B4 A3-BPM1_1 M4 -BPM1_0 N5 H_THA_Q T2 H_THC_Q V3 -BPM1_2 B2 1RSVD_CPU_C3 C3 1RSVD_CPU_D2 D2 D22 TDO_2 D3 TDI_1 F6

HCLK

BCLK0 BCLK1

A22 A21R362

0R2J-2-GP R119 CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3

RESERVED

38 H_THA_Q 38 H_THC_Q AFTE14P-GP TP90 AFTE14P-GP TP942

Do Not Stuff 2 1

5 H_GTUREF_2

RSVD#M4 RSVD#N5 RSVD#T2 RSVD#V3 RSVD#B2 RSVD#C3 RSVD#D2 RSVD#D22 RSVD#D3 RSVD#F6 KEY_NC

2

1

2 Do Not Stuff

DYLayout Note: "CPU_GTLREF0" 0.5" max length.

1D05V_S0 6 H_DSTBN#1 6 H_DSTBP#1 6 H_DINV#1 CPU_GTLREF0

DATA GRP3

PROCHOT# THRMDA THRMDC

D21 A24 B25

CPU_PROCHOT#_2 H_THERMDA 38 H_THERMDC 38

2

1 1

ADDR GROUP 1

3

H_DSTBN#2 6 H_DSTBP#2 6 H_DINV#2 6

R111 68R2-GP

THERMAL

1 R112 2 Do Not Stuff

CPU_PROCHOT#_R

51

DY

QC = 64.10005.6DL

1KR2F-3-GP R81

H_D#16 N22 H_D#17 K25 H_D#18 P26 H_D#19 R23 H_D#20 L23 H_D#21 M24 H_D#22 L22 H_D#23 M23 H_D#24 P25 H_D#25 P23 H_D#26 P22 H_D#27 T24 H_D#28 R24 H_D#29 L25 H_D#30 T25 H_D#31 N25 L26 M26 N24

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20 R26 U26 AA1 Y1 E5 B5 D24 D6 D7 AE6

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

DATA GRP1

ICH ICH

H_DSTBN#3 6 H_DSTBP#3 6 H_DINV#3 6 COMP0 COMP1 COMP2 COMP3 R305 1 R288 1 R80 1 R82 1

R79 2KR2F-3-GP

DY

TEST1 TEST2 C128 TEST4

BGA479-SKT6-GPU6 38 H_THA_Q

2

B1

QC = 64.17415.6DL

AD26 C23 D25 C24 AF26 AF1 A26 B22 B23 C21

MISC

COMP0 COMP1 COMP2 COMP3 DPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI#

2 2 2 2

27D4R2F-L1-GP 54D9R2F-L1-GP 27D4R2F-L1-GP 54D9R2F-L1-GP

H_DPRSTP# 7,12,51 H_DPSLP# 12 H_DPWR# 6 H_CPUSLP# 6 H_PSI# 51 C181

QC = 64.24R95.6DL QC = 64.49R95.6DL QC = 64.24R95.6DL QC = 64.49R95.6DLH_PWRGD 12,44

2

62.10079.001 2nd = 62.10053.401

3,7 CPU_SEL0 3,7 CPU_SEL1 3,7 CPU_SEL2

C467 Do Not Stuff

DY38 H_THC_Q

DY1D05V_S0

1 DY R114

2

TEST1 Do Not Stuff

XDP_TMS XDP_TDI

R74 R78 R71

1 1 1

2 54D9R2F-L1-GP 2 54D9R2F-L1-GP 2 54D9R2F-L1-GP

1 DY 2 TEST2 R113 Do Not Stuff C428 2 DYTEST4 1 Do Not Stuff

XDP FOR QUAD CORE CPU1D05V_S0 R1031

Net "TEST4" as short as possible, make sure "TEST4" routing is reference to GND and away other noisy signals

Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .

XDP_BPM#5

R100 TDI_TDO_M 1

H_CPURST#

1 DY 2 Do Not StuffR86

DY DYR105

2 Do Not Stuff 2 Do Not Stuff

TDI_1 TDO_2

R106 1

2 Do Not Stuff

DY

3D3V_S0

1 1 DY 2 Do Not StuffR94 -BPM1_0

XDP_DBRESET# R116 1

DY

2 Do Not Stuff

H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGD H_CPUSLP# H_INIT# H_CPURST#

XDP_TCK -BPM1_1 XDP_TRST# -BPM1_2A B

R73 R70

1 1

2 54D9R2F-L1-GP 2 54D9R2F-L1-GP

1 1 1 1 1 1 1

TP108 TP99 TP95 TP86 TP96 TP98 TP89

AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP

UMA

Do Not Stuff 2

Close to CPU

BGA479-SKT6-GPU6

1

1

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

1 DY 2 Do Not StuffR107

Place these TP on button-side, easy to measure.

CPU (1 of 2)Size Document Number Rev

All place within 2" to CPU

1 DY 2 Do Not Stuff

JM70-MVDate: Saturday, December 20, 2008C D

SB4 of 55

SheetE

A

B

C

D

E

VCC_CORE

VCC_CORE

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

C132 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

C133 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

C130 SCD1U10V2KX-4GP

C173 SCD1U10V2KX-4GP

C129 SC10U6D3V5MX-3GP

C122 SC10U6D3V5MX-3GP

C121 SC10U6D3V5MX-3GP

C175 SC10U6D3V5MX-3GP

C119 SC10U6D3V5MX-3GP

C123 SC10U6D3V5MX-3GP

C184 SC10U6D3V5MX-3GP

C120 SC10U6D3V5MX-3GP

C185 SC10U6D3V5MX-3GP

C182 SC10U6D3V5MX-3GP

C176 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

C168 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

C183 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

C131 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

1 2

C138 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

VCC_CORE VCC_CORE4

2

CPU1D

4 OF 4

CPU1C

3 OF 4

2

1

3

AA7

2

100R2F-L1-GP-U

A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18

www.kythuatvitinh.comDo Not Stuff

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

1D05V_S0

R99 Do Not Stuff

DY2

QC = 64.10015.6DL

1

AFTE14P-GP TP48

1

waiting QUAD CORE symbolH_GTUREF_2 4

QC = 64.17415.6DL R104

DY2

DY Not Stuff DoQ8 G

1D05V_S0

3D3V_S5

QC = 84.00138.F31

R96

DY

R102 Do Not Stuff

DY Do Not Stuff1

ACLKPH_2

QC = 63.10434.1DLQ7 R95

QC = 63.10334.1DL

R108

1D05V_S0

Do Not Stuff

E

VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCA VCCA VID0 VID1 VID2 VID3 VID4 VID5 VID6 VCCSENSE VSSSENSE

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21 B26 C26 AD6 AF5 AE5 AF4 AE3 AF3 AE2 AF7 AE7H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6

GAP-CLOSE-PWR C171 SCD1U10V2KX-4GP SCD1U10V2KX-4GP C140 SCD1U10V2KX-4GP

2

1

2

Do Not Stuff

QC = 63.10334.1DL

R92

DY Do Not Stuff

QC = 63.R0034.1DL1DCLKPH_2

1

2

2

1

layout note: "1D5V_VCCA_S0" as short as possible1D5V_S0 1D5V_VCCA_S0 FCM1608KF-1-GP 1 2 L12 C5022nd = 68.00248.061 SC10U6D3V5MX-3GP

2

TEST55

1

R91 0R2J-2-GP

2

G8

DY

2

1D05V_S0_CPU

QC = 84.T3904.C11

B

1

DY

2

GTLREF_Control

QC = DY

SCD01U16V2KX-3GP

H_VID[6..0] VCC_CORE

51

C510

R67

VCC_SENSE_1 VSS_SENSE_1

1 R63 2 0R2J-2-GP QC

1 R64 2 0R2J-2-GP Layout Note:

= 64.12115.6DL QC = 64.12115.6DL

VCC_SENSE 51 VSS_SENSE 51

R68 100R2F-L1-GP-U BGA479-SKT6-GPU6 VCCSENSE and VSSSENSE lines should be of equal length.

1D05V_S0

C139 Do Not Stuff

C159 SCD1U10V2KX-4GP

C154 SCD1U10V2KX-4GP

C143 Do Not Stuff

C146 SC4D7U6D3V3KX-GP

C158 Do Not Stuff

Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.

A4 A8 A11 A14 A16 A19 A23 AF2 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3

CPU TYPE TABLECPU DAUL CORE QUAD CORE GTLREF_CONTROL GND PIN FLOATING PIN H_GTLREF

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

4

1

S

D

1

2

HFPLL_2

3

0R2J-2-GP

1 2

0R2J-2-GP

C

R75

0R2J-2-GP

R72

1

1

1

2

2

1

2

1

TP47 AFTE14P-GP

1

2

1 1

TP51 AFTE14P-GP TP107 AFTE14P-GP

2

1 1

TP103 AFTE14P-GP TP50 AFTE14P-GP

1

1

1

1

1

1

1

BGA479-SKT6-GPU61

2

2

2

2

2

2

VCC_CORE AA7

0V 0.63*VTTTitle

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

2 R76

1 0R2J-2-GP

QC = DY DYB C D

DY

DY

CPU (2 of 2)Size Document Number Rev

JM70-MVDate: Saturday, December 20, 2008A

SB5 of 55

SheetE

5

4

3

2

1

NB1A 4 H_D#[63..0] H_D#[63..0] H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

1 OF 10 H_A#[35..3]

1D05V_S0D

H_SWING routing Trace width and Spacing use 10 / 20 mil H_SWING Resistors and Capacitors close MCH 500 mil ( MAX )1

R126 221R2F-2-GP

H_SWING C192 SCD1U10V2KX-4GP

R125 100R2F-L1-GP-U

C

H_RCOMP routing Trace width and Spacing use 10 / 20 mil1 R132 2 H_RCOMP 24D9R2F-L-GP

HOST

www.kythuatvitinh.comH_ADS# H_ADSTB#_0 H_ADSTB#_1 H_BNR# H_BPRI# H_BREQ# H_DEFER# H_DBSY# HPLL_CLK HPLL_CLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY# H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4 H_BPRI# 4 H_BREQ#0 4 H_DEFER# 4 H_DBSY# 4 CLK_MCH_BCLK 3 CLK_MCH_BCLK# 3 H_DPWR# 4 H_DRDY# 4 H_HIT# 4 H_HITM# 4 H_LOCK# 4 H_TRDY# 4

QC = 64.75R05.6DL

QC = 64.16R95.6DL

Place them near to the chip ( < 0.5")

B

F2 G8 F8 E6 G2 H6 H2 F6 D4 H3 M9 M11 J1 J2 N12 J6 P2 L2 R2 N9 L6 M5 J3 N2 R1 N5 N6 P13 N8 L7 N10 M3 Y3 AD14 Y6 Y10 Y12 Y14 Y7 W2 AA8 Y9 AA13 AA9 AA11 AD11 AD10 AD13 AE12 AE9 AA2 AD8 AA3 AD3 AD7 AE14 AF3 AC1 AE3 AC3 AE11 AE8 AG2 AD6

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_A#[35..3]

4

D

2

2

1

2

1

C

H_DINV#[3..0]

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3 H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3 H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3 H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4 H_RS#_0 H_RS#_1 H_RS#_2

J8 L3 Y13 Y1 L10 M7 AA5 AE6 L9 M8 AA6 AE5 B15 K13 F13 B13 B14 B6 F12 C8

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#[3..0] H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#[3..0] H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2

H_DINV#[3..0]

4

H_DSTBN#[3..0]

4

H_DSTBP#[3..0]

4

B

1D05V_S0

H_REQ#[4..0]

4

2

H_SWING H_RCOMP R123 1KR2F-3-GP 4,54 H_CPURST# 4 H_CPUSLP# H_AVREF SCD1U16V2ZY-2GP

C5 E3 C12 E11 A11 B11

H_SWING H_RCOMP H_CPURST# H_CPUSLP# H_AVREF H_DVREFCANTIGA-GM-GP-U-NF

H_RS#[2..0]

4

1

1

2

2

R121 2KR2F-3-GP

1

C189

71.CNTIG.00U

A

UMA

A

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number

Cantiga (1 of 6) JM70-MV1

Rev

SB6 of 55

Date: Saturday, December 20, 20085 4 3 2

Sheet

5

4

3

2

1

NB1B

2 OF 10 NB1C 3 OF 10 1D05V_S0

D

RESERVED#M36 RESERVED#N36 RESERVED#R33 RESERVED#T33 RESERVED#AH9 RESERVED#AH10 RESERVED#AH12 RESERVED#AH13 RESERVED#K12 RESERVED#AL34 RESERVED#AK34 RESERVED#AN35 RESERVED#AM35 RESERVED#T24

DDR CLK/ CONTROL/COMPENSATION

M36 N36 R33 T33 AH9 AH10 AH12 AH13 K12 AL34 AK34 AN35 AM35 T24 B31 B2 M1 AY21

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1 SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1 SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1 SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1 SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1 SM_RCOMP SM_RCOMP# SM_RCOMP_VOH SM_RCOMP_VOL SM_VREF SM_PWROK SM_REXT SM_DRAMRST#

AP24 AT21 AV24 AU20 AR24 AR21 AU24 AV20 BC28 AY28 AY36 BB36 BA17 AY16 AV16 AR13 BD17 AY17 BF15 AY13 BG22 BH21 BF28 BH28 AV42 AR36 BF17 BC36 B38 A38 E41 F41

M_CLK_DDR0 16 M_CLK_DDR1 16 M_CLK_DDR2 17 M_CLK_DDR3 17 M_CLK_DDR#0 M_CLK_DDR#1 M_CLK_DDR#2 M_CLK_DDR#3 M_CKE0 M_CKE1 M_CKE2 M_CKE3 M_CS0# M_CS1# M_CS2# M_CS3# M_ODT0 M_ODT1 M_ODT2 M_ODT3 M_RCOMPP M_RCOMPN SM_RCOMP_VOH SM_RCOMP_VOL DDR2 : connect to GND SM_REXT R170 499R2F-2-GP 1 2 DDR3_DRAMRST# 16,17 DREFCLK 3 DREFCLK# 3 DREFSSCLK 3 DREFSSCLK# 3 16 16 17 17 16 16 17 17 16 16 17 17 SM_PWROK 44 DDR_VREF_S3_1 16 16 17 17

19 L_BKLTCTL 39 GMCH_BL_ON

LCTLA_CLK LCTLB_DATA CLK_DDC_EDID DAT_DDC_EDID

L32 G32 M32 M33 K33 J33

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3 LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3 LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3 LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

PEG_COMPI PEG_COMPO PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15 PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15 PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15 PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

T37 T36 H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39 H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40 J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46

PEG_CMP 2 R142 PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15 PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15

1 49D9R2F-GP

Close to GMCH as 500 mils.PEG_RXN[15..0] 18

19 CLK_DDC_EDID 19 DAT_DDC_EDID 19 GMCH_LCDVDD_ON

RESERVED#B31 RESERVED#B2 RESERVED#M1 RESERVED#AY21

19 19 19 19

GMCH_LCDVDD_ON M29 LIBG C44 B43 E37 E38 C41 GMCH_TXACLKC40 GMCH_TXACLK+ B37 GMCH_TXBCLKA37 GMCH_TXBCLK+

D

BG23 BF23 BH18 BF18

RESERVED#BG23 RESERVED#BF23 RESERVED#BH18 RESERVED#BF18

19 GMCH_TXAOUT0+ 19 GMCH_TXAOUT1+ 19 GMCH_TXAOUT2+ 19 GMCH_TXBOUT019 GMCH_TXBOUT119 GMCH_TXBOUT219 GMCH_TXBOUT0+ 19 GMCH_TXBOUT1+ 19 GMCH_TXBOUT2+

H48 D45 F40 B40 A41 H38 G37 J37 B42 G38 F37 K37

0.75V1C274 SCD1U10V2KX-4GP

PCI-EXPRESS

C

www.kythuatvitinh.comCLKPEG_CLK PEG_CLK# F43 E43CLK_MCH_3GPLL 3 CLK_MCH_3GPLL# 3 TV_DACA TV_DACB TV_DACC

DPLL_REF_CLK DPLL_REF_CLK# DPLL_REF_SSCLK DPLL_REF_SSCLK#

2

GRAPHICS

RSVD

LVDS

19 GMCH_TXAOUT019 GMCH_TXAOUT119 GMCH_TXAOUT2-

H47 E46 G40 A40

PEG_RXP[15..0] 18

F25 H25 K25 H24

TVA_DAC TVB_DAC TVC_DAC TV_RTN

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

AE41 AE37 AE47 AH39

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

13 13 13 13

C31 E32

3,4 CPU_SEL0 3,4 CPU_SEL1 3,4 CPU_SEL2

1D5V_S3

CFG9

R181 80D6R2F-L-GP

M_RCOMPP M_RCOMPN

CFG16

GRAPHICS VID

1

3D3V_S0

CFG20

T25 R25 P25 P20 P24 C25 N24 M24 E21 C23 C24 N21 P21 T21 R20 M20 L21 H21 P29 R28 T28

CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3 DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

AE40 AE38 AE48 AH40

TV_DCONSEL_0 TV_DCONSEL_1

DMI_TXP0 13 DMI_TXP1 13 DMI_TXP2 13 DMI_TXP3 13 13 13 13 13

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15

PEG_TXN[15..0] 18

TV

C

DMI

AE35 AE43 AE46 AH42

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

20 GMCH_BLUE

GMCH_BLUE

E28

CRT_BLUE

20 GMCH_GREEN 20 GMCH_RED

GMCH_GREEN GMCH_RED

G28 J28

CRT_GREEN CRT_RED

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

AD35 AE44 AF46 AH43

DMI_RXP0 13 DMI_RXP1 13 DMI_RXP2 13 DMI_RXP3 13

1

G29 H32 J32 J29 E29 L29

CRT_IRTN

20 GMCH_DDCCLK 20 GMCH_DDCDATA 20 GMCH_HSYNC 20 GMCH_VSYNC

GMCH_DDCCLK GMCH_DDCDATA

CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC

GFX_VID[4..0]

48

R182 80D6R2F-L-GP R130 1

DY

2 Do Not Stuff

CFG20

13 PM_SYNC# 4,12,51 H_DPRSTP# 16,17 PM_EXTTS#0 13,38 PWROK

PM_EXTTS#0 PM_EXTTS#1

13,18,28,36,37,39,40

PLT_RST1#

2 100R2J-2-GPDo Not Stuff

1 R160 1C257

2

R129 1

DY

2 Do Not Stuff

CFG9

R29 B7 N33 P32 AT40 RSTIN# AT11 NB_THERMTRIP# T20 PM_DPRSLPVR_MCH R32

PM_SYNC# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

B33 B32 G33 F33 E33

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4

CRT_IREF 1 UMA 2 R128 1K02R2F-1-GP CANTIGA-GM-GP-U-NF

J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15

PEG_TXP[15..0] 18

CFG

VGA

2

FOR Cantiga: 1.02k_1% ohm Teenah: 1.3k ohm

71.CNTIG.00U

UMA UMA UMA UMA UMA UMA UMA UMAPEG_RXP3

PEG_TXN01 PEG_TXN11 PEG_TXN21 PEG_TXN31 PEG_TXP01 PEG_TXP11 PEG_TXP21 PEG_TXP31

2 2 2 2

C107 C112 C111 C114

SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP

GFX_VR_EN

C34

GFXVR_EN 1D05V_S0 R152 1KR2F-3-GP

CRT_IREF routing Trace width use 20 mil

HDMI_DATA2- 21 HDMI_DATA1- 21 HDMI_DATA0- 21 HDMI_CLK- 21 HDMI_DATA2+ 21 HDMI_DATA1+ 21 HDMI_DATA0+ 21 HDMI_CLK+ 21

2

PM

2 C108 SCD1U10V2KX-5GP 2 C110 SCD1U10V2KX-5GP 2 C109 SCD1U10V2KX-5GP 2 C113 SCD1U10V2KX-5GP

2

R260 1

DY

2 Do Not Stuff

CFG16

DYR141 1

2008.12.08 SB4,12,44 PM_THRMTRIP-A#B

2

0R2J-2-GP 13,51 PM_DPRSLPVR

MISC

10R2J-2-GP R139

2PM_DPRSLPVR_MCH

HDA

BG48 BF48 BD48 BC48 BH47 BG47 BE47 BH46 BF46 BG45 BH44 BH43 BH6 BH5 BG4 BH3 BF3 BH2 BG2 BE2 BG1 BF1 BD1 BC1 F1 A47

NC#BG48 NC#BF48 NC#BD48 NC#BC48 NC#BH47 NC#BG47 NC#BE47 NC#BH46 NC#BF46 NC#BG45 NC#BH44 NC#BH43 NC#BH6 NC#BH5 NC#BG4 NC#BH3 NC#BF3 NC#BH2 NC#BG2 NC#BE2 NC#BG1 NC#BF1 NC#BD1 NC#BC1 NC#F1 NC#A47CANTIGA-GM-GP-U-NF

CL_CLK CL_DATA CL_PWROK CL_RST# CL_VREF

ME

AH37 AH36 AN36 AJ35 AH34

MCH_CLVREF

CL_CLK0 13 CL_DATA0 13 PWROK 13,38 CL_RST#0 13

1 0R2J-2-GP R77

2

UMA

HDMI_DETECT# 21 RN26

1

UMA3 4

1

DDPC_CTRLCLK DDPC_CTRLDATA SDVO_CTRLCLK SDVO_CTRLDATA CLKREQ# ICH_SYNC# TSATN#

N28 M28 G36 E36 K36 H36 B12

for HDMI port CGMCH_HDMI_CLK 21 GMCH_HDMI_DATA 21 MCH_ICH_SYNC# MCH_TSATN# 13

C243

SCD1U10V2KX-4GP 2 1

R156 499R2F-2-GP

GMCH_BL_ON GMCH_LCDVDD_ON

2 1

SRN100KJ-6-GP

2

B

NC1MCH_TSATN#

LIBG

1 R127 2 UMA 2K37R2F-GPRN20

FOR Cantiga:500 ohm Teenah: 392 ohm

CRT_IREF GMCH_VSYNC GMCH_HSYNC

HDA_BCLK HDA_RST# HDA_SDI HDA_SDO HDA_SYNC

B28 B30 B29 C29 A28

HDA_BCLK HDA_RST# HDA_SDI HDA_SDO HDA_SYNC

4 3 2 1

5 6 7 8Do Not Stuff

R120 1

UMA

2 33R2J-2-GP

ACZ_SDIN3

12 RN22

DIS4 3 2 1 5 6 7 8SRN150J-1-GP

2008.11.27 SBRN19

HDA_SYNC HDA_BCLK HDA_SDO HDA_RST#

1 2 3 4SRN33J-7-GP

8 7 6 5

DYACZ_SYNC_R 12 ACZ_BIT_CLK 12 ACZ_SDATAOUT_R 12 ACZ_RST#_R 12 RN21 DREFCLK DREFCLK#

GMCH_RED GMCH_GREEN GMCH_BLUE

2 1

71.CNTIG.00U1D05V_S0

3 4 Do Not StuffRN25

UMA

UMA1D5V_S3 R167 1KR2F-3-GP 2 1 R122 56R2J-4-GP SM_RCOMP_VOH

DYDREFSSCLK DREFSSCLK#

2 1

3 4 Do Not Stuff

FOR Discrete change RN to 0 ohm (66.R0036.A8L)

1

1

C277

1

C282 SC2D2U6D3V3MX-1-GP SM_RCOMP_VOL RN27

2

2

R174 3K01R2F-3-GP

2

SCD01U16V2KX-3GP

2

1

C289

1

5 6 7 8

4 3 2 1SRN75J-1-GP

TV_DACC TV_DACB TV_DACA

2

C290 SC2D2U6D3V3MX-1-GP

2

A

2

GFXVR_EN

GFXVR_EN 48

R178 1KR2F-3-GP

SCD01U16V2KX-3GP

UMAA

DY13D3V_S0 RN24 LCTLA_CLK LCTLB_DATA

R124 Do Not Stuff

FOR Discrete,change to 0 ohm (66.R0036.A8L)

2

1

layout take note

UMA1 2Title

4 3

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

PM_EXTTS#0 PM_EXTTS#1

SRN10KJ-5-GP RN23 4 1 3 2 SRN10KJ-5-GP

Cantiga (2 of 6)Size Date: Document Number Rev

JM70-MVSaturday, December 20, 20081

SB7 of 55

Sheet

5

4

3

2

5

4

3

2

1

NB1D 16 M_A_DQ[63..0] M_A_DQ[63..0] M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

4 OF 10

NB1E

5 OF 10

D

C

DDR

B

DDR

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_A[14..0] 16

SYSTEM

www.kythuatvitinh.comM_A_DQS#[7..0] M_A_DQS#[7..0] 16 M_B_DQS#[7..0] M_B_DQS#[7..0] 17

AJ38 AJ41 AN38 AM38 AJ36 AJ40 AM44 AM42 AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36 AW36 BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12 BB9 BA9 AU10 AV9 BA11 BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5 AN10 AM11 AM5 AJ9 AJ8 AN12 AM13 AJ11 AJ12

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

SA_BS_0 SA_BS_1 SA_BS_2 SA_RAS# SA_CAS# SA_WE#

BD21 BG18 AT25 BB20 BD20 AY20

17 M_B_DQ[63..0] M_A_BS#0 16 M_A_BS#1 16 M_A_BS#2 16 M_A_RAS# 16 M_A_CAS# 16 M_A_WE# 16

M_A_DM[7..0]

M_A_DQS[7..0] M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

SYSTEM

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

M_A_DQS[7..0] 16

B

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

A

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DM[7..0] 16

M_A_A[14..0]

M_B_DQ[63..0] M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AK47 AH46 AP47 AP46 AJ46 AJ48 AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43 BF43 BE45 BC41 BF40 BF41 BG38 BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11 BG8 BH12 BF11 BF8 BG7 BC5 BC6 AY3 AY1 BF6 BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1 AL1 AL2 AJ1 AH1 AM2 AM3 AH3 AJ3

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

SB_BS_0 SB_BS_1 SB_BS_2 SB_RAS# SB_CAS# SB_WE#

BC16 BB17 BB33 AU17 BG16 BF14

M_B_BS#0 17 M_B_BS#1 17 M_B_BS#2 17 M_B_RAS# 17 M_B_CAS# 17 M_B_WE# 17D

M_B_DM[7..0]

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7 SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7 SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2 AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 M_B_DQS[7..0] M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DM[7..0] 17

M_B_DQS[7..0] 17

MEMORY

MEMORY

M_B_A[14..0]

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_A[14..0] 17

C

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

B

71.CNTIG.00U

71.CNTIG.00U

A

A

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Cantiga (3 of 6)Size Document Number Rev

JM70-MVDate: Saturday, December 20, 20085 4 3 2

SB8 of 55

Sheet1

5

4

3

2

1

VCC_GFXCORE 7 OF 10 1D5V_S3 NB1G

D

AP33 AN33 BH32 BG32 BF32 BD32 BC32 BB32 BA32 AY32 AW32 AV32 AU32 AT32 AR32 AP32 AN32 BH31 BG31 BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29 AY29 AW29 AV29 AU29 AT29 AR29 AP29 BA36 BB24 BD16 BB21 AW16 AW13 AT13

VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC

C

FOR VCC SMSCD1U10V2KX-4GP

1D5V_S3

1

1

1

1

2

2

2

2

VCC GFX

DY

Place on the Edge

DY

VCC SM LF

SCD22U10V2KX-1GP 2 1 C245

1 C287

SC1U10V3KX-3GP 2 1 C273

C280 SCD1U10V2KX-4GP 2 1

C256 SCD1U10V2KX-4GP 2 1

C276

B

SCD22U10V2KX-1GP 2 1

C275

SC1U10V3KX-3GP

VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF

AV44 SM_LF1_GMCH BA37 SM_LF2_GMCH AM40 SM_LF3_GMCH AV21 SM_LF4_GMCH AY5 SM_LF5_GMCH AM10 SM_LF6_GMCH BB13 SM_LF7_GMCH 1

2

1

C283

C281

C268

C262

C271

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

VCC NCTF

www.kythuatvitinh.comG9

VCC_GFXCORE

Y26 AE25 AB25 AA25 AE24 AC24 AA24 Y24 AE23 AC23 AB23 AA23 AJ21 AG21 AE21 AC21 AA21 Y21 AH20 AF20 AE20 AC20 AB20 AA20 T17 T16 AM15 AL15 AE15 AJ15 AH15 AG15 AF15 AB15 AA15 Y15 V15 U15 AN14 AM14 U14 T14

VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

2

1D05V_S0 R146 Do Not Stuff

FOR VCC COREAG34 AC34 AB34 AA34 Y34 V34 U34 AM33 AK33 AJ33 AG33 AF33 AE33 AC33 AA33 Y33 W33 V33 U33 AH28 AF28 AC28 AA28 AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24 AJ23 AH23 AF23 T32

NB1F

6 OF 10

DIS11D05V_S0 VCC_GFXCORE 1D05V_S0 VCC_GFXCORE

C235 SC10U6D3V5MX-3GP

C234 SC10U6D3V5MX-3GP

C237 SCD22U10V2KX-1GP

C230 SCD1U10V2KX-4GP

C194 SCD1U10V2KX-4GP

0R2J-2-GP 2 1 R518

0R2J-2-GP 2 1 R512

POWER

UMA0R2J-2-GP 2 1 R517

UMA0R2J-2-GP 2 1 R511

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

1

1

1

1

2

2

2

2

2

1

D

0R2J-2-GP 2 1 R516

0R2J-2-GP 2 1 R510

UMA0R2J-2-GP 2 1 R515

UMA0R2J-2-GP 2 1 R509

VCC SM

1

0R2J-2-GP 2 1 R514

0R2J-2-GP 2 1 R508

C225 SC10U6D3V5MX-3GP

1

UMA UMA0R2J-2-GP 2 1 R513

UMA UMA0R2J-2-GP 2 1 R507

C214 SCD1U10V2KX-4GP

2

UMA

UMA

2

VCC CORE

UMA

UMA

Coupling CAP 370 mils from the Edge

Coupling CAP

POWER

VCC GFX NCTF

2008.12.14 SB

1D05V_S0

1

2

VCC_GMCH_35

VCC_GFXCORE

GAP-CLOSE-PWR

C240 Do Not Stuff

C220 SC10U6D3V5MX-3GP

C221 SC10U6D3V5MX-3GP

C241 SC10U6D3V5MX-3GP

C232 Do Not Stuff Do Not Stuff

C252 SC1U10V3ZY-6GP

C215 Do Not Stuff

C255 SCD1U10V2KX-4GP

DY

UMA UMA

UMA

DY

UMA

DY

UMA

Place on the Edge

Coupling CAP

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

1

1

1

1

1

1

1

2

2

2

2

2

2

2

2

1

C

Do Not Stuff

SCD1U10V2KX-4GP SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

Do Not Stuff

SCD47U16V3ZY-3GP

48 VCC_AXG_SENSE 48 VSS_AXG_SENSE

2

CANTIGA-GM-GP-U-NF

U60(ISL6263ACRZ-T-GP) place near Cantiga

71.CNTIG.00U

place near Cantiga

A

2

AJ14 AH14

VCC_AXG_SENSE VSS_AXG_SENSE

B

A

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Cantiga (4 of 6)Size Document Number Rev

JM70-MVDate: Saturday, December 20, 20085 4 3 2 1

SB9 of 55

Sheet

5

4

3

2

1

5V_S0

Imax = 300 mAU52

3D3V_S0_DAC 3D3V_S0_DAC R365 1 2 0R0603-PAD 3D3V_CRTDAC_S0 SCD1U10V2KX-4GP NB1H 8 OF 10 C218 SC4D7U6D3V3KX-GP 2 1 C206 SC4D7U6D3V3KX-GP 2 1 C217 SC2D2U6D3V3MX-1-GP 2 1

1D05V_S0

73mASCD01U16V2KX-3GP SCD01U16V2KX-3GP

852mAC263 SC4D7U6D3V3KX-GP C562 SCD47U6D3V2KX-GP 1 2 C216 SCD1U10V2KX-4GP

1

1

1

2

2

2

NC#4

BC4 SC1U16V3ZY-GP

RT9198-33PBR-GP BC3

UMA

VCCA_CRT_DAC VCCA_CRT_DAC VCCA_DAC_BG VSSA_DAC_BG

1

1

2

UMA

1

1 R364 2 0R0402-PAD C525

SCD1U10V2KX-4GP

D

UMA

UMA

2

2

3D3V_S0_DAC

5mAUMA2

CRT

74.09198.G7F

M_VCCA_DAC_BG

A25 B25

2

1 2 3SC1U16V3ZY-GP

VIN GND EN/EN#

VOUT

5 4C524 SC22U6D3V5MX-2GP

UMA

UMA

B27 A26

VTT

1D05V_S0

M_VCCA_DPLLA M_VCCA_DPLLB M_VCCA_HPLL 1D8V_S3 M_VCCA_MPLL

F47 L48 AD1 AE1 J48 J47

VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL VCCA_LVDS VSSA_LVDS

C542

C540

R369 Do Not Stuff

PLL

1

1

1

R370 1 2 0R0603-PAD

65mASC10U6D3V5MX-3GP SCD1U10V2KX-4GP

M_VCCA_DPLLA

1

DY2C196 1D5V_S0 M_VCCA_DPLLB Do Not Stuff

UMA UMA

DY

1

1

1

C547

C549

1

R375 1 2 0R0603-PAD

65mA

A LVDS

13.2mA

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

1

1

C522

C521

D

1D05V_S0 D20

83.BAT54.D81 2nd = 83.00054.Z81 3D3V_S031D05V_HV_S0 2

1

2BAT54-5-GP

1 R363 10R2J-2-GP

2

2

2

3D3V_S5 U51 1D8V_S3

C

1

C567

1

FCM1608KF-1-GP 1 2 L14

24mA

A SM

1D05V_S0

www.kythuatvitinh.comR376 Do Not Stuff

AD48

VCCA_PEG_BG

480mA

1

1

1

2

C251 SC10U6D3V5MX-3GP

C261

POWER

1D05V_S0

2

2

2

2

1

C249

2

2

1

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

A PEG

DY

2

2

C574 SCD1U10V2KX-4GP

UMA

UMA

2

1D05V_S0

1D05V_RUN_PEGPLL

50mA AA48

13,36,39,44,47,49

PM_SLP_S4#

2

1

VCCA_PEG_PLL VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM

C550 SCD1U10V2KX-4GP

1 2

1

R371 2 0R2J-2-GP

1 2 3

VIN GND EN/EN#

VOUT

5

NC#4

4

C548 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

1

UMA DY

1

AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16

C536 SC1U16V3ZY-GP

74.09198.C7F 2nd = 74.09091.G3F UMA

2

C544 Do Not Stuff

RT9198-18PBR-GP

C267

SC1U10V3KX-3GP SC1U10V3KX-3GP

SC4D7U6D3V3KX-GP

322mA

C

UMA

UMA UMA

SCD1U10V2KX-4GP C223

SC1U10V3KX-3GP

M_VCCA_HPLL SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

1D8V_S3

1D05V_S0

R382

2nd = 68.00248.0612FCM1608KF-1-GP 1 2 L16

C565 SCD1U10V2KX-4GP

1D5V_S3

1

2Do Not Stuff

AXF

24mA 139.2mAC570 SCD1U10V2KX-4GP

C208

C242

C247

M_VCCA_MPLL

A CK

120ohm 100MHz 2nd = 68.00248.061

3D3V_S0_DAC

SM CK

VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK

BF21 BH20 BG20 BF20

2

2

2

C572

1D05V_S0 L15B

AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25 AL25 AM24 AL24 AM23 AL23

VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF

SC10U6D3V5MX-3GP 2 1

SCD1U10V2KX-4GP

VCC_AXF VCC_AXF VCC_AXF

2

2

2

1

B22 B21 A21

200mAC286 C286 C295

DIS

2

1

1

1

SC10U6D3V5MX-3GP

SC2D2U6D3V3MX-1-GP

SCD1U10V2KX-4GP SCD1U10V2KX-4GP

1

1

1D8V_S3

119mA1 K47 C35 B35 A35 V48 U48 V47 U47 U46 AH48 AF48 AH47 AG47C193 SCD1U10V2KX-4GP 3D3V_S0

TV

2

1

220ohm 100MHz 68.00217.521 2nd = 68.00084.A81

C568 SCD1U10V2KX-4GP

VCC_HV VCC_HV VCC_HV VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_DMI VCC_DMI VCC_DMI VCC_DMI

HV

2

1

HDA

1D5V_S0

A32 1C191

VCC_HDA

1D05V_S0 SC10U6D3V5MX-3GP

1782mA1C213

2

2

1

2 FCM1608CF-221T02-GP

1D05V_RUN_PEGPLL

1 R366 2 0R0402-PAD

3D3V_S0_DAC_1

B24 A24

VCC_TX_LVDS VCCA_TV_DAC VCCA_TV_DAC

1

SC1KP50V2KX-1GP C197

SC1U10V3KX-3GP C207 C207

106mA

UMA

UMA

B

SC4D7U6D3V3KX-GP

SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP C224

PEG

1

1

UMA1D5V_S0 1D05V_S0

1D5V_S0 1D5VRUN_QDAC

2

M25 L28 AF1

VCCD_TVDAC VCCD_QDAC VCCD_HPLL VCCD_PEG_PLL VCCD_LVDS VCCD_LVDS

D TV/CRT

C583

C233

2

2

2

2

1

SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP

1

1

1

1

1

1

C579 C202 SCD1U10V2KX-4GP

1

58.7mAC205 Do Not Stuff

157.2mAC227

DMI

1D05V_S0

1D05V_RUN_PEGPLL SCD1U10V2KX-4GP

AA47 M38 L37

456mAC586 VTTLF1 VTTLF2 VTTLF3 C228 SCD47U6D3V2KX-GP C201 SCD47U6D3V2KX-GP C190 SCD47U6D3V2KX-GP

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C246

C585

DY

VTTLF

LVDS

2

2

2

2

2

VTTLF VTTLF VTTLF

L4

1D8V_S3

CANTIGA-GM-GP-U-NF

71.CNTIG.00U1C203 SC10U6D3V5MX-3GP

1 2

1 2

1 2

1A

2 1

1D5VRUN_QDAC

68.00206.041PBY160808T-181Y-GP C209 SCD01U16V2KX-3GP

1

60.3mAC198 SCD1U10V2KX-4GP

2

50mA

2

A8 L1 AB2

C200 SCD1U10V2KX-4GP

A

1

2nd = 68.00214.101 180ohm 100MHz

UMA2

UMA

2

2

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

2

Cantiga (5 of 6)Size Document Number Rev

JM70-MVDate: Saturday, December 20, 20085 4 3 2

SB10 of 55

Sheet1

5

4

3

2

1

NB1I

9 OF 10

NB1J

10 OF 10

D

C

www.kythuatvitinh.comVSS VSSBA16 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AU16 AN16 N16 K16 G16 E16 BG15 AC15 W15 A15 BG14 AA14 C14 BG13 BC13 BA13 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1 U24 U28 U25 U29 AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17 BH48 BH1 A48 C1 A3 E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

B

A

AU48 AR48 AL48 BB47 AW47 AN47 AJ47 AF47 AD47 AB47 Y47 T47 N47 L47 G47 BD46 BA46 AY46 AV46 AR46 AM46 V46 R46 P46 H46 F46 BF44 AH44 AD44 AA44 Y44 U44 T44 M44 F44 BC43 AV43 AU43 AM43 J43 C43 BG42 AY42 AT42 AN42 AJ42 AE42 N42 L42 BD41 AU41 AM41 AH41 AD41 AA41 Y41 U41 T41 M41 G41 B41 BG40 BB40 AV40 AN40 H40 E40 AT39 AM39 AJ39 AE39 N39 L39 B39 BH38 BC38 BA38 AU38 AH38 AD38 AA38 Y38 U38 T38 J38 F38 C38 BF37 BB37 AW37 AT37 AN37 AJ37 H37 C37 BG36 BD36 AK15 AU36

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

BG21 L12 AW21 AU21 AP21 AN21 AH21 AF21 AB21 R21 M21 J21 G21 BC20 BA20 AW20 AT20 AJ20 AG20 Y20 N20 K20 F20 C20 A20 BG19 A18 BG17 BC17 AW17 AT17 R17 M17 H17 C17

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

D

C

VSS NCTF

AN13 AJ13 AE13 N13 L13 G13 E13 BF12 AV12 AT12 AM12 AA12 J12 A12 BD11 BB11 AY11 AN11 AH11 Y11 N11 G11 C11 BG10 AV10 AT10 AJ10 AE10 AA10 M10 BF9 BC9 AN9 AM9 AD9 G9 B9 BH8 BB8 AV8 AT8

B

NCTF TEST PIN: A3,C1,A48,BH1,BH48

VSS SCB

NCTF_VSS_SCB#BH48 NCTF_VSS_SCB#BH1 NCTF_VSS_SCB#A48 NCTF_VSS_SCB#C1 NCTF_VSS_SCB#A3 NC#E1 NC#D2 NC#C3 NC#B4 NC#A5 NC#A6 NC#A43 NC#A44 NC#B45 NC#C46 NC#D47 NC#B47 NC#A46 NC#F48 NC#E48 NC#C48 NC#B48

NC

A

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

Cantiga (6 of 6)Size Document Number Rev

JM70-MVDate: Saturday, December 20, 20085 4 3 2

SB11 of 55

Sheet1

5

4

3

2

1

C470

1

2SC6P50V2CN-1GP

RTC_X1

2008.12.15 SB3 4 1R297 10MR2J-L-GP 3D3V_AUX_S5 D18

2 3D

RTC_AUX_S5 SC1U16V3ZY-GP

X3 X-32D768KHZ-34GPU

2

1

1

2

D

1RTC_BAT_R BAS40CW-GP

C474

1

RTC1

83.00040.E81 2nd = 83.00040.K81 RN452 1

2 C464

2nd = 82.30001.B21 82.30001.661RTC_X2 RTC_RST# SRTC_RST# INTRUDER#

2

SB1A

1 OF 6

LPC_LAD[0..3]

LPC_LAD[0..3]

39,40

PWR GND NP1 NP2

2

1

1

RTC_BAT 1 2 1 R235 1KR2J-1-GP 2 NP1 C371 NP2 DY

G96 GAP-OPEN

SRN20KJ-GP-U 3 4 1 2 R332 1MR2J-1-GP C489 SC1U16V3ZY-GP

SC6P50V2CN-1GP

C23 C24 A25 F20 C22 B22 A22 E25 C13

RTCX1 RTCX2

RTC LPC

RTCRST# SRTCRST# INTRUDER# INTVRMEN LAN100_SLP GLAN_CLK LAN_RSTSYNC LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3 FWH4/LFRAME# LDRQ0# LDRQ1#/GPIO23 A20GATE A20M#

K5 K4 L6 K2 K3 J3 J1 N7 AJ27 AJ25 AE23

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME# 39,40

1D05V_S0

1D05V_S0

1

1

C479 SC1U16V3ZY-GP

2

INTVRMEN LAN100_SLP

2

2

2

62.70001.011

KA20GATE 39 H_A20M# 4 H_DPRSTP# H_DPRSTP# 4,7,51 H_DPSLP# 4 RN51

C

www.kythuatvitinh.comF14 G13 D14 D13 D12 E13 B10 B28 B27

H_DPRSTP# H_PWRGD

1

LAN / GLAN CPU

DPRSTP# DPSLP#

FERR#

AJ26

H_FERR#_R

1 2

4 3

H_FERR# 4

GLAN_COMP place within 500 mil of ICH9M1D5V_S0

CPUPWRGD

AD22

H_PWRGD

H_PWRGD 4,44 H_IGNNE# 4 H_INIT# 4 H_INTR 4 KBRCIN# 39

SRN56J-4-GP

close to SB1EC58 1 2 SC12P50V2JN-3GP R391 1

IGNNE# INIT# INTR RCIN# NMI SMI#

AF25

QC = 66.49R96.04L

GLAN_DOCK#/GPIO56 GLAN_COMPI GLAN_COMPO HDA_BIT_CLK HDA_SYNC HDA_RST#

1 R340

2 GLAN_COMP 24D9R2F-L-GPACZ_BIT_CLK ACZ_SYNC_R ACZ_RST#_R

AE22 AG25 L3 AF23 AF24

2

BAT-CON2-1-GP-U

1D05V_S0

R386 Do Not Stuff

1R368 Do Not Stuff

3D3V_S0

IHDA

3D3V_S0

R396 MEDIA_LED#_1

HDD 2nd HDD

SATA

Do Not Stuff Do Not Stuff

DY

DY

C

34 ACZ_BTCLK_MDC 7 ACZ_BIT_CLK 7 ACZ_SYNC_R

2 33R2J-2-GP

AF6 AH4 AE7

H_NMI 4 H_SMI# 4

1D05V_S0

7 ACZ_RST#_R

STPCLK#

AH27

H_STPCLK# 4

R136 1 2 56R2J-4-GP

30 ACZ_SDATAIN0 34 ACZ_SDATAIN1 18 ACZ_SDIN2 7 ACZ_SDIN3 7 ACZ_SDATAOUT_R AFTE14P-GP TP174 42,54 MEDIA_LED# ACZ_SDATAOUT_R HDA_DOCK_RST#

AF4 AG4 AH3 AE5 AG5 AG7 AE8 AG8SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0 SATA_RXN1 SATA_RXP1 SATA_TXN1 SATA_TXP1

THRMTRIP# PECI

AG26

H_THERMTRIP_R

1

HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3 HDA_SDOUT

2 R135 Do Not Stuff

QC = 64.49R95.6DL

PM_THRMTRIP-A# 4,7,44

AG27 AH11 AJ11 AG12 AF12 AH9 AJ9 AE10 AF10 AH18 AJ18 AJ7 AH7SATARBIAS CLK_PCIE_SATA# 3 CLK_PCIE_SATA 3 SATA_RXN4_C SATA_RXP4_C SATA_TXN4_C SATA_TXP4_C

DYSATA_RXN4_C SATA_RXP4_C SATA_TXN4_C SATA_TXP4_C SATA_RXN5 SATA_RXP5 SATA_TXN5 SATA_TXP5 24 24 24 24 25 25 25 25

Layout note: R373 needs to placed within 2" of ICH9, R379 must be placed within 2" of R373 w/o stub

1

1 R390

DY

HDA_DOCK_EN# 2 Do Not Stuff

HDA_DOCK_EN#/GPIO33 HDA_DOCK_RST#/GPIO34 SATALED# SATA0RXN SATA0RXP SATA0TXN SATA0TXP SATA1RXN SATA1RXP SATA1TXN SATA1TXPICH9M-GP-NF

SATA4RXN SATA4RXP SATA4TXN SATA4TXP SATA5RXN SATA5RXP SATA5TXN SATA5TXP SATA_CLKN SATA_CLKP SATARBIAS# SATARBIAS

ESATA ODD

1 R392

2

MEDIA_LED#_1 22 22 22 22 23 23 23 23

100R2J-2-GP

AJ16 AH16 AF17 AG17 AH13 AJ13 AG14 AF14

1 2 10KR2J-3-GP

2 24D9R2F-L-GP

1 R380B

B

Place within 500 mils of ICH9 ball

71.ICH9M.00URN54 18,30,34 ACZ_RST# 18,30,34 ACZ_SDATAOUT 18,30,34 ACZ_SYNC 18,30 ACZ_BITCLK

RTC_AUX_S5

RTC_AUX_S5

1 2 3 4

8 7 6 5SRN33J-7-GP

ACZ_RST#_R ACZ_SDATAOUT_R ACZ_SYNC_R ACZ_BIT_CLK

1

R319 330KR2F-L-GP

1R316 330KR2F-L-GP

integrated VccSus1_05,VccSus1_5,VccCL1_52INTVRMEN R323 Do Not Stuff

2

LAN100_SLP R87 Do Not Stuff

INTVRMEN LAN100_SLP

High=Enable High=Enable

Low=Disable Low=Disable

1

1

integrated VccLan1_05VccCL1_05

DY2

DY2

UMAA A

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number

ICH9-M (1 of 4) JM70-MVSheet1

Rev

SB12 of 55

Date: Saturday, December 20, 20085 4 3 2

5

4

3

2

1

SB1C SB1B D11 C8 D9 E12 E9 C9 E10 B7 C7 C5 G11 F8 F11 E7 A3 D2 F10 D5 D10 B3 F7 C3 F3 F4 C1 G7 H7 D1 G5 H6 G1 H3 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 2 OF 6 REQ0# GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55 C/BE0# C/BE1# C/BE2# C/BE3# IRDY# PAR PCIRST# DEVSEL# PERR# PLOCK# SERR# STOP# TRDY# FRAME# PLTRST# PCICLK PME# F1 G4 B6 A7 F13 F12 E6 F6 D8 B4 D6 A5 D3 E3 R1 C6 E4 C2 J4 A4 F5 D7 PCI_IRDY# PCI_REQ#0 PCI_GNT#0 PCI_REQ#1 PCI_GNT#1 PCI_REQ#2 PCI_GNT#2 PCI_REQ#3 PCI_GNT#3 15,28,36,37 SMB_CLK 15,28,36,37 SMB_DATA G16 A13 SMB_LINK_ALERT# E17 C17 B18 PM_RI# TP173 AFTE14P-GP DBRESET# 7 PM_SYNC# SMB_ALERT# 3 PM_STPPCI# 3 PM_STPCPU# 39 PM_CLKRUN# 28,36 PCIE_WAKE# 39 INT_SERIRQ 38 THRM# 18,38,51 VGATE_PWRGD 1 R89 10KR2J-3-GP 10KR2J-3-GP 39 EC_TMR 39 ECSCI#_1 39 ECSWI# PSW_CLR# 1 F19 R4 G19 M6 A17 A14 E19 L4 E20 M5 AJ23 D21 SMBCLK SMBDATA LINKALERT#/GPIO60/CLGPIO4 SMLINK0 SMLINK1 RI# SUS_STAT#/LPCPD# SYS_RESET# PMSYNC#/GPIO0 SMBALERT#/GPIO11

3 OF 6 SRN10KJ-6-GP SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37 CLK14 CLK48 SUSCLK SLP_S3# SLP_S4# SLP_S5# S4_STATE#/GPIO26 AH23 AF19 AE21 AD20 H1 AF3 P1 C16 E16 G17 C10 G20 M2 B13 R3 D20 D22 R5 R6 B16 RSMRST#_SB 2 PM_DPRSLPVR_1 PM_BATLOW#_R PWRBTN#_ICH PWROK 7,38 R117 2 100R2J-2-GP 1 R118 1 2 DY Do Not Stuff D19 BAS16-1-GP 1 3 PM_DPRSLPVR 7,51 SATA0GP SATA1GP ICH_GPIO36 ICH_GPIO37 CLK_ICH14 3 CLK48_ICH 3 PM_SUS_CLK 38 PM_SLP_S3# 18,31,36,38,39,44,47,48 PM_SLP_S4# 10,36,39,44,47,49D

PCI

1 1

TP71 AFTE14P-GP

SMB

SATA GPIO

5 6 7 8 RN55

4 3 2 1

D

PCI_GNT#0 and SPI_CS1# have weak internal Pull up

SYS GPIO Power MGT

STP_PCI# STP_CPU# CLKRUN# WAKE# SERIRQ THRM# VRMPWRGD SST TACH1/GPIO1 TACH2/GPIO6 TACH3/GPIO7 GPIO8 LAN_PHY_PWR_CTRL/GPIO12 ENERGY_DETECT/GPIO13 TACH0/GPIO17 GPIO18 GPIO20 SCLOCK/GPIO22 GPIO27 GPIO28 SATACLKREQ#/GPIO35 SLOAD/GPIO38 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48 GPIO49 GPIO57/CLGPIO5 SPKR MCH_SYNC# TP3 PWM0 PWM1 PWM2

Clocks

PWROK DPRSLPVR/GPIO16 BATLOW# PWRBTN# LAN_RST# RSMRST# CK_PWRGD CLPWROK SLP_M#

PCI_DEVSEL# PCI_PERR# PCI_LOCK# PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME# PLT_RST#_R 1 R341 2 PLT_RST1# 7,18,28,36,37,39,40 0R2J-2-GP C14 1 2 C491 DY Not Stuff Do D4 R2 PCLK_ICH 3 ICH_PME# TP110 AFTE14P-GP 1

3D3V_S0

PM_PWRBTN# 39,54

DY 2 ICH_TP7Do Not Stuff

A20 AG19 AH21 AG21 A21 C12 C21 AE18 K1 AF8 AJ22 A9 D19 L1 AE19 AG22 AF21 AH24 A8

2nd = 83.00016.F11 / 83.00016.G113D3V_S0

R372

CLK_PWRGD 3 PWROK 7,38

2

C

PCI_PERR# INT_PIRQE# PCI_LOCK# INT_PIRQA# 3D3V_S0

1 2 3 4 5

10 9 8 7 6

INT_PIRQH# PCI_REQ#0 INT_PIRQC# INT_PIRQB#

3D3V_S0

PCI_REQ#3 INT_PIRQF# INT_PIRQG# PCI_SERR#

3D3V_S0

1 2 3 4 5

10 9 8 7 6

INT_PIRQD# PCI_IRDY# PCI_TRDY# ECSCI#_1

3D3V_S0

30 ACZ_SPKR 7 MCH_ICH_SYNC#

SRN8K2J-2-GP-U RP3 PCI_REQ#2 PCI_REQ#1 PM_CLKRUN# 3D3V_S0 28 28 28 28 37 37 37 37 37 37 37 37 1 2 3 4 5

SRN8K2J-2-GP-U

M7 AJ24 B21 AH20 AJ20 AJ21

GPIO24/MEM_LED GPIO10/SUS_PWR_ACK GPIO14/AC_PRESENT GPIO9/WOL_EN

A16 C18 SUSPWRACK C11 AC_PRESENT ICH_GPIO91 C20 1 100KR2J-1-GP R88

TP70 AFTE14P-GP

10 9 8 7 6

INT_SERIRQ PCI_DEVSEL# PCI_STOP# PCI_FRAME#

3D3V_S0

71.ICH9M.00U3D3V_S5 SB1D 4 OF 6 RP1 TXN1 TXP1 DMI0RXN DMI0RXP DMI0TXN DMI0TXP DMI1RXN DMI1RXP DMI1TXN DMI1TXP DMI2RXN DMI2RXP DMI2TXN DMI2TXP DMI3RXN DMI3RXP DMI3TXN DMI3TXP V27 V26 U29 U28 Y27 Y26 W29 W28 AB27 AB26 AA29 AA28 AD27 AD26 AC29 AC28 T26 T25 AF29 AF28 AC5 AC4 AD3 AD2 AC1 AC2 AA5 AA4 AB2 AB3 AA1 AA2 W5 W4 Y3 Y2 W1 W2 V2 V3 U5 U4 U1 U2 DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0 DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1 DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2 DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 1D5V_S0 1 ACZ_SPKR R133 24D9R2F-L-GP 2 PWROK 1 R361 2 Do Not Stuff RN48 1 2 4 3 SRN10KJ-5-GP USB_OC#1 PM_BATLOW#_R ECSWI# USB_OC#0 3D3V_S5 1 2 3 4 5 SRN10KJ-L3-GP 10 9 8 7 6

2

ICH9M-GP-NF

2

1

RP2

www.kythuatvitinh.comG97 GAP-OPEN

MISC GPIO Controller Link

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

J5 E1 J6 C4

Interrupt I/F

PIRQA# PIRQB# PIRQC# PIRQD#

PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

H4 K6 F2 G2

INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH#

CL_CLK0 CL_CLK1

F24 B19

CL_CLK0 7

R335 3K24R2F-GP 2 1

CL_DATA0 CL_DATA1 CL_VREF0 CL_VREF1

F22 C19 C25 A19

CL_DATA0 7

2

CL_VREF0_ICH

1

ICH9M-GP-NF

1

RP4

Direct Media Interface

LAN

SRN8K2J-2-GP-U PCIE_RXN1 PCIE_RXP1 C188 SCD1U10V2KX-5GP 2 PCIE_TXN1 C187 SCD1U10V2KX-5GP 2 PCIE_TXP1 PCIE_RXN2 PCIE_RXP2 PCIE_TXN2 PCIE_TXP2 PCIE_RXN3 PCIE_RXP3 PCIE_TXN3 PCIE_TXP3

1 1

N29 N28 P27 P26 L29 L28 M27 M26 J29 J28 K27 K26 G29 G28 H27 H26 E29 E28 F27 F26 C29 C28 D27 D26 D23 D24 F23 D25 E23

3D3V_S5 USB_OC#5 SMB_LINK_ALERT# SUSPWRACK SMB_ALERT# RN18 USB_OC#11 USB_OC#10 USB_OC#8 USB_OC#9 8 7 6 5 SRN10KJ-6-GP

PERN1 PERP1 PETN1 PETP1 PERN2 PERP2 PETN2 PETP2

C186 SCD1U10V2KX-5GP 2 C180 SCD1U10V2KX-5GP 2

1 1

TXN2 TXP2

MINICARD1B

PCI-Express

C179 SCD1U10V2KX-5GP 2 C178 SCD1U10V2KX-5GP 2

1 1

TXN3 TXP3

MINICARD2 2008.12.14 SB36 36 36 36 PCIE_RXN5 PCIE_RXP5 PCIE_TXN5 PCIE_TXP5 C177 Do Not Stuff C174 Do Not Stuff 2 2

TV_tuner TV_tuner

PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP4 PERN5 PERP5 PETN5 PETP5 PERN6/GLAN_RXN PERP6/GLAN_RXP PETN6/GLAN_TXN PETP6/GLAN_TXP

No Reboot Strap SPKR LOW = Defaule High=No Reboot3D3V_S0

RP5 USB_OC#2 USB_OC#7 PM_RI# PCIE_WAKE# 3D3V_S5 1 2 3 4 5 SRN10KJ-L3-GP 10 9 8 7 6

3D3V_S5 USB_OC#4 DBRESET# USB_OC#3 USB_OC#6

C493 SCD1U10V2KX-4GP 2

71.ICH9M.00U

CL_RST0# CL_RST1#

F21 D18

CL_RST#0 7

R334 453R2F-1-GP

C

3D3V_S5

1 2 3 4

B

DY

1 1

TXN5 TXP5

DMI_CLKN DMI_CLKP

CLK_PCIE_ICH# 3 CLK_PCIE_ICH 3 DMI_IRCOMP_R USBPN0 USBPP0 USBPN1 USBPP1 USBPN2 USBPP2 USBPN3 USBPP3 USBPN4 USBPP4 USBPN5 USBPP5 USBPN6 USBPP6 USBPN7 USBPP7 25 25 27,54 27,54 27,54 27,54 37 37 19,54 19,54 36 36 41,54 41,54 26,54 26,54

NEW CARD

NEW NEW

DMI_ZCOMP DMI_IRCOMP

3D3V_S5 1 2 RN44 SRN10KJ-5-GP

2008.12.14 SBSPI_ICH_CS1#

27,54 USB_OC#1

A

These R need close SB within 600 mils27 USB_OC#9

USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

N4 N5 N6 P6 M1 N2 M4 M3 N3 N1 P5 P3

USB_RBIAS_PN AG2 AG1 2 1 R134 22D6R2F-L1-GP

USBP0N USBP0P USBP1N USBP1P SPI_CLK USBP2N SPI_CS0# USBP2P SPI_CS1#/GPIO58/CLGPIO6 USBP3N USBP3P SPI_MOSI USBP4N SPI_MISO USBP4P USBP5N OC0#/GPIO59 USBP5P OC1#/GPIO40 USBP6N OC2#/GPIO41 USBP6P OC3#/GPIO42 USBP7N OC4#/GPIO43 USBP7P OC5#/GPIO29 USBP8N OC6#/GPIO30 USBP8P OC7#/GPIO31 USBP9N OC8#/GPIO44 USBP9P OC9#/GPIO45 USBP10N OC10#/GPIO46 USBP10P OC11#/GPIO47 USBP11N USBP11P USBRBIAS USBRBIAS#

USB Pair 0 1 2 3 4 5 6 7 8 9 10 11 Device USB2 USB3 USB4 MINIC1 WEBCAM NEW1 FP Bluetooth NC USB1 MINIC2 Cardreader

4 3 D17 1

AC_PRESENT RSMRST#_SB

SPI

BOOT BIOS Strap PCI_GNT#0 SPI_CS#1 BOOT BIOS Location

39 RSMRST#_KBC

1 2 2

3

R284 100KR2J-1-GP

USB

BAT54-5-GP

A16 swap override strap PCI_GNT#3

0 1 1

1 0 1

SPI PCI LPC(Default)

83.BAT54.D81UMA

2nd = 83.00054.Z81

A

USBPN9 27 USBPP9 27 USBPN10 37 USBPP10 37 USBPN11 35 USBPP11 35

low = A16 swap override enable high = defaultDo Not Stuff 2

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number

PCI_GNT#0

ICH9M-GP-NF

1 R358 SPI_ICH_CS1# 1 R355 PCI_GNT#3 1 R353

DY DY DY

Do Not Stuff 2 Do Not Stuff 2

ICH9-M (2 of 4) JM70-MV1

Rev

71.ICH9M.00U5 4 3

SB13 of 55

Date: Saturday, December 20, 20082

Sheet

5

4

3

2

1

RTC_AUX_S5

SB1F

6 OF 6 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCCDMIPLL VCCDMI VCCDMI A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18 R29 W23 Y23 AB23 AC23 Layout Note: Place near ICH9M 1D05V_S0

6uA in G3C475 SCD1U10V2KX-4GP 1 V5REF_S0 V5REF_S5 2

A23 A6 AE1 AA24 AA25 AB24 AB25 AC24 AC25 AD24 AD25 AE25 AE26 AE27 AE28 AE29 F25 G25 H24 H25 J24 J25 K24 K25 L23 L24 L25 M24 M25 N23 N24 N25 P24 P25 R24 R25 R26 R27 T24 T27 T28 T29 U24 U25 V24 V25 U23 W24 W25 K23 Y24 Y25 AJ19 AC16 AD15 AD16 AE15 AF15 AG15 AH15 AJ15 AC11 AD11 AE11 AF11 AG10 AG11 AH10 AJ10 AC9 AC18 AC19 AC21 G10 G9 AC12 AC13 AC14

VCCRTC V5REF V5REF_SUS VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B

C476 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

1

1.16A1 1 1 C512 SCD1U10V2KX-4GP C511 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

2

C503

1 2

C519 SC10U6D3V5MX-3GP

2

2

1D5V_S0

646mAC501 SC2D2U10V3KX-1GP 1 2

1

1

C170 SC10U6D3V5MX-3GP

C535 SC10U6D3V5MX-3GP

C515 SC10U6D3V5MX-3GP

1

D

2

D

2

2

2

1D5V_DMIPLL_ICH_S0 1 1 C520 SCD01U16V2KX-3GP

1D5V_S0 L13 1 2 IND-1D2UH-10-GP C518 SC10U6D3V5MX-3GP 1D05V_S0

23mA

68.1R220.10D 2nd = 68.1R220.10B

CORE

2

1

C516

1

C528 SC4D7U6D3V3KX-GP 1D05V_S0

*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail

2

1

1

2

2

2

2

2mAV5REF_S0C

D7 RB751V-40-2-GP

R93 100R2J-2-GP

VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3

1

83.R2004.B8F 2nd = 83.R0304.A8F2

68.1R220.10D C212 2nd = 68.1R220.10BSC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

1

2

C211 SC1U16V3ZY-GP SC1U16V3ZY-GP

AC10

2

3D3V_S0 1

VCCP_CORE

Layout Note: Place near ICH9

3D3V_S5 A

5V_S5 1

2mAK V5REF_S5 1

D9 RB751V-40-2-GP 2

R131 100R2J-2-GP 1D5V_S0

PCI

VCCHDA VCCSUSHDA VCCSUS1_05 VCCSUS1_05

AJ4 AJ3

VCCHDA_ICH VCCSUSHDA_ICH

2

B9 F9 G3 G6 J2 J7 K7

2

1

1

C492 SCD1U10V2KX-4GP

C505 SCD1U10V2KX-4GP

1

C495 SCD1U10V2KX-4GP

2

C151 SCD1U16V2ZY-2GP

AD19 AF20 AG24 AC20

VCC3_3=308mA3D3V_S0

K

1

C546

2

L5 1 2 IND-1D2UH-10-GP

VCC3_3

1

1

AG29 AJ6

C533 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

C513 SCD1U10V2KX-4GP

1

3D3V_S0 A

www.kythuatvitinh.com47mA5V_S0 1 1D5V_S0 1D5V_APLL_S0 V_CPU_IO V_CPU_IO

2

2

C552 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

SCD1U10V2KX-4GP SCD1U10V2KX-4GP

41mA 2mA

3D3V_S0

C527 SC4D7U6D3V3KX-GP

C539

2

2

2

1

VCCA3GP

C

SCD1U10V2KX-4GP

32mA

DIS

2

C551 SCD1U10V2KX-4GP

R379 1

1 R140 Do Not Stuff 0R2J-2-GP 2

3D3V_S0 1D5V_S0

UMA

83.R2004.B8F 2nd = 83.R0304.A8F

1.64A1 1 1 C526 SC1U16V3ZY-GP 2 2 C541 SC1U16V3ZY-GP 2 C545 SC1U16V3ZY-GP

VCCSATAPLL VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCCUSBPLL VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCCLAN1_05 VCCLAN1_05 VCCLAN3_3 VCCLAN3_3 VCCGLANPLL GLAN POWER VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5 VCCGLAN3_3 ICH9M-GP-NF USB CORE VCCPUSB

32mA1 C210 SCD1U10V2KX-4GP

Do Not Stuff2

DIS

1 R144

3D3V_S5

C195 SCD1U16V2ZY-2GP

AC8 TP_VCCSUS1D05V_ICH_1 F17 1 AD8 1 2 F18 A18 D16 D17 E22 AF1 T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7 G22 G23 A24 B24 VCCSUS1D5V_INT_ICH

R143 1

2 0R2J-2-GP 1D5V_S5

VCCSUS1_5 VCCSUS1_5 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCCL1_05 VCCCL1_5 VCCCL3_3 VCCCL3_3

2

C509 SCD1U10V2KX-4GP

2

C529 SCD1U10V2KX-4GP

UMA

VCCPSUS

1

C497

2

B

2

1

2

1

1

1

C496

C498

C499

1

BC2 2

2

2

2

74.09198.B7F 2nd = 74.09091.I3F

1D5V_S0

1

USBPLL=11mA1 1 1 C538 SCD1U10V2KX-4GP C537 SCD1U10V2KX-4GP SCD1U10V2KX-4GP C532 SCD1U10V2KX-4GP SCD1U10V2KX-4GP 2 2 2

AJ5 AA7 AB6 AB7 AC6 AC7

VCCCL1D05V_INT_ICH VCCCL1D5V_INT_ICH SCD1U10V2KX-4GP SCD1U10V2KX-4GP 1 C506 1 C504

C507

3D3V_S0

3D3V_S0

19mA in S0;78mA in S3/S4/S5C482 SCD1U10V2KX-4GP SCD1U10V2KX-4GP 1

C490

2

1D5V_S0 1 R90 2 0R0402-PAD

VCCLAN_1D05V_INT_ICH A10 A11 SCD1U10V2KX-4GP A12 B12 A27 D28 D29 E26 E27 3D3V_S0 A26

A

23mA1 C148 SC1U16V3ZY-GP 1 SC10U6D3V5MX-3GP C147 2 2

2

1

19mA

2

2

2

2

RT9198-15PBR-GP

SC22U6D3V6KX-1GP

BC1

1

ARX ATX

2008.11.27 SB

3D3V_S5

SCD1U10V2KX-4GP SCD1U10V2KX-4GP

3D3V_S5 U22 1 2 3 SC1U16V3ZY-GP VIN GND EN/EN# VOUT NC#4 5 SC1U16V3ZY-GP 4 1D5V_S5B

212mA3D3V_S5SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP

C219

SCD1U10V2KX-4GP

1D5VGLANPLL_ICH

A

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

1D5V_S0 SCD1U10V2KX-4GP

80mA1 1 C483 SC4D7U6D3V3KX-GP C543 2 2

1mA4

ICH9-M (3 of 4)Size Document Number Rev

71.ICH9M.00U

JM70-MVDate: Saturday, December 20, 20083 2

SB14 of 55

Sheet1

5

A

B

C

D

E

SB1E

5 OF 6

4

3

www.kythuatvitinh.com3D3V_S5 3D3V_S0

2

1

AA26 AA27 AA3 AA6 AB1 AA23 AB28 AB29 AB4 AB5 AC17 AC26 AC27 AC3 AD1 AD10 AD12 AD13 AD14 AD17 AD18 AD21 AD28 AD29 AD4 AD5 AD6 AD7 AD9 AE12 AE13 AE14 AE16 AE17 AE2 AE20 AE24 AE3 AE4 AE6 AE9 AF13 AF16 AF18 AF22 AH26 AF26 AF27 AF5 AF7 AF9 AG13 AG16 AG18 AG20 AG23 AG3 AG6 AG9 AH12 AH14 AH17 AH19 AH2 AH22 AH25 AH28 AH5 AH8 AJ12 AJ14 AJ17 AJ8 B11 B14 B17 B2 B20 B23 B5 B8 C26 C27 E11 E14 E18 E2 E21 E24 E5 E8 F16 F28 F29 G12 G14 G18 G21 G24 G26 G27 G8 H2 H23 H28 H29

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NCTF TEST PIN: A1,A2,B1,A28,A29,B29 AH1,AJ1,AJ2,AH29,AJ28,AJ29

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25 A1 A2 B1 A29 A28 B29 AJ1 AJ2 AH1 AJ28 AJ29 AH29

4

3

8 7 6 5 1 2 3 4

SRN4K7J-10-GP

RN43

3D3V_S0

Q19 13,28,36,37 SMB_CLK

3 2 1

4 5 6 2N7002DW-1-GP

SMBC_ICH 3,16,172

13,28,36,37 SMB_DATA

2nd = 84.27002.C3F

SMBD_ICH 3,16,17

SMBUS

NCTF_VSS#A1 NCTF_VSS#A2 NCTF_VSS#B1 NCTF_VSS#A29 NCTF_VSS#A28 NCTF_VSS#B29 NCTF_VSS#AJ1 NCTF_VSS#AJ2 NCTF_VSS#AH1 NCTF_VSS#AJ28 NCTF_VSS#AJ29 NCTF_VSS#AH29

1 1 1 1 1 1 1 1 1 1 1 1

TP76 TP72 TP80 TP75 TP74 TP79 TP144 TP145 TP142 TP148 TP143 TP141

AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP Title

1

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

ICH9-M (4 of 4)Size Document Number Rev

ICH9M-GP-NF

71.ICH9M.00UA B C D

JM70-MVDate: Saturday, December 20, 2008 SheetE

SB15 of 55

A

B

C

D

E

DDR3 SOCKET_1

4

4

DM1 8 M_A_A[14..0] M_A_A0 98 M_A_A1 97 M_A_A2 96 M_A_A3 95 M_A_A4 92 M_A_A5 91 M_A_A6 90 M_A_A7 86 M_A_A8 89 M_A_A9 85 M_A_A10 107 M_A_A11 84 M_A_A12 83 M_A_A13 119 M_A_A14 80 1 M_A_A15 78 79

AFTE14P-GP TP157 8 M_A_BS#2 8 M_A_BS#0 8 M_A_BS#1

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2 BA0 BA1

NP1 NP2 RAS# WE# CAS# CS0# CS1# CKE0 CKE1 CK0 CK0# CK1 CK1# DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

NP1 NP2 110 113 115 114 121 73 74 101 103 102 104 11 28 46 63 136 153 170 187M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 M_A_RAS# 8 M_A_WE# 8 M_A_CAS# 8 M_CS0# 7 M_CS1# 7 M_CKE0 7 M_CKE1 7 M_CLK_DDR0 7 M_CLK_DDR#0 7 M_CLK_DDR1 7 M_CLK_DDR#1 7 M_A_DM[7..0] 8

1

1

3

www.kythuatvitinh.com8 M_A_DQ[63..0]

109 108 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 10 27 45 62 135 152 169 186 12 29 47 64 137 154 171 188 116 120 126 1 30 203 204

2

Layout NoteNear Pin 126DDR_VREF_S3_1

1

C350 Do Not Stuff C358 Do Not Stuff

1

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

SDA SCL

200 202 198

SMBD_ICH SMBC_ICH

SMBD_ICH 3,15,17 SMBC_ICH 3,15,17 PM_EXTTS#0 7,17

EVENT#

VDDSPD SA0 SA1

199

RN34

3D3V_S0

197 201

DDRA_SA0 DDRA_SA1

1 2

4 3

3

C344 SC2D2U6D3V2MX-GP

C345 SCD1U16V2ZY-2GP

NC#1 NC#2 NC#/TEST VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS


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