Acer Aspire One Ao521 - Quanta Zh9 - Rev 4a(1)

7/23/2019 Acer Aspire One Ao521 - Quanta Zh9 - Rev 4a(1)

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A A

B B

C C

D D

Size Document Number Rev

Date: Sheet of

Quanta Computer Inc.

PROJECT :

Block Diagram 4A

1 40Sunday

, March 28, 2010

ZH9Size Document Number Rev

Date: Sheet of


PROJECT :

Block Diagram 4A

1 40Sunday

, March 28, 2010


Date: Sheet of


PROJECT :

Block Diagram 4A

1 40Sunday

, March 28, 2010

ZH9

AMD ASB2 CPUGeneva

HyperTransport LINK

RS880M

P2~5

P6~9

ZH9 Block Diagram (AMD Nile Platform)

LVDS CONP16

UNBUFFEREDDDRIII SODIMM

P15

DDR III,800 MT/s

Channel AHDTP4

HyperTransport LINK0 CPU I/F

DX10 IGP

LVDS

1X16 PCIE I/F

1X4 PCIE I/F WITH SB

6X1 PCIE I/F

16x16

VGA CONP16

LVDS MUX

LAN-AR8152LP21

SB820MUSB2.0(14)+1.1(2)

SATA III(6 PORTS)

4X1 PCIE GEN2 I/F

PCI/PCI BDGE

INT. RTC

EC

HD AUDIO

LPC I/F

ACPI 1.1

P10~14

A-Link X4

BluetoothP18

USB 2.0

AZALIA CODECCX20672 P19

HD AUDIO I/F Headphone Jack

P19

MIC In Jack

Digital MIC

Speaker Header

Mobile 2.5" HDDP22

SATA II I/F

BATTERY CHAGERP26

NB COREP29

+1.8VP32

SYSTEM5V/3V PCU P27

DDR 1.5VSUSP30

Discharge/+2.5V/VDDR P33

AMD CPU CoreCPU_NB Core P28

+1.1V(VLDT) P31

PCIE GEN1

ChargerTouch Pad

EC

Keyboard SPI Flash

P25

P25P18 P18 P26

Winbond NPCE781L

USB PORTP20

USB PORTP20

USB PORTP20

CCDP16

5 IN1CARDREADER

P24LPC

PWM FAN

P4

CPUTHERMAL SENSOR

P4

(812 balls ; 27x27mm)

(21x21mm)

(23x23mm)

SIDE PORT MEMORY

SIDE PORTDDRIII 128MB

P6

DDRIIIHDMI CONP17

TMDS(PCIE 4x1)

SMBUS

DAC

INT. CLK

P23

WLAN/WiMAX

3GP23

SIM CARDP23

0

2

1

4

2

5

06731

(Left)(Lower Right) (Upper Right)

Thermal Protection

P34

K125 (Athlon SC) 12W HT1K325 (Athlon DC) 12W HT1

8

hexain

f@ho

tmail.co

m


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10/38


11/38


12/38


13/38 5 4 3 2 1


14/38

5 4 3 2 1

D D

C C

B B

A A

AD27AD26

AD25AD24AD23

ACZ_SDOUT

LPC_CLK1LPC_CLK0PCI_CLK4PCI_CLK3PCI_CLK2PCI_CLK1

EC_PWM2EC_PWM3

+3V_S5 +3V+3V +3V +3V_S5+3V_S5


Date: Sheet of


PROJECT :

SB820-STRAPS,PWRGD 5/5 4A

14 40Sunday, March 28, 2010


Date: Sheet of


PROJECT :




Date: Sheet of


PROJECT :



ZH9

DEBUG STRAPS

PCI_AD25 PCI_AD24

USE EEPROMPCIE STRAPS

USE DEFAULTPCIE STRAPS

DEFAULT

H, H =Reserved

ENABLE ILAAUTORUN

DISABLE ILAAUTORUN

DEFAULT

USE FCPLL

USE PCIPLL

DEFAULT

BYPASS FCPLL

PULLHIGH

DEFAULT

BYPASSPCI PLL

PCI_AD27 PCI_AD26

PULLLOW

PULLLOW

PULLHIGH

STANDARD STRAPS

SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]

EC_PWM3 EC_PWM2

DEFAULT

PCI_AD23

AZ_SDOUT

LOW POWERMODE

DEFAULT

PERFORMANCEMODE

DEFAULT

DEFAULT

DISABLE PCIMEM BOOT

ENABLE PCIMEM BOOT

LPC_CLK0

DEFAULT

LPC_CLK1

CLKGENENABLED

CLKGENDISABLED

ECK@DEFAULT

ECENABLED

ECDISABLED

non_FusionCLK MODE

PCI_CLK4

FUSIONCLK MODE

PCI_CLK3

IGNOREDEBUGSTRAPS

USEDEBUGSTRAPS

DEFAULT

PCI_CLK2

WatchdogTimer Enable

WatchdogTimer Disable

PCI_CLK1

PCIe Gen II

Not Applicable toSB820M--Leaveprovision for PD.

H, L=SPI ROM

L, H=LPC ROM

L, L=Reserved

internal have

pull Hi 10KPCICLK4:CPU/NB HT Clock SelectionThis strap is not used if the strap CLKGEN is

configured for external clock generator mode.

PCIe Gen I

ICK@DEFAULT ICK@DEFAULT

This is

required as

the low

power modeis not

supported on

the SB8xx.


15/38


16/38


17/38

5 4 3 2 1

KEYBOARD(KBC) BLUETOOTH(BTM)BT PWR LED

+3V

Change CP1~CP6 footprint from 8p4r-0402 to

8p4r-0402-smt for SMT open issue


18/38

5 4 3 2 1

D D

C C

B B

A A

MX7

MX5

MY13

MY0

MY3

MY5

MY8

MX2MX1MY10MY11MX0MY12

MY14MY15

MY2

MX6

MY1

MX4

MY4

MY6MY7

MX3MY9

BT_POWER

MX0

MX1

MY8

MX2MY9MX3

MX4MY2

MX6MX5MY0

MX7

MY1

MY3

MY10MY11

MY12

MY15

MY13MY14

MY4

MY7

MY5MY6

TP_L#

TP_L# TP_R#

TP_R#TPDATA_CNTPCLK_CN

MX7 MX6 MX5 MY0 MY1 MY2 MX4 MY3 MY4

MY5 MY6 MY7 MY8 MX3 MY9 MX2 MX1 MY10 MY11 MX0 MY12

MY14 MY15

MY13 BT_POWERON#

USBP5-USBP5+

TPCLK TPDATA

+3V

+5V

+5V

+5V_TP

+5V_TP


Date: Sheet of


PROJECT :

KB/BT/TP/LED/Power Connector 4A



Date: Sheet of


PROJECT :




Date: Sheet of


PROJECT :



ZH9

KEYBOARD(KBC)

TOUCH PAD(TPD)

BLUETOOTH(BTM)

0402 size

61mA

CX121T30001:3A/120ohm_8

CX08T121000:0.4A/120ohm_6

CX121T04000:0.4A/120ohm_6

3mA

T77H056.00 +3V

Reserve 0.1uF for USB P/N if trace


19/38


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26/38


27/38


28/38

5 4 3 2 1

VIN

+5VPCU

PR78PR78


29/38

5 4 3 2 1

D D

C C

B B

A A

LGATE-NB_CORE

UGATE-NB_CORE

PHASE-NB_CORE

NB_CORE_FB

NB_CORE_FB

MAINON

HWPG_NB_CORE

+NB_CORE_ON

+1.8V_ON25,30,32>

+3VSUS

+NB_CORE

+5VPCU


Date: Sheet of

Quanta Computer Inc.PROJECT :

NB_CORE(UP6111A) 4A



Date: Sheet of


NB_CORE(UP6111A) 4A



Date: Sheet of


NB_CORE(UP6111A) 4A


ZH9

TON=3.85p*RTON*Vout/(Vin-0.5)

Frequency=Vout/(Vin*TON)

TON=3.85p*1M*1/(Vin-0.5)

Frequency=1/(0.0036767)=272K

L(ripple current)

=(19-1)*1/(1u*272k*19)

~3.646A

13m*9.5=RILIM*20uARILIM=6.19K

0.95V/7.5A

Rds*OCP=RILIM*20uA

OCP: 9.5A

Rdson=13mOhm

R1

R2

VOUT=(1+R1/R2)*0.75

HI --- 0.95V

LOW ---1.1V

PQ40FDMC8296

PQ40FDMC8296

3

5

2

4

1

PC571U/10V_4PC571U/10V_4

PR902.2/F_6PR902.2/F_6

PC4933P/50V_4

PC4933P/50V_4

PR912.2/F_4PR912.2/F_4

PR66100/J_4PR66100/J_4

PR82*10K/F_4

PR82*10K/F_4

PC173*10U/25V_1206

PC173*10U/25V_1206

PU5UP6111AQDDPU5UP6111AQDD

EN/DEM15

TON16

VOUT1

VDD2

FB3

PGOOD4

GND6 PGND 7

LGATE 8

VDDP 9

OC 10

PHASE 11

UGATE 12

BOOT 13

NC5 TPAD 17

NC14

PC460.01U/25V_4

PC460.01U/25V_4

PQ7DMN601K-7

PQ7DMN601K-7

3

2

1

PC662200P/50V_4PC662200P/50V_4

+

PC69330U/2V_7343

+

PC69330U/2V_7343

PC540.1U/25V_4

PC540.1U/25V_4

PR79 *0/ shor t_6PR79 *0/ shor t_6

PC167

4.7U/25V_8

PC167

4.7U/25V_8

PC6710U/10V_8

PC6710U/10V_8

PQ8DMN601K-7

PQ8DMN601K-7

3

2

1

PQ41FDMC8884PQ41FDMC8884

3

5

2

4

1

PR78

10/F_4

PR78

10/F_4

PR69*0/J_4PR69*0/J_4

PC61

0.1U/50V_6

PC61

0.1U/50V_6

PC680.1U/50V_6

PC680.1U/50V_6

PR7010K/F_4

PR7010K/F_4

PR202

*10K/F_4

PR202

*10K/F_4

PR7710K/F_4PR7710K/F_4

PC580.1U/50V_6

PC580.1U/50V_6

PR762.67K/F_4PR762.67K/F_4

PR85

1/F_6

PR85

1/F_6

PD6RB500V-40PD6RB500V-40

PC501U/10V_4

PC501U/10V_4

PR68*100K/J_4

PR68*100K/J_4

1

2

PC604.7U/6.3V_6

PC604.7U/6.3V_6

PR84

10K/F_4

PR84

10K/F_4

PL111.0uH/11A_7X7X3

PL111.0uH/11A_7X7X3

PC134

2200P/50V_4

PC134

2200P/50V_4

PC52*1000P/50V_4

PC52*1000P/50V_4

PR7513K/F_4

PR7513K/F_4

PR811M/J_6PR811M/J_6

PR886.19K/F_4PR886.19K/F_4

hexain

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tmail.c

om

5 4 3 2 1

[PWM]

PC25PC25


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5 4 3 2 1

D D

C C

B B

A A

S5_1.8V

S3_1.8V

+1.5VSUS

+5VPCU

+5VPCU

+1.5VSUS

MAIND

MAIND

S5_1.8V S3_1.8V

+1.8V_D

+1.8V_D

MAINON

SUSON

HWPG_1.5V

MAIND

CPU_VDDIO_FB_H

+SMDDR_VTERM

+SMDDR_VREF

+1.8V_ON

+1.5VSUS

VIN

VIN

+3VPCU

+5VPCU

+1.5VSUS

+1.5V

+15VVIN_SRC +1.5V


Date: Sheet of


PROJECT :

DDR 1.5V(RT8207A) 4A



Date: Sheet of


PROJECT :




Date: Sheet of


PROJECT :



ZH9

FOR DDR III

(For RT8207A 400KHZ )

0.375A

0.08A

(10u*PR35)/Rdson+Delta_I/2=Iocp

13m*7=RILIM*10uA

RILIM=9.1K

L(ripple current)=(19-1.8)*1.8/(2.2u*400k*19)~1.03A

Rdson=13mOhm

1.5V/5.1A

OCP: 7A

R1

R2

VOUT=(1+R1/R2)*0.75

0.054A

4A

1/29 modify for sequence

PC164*4.7U/25V_8PC164*4.7U/25V_8

PC1282200P/50V_4PC1282200P/50V_4

PC131U/6.3V_4

PC131U/6.3V_4

1

2

PQ55DMN601K-7PQ55DMN601K-7

3

2

1


3

2

1

PR197

*1M/F_4

PR197

*1M/F_4

PR1722.2/F_4PR1722.2/F_4

PC230.1U/50V_6

PC230.1U/50V_6

PC274.7U/6.3V_6

PC274.7U/6.3V_6

PC32

10U/10V_8

PC32

10U/10V_8

PR198

1M/F_4

PR198

1M/F_4

PR200

*1M/F_4

PR200

*1M/F_4

PR48*0/short_4PR48*0/short_4

PR36620K/F_4PR36620K/F_4

PC141U/6.3V_4

PC141U/6.3V_4

1

2

PR3 0 9 .1 K/F_ 4PR3 0 9 .1 K/F_ 4

PR335.1/F_6PR335.1/F_6

PC26*33P/50V_4

PC26*33P/50V_4

PQ50*DTC144EUA

PQ50*DTC144EUA

1

3

2


PR50*0/J_4

PR50*0/J_4

PC2933N/25V_4

PC2933N/25V_4

PR54*0/J_4PR54*0/J_4

PC161*2.2n/50V_4PC161*2.2n/50V_4

PR491/F_6PR491/F_6

+

PC151

100u/25V_6X5.8

+

PC151

100u/25V_6X5.8

1

2

PR5110K/F_4

PR5110K/F_4

PC165*4.7U/25V_8PC165*4.7U/25V_8

PR2010/J_4PR2010/J_4

PU2RT8207A

PU2RT8207A

VTTGND1

VTTSNS2

GND3

MODE4

VTTREF5

COMP6

NC

7

VDDQSNS

8

VDDQSET

9

S3

10

S5

11

NC

12

PGOOD 13

V5FILT 14

V5IN15

CS16

CS_GND 17

PGND 18DRVL

19

LL

20

DRVH

21

VBST

22

VLDOIN

23

VTT

24

GND

25

PR31*100K/F_4PR31*100K/F_4


3

5

2

4

1

P R5 6 * 0/ sh or t_ 6P R5 6 * 0/ sh or t_ 6

PR196100K_4PR196100K_4

1

2

PR5210K/F_4

PR5210K/F_4

PC159*2200P/50V_4PC159*2200P/50V_4

PQ42AO3404PQ42AO3404

3

2

1

PL8

2.2uH/8A_7X7X3

PL8

2.2uH/8A_7X7X3

PC1232200P/50V_4

PC1232200P/50V_4

PC304.7U/6.3V_6

PC304.7U/6.3V_6


3

5

2

4

1

PR44*0/J_4PR44*0/J_4

PC254.7U/6.3V_6

PC254.7U/6.3V_6

+

PC31

330U/2V_7343

+

PC31

330U/2V_7343


PR186*2.2/F_4PR186*2.2/F_4

PR199

22_8

PR199

22_8

5 4 3 2 1

VIN

+5VPCU


31/38

5 4 3 2 1

D D

C C

B B

A A

MAIND

1.1V_DL

1.1V_DH

1.1V_LX

1.1V_FB

SUSDSUSD

MAIND

S5_ON

HWPG_1.1V

SUSD

+3VSUS

+5VPCU

+1.1V_S5

+1.1VSUS

+1.1V_S5


Date: Sheet of


VCCP 1.1V(UP6111A) 4A



Date: Sheet of





Date: Sheet of




ZH9

TON=3.85p*RTON*Vout/(Vin-0.5)

Frequency=Vout/(Vin*TON)

TON=3.85p*1M*1/(Vin-0.5)

Frequency=1/(0.0036767)=272K

L(ripple current)

=(19-1.1)*1.1/(1u*272k*19)

~3.81A

13m*8.5=RILIM*20uA

RILIM=5.49K

VOUT=(1+R1/R2)*0.75

Rdson=13mOhm

1.1V/7.3A

Rds*OCP=RILIM*20uA

OCP: 8.5A

R1

R2

0.6A

4A

PC590.1U/50V_6

PC590.1U/50V_6

PC7110U/10V_8

PC7110U/10V_8

PR801M/J_6PR801M/J_6

PC530.1U/25V_4

PC530.1U/25V_4


3

5

2

4

1

PR872.2/F_6PR872.2/F_6

PR1762.2/F_4PR1762.2/F_4

PU4UP6111AQDDPU4UP6111AQDD

EN/DEM15

TON16

VOUT1

VDD2

FB3

PGOOD4

GND6

PGND7

LGATE8

VDDP9

OC 10

PHASE11

UGATE 12

BOOT13

NC5

TPAD17

NC14

PC481U/10V_4

PC481U/10V_4


3

2

1

PC561U/10V_4PC561U/10V_4

PR67 *0/ shor t_6PR67 *0/ shor t_6

PQ39FDMC8296

PQ39FDMC8296

3

5

2

4

1

PR71*10K/F_4

PR71*10K/F_4

PR65 *0/short_4PR65 *0/short_4

PC554.7U/6.3V_6

PC554.7U/6.3V_6

PR83

10K/F_4

PR83

10K/F_4

PC135

2200P/50V_4

PC135

2200P/50V_4

PC620.1U/50V_6PC620.1U/50V_6

PR7410/F_4PR7410/F_4

PC51*1000P/50V_4

PC51*1000P/50V_4

PC4733P/50V_4

PC4733P/50V_4

PC700.1U/50V_6

PC700.1U/50V_6

+

PC145330U/2V_7343

+

PC145330U/2V_7343

PL91.0uH/11A_7X7X3

PL91.0uH/11A_7X7X3

PC632200P/50V_4PC632200P/50V_4 PC166

4.7U/25V_8

PC166

4.7U/25V_8

PR7310K/F_4PR7310K/F_4

PR865.49K/F_4PR865.49K/F_4

PR724.7K/F_4PR724.7K/F_4

PD7RB500V-40PD7RB500V-40

PR891/F_6PR891/F_6

PC174*10U/25V_1206

PC174*10U/25V_1206

hexain

f@ho

tma

il.com

5 4 3 2 1


32/38

5 4 3 2 1

D D

C C

B B

A A

54418_VFB

MAINON

MAINON

54418_VFB

+1.8V_EN

+1.8V_EN

HWPG_1.8V

MAINON

+1.8V_ON

+3VSUS

+1.8V

+3VPCU

+3V


Date: Sheet of


PROJECT :

+1.8V(TPS54418) 4A



Date: Sheet of


PROJECT :

+1.8V(TPS54418) 4A



Date: Sheet of


PROJECT :

+1.8V(TPS54418) 4A


ZH9

V0=0.8*(R1+R2)/R2

R1

R2

1.8V/1.418A

OCP: 6A

1/29 modify for sequence

PR18278.7K/F_4PR18278.7K/F_4

PR181100K/F_4PR181100K/F_4

PC14810U/10V_8

PC14810U/10V_8

PR189*0/J_4PR189*0/J_4

PR184182K/F_4PR184182K/F_4

PC1400.1U/25V_4PC1400.1U/25V_4

PU11 HPA00835RTERPU11 HPA00835RTER

VSNS6

VIN16

VIN2

BOOT13

PWRGD14

PH 11VIN1

PH12

PH 10

EN15

GND 3COMP7

RT/CLK8

SS9

GND 4

AGND 5PAD

17

PAD

18

PAD

19

PAD

20

PAD

21

PAD

22

PR187

*0/J_4

PR187

*0/J_4

PC1440.01U/25V_4PC1440.01U/25V_4

PR1835.49K/F_4

PR1835.49K/F_4

PC139

1000P/50V_4

PC139

1000P/50V_4

PC14610U/10V_8

PC14610U/10V_8

PC14110U/10V_8PC14110U/10V_8

PR188

*0/J_4

PR188

*0/J_4

PC1420.1U/25V_4

PC1420.1U/25V_4

P R177 1 /F _6P R177 1 /F _6

PR1780/J_4PR1780/J_4

PL103.3uH/6A_7X7X3

PL103.3uH/6A_7X7X3

PC143

*100P/50V_4

PC143

*100P/50V_4

PC1474700P/25V_4PC1474700P/25V_4

PC1380.1U/50V_6

PC1380.1U/50V_6

PR179*10K/J_4

PR179*10K/J_4

5 4 3 2 1

+15VVIN_SRC +1.1V

+1.1V_S5


33/38

5 4 3 2 1

D D

C C

B B

A AMAINDMAINON_ON_G

MAINON

SUS_ON_G

1.2VADJ0.9V

+1.1V_D

+1.1V_DMAIND

MAINON

MAIND

SUSON

SUSD

VRON

HWPG_VDDR

VDDR_OPT

CPU_VDDR_FB_H

HWPG_1.8V

VIN_SRC +15V+5V+3V +1.1V

+15VVIN_SRC +3VSUS

+1.5V

+3VPCU

+2.5V

+5VPCU

CPU_VDDR

+1.5VSUS

+3V

+1.1VSUS

+1.1V


Date: Sheet of


PROJECT :

Discharge (2.5V/1.2V/VDDR) 4A



Date: Sheet of


PROJECT :




Date: Sheet of


PROJECT :



ZH9

2.5V/0.188A

0.8V

Vout =0.8(1+R1/R2)=0.9V

0.75A

1/25 modify for sequence5.78A

PC28

*220P/50V_4

PC28

*220P/50V_4

PR142

1M/J_6

PR142

1M/J_6

PR97

22/J_8

PR97

22/J_8

PR96100K/J_4

PR96100K/J_4

PQ2

*DMN601K-7

PQ2

*DMN601K-7

3

2

1

PC350.1u/50V_6

PC350.1u/50V_6

PQ11DTC144EU

PQ11DTC144EU

1

3

2

PR195100K_4PR195100K_4

1

2

PC34*0.1u/50V_6PC34*0.1u/50V_6

PR4330.1K/F_6PR4330.1K/F_6

PR144

22/J_8

PR144

22/J_8

PQ56*DMN601K-7PQ56*DMN601K-7

3

2

1

PR145

22/J_8

PR145

22/J_8


3

2

1

PR98

22/J_8

PR98

22/J_8


3

2

1


3

2

1


3

2

1

PR180 *0/short_4PR180 *0/short_4

PC136*0.1U/25V_4PC136*0.1U/25V_4

P R53 *33_ 4P R53 *33_ 4

PR193

*1M/F_4

PR193

*1M/F_4

PR192

22_8

PR192

22_8

PR175*0/J_4PR175*0/J_4


3

2

1


3

2

1

PQ28DTC144EU

PQ28DTC144EU

1

3

2PC91*2200P/50V_4PC91*2200P/50V_4PQ27

DMN601K-7PQ27DMN601K-7

3

2

1

PC160

*2.2n/50V_4

PC160

*2.2n/50V_4

PC3310u/10V_8

PC3310u/10V_8

PR99

22/J_8

PR99

22/J_8

PR1041M/J_6PR1041M/J_6

PR140

1M/J_6

PR140

1M/J_6


3

2

1


3

2

1

PR42

*22.1K/F_4

PR42

*22.1K/F_4

PR191

*1M/F_4

PR191

*1M/F_4

PC84*2200P/50V_4PC84*2200P/50V_4

PC2110u/10V_8

PC2110u/10V_8

PR1471M/J_6PR1471M/J_6

PR148100K/J_4

PR148100K/J_4

PU3RT9025-25PSPPU3RT9025-25PSP

PGOOD 1VPP4

VEN2

VIN3

VO 6

NC5

GND8

ADJ

7

GND9

PC13310U/10V_8PC13310U/10V_8

PR116

1M/J_6

PR116

1M/J_6

PR35

4.02K/F_6

PR35

4.02K/F_6

PR118

22/J_8

PR118

22/J_8

PR57

100K/F_4

PR57

100K/F_4


12


3

2

1

+ PC132

*100U/6.3V_3528

+ PC132

*100U/6.3V_3528

PR194

1M/F_4

PR194

1M/F_4

PC1372.2U/6.3V_6

PC1372.2U/6.3V_6

PC200.1u/50V_6

PC200.1u/50V_6

PR1900/J_4PR1900/J_4

PU10

G9091-250

PU10

G9091-250

SHDN3

GND2

VIN1

VO5

NC 4

PR103

1M/J_6

PR103

1M/J_6


3

65 7 8

2

4

1

hexain

f@ho

tma

il.com

1 2 3 4 5


34/38

1 2 3 4 5

A A

B B

C C

D D

2.469V

4.95V

TSNS_ON

S5_ON

SYS_SHDN#

S5_ON

VIN

VLVL

VL

+3VPCU


Date: Sheet of


PROJECT :

Thermal protect 4A



Date: Sheet of


PROJECT :

Thermal protect 4A



Date: Sheet of


PROJECT :

Thermal protect 4A


ZH9

Thermal protection

For EC control thermal protection (output 3.3V)

PR1071.74K/F_4PR1071.74K/F_4

PR9410K/F_4PR9410K/F_4

PR92200K/F_4PR92200K/F_4

PD8

RB500V-40

PD8

RB500V-40

T51T51

PD9SW1010CPTPD9SW1010CPT

PQ10

AO3409

PQ10

AO3409

3

2

1

PR108200K/F_4PR108200K/F_4

PR951M/F_4PR951M/F_4

PQ12DTC144EU

PQ12DTC144EU

1

3

2


3

2

1

PR109200K/F_4PR109200K/F_4

PR93

100K/F_4

PR93

100K/F_4

PR1001M/F_4PR1001M/F_4

PC72

0.1U/25V_4

PC72

0.1U/25V_4

PR11010K/J(NTC) _6

PR11010K/J(NTC) _6

PC81

0.1U/25V_4

PC81

0.1U/25V_4

+

-

PU6ALM393

+

-

PU6ALM393

3

21

8

4


3

2

1

+

-

PU6B

LM393

+

-

PU6B

LM393

5

67

5 4 3 2 1

INTERNAL CLOCK MODE


35/38

5 4 3 2 1

D D

C C

B B

A A


Date: Sheet of


PROJECT :

Clock Distribution Diagram 4A



Date: Sheet of


PROJECT :




Date: Sheet of


PROJECT :



ZH9

Page 2~5

AMD

ASB2 CPU

Page 6~9

AMD NORTHBRIDGE

RS880MA SO-DIMMPage 15 800MHz

CPU_

CLKP/N

200MHz

100MHz

A-LINK

100MHz

NB

_GFX

_REFCLKP/N

100MHz

HT_

REFCLKP/N

100MHz

NB_

REFCLK_

P/N

SPM_CLK

800MHzSIDE PORT MEMORY CHIP

Page 6

MINICARD-WLANPCIE_PE0_CLKP/N

100MHzPage 23

MINICARD-3GPCIE_PE1_CLKP/N

100MHzPage 23

LAN-AR8152PCIE_LAN_CLKP/N

100MHzPage 21

RTC_CLK33MHzEC

Page 25

LPC_CLK033MHz

Debug card

AZ_BIT_CLK24MHzHD AUDIO Page 19

Page 10

(25MHz)

For MASTER For RTC

(32.768KHz)

For SATA

(25MHz)-DNI

AMD SB820

INT CLK MODE

M_A_CLKP/N

hexain

f@ho

tmail.c

om

5 4 3 2 1

CPU core

PU?

CPU_CORE@20A

+NB CORE@9 5A

(OZ8380)

NorthBridge

CPU_VDDNB_CORE@3A

VIN

VIN LCD Backlight, CPU_CORE,NB_CORE, +5VPCU, +3VPCU, +1.5VSUS, +1.1V_S5

CPU_CORE

POWER Distribution

CPU

CPU VDDNB CORE po er s ppl for on die NorthBridge


36/38

5 4 3 2 1

D D

C C

B B

A A


Date: Sheet of


PROJECT :

Power Tree 4A

36 40Sunday , March 28, 2010


Date: Sheet of


PROJECT :

Power Tree 4A

36 40Sunday , March 28, 2010


Date: Sheet of


PROJECT :

Power Tree 4A

36 40Sunday , March 28, 2010

ZH9

CHARGER

ADAPTER

BATTERY PU?

SYSTEM

PU?

AO3404

PQ??

+5VPCU

+5V

PCU

+5V

VIN

VIN

VINISL88731HRZ-T

5V/3V

(RT8206B)

PU?

[email protected](uP6111AQDD)

AO3404

PQ?

AO3404

PQ?

+3VPCU

+3VPCU

AO3404

PQ? +3VSUS

+3V_S5

+3V

HPA00835RTER

PU? +1.8V

DDR PWR

PU?

AO3404

PQ?

+1.5VSUS

+1.5

VSUS

+1.5V

1.5V

RT8207A

[email protected]

[email protected]

PU?

[email protected]

SB Core logicstandby power

UP6111AQDD

AO4468

PQ?

+1.

1V_

S5

+1.1V

G909-150T1U

PU? +2.5V

AO3404

PQ? +1.1VSUS

RT9025-25PSP

PU? CPU_VDDR

CLK_GEN,CPU,NB,SB+1.1V

CPU_VDDR CPU

+1.1V_S5

Southbridge

+3VSUS 3G

+5VPCU

+3VPCU

+5V

+3V

+3V_S5

+SMDDR_VTERM

+SMDDR_VREF

USB Connecter

RTC, Hall Sensor, System LED, EC, BIOS, Acer ID EEPROM, +3V_S5, +3VSUS, +3V

CRT,Touch Pad ,Audio codec,SATA

CLK_GEN, CPU, NB,SB, LCD power switch,CCD, DMIC, BT, System LED, Codec, WLAN/Wimax, Card reader, EC

CPU_VDDNB_CORE power supply for on-die NorthBridge

NB_CORE NorthBridge power supply

+1.8V NB & SB power supply

NorthBridge,Discharge

+1.1VSUS

+2.5V CPU,Discharge

+1.5VSUS CPU,DDR,Discharge

SouthBridge,LAN , LAN EEPROM , RJ45 LED

DDR

CPU, DDR

+1.5V CPU,DDR,NB

3G@

SPM@

HDM@

BT@

BOM@

Fun. Description

w/ Sideport RAM

w/ 3G module

w/ BT module

w/ HDMI

BOM Control

BOM Structure


37/38

5 4 3 2 1

3NBSWON#

SLP_S3#(SUSB#):S3 Sleep Power plane control Assertion of SLP_S3# shuts off power to non-critical componentswhen system transitions to S3, S4, or S5 states.

SLP_S5#(SUSC#):S5 Sleep Power plane control - Assertion of SLP_S5# shuts power off to non-critical componentswhen system transitions to S4 or S5 state.

1b +VIN

PQ?

+3VPCU

MOS

S5_ON

4 +3V_S5

+1 1V S5

5


38/38

5 4 3 2 1

D D

C C

B B

A A


Date: Sheet of


PROJECT :

power sequence block diagram 4A38 40Sunday, March 28, 2010


Date: Sheet of


PROJECT :



Date: Sheet of


PROJECT :


ZH9

BATT Charger

AC Adapter

Battery

VINAlways System power

+3VPCU

+5VPCU

EC

1

SB820

EC_RSMRST#

7

DNBSWON#

8

SUSB#

SUSC# 9

SUSON

VRON

MAINON

10

HWPG

Regulator

CPU_VDDNB_CORE

CPU_PWRGD

ASB2

RS880

PU?PU?

U11

PU?

U9

U7

HWPG_SYS

RSMRST#

PWRBTN#

SLP_S5#

SLP_S3#

13

HWPG_1.8V

HWPG_1.5V

11

+5V

PU?

PU? +SMDDR_VREF

MOS +3VSUS

+3V

+2.5V

+1.8V

MOS

12

PU?LDO

14

Regulator

+1.5VSUS

+SMDDR_VTERM

2

17

18

ECPWROK(SB_PWRGD)SB_PWRGD

21

LDT_PG

24

PWROK

PWRGOOD

PQ?

+3VPCU

VIN

PQ?

+3VPCU/+5VPCU

+3VPCU

+3VPCU

VIN

Regulator

+1.5V

PQ25

MOS

15Regulator

14

CPU_CORE

CPU_VDDR

Regulator

PU?

+5VPCU

20

CPU_COREPG

PU?Regulator

+1.1V_S5

14

HWPG_VDDR

CPU_COREPG

19

+1.1VMOS

14PQ?

+1.1V_S5

PU?

+NB_CORE+VINRegulator

HWPG_NB_CORE

6

HWPG_1.1V6

16

22

23

NB_PWRGD

SYSTEMSETb

A_RST#

NB_RST#_IN

25

RESET_L

LDT_RST#

CPU_LDT_RST#

26

+1.1VSUSMOSPQ?

+1.1V_S5

Date post:	11-Feb-2018
Category:	Documents
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Acer Aspire One Ao521 - Quanta Zh9 - Rev 4a(1)

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