Date post: | 30-Oct-2015 |
Category: |
Documents |
Upload: | gerson-soares |
View: | 32 times |
Download: | 0 times |
of 13
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
EFL50 LS-2766P 1.0
Cover Sheet
1 1312/23/05 14:40:19
2005/12/22 2006/12/22
Mini (EFL50) ATI VGA/B M52-PRevision 1.0
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
EFL50 LS-2766P 1.0
Block Diagram
2 1312/23/05 14:40:19
2005/12/22 2006/12/22
DVI_TXD[0:2](+,-); DVI_TXC+(-)DVI
PAGE 4,5,6,7
PAGE 4
PAGE 9
PAGE 8
PAGE 3
PAGE 4ASM3P1819N-SR
S
a
m
s
u
n
g
K
4
D
5
5
3
2
3
5
F
-
G
C
2
A
ConnectorDDRA M54P/M52P PCIEPCIE_MTX_C_GRX_P[0:15], PCIE_MTX_C_GRX_N[0:15]
CLK_PCIE_VGA CLK_PCIE_VGA# PLTRST_VGA#
PCIE_TX[0:15]P, PCIE_TX[0:15]NPCIE_RX[0:15]P, PCIE_RX[0:15]N
PCIE_REFCLKP, PCIE_REFCLKNPWRGD
VGA_TV_LUMA,VGA_TV_CRMA
VGA_CRT_R, VGA_CRT_G, VGA_CRT_B, DACA_HSYNC, DACA_VSYNC
TV_OUT
VGA_OUT
THERMAL
LVDS Bus
MDA[0:63]
NMAA[0:13]DQ[0:31]
A[0:11]
CLK/CLK#
DDRB MDB[0:63]NMAB[0:13]DQ[0:31]
A[0:11]
CLK/CLK#
NMCLKA0/A0#NMCLKA1/A1#
NMCLKB0/B0#NMCLKB1/B1#
DQA[0:63]
MAA[0:13]
CLKA[0:1]CLKA[0:1]#
CLKB[0:1]CLKB[0:1]#
NMAB[0:13]
MDB[0:63]
VGA_ENBKLBLON
I2CC_SCLI2CC_SDA
VGA_ENVDDDIGON
DVPDATA[18:19]
VGA_DDC_CLK, VGA_DDC_DATDDC1_I2C
VDDC
PCIE_VDDR
VDDR1
VDDR3
B+
+1.5VS
+3VS
SL6225BCA-TPAGE 11
+VDD_CORE
APW7057KC-TRPAGE 11
+1.2VS
SENSORPOWER_SEL
+3.3VS
+VDD_CORE
+1.2VS +1.5VS
B+
GPIO5
D+/D-
THERM_SDA, THERM_SCL
THER_ALERT
S
a
m
s
u
n
g
K
4
D
5
5
3
2
3
5
F
-
G
C
2
A
ACES 88069-1600A
PCIE_GT_MRX_P[0:15], PCIE_GTX_MRX_N[0:15]
SPREAD
+1.8VS
CLOCK
27MHz
+1.8VS+2.5VS
PCIE_PVDD
VDDR4
OSC_IN
OSC_SPREAD
VDD25, LVDDR,TXVDDR, AVDD,A2VDD
8M*32
8M*32
GPIO_AUXWINMAX6649MUA
M54P/M52P BLOCK DIAGRAM
+2.5VS
+5VS +5VS
VDDR5
GDDR1
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_GTX_MRX_P[0:15]
PCIE_MTX_C_GRX_N[0:15]
VGA_CRT_RVGA_CRT_GVGA_CRT_B
PCIE_MTX_C_GRX_P[0:15]
PCIE_GTX_MRX_N[0:15]
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N3PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P2PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P4PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P12
VGA_TV_COMP
INVT_PWMPCIE_RST#
LCD_ID#
CRT_HSYNCCRT_VSYNC
VGA_TV_YVGA_TV_C
VGA_DVI_CLKVGA_DVI_DAT
VGA_CRT_DATVGA_CRT_CLK
DISPOFF#
VGA_ENBKL
DAC_BRIG
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P3PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P2PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P0PCIE_MTX_C_GRX_N0
PCIE_GTX_MRX_P1
PCIE_GTX_MRX_P2
PCIE_GTX_MRX_N1
PCIE_GTX_MRX_N0
PCIE_GTX_MRX_N3
PCIE_GTX_MRX_P0
PCIE_GTX_MRX_N4
PCIE_GTX_MRX_N2
PCIE_GTX_MRX_P6
PCIE_GTX_MRX_P4
PCIE_GTX_MRX_P7
PCIE_GTX_MRX_N5PCIE_GTX_MRX_P5
PCIE_GTX_MRX_N8
PCIE_GTX_MRX_P3
PCIE_GTX_MRX_N6
PCIE_GTX_MRX_N11
PCIE_GTX_MRX_P9PCIE_GTX_MRX_N9
PCIE_GTX_MRX_N7
PCIE_GTX_MRX_P10
PCIE_GTX_MRX_P8
PCIE_GTX_MRX_N10
PCIE_GTX_MRX_N13PCIE_GTX_MRX_P13
PCIE_GTX_MRX_P12
PCIE_GTX_MRX_P14
PCIE_GTX_MRX_P15
PCIE_GTX_MRX_N12
PCIE_GTX_MRX_P11
PCIE_GTX_MRX_N15
PCIE_GTX_MRX_N14
+1.8VS_D+1.8VS_D
+3VS_D
+2.5VS
+5VALW
B+
+1.5VS
PCIE_GTX_MRX_P[0:15]
PCIE_MTX_C_GRX_N[0:15]
VGA_CRT_RVGA_CRT_GVGA_CRT_B
DVI_TX0+
DVI_TXC+DVI_TXC-
CLK_PCIE_VGACLK_PCIE_VGA#
DVI_TX1+DVI_TX1-DVI_TX2+DVI_TX2-
DVI_TX0-
PCIE_GTX_MRX_N[0:15]
PCIE_MTX_C_GRX_P[0:15]
VGA_TV_COMP
INVT_PWM PCIE_RST#
LCD_ID#
CRT_HSYNCCRT_VSYNC
VGA_TV_Y VGA_TV_C
VGA_DVI_DAT VGA_DVI_CLK
VGA_CRT_DATVGA_CRT_CLK
VGA_DVI_DET
DISPOFF#
VGA_ENBKL
DAC_BRIG
susp#
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
EFL50 LS-2766P 1.0
VGA Connector
Custom
3 1312/23/05 14:40:19
2005/12/22 2006/12/22Compal Electronics, Inc.
PCIE Connector
C15 0.1U_0402_16V4Z
1 2
C24 0.1U_0402_16V4Z
1 2C25 0.1U_0402_16V4Z
1 2
C33 0.1U_0402_16V4Z
1 2
C30 0.1U_0402_16V4Z
1 2
C4 0.1U_0402_16V4Z
1 2
C3 0.1U_0402_16V4Z
1 2
C14 0.1U_0402_16V4Z
1 2
C31 0.1U_0402_16V4Z
1 2
C10 0.1U_0402_16V4Z
1 2
C29 0.1U_0402_16V4Z
1 2C28 0.1U_0402_16V4Z
1 2
C18 0.1U_0402_16V4Z
1 2
TP7
JP1
ACES_88396-1G41
1 1223 3445 5667 7889 91010
11 11121213 13141415 15161617 17181819 19202021 21222223 23242425 25262627 27282829 29303031 31323233 33343435 35363637 37383839 39404041 41424243 43444445 45464647 47484849 49505051 51525253 53545455 55565657 57585859 59606061 61626263 63646465 65666667 67686869 69707071 71727273 73747475 75767677 77787879 79808081 81828283 83848485 85868687 87888889 89909091 91929293 93949495 95969697 97989899 99100100
101 101102102103 103104104105 105106106107 107108108109 109110110111 111112112113 113114114115 115116116117 117118118119 119120120121 121122122123 123124124125 125126126127 127128128129 129130130131 131132132133 133134134135 135136136137 137138138139 139140140141 141142142143 143144144145 145146146147 147148148149 149150150151 151152152153 153154154155 155156156157 157158158159 159160160
G
1
1
6
1
G
2
1
6
2
C9 0.1U_0402_16V4Z
1 2
C13 0.1U_0402_16V4Z
1 2C12 0.1U_0402_16V4Z
1 2
C7 0.1U_0402_16V4Z
1 2
C22 0.1U_0402_16V4Z
1 2C23 0.1U_0402_16V4Z
1 2
C2 0.1U_0402_16V4Z
1 2
C17 0.1U_0402_16V4Z
1 2C16 0.1U_0402_16V4Z
1 2
C8 0.1U_0402_16V4Z
1 2
C26 0.1U_0402_16V4Z
1 2C27 0.1U_0402_16V4Z
1 2
C32 0.1U_0402_16V4Z
1 2
C21 0.1U_0402_16V4Z
1 2C20 0.1U_0402_16V4Z
1 2
C11 0.1U_0402_16V4Z
1 2
C5 0.1U_0402_16V4Z
1 2
C19 0.1U_0402_16V4Z
1 2
C6 0.1U_0402_16V4Z
1 2
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+SSVDD
OSC_SPREAD
OSC_IN
OSC_IN
THERM_SCL
THERM_SDA
PCIE_GTX_MRX_P[0:15]
PCIE_GTX_MRX_N[0:15]
PCIE_MTX_C_GRX_P[0:15]
PCIE_MTX_C_GRX_N[0:15]
VGA_CRT_B
VGA_TV_YVGA_TV_C
VGA_CRT_GVGA_CRT_R
GPIO12GPIO13
GPIO9GPIO11
POWER_SEL
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P9
PCIE_GTX_MRX_P13
PCIE_GTX_MRX_P1
CLK_PCIE_VGA#
VGA_CRT_CLK
MEMID0
PCIE_MTX_C_GRX_N13
PCIE_GTX_MRX_N10
PCIE_GTX_MRX_P5
PCIE_GTX_MRX_N2
I2C_CLK
PCIE_GTX_MRX_P0
VGA_TV_Y
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N6
PCIE_GTX_MRX_P15
PCIE_GTX_MRX_N6
VGA_CRT_DAT
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P5
GPIO13
PCIE_GTX_MRX_N11
PCIE_GTX_MRX_P9
PCIE_GTX_MRX_N0
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N1
PCIE_GTX_MRX_P3
CRT_HSYNC
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_N5
THER_ALERT#
PCIE_GTX_MRX_P11
PCIE_GTX_MRX_P7
VGA_TV_C
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P6
GPIO9
PCIE_GTX_MRX_N13
PCIE_GTX_MRX_N7
VGA_ENBKL
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P3
OSC_SPREAD
GPIO12
PCIE_GTX_MRX_P12
PCIE_GTX_MRX_N8
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P1
PCIE_GTX_MRX_P2
VGA_CRT_B
MEMID2
PCIE_MTX_C_GRX_P15
PCIE_GTX_MRX_N14
PCIE_GTX_MRX_N9
PCIE_GTX_MRX_N5
CLK_PCIE_VGA
D+
GPIO11
PCIE_GTX_MRX_P14
VGA_CRT_R
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P0
PCIE_GTX_MRX_P8
CRT_VSYNC
D-
PCIE_MTX_C_GRX_N0
PCIE_GTX_MRX_N1
VGA_CRT_G
MEMID1
PCIE_MTX_C_GRX_N14
POWER_SEL
PCIE_GTX_MRX_N12
PCIE_GTX_MRX_P10
PCIE_GTX_MRX_N4
PCIE_GTX_MRX_N3
PCIE_MTX_C_GRX_P12
THERM_SCLTHERM_SDA
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P2
PCIE_GTX_MRX_N15
PCIE_GTX_MRX_P6
PCIE_GTX_MRX_P4
VGA_TV_COMP
D+
THER_ALERT#
I2C_DAT
D-
+1.2VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
PCIE_RST#
PCIE_GTX_MRX_P[0:15]
PCIE_GTX_MRX_N[0:15]
PCIE_MTX_C_GRX_P[0:15]
PCIE_MTX_C_GRX_N[0:15]
I2C_CLK
VGA_CRT_DAT VGA_CRT_CLK
VGA_ENBKL
VGA_CRT_R VGA_CRT_G VGA_CRT_B
CRT_HSYNC CRT_VSYNC
VGA_TV_Y VGA_TV_C
CLK_PCIE_VGACLK_PCIE_VGA#
POWER_SEL
I2C_DAT
VGA_TV_COMP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
EFL50 LS-2766P 1.0
M52-P MainCustom
4 1312/23/05 14:40:18
2005/12/22 2006/12/22
Spread spectrum
Keep away from other signal at last 25mils
Minimize distance from X1 pin3 to U3 pin1
Thermal sensor
Close to VGA Cbip
MEMID[2:0]Vedio Memory Config. (VGA Internal PD)
Size (Speed) Vender Chips
0 0 0Size
64MB 16M16 (300MHz) Samsung 2128MB 16M16 (300MHz) Samsung 464MB128MB
16M16 (300MHz) Hynix 216M16 (300MHz) Hynix 4
0 0 11 0 01 0 1
Low -> VDDC=1.0V+-5% Performance Mode for M52High -> VDDC=0.95V+-5% Battery Mode for M52
0: 50% TX output swing1: Full TX output swing
Straps: (Internal pull down)GPIO[0]
GPIO[1] 0: TX de-emphasis disable1: TX de-emphasis enable
Transmitter powersaving enableTransmitterde-emphasis enableDebug Access GPIO[4]
ROM ID Config GPIO[9, 13:11]
VSYNCVIP_DEVICE 0: Slave VIP host device present1: No slave VIP host device present
* The readback of this strap is the inverted with respect to the value on the pin
0: OFF1: ON
P
C
I
-
E
x
p
r
e
s
s
D
a
t
a
B
u
s
L
a
n
e
R
e
v
e
r
s
a
l
a
n
d
P
o
l
a
r
i
t
y
I
n
v
e
r
s
i
o
n
Memory Aperture Size Select
GPIO12 GPIO13 SIZE0 00
01
11 1
128MB64MB256MBReserve
GPIO[9]=1 External ROM AttachedGPIO[9]=0 No External ROM
For No External ROM: GPIO[13,12] is for MEM_AP_SIZE[1,0] GPIO[11] don't care(Internal
Pull-down)
GPIO[5]Current bias forthe PCI Express PHY PLL
GPIO5 = 1(must be pulled to 3.3V at reset using)
For DDRII
Internal SS, Programmed via register--GENERICA = NCGENERICB = GND.
R53 499_0402_1% 12
R2 562_0402_1% 1 2
R10 4.7K_0402_5% 1 2
R1 0_0402_5% 1 2
R3 1.47K_0402_1% 1 2
R17 22_0402_5%SSC@
1 2
R27 4.7K_0402_5% 1 2
R13 10K_0402_5%@1 2
C121
2200P_0402_50V7KTHM@
1 2
U6
ASM3P1819N-SR_SO8SSC@
XOUT8
REF 5
MODOUT 4XIN1
VDD7
NC 3
PD# 6VSS2
R78 10K_0402_5%@1 2
R24 10K_0402_5% 1 2
U7
MAX6649MUA_8UMAXTHM@
VDD1
D+2
D-3
OVERT#4
SCLK 8
SDATA 7
ALERT# 6
GND 5
R8 10K_0402_5% HYN@1 2
R56 150_0402_1%@12
R74.7K_0402_5%
1 2
TP3
R76 10K_0402_5%R256@1 2
P
C
I
E
X
P
R
E
S
S
CRT
XTAL
GPIO
V
I
P
H
O
S
T
/
E
X
T
E
R
N
A
L
T
M
D
S
TV
T
H
E
R
M
A
L
U2A
M52-P
PCIE_TX0PAK27PCIE_TX0NAJ27
PCIE_REFCLKPAL28PCIE_REFCLKNAK28
PCIE_CALRPAD24PCIE_CALIAB24
PERST#AG24
PCIE_TESTAA24PERST#_MASKAF24
RSET AL22
TESTEN AG22PLLTEST AG14
XTALOUTAM26
XTALINAL26
ROMCS# AC7
PCIE_TX1PAJ25PCIE_TX1NAH25PCIE_TX2PAH28PCIE_TX2NAG28PCIE_TX3PAG27PCIE_TX3NAF27PCIE_TX4PAF25PCIE_TX4NAE25PCIE_TX5PAE28PCIE_TX5NAD28PCIE_TX6PAD27PCIE_TX6NAC27PCIE_TX7PAC25PCIE_TX7NAB25PCIE_TX8PAB28PCIE_TX8NAA28PCIE_TX9PAA27PCIE_TX9NY27PCIE_TX10PY25PCIE_TX10NW25PCIE_TX11PW28PCIE_TX11NV28PCIE_TX12PV27PCIE_TX12NU27PCIE_TX13PU25PCIE_TX13NT25PCIE_TX14PT28PCIE_TX14NR28PCIE_TX15PR27PCIE_TX15NP27
PCIE_RX15PP31
GPIO_0 AD4GPIO_1 AD2GPIO_2 AD1GPIO_3 AD3GPIO_4 AC1GPIO_5 AC2GPIO_6 AC3
GPIO_7_BLON AB2GPIO_8 AC6GPIO_9 AC5
GPIO_10 AC4GPIO_11 AB3GPIO_12 AB4GPIO_13 AB5GPIO_14 AD5GPIO_15 AB8GPIO_16 AA8GPIO_17 AB7
NC AB6
VREFG AC8
PCIE_RX0PAJ31PCIE_RX0NAH31PCIE_RX1PAH30PCIE_RX1NAG30PCIE_RX2PAG32PCIE_RX2NAF32PCIE_RX3PAF31PCIE_RX3NAE31PCIE_RX4PAE30PCIE_RX4NAD30PCIE_RX5PAD32PCIE_RX5NAC32PCIE_RX6PAC31PCIE_RX6NAB31PCIE_RX7PAB30PCIE_RX7NAA30PCIE_RX8PAA32PCIE_RX8NY32PCIE_RX9PY31PCIE_RX9NW31PCIE_RX10PW30PCIE_RX10NV30PCIE_RX11PV32PCIE_RX11NU32PCIE_RX12PU31PCIE_RX12NT31PCIE_RX13PT30PCIE_RX13NR30PCIE_RX14PR32PCIE_RX14NP32
PCIE_RX15NN31
PCIE_CALRNAE24
R2SET AK14
NC_DVOVMODE_0 AK4NC_DVOVMODE_1 AL4
DVPCNTL_0 AF2DVPCNTL_1 AF1DVPCNTL_2 AF3
DVPCLK AG1DVPDATA_0 AG2DVPDATA_1 AG3DVPDATA_2 AH2DVPDATA_3 AH3DVPDATA_4 AJ2DVPDATA_5 AJ1DVPDATA_6 AK2DVPDATA_7 AK1DVPDATA_8 AK3DVPDATA_9 AL2
DVPDATA_10 AL3DVPDATA_11 AM3DVPDATA_12 AE6DVPDATA_13 AF4DVPDATA_14 AF5DVPDATA_15 AG4DVPDATA_16 AJ3DVPDATA_17 AH4DVPDATA_18 AJ4DVPDATA_19 AG5DVPDATA_20 AH5DVPDATA_21 AF6DVPDATA_22 AE7DVPDATA_23 AG6
DPLUSAG12
DMINUSAH12
DDC3DATAAE12DDC3CLKAF12
R2 AK15G2 AM15B2 AL15
R AK24G AM24B AL24
HSYNC AJ23VSYNC AJ22
DDC1DATA AH22DDC1CLK AH23
GENERICA AK22GENERICB AF23
H2SYNC AF15V2SYNC AG15
Y AJ15C AJ13
COMP AH15
R36 150_0402_1%@12
R16 10K_0402_5% 1 2
C1300.1U_0402_16V4Z
1 2
R22
0
_
0
6
0
3
_
5
%
S
S
C
@
1
2
R11 10K_0402_5% R128@1 2
X1
27MHZ_15P
OUT 3
GND 2
VDD4
OE1
R32 4.7K_0402_5% 1 2
R79 10K_0402_5%@1 2
R512.2K_0402_5%THM@
1
2
R33 499_0402_1% 12
R39 715_0402_1% 12
R63 10K_0402_5%@1 2
R26 2K_0402_1%
1 2
R80 10K_0402_5%1 2
R14 10K_0402_5%1 2
R25 121_0402_1% 1 2
R30 150_0402_1%@12
R35 150_0402_1% 12R6
4.7K_0402_5% 1 2
R9 10K_0402_5% X76@1 2
C500.1U_0402_16V4Z
1 2
R31 10K_0402_5% 1 2
R502.2K_0402_5%
THM@
1
2
R45 150_0402_1%@12
R12 4.7K_0402_5% 1 2
R97 10K_0402_5%1 2
TP1
R23
71.5_0402_1%
1
2
R54 499_0402_1% 1 2
TP4
C38
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
S
S
C
@
1
2
R34
1
K
_
0
4
0
2
_
5
%
1
2
R28 1K_0402_5% 12
TP6
R77 10K_0402_5%R64@1 2
R29 150_0402_1%@12
R48 0_0402_5%THM@
1 2
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_LVDSAC-VGA_LVDSAC+VGA_LVDSA0+VGA_LVDSA0-VGA_LVDSA1+VGA_LVDSA1-VGA_LVDSA2+VGA_LVDSA2-
DVI_TXC-DVI_TXC+
DVI_TX0-DVI_TX0+
DVI_TX1-DVI_TX1+
DVI_TX2-DVI_TX2+
VGA_ENVDD
VGA_DVI_DET
VGA_DVI_CLKVGA_DVI_DAT
VGA_LVDSBC-VGA_LVDSBC+
VGA_LVDSB0+VGA_LVDSB0-VGA_LVDSB1+VGA_LVDSB1-VGA_LVDSB2+VGA_LVDSB2-
+VDD25
VGA_LVDSAC- VGA_LVDSAC+ VGA_LVDSA0+ VGA_LVDSA0- VGA_LVDSA1+ VGA_LVDSA1- VGA_LVDSA2+ VGA_LVDSA2-
VGA_ENVDD
DVI_TXC- DVI_TXC+
DVI_TX0- DVI_TX0+
DVI_TX1- DVI_TX1+
DVI_TX2- DVI_TX2+
VGA_DVI_DET
VGA_DVI_CLK VGA_DVI_DAT
VGA_LVDSBC- VGA_LVDSBC+
VGA_LVDSB0+ VGA_LVDSB0- VGA_LVDSB1+ VGA_LVDSB1- VGA_LVDSB2+ VGA_LVDSB2-
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
EFL50 LS-2766P 1.0
M52-P LVD,DVI,GND,ScrewCustom
5 1312/23/05 14:40:18
2005/12/22 2006/12/22
Use 15mils traceconnect to GND
if no DVI , dvi_det pull low
R52 180_0402_5% 1 2
T
M
D
S
G
N
D
C
R
T
G
N
D
T
V
G
N
D
P
L
L
G
N
D
L
V
D
S
P
L
L
&
I
/
O
G
N
D
P
C
I
E
G
N
D
U2G
M52-P
PCIE_VSSAH27PCIE_VSSAC23PCIE_VSSAL27PCIE_VSSR23PCIE_VSSP25PCIE_VSSR25PCIE_VSST26PCIE_VSSU26PCIE_VSSY26PCIE_VSSAB26PCIE_VSSAC26PCIE_VSSAD25PCIE_VSSAE26PCIE_VSSAF26PCIE_VSSAD26PCIE_VSSAG25PCIE_VSSAH26PCIE_VSSAC28PCIE_VSSY28PCIE_VSSU28PCIE_VSSP28PCIE_VSSAH29PCIE_VSSAF28PCIE_VSSV29PCIE_VSSAC29PCIE_VSSW27PCIE_VSSAB27PCIE_VSSV26PCIE_VSSAJ26PCIE_VSSAJ32PCIE_VSSAK29PCIE_VSSP26PCIE_VSSP29PCIE_VSSR29PCIE_VSST29PCIE_VSSU29PCIE_VSSW29PCIE_VSSY29PCIE_VSSAA29PCIE_VSSAB29PCIE_VSSAD29PCIE_VSSAE29PCIE_VSSAF29PCIE_VSSAG29PCIE_VSSAJ29PCIE_VSSAK26PCIE_VSSAK30PCIE_VSSAG26PCIE_VSSN30PCIE_VSSR31PCIE_VSSAF30PCIE_VSSAC30PCIE_VSSV31PCIE_VSSP30PCIE_VSSAA31PCIE_VSSU30PCIE_VSSAD31PCIE_VSSAK32PCIE_VSSAJ28PCIE_VSSY30PCIE_VSSAJ30PCIE_VSSAK31 PCIE_VSS AA23
PCIE_VSS N24
TXVSSR AJ7TXVSSR AK7TXVSSR AL7TXVSSR AM7TXVSSR AK8
AVSSQ AK23AVSSN AK25AVSSN AJ24
VSS1DI AL23
TPVSS AL8
A2VSSN AM17A2VSSN AL17
VSS2DI AJ17
PVSS AH14
MPVSS A5
LPVSS AE18
A2VSSQ AK13
LVSSR AK17LVSSR AJ19LVSSR AF18LVSSR AH17LVSSR AG17LVSSR AG19LVSSR AH19LVSSR AF22LVSSR AF17LVSSR AF21
PCIE_VSS AB23PCIE_VSS P24PCIE_VSS R24PCIE_VSS T24PCIE_VSS U24PCIE_VSS V24PCIE_VSS W24PCIE_VSS Y24PCIE_VSS AC24PCIE_VSS AH24PCIE_VSS V25PCIE_VSS AA25PCIE_VSS R26PCIE_VSS AA26PCIE_VSS T27PCIE_VSS AE27PCIE_VSS AG31PCIE_VSS W26
PCIE_PVSS W23
L
V
D
S
E
X
P
A
N
D
G
P
I
O
F
O
R
E
A
R
D
C
O
M
P
A
T
I
B
I
L
I
T
Y
I
N
T
E
R
G
R
A
T
E
D
T
M
D
S
U2B
M52-P
DDC2DATA AH13DDC2CLK AG13
HPD1 AF11
TXCLK_UP AJ21TXCLK_UN AK21
TXOUT_U0P AG18TXOUT_U0N AH18TXOUT_U1P AK20TXOUT_U1N AJ20TXOUT_U2P AG20TXOUT_U2N AH20TXOUT_U3P AH21TXOUT_U3N AG21
TXCLK_LN AL18TXCLK_LP AM18
TXOUT_L0P AL19TXOUT_L0N AK19TXOUT_L1P AM20TXOUT_L1N AL20TXOUT_L2P AM21TXOUT_L2N AL21TXOUT_L3P AJ18TXOUT_L3N AK18
VARY_BL AD12DIGON AE11
GENERICD AD23
TXCM AL9TXCP AM9
TX0M AK10TX0P AL10
TX1M AL11TX1P AM11
TX2M AL12TX2P AM12
TX3M AK9TX3P AJ9
TX4M AK11TX4P AJ11
TX5M AK12TX5P AJ12
GPIO_18AE13GPIO_19AF13GPIO_20AF9GPIO_21AG7GPIO_22AE10GPIO_23AE9GPIO_24AF7GPIO_25AF8GPIO_26AH6GPIO_27AF10GPIO_28AG10GPIO_29AH9GPIO_30AJ8GPIO_31AH8GPIO_32AG9GPIO_33AH7GPIO_34AG8
GENERICCAE23
BBNY23BBNK15BBNR10BBNAC17
BBPAC14BBPM23BBPV10BBPK18
VDD25L10VDD25K22VDD25AA10
R49 180_0402_5% 1 2
C66
0.1U_0402_16V4Z
1
2
R43 180_0402_5% 1 2
R114100K_0402_5%
1
2
C81
0.1U_0402_16V4Z
1
2
R44 10K_0402_5% 1 2
R46 180_0402_5% 1 2
CORE
GND
U2F
M52-P
VSSB1VSSH1VSSL1VSSP1VSSU1VSSY1VSSAD7VSSAE8VSSAL1VSSA2VSSAM2VSSAD10VSSE8VSSH5VSSK10VSSM8VSST10VSSE12VSSAC9VSSAF14VSSAD8VSSC5VSSF10VSSJ3VSSL6VSSM6VSSP6VSSAA4VSSAG11VSSV3VSSAG16VSSR3VSSC6VSSC9VSSF6VSSH7VSSJ6VSSAD16VSSAA6VSSP7VSSP5VSSM3VSSM9VSSL7VSSM7VSSAD17VSSAH11VSSA8VSSU7VSSC10VSSE9VSSF3VSSJ9VSSN7VSSN3VSSY5VSSAM13VSSAC10VSSY6VSSU6VSSE5VSSAL13VSSA11VSSU8VSSU9VSSU10VSSR6VSSAD6VSSV6VSSAD14VSSAD13VSSD11VSSJ12VSSK12VSSA13VSSF13VSSE13VSSF15VSSK16
VSS C27VSS E32VSS H28VSS J30VSS K17VSS K27VSS M32VSS A22VSS C20VSS E19VSS H20VSS J24VSS M28VSS J28VSS J16VSS F30VSS L29VSS A31VSS B32VSS E30VSS AE15VSS AG23VSS AD9VSS AF16VSS AH10VSS AJ10VSS AD15VSS AH16VSS K23VSS U18VSS AE16VSS AE17VSS A19VSS H32VSS F19VSS G19VSS N8VSS Y7VSS T19VSS V19VSS G21VSS C21VSS F21VSS AE14VSS AK16VSS U5VSS F22VSS F18VSS K30VSS C24VSS F24VSS M24VSS A25VSS D30VSS E25VSS G25VSS G20VSS G22VSS F27VSS E28VSS H21VSS J21VSS H16VSS T15VSS V17VSS C15VSS C4VSS U14VSS P15VSS A16VSS E16VSS G13VSS G16VSS P17VSS R16VSS R14VSS W16VSS C18VSS F16
VSSW18
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+MVREFD_0+MVREFS_0
+MVREFD_0
+MVREFS_1
+MVREFD_1
+MVREFD_1
MDA[0..63]
DQSA[0..7]
DQMA#[0..7]
MAA[0..12]
DQSA#[0..7]
A_BA[0..1]
MDA25
MDA48
MDA31
MDA63
MDA18
MDA11
MDA56
MDA52
MDA1
MDA36
MDA17
MDA21
MDA4
MDA55
MDA40
MDA10
MDA46
MDA19
MDA44
MDA57
MDA50
MDA26
MDA60
MDA20
MDA24
MDA3
MDA13
MDA32
MDA30
MDA37
MDA61
MDA29
MDA14
MDA7
MDA53
MDA16
MDA34
MDA39
MDA41
MDA23
MDA33
MDA62
MDA43
MDA8
MDA27
MDA45
MDA49
MDA0
MDA15
MDA58
MDA9
MDA12
MDA35
MDA2
MDA54
MDA59
MDA5
MDA42
MDA47
MDA38
MDA6
MDA51
MDA22
MDA28
DQSA#0DQSA#1
DQSA#3DQSA#2
DQSA#4DQSA#5
DQSA#7DQSA#6
MWEA0#
MCSA0#0
MRASA0#
MCASA0#
DQSA0DQSA1
DQSA3DQSA2
DQSA4DQSA5
DQSA7DQSA6
DQMA#2DQMA#1DQMA#0
DQMA#4
DQMA#7DQMA#6
DQMA#3
DQMA#5
MAA10
MAA6
MAA9
MAA3
MAA0
MAA5
MAA2
MAA4
MAA8MAA7
MAA11
MAA1
MCLKA0#MCLKA0
MCLKA1MCLKA1#
MCKEA0
MWEA1#
MCSA1#0
MRASA1#
MCASA1#
MCKEA1
MEM_RST
MEMTEST
MAA12
A_BA0A_BA1
+1.8VS
+1.8VS
+1.8VS
+1.8VS
MDA[0..63]
DQSA[0..7]
DQMA#[0..7]
MAA[0..12]
DQSA#[0..7]
A_BA[0..1]
ODTA0 ODTA1
MRASA0#
MCASA0#
MWEA0#
MCSA0#0
MCLKA0 MCLKA0#
MCLKA1 MCLKA1#
MCKEA0
MRASA1#
MCASA1#
MWEA1#
MCSA1#0
MCKEA1
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
EFL50 LS-2766P 1.0
M52-P Memory InterfaceCustom
6 1312/23/05 14:40:18
2005/12/22 2006/12/22
(15mils)(15mils)
(15mils)
(15mils)
(15mils)
(15mils)
GDDR2
(15mil)
C39
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
C40
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
C147
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
C145
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
1
2
R554.7K_0402_5%
1 2
R15243_0603_1%
1 2
R21100_0402_1%
1
2
MEMORY B
U2D
M52-P
DQB_0B12DQB_1C12DQB_2B11DQB_3C11DQB_4C8DQB_5B7DQB_6C7DQB_7B6DQB_8F12DQB_9D12DQB_10E11DQB_11F11DQB_12F9DQB_13D8DQB_14D7DQB_15F7DQB_16G12DQB_17G11DQB_18H12DQB_19H11DQB_20H9DQB_21E7DQB_22F8DQB_23G8DQB_24G6DQB_25G7DQB_26H8DQB_27J8DQB_28K8DQB_29L8DQB_30K9DQB_31L9DQB_32K5DQB_33L4DQB_34K4DQB_35L5DQB_36N5DQB_37N6DQB_38P4DQB_39R4DQB_40P2DQB_41R2DQB_42T3DQB_43T2DQB_44W3DQB_45W2DQB_46Y3DQB_47Y2DQB_48T4DQB_49R5DQB_50T5DQB_51T6DQB_52V5DQB_53W5DQB_54W6DQB_55Y4DQB_56R8DQB_57T8DQB_58R7DQB_59T7DQB_60V7DQB_61W7DQB_62W8DQB_63W9
MVREFD_1B3MVREFS_1C3
MAB_0 G4MAB_1 E6MAB_2 E4MAB_3 H4MAB_4 J5MAB_5 G5MAB_6 F4MAB_7 H6MAB_8 G3MAB_9 G2
MAB_10 D4MAB_11 F2MAB_12 H2MAB_13 H3MAB_14 F5MAB_15 D5
DQMB#_0 B8DQMB#_1 D9DQMB#_2 G9DQMB#_3 K7DQMB#_4 M5DQMB#_5 V2DQMB#_6 W4DQMB#_7 T9
QSB_0 B9QSB_1 D10QSB_2 H10QSB_3 K6QSB_4 N4QSB_5 U2QSB_6 U4QSB_7 V8
QSB_0# B10QSB_1# E10QSB_2# G10QSB_3# J7QSB_4# M4QSB_5# U3QSB_6# V4QSB_7# V9
ODTB0 D6ODTB1 J4
CLKB0 B4CLKB0# B5
CKEB0 C2
RASB0# E2
CASB0# D3
WEB0# B2
CSB0#_0 D2CSB0#_1 E3
CLKB1 N2CLKB1# P3
CKEB1 L3
RASB1# J2
CASB1# L2
WEB1# M2
CSB1#_0 K2CSB1#_1 K3
DRAM_RSTAA3
TEST_MCLKAA5
TEST_YCLKAA2
MEMTESTAA7
R19100_0402_1%
1
2
R62100_0402_1%
1
2
R61100_0402_1%
1
2
R584.7K_0402_5%
1 2
R20100_0402_1%
1
2
R59100_0402_1%
1
2
MEMORY A
U2C
M52-P
DQA_0M31DQA_1M30DQA_2L31DQA_3L30DQA_4H30DQA_5G31DQA_6G30DQA_7F31DQA_8M27DQA_9M29DQA_10L28DQA_11L27DQA_12J27DQA_13H29DQA_14G29DQA_15G27DQA_16M26DQA_17L26DQA_18M25DQA_19L25DQA_20J25DQA_21G28DQA_22H27DQA_23H26DQA_24F26DQA_25G26DQA_26H25DQA_27H24DQA_28H23DQA_29H22DQA_30J23DQA_31J22DQA_32E23DQA_33D22DQA_34D23DQA_35E22DQA_36E20DQA_37F20DQA_38D19DQA_39D18DQA_40B19DQA_41B18DQA_42C17DQA_43B17DQA_44C14DQA_45B14DQA_46C13DQA_47B13DQA_48D17DQA_49E18DQA_50E17DQA_51F17DQA_52E15DQA_53E14DQA_54F14DQA_55D13DQA_56H18DQA_57H17DQA_58G18DQA_59G17DQA_60G15DQA_61G14DQA_62H14DQA_63J14
MVREFD_0C31MVREFS_0C30
MAA_0 D26MAA_1 F28MAA_2 D28MAA_3 D25MAA_4 E24MAA_5 E26MAA_6 D27MAA_7 F25MAA_8 C26MAA_9 B26
MAA_10 D29MAA_11 B27MAA_12 B25MAA_13 C25MAA_14 E27MAA_15 E29
DQMA#_0 H31DQMA#_1 J29DQMA#_2 J26DQMA#_3 G23DQMA#_4 E21DQMA#_5 B15DQMA#_6 D14DQMA#_7 J17
QSA_0 J31QSA_1 K29QSA_2 K25QSA_3 F23QSA_4 D20QSA_5 B16QSA_6 D16QSA_7 H15
QSA_0# K31QSA_1# K28QSA_2# K26QSA_3# G24QSA_4# D21QSA_5# C16QSA_6# D15QSA_7# J15
ODTA0 F29ODTA1 D24
CLKA0 D31CLKA0# E31
CKEA0 B30
RASA0# B28
CASA0# C29
WEA0# B31
CSA0#_0 B29CSA0#_1 C28
CLKA1 B20CLKA1# C19
CKEA1 C22
RASA1# B24
CASA1# B22
WEA1# B21
CSA1#_0 B23CSA1#_1 C23
R18100_0402_1%
1
2
R57100_0402_1%
1
2
R604.7K_0402_5%
1 2
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8VS+1.8VS
+VGA_CORE +VGA_CORE +VGA_CORE
+2.5VS
+1.2VS
+VGA_CORE
+3VS+3VS
+2.5VS
+2.5VS
+VDDID
+2.5VS
+2.5VS
+2.5VS
+VGA_CORE
+LPVDD
+LPVDD
+VDD25
+VDDID+2.5VS
+2.5VS
+MPVDD
+A2VDD
+AVDD
+PVDD
+VDDCI
+VDDPLL
+1.2VS
+1.2VS
+PCIE_PVDD12
+PCIE_VDDR12A
+1.2VS
+PCIE_VDDR12B
+1.8VS
+VDDRH
+1.8VS
+VDDRH0
+VDDRH+VDDRH0
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
EFL50 LS-2766P 1.0
M52-P PowerCustom
7 1312/23/05 14:40:19
2005/12/22 2006/12/22
1000mA for GDDR12400mA for GDDR3
50mA
150mA
20mA
20mA
200mA
20mA
20mA
100mA
100mA
2000mA
50mA
50mA
65mA
20mA
130mA
20mA
VDDC+VDDCI=18A
500mA
50mA
400mA
Close to U2.AL29
Close to U2.N26
C3522U_0805_6.3V6M
1
2
C1410.1U_0402_16V4Z
1
2
C59
22U_0805_6.3V6M
1
2
L16
BLM18PG121SN1D_0603 1 2
C132 0.1U_0402_16V4Z 12
C72
0.1U_0402_16V4Z
1 2
C127
0.1U_0402_16V4Z
1 2
C134
0.1U_0402_16V4Z
1
2
C511U_0402_6.3V4Z
1
2
C67
0.1U_0402_16V4Z
1 2
C37
0.1U_0402_16V4Z
1 2
C102
0.1U_0402_16V4Z
1 2
C103
0.1U_0402_16V4Z
1 2
C57
0.1U_0402_16V4Z
1
2
C58
0.1U_0402_16V4Z
1
2
C194
1U_0603_10V6K
1
2
C95
0.1U_0402_16V4Z
1
2
C272
0.1U_0402_16V4Z
1
2
L2
BLM15AG102SN1D_0402 1 2
C421U_0402_6.3V4Z
1
2
C69
0.1U_0402_16V4Z
1 2
C930.1U_0402_16V4Z
1
2
L13
BLM18PG121SN1D_0603 1 2
C129
0.1U_0402_16V4Z
1
2
L8
BLM15AG102SN1D_0402 1 2
C124
0.1U_0402_16V4Z
1 2
C86
0.1U_0402_16V4Z
1 2
C117
0.1U_0402_16V4Z
1 2
+C268330U_V_6.3VM_R25@
1
2
C136
0.1U_0402_16V4Z
1 2C154
0.1U_0402_16V4Z
1
2
C74
0.1U_0402_16V4Z
1 2
C80
22U_0805_6.3V6M
1
2
L3
BLM15AG102SN1D_0402 1 2
L1
CHB1608U301_06031 2
C1000.1U_0402_16V4Z
1
2
C89
0.1U_0402_16V4Z
1 2
C116
0.1U_0402_16V4Z
1 2
C64
0.1U_0402_16V4Z
1 2
C126
0.1U_0402_16V4Z
1 2
C143
0.1U_0402_16V4Z
1
2
C122
0.1U_0402_16V4Z
1 2
C112
0.1U_0402_16V4Z
1 2
C113
22U_0805_6.3V6M
1 2
C70
0.1U_0402_16V4Z
1 2
L14
BLM18PG121SN1D_0603 1 2
C1330.1U_0402_16V4Z
1
2
C99
0.1U_0402_16V4Z
1 2
C1370.1U_0402_16V4Z
1
2
C730.1U_0402_16V4Z
1
2
C68
0.1U_0402_16V4Z
1 2
C71
0.1U_0402_16V4Z
1 2
C54
0.1U_0402_16V4Z
1 2
C531U_0603_10V6K
1
2
C88
0.1U_0402_16V4Z
1
2C139
0.1U_0402_16V4Z
1 2
C144
22U_0805_6.3V6M
1
2
C27022U_0805_6.3V6M
1
2
C135
0.1U_0402_16V4Z
12
L6BLM15AG102SN1D_0402
1 2
C451U_0402_6.3V4Z
1
2
+C269330U_V_6.3VM_R25@
1
2
C153
0.1U_0402_16V4Z
1
2
C155
22U_0805_6.3V6M
1
2
C84
0.1U_0402_16V4Z
1 2
C47
1U_0402_6.3V4Z
1
2
C267
22U_0805_6.3V6M
1
2
L5BLM15AG102SN1D_0402
1 2
C55
22U_0805_6.3V6M
1
2
C120
0.1U_0402_16V4Z
1 2C104
0.1U_0402_16V4Z
1 2
C82
0.1U_0402_16V4Z
1 2
C107
0.1U_0402_16V4Z
1 2
L15
BLM18PG121SN1D_0603 1 2
C94
0.1U_0402_16V4Z
1 2
L9
BLM15AG102SN1D_0402 1 2
C87
0.1U_0402_16V4Z
1 2
+C44
330U_D2E_2.5VM_R9
12
C142
0.1U_0402_16V4Z 1
2
C118
0.1U_0402_16V4Z
1 2
C156
22U_0805_6.3V6M
1 2
C128
0.1U_0402_16V4Z
1 2
C140
0.1U_0402_16V4Z
1 2
C36
0.1U_0402_16V4Z
1 2
C1011U_0402_6.3V4Z
1
2L10
BLM18PG121SN1D_0603 1 2
C96
22U_0805_6.3V6M
1
2
C34
22U_0805_6.3V6M
1
2
C105
0.1U_0402_16V4Z
1
2
C461U_0402_6.3V4Z
1
2
C108
0.1U_0402_16V4Z
1
2
C115
22U_0805_6.3V6M
1 2
C75
0.1U_0402_16V4Z
1
2
C63
0.1U_0402_16V4Z
1 2
C1931U_0603_10V6K
1
2
C138
22U_0805_6.3V6M
1
2
C60
0.1U_0402_16V4Z
1 2
C83
0.1U_0402_16V4Z
1 2
C149
0.1U_0402_16V4Z
1 2
C85
0.1U_0402_16V4Z
1
2
C271
0.1U_0402_16V4Z
1
2
C65
0.1U_0402_16V4Z
1
2
C125
22U_0805_6.3V6M
1
2
C106
22U_0805_6.3V6M
1 2
C15922U_0805_6.3V6M
1
2
L7
BLM15AG102SN1D_0402 1 2
L4
BLM18PG121SN1D_0603 1 2
C61
22U_0805_6.3V6M
1 2
C119
0.1U_0402_16V4Z
1 2
P
C
I
E
X
P
R
E
S
S
C
O
R
E
I
/
O
I
N
T
E
R
N
A
L
L
V
D
S
P
L
L
,
I
/
O
M
E
M
O
R
Y
I
/
O
I
/
O
M
E
M
I
/
O
C
L
O
C
K
POWER
T
M
D
S
C
R
T
T
V
P
L
L
U2E
M52-P
VDDR1C1VDDR1J1VDDR1M1VDDR1R1VDDR1V1VDDR1AA1VDDR1A3VDDR1P9VDDR1J10VDDR1N9VDDR1P10VDDR1A9VDDR1Y10VDDR1P8VDDR1R9VDDR1Y9VDDR1J11VDDR1A21VDDR1M10VDDR1N10VDDR1Y8VDDR1J18VDDR1J19VDDR1K21VDDR1A12VDDR1H13VDDR1A15VDDR1J20VDDR1J13VDDR1K11VDDR1K19VDDR1A18VDDR1L23VDDR1K20VDDR1K24VDDR1L24VDDR1H19VDDR1A24VDDR1K13VDDR1J32VDDR1A30VDDR1C32VDDR1F32VDDR1L32
PCIE_PVDD_12 V23PCIE_PVDD_12 N23PCIE_PVDD_12 P23PCIE_PVDD_12 U23
PCIE_VDDR_12 N29PCIE_VDDR_12 N28PCIE_VDDR_12 N27PCIE_VDDR_12 N26PCIE_VDDR_12 N25
VDDC AC11VDDC AC12VDDC P14VDDC U15VDDC W14VDDC W15VDDC R17VDDC R15VDDC V15VDDC V16VDDC T16VDDC U16VDDC T17VDDC U17VDDC V14VDDC R18VDDC T18VDDC V18VDDC P18VDDC P19VDDC R19VDDC W19VDDC AD11
VDDR3AB9VDDR3AB10VDDR3AA9VDDR3AC19VDDR3AD18VDDR3AC20VDDR3AD19VDDR3AD20
VDDR4AJ5VDDR4AM5VDDR4AL5VDDR4AK5
VDDR5AE2VDDR5AE3VDDR5AE4VDDR5AE5
VDD25 AC13VDD25 AC16VDD25 AC18
VDDCI W10VDDCI T14VDDCI W17VDDCI P16VDDCI T23VDDCI K14VDDCI U19
VDDPLL AC15
LPVDD/VDDL0 AE19
LVDDR/VDDL0 AF20LVDDR/VDDL0 AE20LVDDR/VDDL0 AF19
LVDDR/VDDL1 AC21LVDDR/VDDL1 AC22LVDDR/VDDL1 AD22
LVDDR/VDDL2 AE21LVDDR/VDDL2 AD21LVDDR/VDDL2 AE22
VDDRH0A27VDDRH1F1
VSSRH0A28VSSRH1E1
PCIE_VDDR_12 AL31PCIE_VDDR_12 AM31PCIE_VDDR_12 AM30PCIE_VDDR_12 AL32PCIE_VDDR_12 AL30PCIE_VDDR_12 AM28PCIE_VDDR_12 AL29PCIE_VDDR_12 AM29PCIE_VDDR_12 AM27
TXVDDR AJ6TXVDDR AK6TXVDDR AL6TXVDDR AM6
TPVDD AM8AVDDAL25AVDDAM25
VDD1DIAM23
A2VDDAM16A2VDDAL16
NC_A2VDDQAL14
VDD2DIAJ16
PVDD AJ14
MPVDD A6
C62
22U_0805_6.3V6M
1 2
C97
0.1U_0402_16V4Z
1 2
C123
0.1U_0402_16V4Z
1 2
C98
0.1U_0402_16V4Z
1 2
C131
0.1U_0402_16V4Z
1 2C56
22U_0805_6.3V6M
1 2
C146
0.1U_0402_16V4Z
1 2
C148
0.1U_0402_16V4Z
1 2
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDA27
MDA28
MDA30MDA31
MDA29
MDA26MDA24
MDA25
MDA22
MDA19MDA18
MDA23
MDA21
MDA17MDA16MDA20
MCLKA0#MCLKA0
MCLKA0#MCLKA0
MAA12
MAA0
MAA3
MAA1MAA2
MAA7
MAA4MAA5MAA6
MAA9
MAA11MAA10
MAA8
MAA12
MAA0
MAA3
MAA1MAA2
MAA7
MAA4MAA5MAA6
MAA9
MAA11MAA10
MAA8
MCKEA0
MCLKA0
MCLKA0#
MCSA0#0
MCKEA0
MCSA0#0
MCASA0#
MRASA0#
MWEA0#
MCASA0#
MRASA0#
MWEA0#
DQMA#2DQMA#3
DQSA#3
DQSA#2DQSA2
DQSA3
+VR_VREF_0 +VR_VREF_1
A_BA1A_BA0
A_BA1A_BA0
ODTA0 ODTA0
A_BA[0..1]
DQSA[0..7]
MDA[0..63]
MAA[0..12]
DQMA#[0..7]
DQSA#[0..7]
MDA7
MDA0MDA3MDA5
MDA6MDA4
MDA1MDA2
MDA9
MDA10
MDA8
MDA11
MDA12MDA13
MDA15MDA14
DQSA#1DQSA1
DQSA#0DQSA0
DQMA#0DQMA#1
+1.8VS +1.8VS
+1.8VS +1.8VS
+1.8VS +1.8VS
+1.8VS +1.8VS
+VDDL1+VDDL0
MCLKA0#MCLKA0
MCKEA0
MCSA0#0
MRASA0#
MCASA0#
MWEA0#
ODTA0
A_BA[0..1]
DQSA[0..7]
MDA[0..63]
DQMA#[0..7]
MAA[0..12]
DQSA#[0..7]
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
EFL50 LS-2766P 1.0
External GDDR2 A0Custom
8 1312/23/05 14:40:19
2005/12/22 2006/12/22
As close as ppossible to related pin
(25mil)
Default VRAM chip is SAM: SA00000YC00.
R9810K_0402_5%64@
1 2
C49
10U_0805_10V4Z64@
1
2
R3756_0402_1%
@1
2
C2371U_0603_10V6K64@
1
2
R1001K_0402_1%64@
1
2
C91
0.1U_0402_16V4Z64@
1
2
C2340.1U_0402_16V4Z64@
1
2
R421K_0402_1%64@
1
2
C2351U_0603_10V6K64@
1
2
C77
0.1U_0402_16V4Z64@
1
2
C76
0.1U_0402_16V4Z64@
1
2
C110
0.1U_0402_16V4Z64@
1
2
R3856_0402_1%@
1
2
C166
10U_0805_10V4Z64@
1
2
R1080_0402_5%64@
1
2
C158
0.1U_0402_16V4Z64@
1
2
C2310.1U_0402_16V4Z64@
1
2
R1090_0402_5%64@
1
2
C109
0.1U_0402_16V4Z64@
1
2
C161
0.1U_0402_16V4Z64@
1
2
C1140.1U_0402_16V4Z64@
1
2
U9
K4N56163QF-ZC33_FBGA84SAM64@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8A1M3A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8UDQSB7
LDQSE8LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
U8
K4N56163QF-ZC33_FBGA84SAM64@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8A1M3A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8UDQSB7
LDQSE8LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
C164
0.1U_0402_16V4Z64@
1
2
C167
10U_0805_10V4Z64@
1
2
C157
0.1U_0402_16V4Z64@
1
2
R1011K_0402_1%64@
1
2
C111
0.1U_0402_16V4Z64@
1
2
C163
0.1U_0402_16V4Z64@
1
2
C150
0.1U_0402_16V4Z64@
1
2
R9910K_0402_5%64@
1 2
C78
0.1U_0402_16V4Z64@
1
2
C48
10U_0805_10V4Z64@
1
2
C162
0.1U_0402_16V4Z64@
1
2
C92470P_0402_50V7K@
1
2
R471K_0402_1%64@
1
2
C2360.1U_0402_16V4Z64@
1
2
C151
0.1U_0402_16V4Z64@
1
2
C90
0.1U_0402_16V4Z64@
1
2
C152
0.1U_0402_16V4Z64@
1
2
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCLKA1
MCLKA1#
+VR_VREF_2 +VR_VREF_3
ODTA1 ODTA1
MCASA1#
MRASA1#
MWEA1#
MCKEA1
MCLKA1#MCLKA1
MCSA1#0
DQSA#5
DQSA#4
DQSA5
DQSA4
A_BA[0..1]
DQSA[0..7]
MDA[0..63]
MAA[0..12]
DQMA#[0..7]
DQSA#[0..7]
DQSA#6DQSA6
DQSA#7DQSA7
DQMA#7DQMA#6
MCASA1#
MRASA1#
MWEA1#
A_BA1A_BA0
DQMA#5DQMA#4
MCKEA1
MCLKA1MCLKA1#
MCSA1#0
MAA3
MAA7
MAA4
MAA6MAA5
MAA8
MAA12MAA11
MAA9MAA10
MAA1MAA0
MAA2
B1_A_BA1B1_A_BA0
B1_MAA3
B1_MAA7
B1_MAA4
B1_MAA6B1_MAA5
B1_MAA8
B1_MAA12B1_MAA11
B1_MAA9B1_MAA10
B1_MAA1B1_MAA0
B1_MAA2
B1_MAA3
B1_MAA7
B1_MAA4
B1_MAA6B1_MAA5
B1_MAA8
B1_MAA12B1_MAA11
B1_MAA9B1_MAA10
B1_MAA1B1_MAA0
B1_MAA2
B1_A_BA1B1_A_BA0
B1_MAA3
B1_MAA7
B1_MAA4
B1_MAA6B1_MAA5
B1_MAA8
B1_MAA12B1_MAA11
B1_MAA9B1_MAA10
B1_MAA1B1_MAA0
B1_MAA2
B1_A_BA1B1_A_BA0
MDA63
MDA56
MDA57
MDA60
MDA61MDA62
MDA58
MDA59
MDA36
MDA46
MDA44
MDA37
MDA34MDA39
MDA41
MDA33
MDA43
MDA35
MDA38
MDA45
MDA42MDA47
MDA40MDA55
MDA53
MDA54
MDA52
MDA50
MDA48
MDA51MDA49
MDA32
+1.8VS +1.8VS
+1.8VS +1.8VS
+1.8VS +1.8VS
+1.8VS +1.8VS
+VDDL2 +VDDL3
ODTA1
A_BA[0..1]
DQSA[0..7]
MDA[0..63]
DQMA#[0..7]
MAA[0..12]
DQSA#[0..7]
MCASA1#
MWEA1#
MCKEA1
MCLKA1#MCLKA1
MCSA1#0
MRASA1#
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
EFL50 LS-2766P 1.0
External GDDR2 A0Custom
9 1312/23/05 14:40:19
2005/12/22 2006/12/22
As close as ppossible to related pin
(25mil)
Default VRAM chip is SAM: SA00000YC00.
R1051K_0402_1%128@
1
2
C260
0.1U_0402_16V4Z128@
1
2
R111
0_0402_5%128@
1
2
R117 0_0402_5%128@1 2
R128 0_0402_5%128@1 2
C243
10U_0805_10V4Z128@
1
2
C255
0.1U_0402_16V4Z128@
1
2
R1100_0402_5%128@
1
2
C252
0.1U_0402_16V4Z128@
1
2
C254
10U_0805_10V4Z128@
1
2
C2320.1U_0402_16V4Z128@
1
2
C263
0.1U_0402_16V4Z128@
1
2
R122 0_0402_5%128@1 2
U10
K4N56163QF-ZC33_FBGA84SAM128@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8A1M3A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8UDQSB7
LDQSE8LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
R125 0_0402_5%128@1 2
C247
0.1U_0402_16V4Z128@
1
2
C2330.1U_0402_16V4Z128@
1
2
R11256_0402_1%@
1
2
R11356_0402_1%@
1
2
R118 0_0402_5%128@1 2
C256
0.1U_0402_16V4Z128@
1
2
C257
0.1U_0402_16V4Z128@
1
2
R119 0_0402_5%128@1 2
R129 0_0402_5%128@1 2
U11
K4N56163QF-ZC33_FBGA84SAM128@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8A1M3A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8CKK8
WEK3 VDDQ10 G9
VDDQ1 A9VDDQ2 C1VDDQ3 C3VDDQ4 C7VDDQ5 C9VDDQ6 E9VDDQ7 G1
VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2
VSSQ10 H8
VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9
UDQSA8UDQSB7
LDQSE8LDQSF7
VDDQ8 G3VDDQ9 G7
VDD1 A1VDD2 E1VDD3 J9VDD4 M9VDD5 R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NC#R8R8
NC#A2A2
NC#L1L1NC#R3R3NC#R7R7
NC#E2E2
R115 0_0402_5%128@1 2
R10310K_0402_5%128@
1 2
R116 0_0402_5%128@1 2
R1061K_0402_1%128@
1
2
R123 0_0402_5%128@1 2
R126 0_0402_5%128@1 2
R1071K_0402_1%128@
1
2
C242
10U_0805_10V4Z128@
1
2
C240
0.1U_0402_16V4Z128@
1
2
C250
0.1U_0402_16V4Z128@
1
2
C248
0.1U_0402_16V4Z128@
1
2
C266470P_0402_50V7K@
1
2
R10210K_0402_5%128@
1 2
C249
0.1U_0402_16V4Z128@
1
2
C251
0.1U_0402_16V4Z128@
1
2
C2380.1U_0402_16V4Z128@
1
2
C262
0.1U_0402_16V4Z128@
1
2
R120 0_0402_5%128@1 2
C258
0.1U_0402_16V4Z128@
1
2
C241
1U_0603_10V6K128@
1
2
C259
0.1U_0402_16V4Z128@
1
2
R124 0_0402_5%128@1 2
C246
0.1U_0402_16V4Z128@
1
2
R127 0_0402_5%128@1 2
C239
1U_0603_10V6K128@
1
2
C253
10U_0805_10V4Z128@
1
2
C244
0.1U_0402_16V4Z128@
1
2
R121 0_0402_5%128@1 2
C245
0.1U_0402_16V4Z128@
1
2
R1041K_0402_1%128@
1
2
C261
0.1U_0402_16V4Z128@
1
2
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DAC_BRIGINVT_PWMDISPOFF#
LCD_ID#
I2C_CLKI2C_DAT
VGA_LVDSB2-VGA_LVDSB2+
VGA_LVDSB0-VGA_LVDSB0+
VGA_LVDSB1+
VGA_LVDSBC+
VGA_LVDSB1-
VGA_LVDSBC- VGA_LVDSAC-
VGA_LVDSA0+VGA_LVDSA0-
VGA_LVDSAC+
VGA_LVDSA1+VGA_LVDSA1-
VGA_LVDSA2+VGA_LVDSA2-
VGA_ENVDD
3VS_DELAY
1.8VS_DELAY
susp#
susp#
+LCDVDD+5VALW
+3VS
+LCDVDD
+LCDVDD+3VS
B+
B+
B+
+3VS_D
+3VS
+1.8VS+1.8VS_D
LCD_ID#
DAC_BRIG INVT_PWM DISPOFF#
I2C_DATI2C_CLK
VGA_LVDSBC+VGA_LVDSBC-
VGA_LVDSB0+VGA_LVDSB0-
VGA_LVDSB1-
VGA_LVDSB2-
VGA_LVDSB1+
VGA_LVDSB2+
VGA_LVDSAC- VGA_LVDSAC+
VGA_LVDSA0+ VGA_LVDSA0-
VGA_LVDSA1+ VGA_LVDSA1-
VGA_LVDSA2- VGA_LVDSA2+ VGA_ENVDD
susp#
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
EFL50 LS-2766P 1.0
LVDS Conn/ Screw Hole
Custom
10 1312/23/05 14:40:19
2005/12/22 2006/12/22
AT LEAST 60 MIL
LCD/PANEL BD. CONN.
For IC FIXED
For Board FIXED
Those are at button side
LVDS Connector & Screw
Compal Electronics, Inc.
+3VS Delay
+1.8VS Delay
C275
0.1U_0402_25V4K@1
2
U12
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
H1H_C236B276D157@
1
C22522U_0805_6.3V6M@
1
2
FD1FIDUCAL@
1
C228
0
.
0
1
U
_
0
4
0
2
_
1
6
V
7
K
1
2
H6H_C315D122@
1
Q5
BSS84_SOT23-3@ 2
1
3
H7H_C315D122@
1
PJ7
JUMP_43X79
1 122
R82100K_0402_5%
1
2
C276
10U_1206_16V4Z@
1
2
R1311K_0402_5%@1 2 FD4
FIDUCAL@
1
H3H_C315D122@
1
H2H_C315D122@
1
G
D
S
Q2
2N7002_SOT23
2
1
3
C273
0.1U_0402_25V4K@1
2
PJ6
JUMP_43X79
11 2 2
C227
4.7U_0805_10V4Z
1
2
H5H_C315D157@
1
FD3FIDUCAL@
1
R84
10K_0402_5%
1
2
FD2FIDUCAL@
1
R83
10K_0402_5%
1 2
CF3SMD40M80@
1
C274
10U_1206_16V4Z@
1
2
R130
1K_0402_5%@
1 2
SG
D
Q3
AOS3401_SOT23
2
1
3
JP2
ACES_88326-4000
1133557799111113131515171719192121232325252727292931313333353537373939
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 40
L11CHB2012U121_0805
1 2
U13
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
H4H_C315D157@
1
L12
CHB2012U121_08051 2
CF2SMD40M80@
1
C22610U_0805_10V4Z@
1
2
Q6BSS84_SOT23-3@
2
1
3
FD6FIDUCAL@
1
R81
300_0402_5%
1
2
C230
0.1U_0402_16V4Z
1
2
G
D
SQ42N7002_SOT23
2
1
3
C229
4.7U_0805_10V4Z
1
2
FD5FIDUCAL@
1
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSE_1.2VB
S
T
_
V
G
A
BST_1.2V-1BST_VGA-1
ISE_VGA
LX_1.2V
DH_VGA
BST_1.2V
ISE_1.2V
DH_1.2V
DL_VGA DL_1.2V
ISL6227B+
LX_VGA
VSE_VGA
susp#
B+
+5VALW
+VGA_COREP
+1.2VSP
+VGA_CORE
+1.2VSP +1.2VS
+VGA_COREP
+3VS_D+3VS_D
+VGA_CORE
+5VALW
P
O
W
E
R
_
S
E
L
susp#
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
EFL50 LS-2766P 1.0
Power
Custom
11 1312/23/05 14:40:19
2005/12/22 2006/12/22
+1.2V
+VGA_CORE
+VGA_CORE
W/O POWER PLAY
0.95V
High
Power
Compal Electronics, Inc.
With POWER PLAY
POWER_SEL Low
1.0V
PJ3,PJ1,PJ2,PJ4 shortPJ3,PJ1,PJ2,PJ4 short
PR5=1.15K,PR16=20K,PR13=19.6K PR5=1.15K,PR16=20K
PR11 10K_0402_1%
1 2
PR2610K_0402_5%
1 2
PD1DAP202U_SOT323
2 3
1
P
R
2
4
4
.
7
_
1
2
0
6
_
5
%
@
1
2
PJ2
JUMP_43X1181 122
PR230_0402_5%@
1
2
PR15
0_0402_5%@
1
2
PC17
0
.
1
U
_
0
4
0
2
_
1
6
V
7
K
1
2
PC54.7U_0805_6.3V6K
1
2
PR81.27K_0402_1% 1 2
P
C
2
0
0
.
0
1
U
_
0
4
0
2
_
2
5
V
7
K
1
2
PC72.2U_0805_10V6K
1
2
PC16
0
.
1
U
_
0
4
0
2
_
1
6
V
7
K
1
2
PR200_0402_5%@
1 2
PC100.1U_0402_16V7K 12
PJ1
JUMP_43X1181 122
PL2
3UH_SPC-07040-3R0_5A_30%
1 2
P
R
1
3
1
9
.
6
K
_
0
4
0
2
_
1
%
1
2
PU1
ISL6227CA-T_SSOP28
G
N
D
1
LGATE12
PGND13
PHASE14
UGATE15
BOOT16
ISEN17
EN18
VOUT19VSEN110
OCSET111
SOFT112
D
D
R
1
3
V
I
N
1
4
PG115 PG2/REF 16
SOFT2 17
OCSET2 18
VSEN2 19VOUT2 20
EN2 21
ISEN2 22
BOOT2 23
UGATE2 24
PHASE2 25
PGND2 26
LGATE2 27
V
C
C
2
8
PR71.27K_0402_1%
1 2
G
D
S
PQ6
R
H
U
0
0
2
N
0
6
_
S
O
T
3
2
3
@
2
1
3
P
R
5
1
.
1
5
K
_
0
4
0
2
_
1
%
1
2
PR90_0402_5%
1
2
PQ2SI4800BDY_SO8
S
1
S
2
S
3
G
4
D
8
D
7
D
6
D
5
PC110.1U_0402_16V7K 12
PL11.4UH_CEP125-1R4_15.5A_20%
1 2
3
PR12
68K_0402_1%
1 2
PC210U_1206_25VAK
1
2
P
Q
3
I
R
F
7
8
3
2
_
S
O
8
S
1
S
3
G
4
D
8
D
7
D
6
D
5
S
2
PR1975K_0402_1%
1
2
P
R
2
7
1
0
K
_
0
4
0
2
_
5
%
1
2
P
C
1
3
0
.
0
1
U
_
0
4
0
2
_
2
5
V
7
K
1
2
PR18100K_0402_1%
1
2
PR40_0603_5%
1 2
PC110U_1206_25VAK
1
2
+PC12220U_6.3VM_R15
1
2
PC60.1U_0603_25V7K
1
2
P
C
1
8
0
.
1
U
_
0
4
0
2
_
1
6
V
7
K
@
1
2
G
D
S PQ5
R
H
U
0
0
2
N
0
6
_
S
O
T
3
2
3
2
1
3
+ PC14220U_6.3VM_R15
1
2
PR10
3.4K_0402_1%
1
2
PR22.2_0603_5%
1
2
PR21
0_0402_5%@
1 2
PQ1
IRF7821_SO8
S
1
S
2
S
3
G
4
D
8
D
7
D
6
D
5
P
R
2
5
0
_
0
4
0
2
_
5
%
1
2
PR151_1206_5%
1
2
PR17
0
_
0
4
0
2
_
5
%
1
2
PC8
0.01U_0402_25V7K
12
PR14
10K_0402_1%
1
2
P
C
1
9
6
8
0
P
_
0
4
0
2
_
5
0
V
7
K
@
1
2
PR22
0_0402_5%@
1 2
P
R
6
0
_
0
4
0
2
_
5
%
@
1
2
PL3
FBMA-L11-322513-151LMA50T_1210
1 2PC4
4.7U_1206_25V6K
1
2
PC34.7U_1206_25V6K
1
2
PJ5
JUMP_43X79
1 122
P
R
1
6
2
0
K
_
0
4
0
2
_
1
%
1
2
PC9
0.01U_0402_25V7K
12
PQ4SI4810BDY-T1_SO8
S
1
S
2
S
3
G
4
D
8
D
7
D
6
D
5
PC150.01U_0402_25V7K
1
2
PR30_0603_5%
1 2
PJ3
JUMP_43X1181 122
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
EFL50 LS-2766P 1.0
P.I.R.Custom
12 1312/23/05 14:40:19
2005/12/22 2006/12/22
Version change list (P.I.R. List)=========== 2005/12 R0.2 ==================
01. Reserve +3VS and +1.8VS delay circuit and reserve Jump.
02. Change C42, C45, C46, C47 and C51, from 0.1U to 1U.
Reserve PJ6, PJ7, U12, U13, C273, C274, C275, C276,Q5, Q6, R130 and R131.
== To meet ATI PWR sequence.
== For 3D hang issue.03. Change C101, from 0.1U to 1U. == For 3D hang issue.04. Add C44 as 330U == For 3D hang issue.05. Delete R63, 10K_0402_5% == PCIE TX power saving.
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCompal Electronics, Inc.
EFL50 LS-2766P 1.0
For BOM
Custom
13 1312/23/05 14:40:19
2005/12/22 2006/12/22
SA00000JW00--S IC D2 16M16/600 HY5PS561621AFP-33FBGA
U9
SA00000JW00HYN64@
SA00000JW00--S IC D2 16M16/600 HY5PS561621AFP-33FBGA
U10
SA00000JW00HYN128@
DA800005F10--PCB ZKD LS-2766P REV1 VGA/B
ZZZ
DA800005F10
SA00000JW00--S IC D2 16M16/600 HY5PS561621AFP-33FBGA
U11
SA00000JW00HYN128@
SA00000JW00--S IC D2 16M16/600 HY5PS561621AFP-33FBGA
U8
SA00000JW00HYN64@