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Address Translation

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Address Translation. Andy Wang Operating Systems COP 4610 / CGS 5765. Translation table. Data reads or writes (untranslated). Recall from Last Time…. Translation tables are implemented in HW, controlled by SW. Virtual addresses. Physical addresses. This Lecture…. - PowerPoint PPT Presentation
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Address Address Translation Translation Andy Wang Andy Wang Operating Systems Operating Systems COP 4610 / CGS 5765 COP 4610 / CGS 5765
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Page 1: Address Translation

Address TranslationAddress TranslationAndy WangAndy Wang

Operating SystemsOperating SystemsCOP 4610 / CGS 5765COP 4610 / CGS 5765

Page 2: Address Translation

Recall from Last Time…Recall from Last Time…

Virtual addresses

Physicaladdresses

Translation table

Data reads or writes(untranslated)

Translation tables are implemented in HW, Translation tables are implemented in HW, controlled by SWcontrolled by SW

Page 3: Address Translation

This Lecture…This Lecture…

Different translation schemesDifferent translation schemes Base-and-bound translationBase-and-bound translation SegmentationSegmentation PagingPaging Multi-level translationMulti-level translation Paged page tablesPaged page tables Hashed page tablesHashed page tables Inverted page tablesInverted page tables

Page 4: Address Translation

AssumptionsAssumptions

32-bit machines32-bit machines1-GB RAM max1-GB RAM max

Page 5: Address Translation

Base-and-Bound TranslationBase-and-Bound Translation

Each process is loaded into a contiguous Each process is loaded into a contiguous region of physical memoryregion of physical memoryProcesses are protected from one anotherProcesses are protected from one another

Virtual address Physical address

Base

+

Error>

Bound

Page 6: Address Translation

Base-and-Bound TranslationBase-and-Bound Translation

Each process “thinks” that it is running on Each process “thinks” that it is running on its own dedicated machine, with memory its own dedicated machine, with memory addresses from 0 to boundaddresses from 0 to bound

codedata…

stack

Virtual addresses Physical addresses0

bound

codedata…

stack

base = 6250

6250 + bound

Page 7: Address Translation

Base-and-Bound TranslationBase-and-Bound Translation

An OS can move a process aroundAn OS can move a process around By copying bitsBy copying bits Changing the base and bound registersChanging the base and bound registers

Page 8: Address Translation

Pros and Cons of Base-and-Bound Pros and Cons of Base-and-Bound TranslationTranslation

+ Simplicity + Simplicity + Speed+ Speed- - External fragmentationExternal fragmentation: memory is : memory is

wasted because the available memory is wasted because the available memory is not contiguous for allocationnot contiguous for allocation

- Difficult to share programs- Difficult to share programs Each instance of a program needs to have a Each instance of a program needs to have a

copy of the code segmentcopy of the code segment

Page 9: Address Translation

Pros and Cons of Base-and-Bound Pros and Cons of Base-and-Bound TranslationTranslation

- Memory allocation is complex- Memory allocation is complex Need to find contiguous chunks of free Need to find contiguous chunks of free

memorymemory Reorganization involves copying Reorganization involves copying

- Does not work well when address spaces - Does not work well when address spaces grow and shrink dynamicallygrow and shrink dynamically

Page 10: Address Translation

SegmentationSegmentation

SegmentSegment: a region of logically contiguous : a region of logically contiguous memorymemorySegmentation-based transitionSegmentation-based transition: use a : use a table of base-and-bound pairstable of base-and-bound pairs

Page 11: Address Translation

Segmentation IllustratedSegmentation IllustratedVirtual addresses Physical addresses

code0x4000

0x46ff

0x0

0x6ffcode

data0x1000

0x14ff

data0x0

0x4ff

stack0x3000

0x3fff

stack

0x2000

0x2fff

Page 12: Address Translation

Segmentation DiagramSegmentation Diagram

Virt seg # Offset Phy addr

Physical seg base Seg bound

Physical seg base Seg bound

Physical seg base Seg bound

+

Error>

log2(1GB) = 30 bits for 1GB of RAM

30 bits up to 30 bits

up to 30 bits

32 - 30 = 2 bitsfor 32-bit machines

22 entries

Page 13: Address Translation

Segmentation DiagramSegmentation Diagram

2 0x200

>

0x2200

0x4000 0x700

0x0 0x500

0x2000 0x1000

+

code

data

stack

Page 14: Address Translation

Segmentation TranslationSegmentation Translation

virtual_address = virtual_address = virtual_segment_number:offsetvirtual_segment_number:offsetphysical_base_address = physical_base_address = segment_table[virtual_segment_number]segment_table[virtual_segment_number]physical_address = physical_address = physical_base_address:offsetphysical_base_address:offset

Page 15: Address Translation

Pros and Cons of SegmentationPros and Cons of Segmentation

+ Easier to grow and shrink individual + Easier to grow and shrink individual segmentssegments

+ Finer control of segment accesses+ Finer control of segment accesses e.g., read-only for shared code segmente.g., read-only for shared code segment

+ More efficient use of physical space + More efficient use of physical space + Multiple processes can share the same + Multiple processes can share the same

code segmentcode segment- Memory allocation is still complex- Memory allocation is still complex

Requires contiguous allocationRequires contiguous allocation

Page 16: Address Translation

PagingPaging

Paging-based translationPaging-based translation: memory : memory allocation via fixed-size chunks of allocation via fixed-size chunks of memory, or memory, or pagespagesThe memory manager uses a The memory manager uses a bitmapbitmap to to track the allocation status of memory track the allocation status of memory pagespagesTranslation granularity is a pageTranslation granularity is a page

Page 17: Address Translation

Paging IllustratedPaging IllustratedVirtual addresses Physical addresses

0x0

0x1000

0x2000

0x0

0x3000

0x3fff

0x1000

0x2000

0x3000

0x4000

Page 18: Address Translation

Paging DiagramPaging Diagram

Virtual page number Offset

Physical page number

Physical page number

Physical page number

Physical page number Offset

Page table size

>

Error

32 – 12 = 20 bits for 32-bit machines

log2(1GB) = 30 bits for 1GB of RAM

log2(4KB) = 12 bits for 4-KB pages

220 entries

Page 19: Address Translation

Paging ExamplePaging Example

0 0x400 4

>

4

0

2

4 0x400

0

1

2

Page 20: Address Translation

Paging TranslationPaging Translation

virtual_address = virtual_address = virtual_page_number:offsetvirtual_page_number:offsetphysical_page_number = physical_page_number = page_table[virtual_page_number]page_table[virtual_page_number]physical_address = physical_address = physical_page_number:offsetphysical_page_number:offset

Page 21: Address Translation

Pros and Cons of PagingPros and Cons of Paging

+ Easier memory allocation+ Easier memory allocation+ Allows code sharing+ Allows code sharing- - Internal fragmentationInternal fragmentation: allocated pages : allocated pages

are not fully used are not fully used - The page table size can potentially be very - The page table size can potentially be very

largelarge 32-bit architecture with 1-KB pages can 32-bit architecture with 1-KB pages can

require 4 million table entriesrequire 4 million table entries

Page 22: Address Translation

Multi-Level TranslationMulti-Level Translation

Segmented-paging translationSegmented-paging translation: breaks : breaks the page table into segmentsthe page table into segmentsPaged page tablesPaged page tables: Two-level tree of : Two-level tree of page tablespage tables

Page 23: Address Translation

Segmented PagingSegmented Paging

30 bits for 1-GB RAM 32 - 3 - 12 = 17 bits

12 bits for 4-KB pages

23 entries

Seg # OffsetVirt page #

log2(6 segments) = 3 bits

Error>

+

Page table base Page table bound

Page table base Page table bound

Page table base Page table bound

Phy page #

Phy page #

Phy page #

18 bitsnum ofentriesdefined bybound; up to 217 entries

Page 24: Address Translation

Segmented PagingSegmented Paging

Page table size

>

Error

Seg # OffsetVirt page #

21732 – 3 – 12 = 17 bits

Phy page # Offset

Phy page #

Phy page #

Phy page #

log2(1GB) = 30 bits for 1GB of RAM

Page 25: Address Translation

Segmented Paging TranslationSegmented Paging Translation

virtual_address = virtual_address = segment_number:page_number:offsetsegment_number:page_number:offsetpage_table = page_table = segment_table[segment_number]segment_table[segment_number]physical_page_number =physical_page_number =page_table[page_number]page_table[page_number]physical_address = physical_address = physical_page_number:offsetphysical_page_number:offset

Page 26: Address Translation

Pros and Cons of Segmented Pros and Cons of Segmented PagingPaging

+ Code sharing+ Code sharing+ Reduced memory requirements for page + Reduced memory requirements for page

tablestables- Higher overhead and complexity- Higher overhead and complexity- Page tables still need to be contiguous- Page tables still need to be contiguous- Each memory reference now takes two - Each memory reference now takes two

lookupslookups

Page 27: Address Translation

Paged Page TablesPaged Page Tables

Page table num OffsetVirt page num

Page table address (30 bits)

Page table address

Page table address

Phy page num

Phy page num

Phy page num

Phy page num (18 bits) Offset

12 bits for 4-KB pages12 bits

212 entries

28 entries

Page 28: Address Translation

Paged Page Table TranslationPaged Page Table Translation

virtual_address = virtual_address = outer_page_num:inner_page_num:offsetouter_page_num:inner_page_num:offsetpage_table = page_table = outer_page_table[outer_page_num]outer_page_table[outer_page_num]physical_page_num = physical_page_num = inner_page_table[inner_page_num]inner_page_table[inner_page_num]physical_address = physical_address = physical_page_num:offsetphysical_page_num:offset

Page 29: Address Translation

Pros and Cons of Paged Page Pros and Cons of Paged Page TablesTables

+ Can be generalized into multi-level paging+ Can be generalized into multi-level paging- Multiple memory lookups are required to - Multiple memory lookups are required to

translate a virtual addresstranslate a virtual address Can be accelerated with Can be accelerated with translation translation

lookaside bufferslookaside buffers (TLBs) (TLBs)Stores recently translated memory addresses for Stores recently translated memory addresses for short-term reusesshort-term reuses

Page 30: Address Translation

Hashed Page TablesHashed Page Tables

Physical_address = hash(virtual_address)Physical_address = hash(virtual_address)+ Conceptually simple+ Conceptually simple- Need to handle collisions- Need to handle collisions- Need one hash table per address space- Need one hash table per address space

Page 31: Address Translation

Inverted Page TableInverted Page Table

One hash entry per physical pageOne hash entry per physical pagephysical_address = hash(pid, physical_address = hash(pid, virtual_address)virtual_address)

+ The number of page table entry is + The number of page table entry is proportional to the size of physical RAMproportional to the size of physical RAM

- Collision handling- Collision handling


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