Advanced PE Chapter 2

125

Chapter 2:

Single Inductor Multi-output DC-DC

Converters

126

2.1 Introduction

Applications of the traditional DC-DC converters such as Buck and Boost

converters have been widespread. The DC-DC converters vary in power and voltage

level in various applications. Many applications involve only one load and one

power source. In these cases, the traditional DC-DC converters are the only

candidates to perform power conversion. However, more complicated applications

with several loads and differing power demands may require multi-outputs. A

traditional way to develop multi-output converters is to use transformers. A

transformer, which has a primary winding and a number of secondary windings,

supplies different loads. In some applications, the requirement of galvanic isolation

demands the use of transformers. However, in general, the transformer-based

converters have the deficiencies of excess size, weight and cost of the transformer.

Having several high power loads, the dimensions of the transformer increases. The

general schematic of a multi-output transformer-based converter is illustrated in

Fig.2-1 (a).

The other way to generate several output voltages from a single input voltage is to

utilize multiple single output converters. A general schematic of the multiple single

output converters supplied by a single voltage source is illustrated in Fig.2-1 (b).

Each converter is designed for a specific load and the performance and/or

malfunction of each load/converter does not affect the other loads/converters.

Although this method improves the reliability of the system, the cost, volume and

weight of the system increases. The utilization of a converter for each load may

become inefficient for the overall design when some of the loads can tolerate more

fluctuations and do not need high quality converters. The problem with the multiple

converters is the number of passive and active elements which are proportional to

the number of output voltages. For instance using n Buck converters to supply n-

outputs, n inductors are required.

One solution is to share some of the active and passive elements of the converters.

This approach leads to development of multi-output DC-DC converters which is the

main focus of this chapter. The advantage of this configuration is that fewer passive

and active elements will be utilized for a given number of outputs. Therefore, the

size, weight and cost of the whole system will be reduced. However, the complexity

127

of the control system and limitations in load power are the main drawbacks of this

configuration.

C R v3(t)

vin(t)

v1(t)

v2(t)

Transformer

C R

C R

+

-

(a)

v3(t)

v2(t)

v1(t)vin(t)

C R

C R

R+

-

C

(b)

Fig.2-1: General schematic of a) multi-output transformer-based DC-DC converter

and b) multi-output transformer-less DC-DC converter

There are applications where several loads are supplied by a single main power

source, such as a fuel cell or a photovoltaic panel. Loads are different appliances

ranging from traction motors, lighting and air conditioners to controllers. The power

demand and power condition of each load is different. Some loads need a high level

128

of power but they are not very sensitive to voltage fluctuations and the quality of

power is tolerable. However, there are other loads which need adjustable voltages

with a minimum ripple to operate properly. Therefore, the switching converters

should be designed according to the load demand and the power flow direction

(from a main source to loads).

The series connected loads, practically exist in multi-level inverters. The DC-link

capacitors are connected in series and the current driven from them is determined by

the inverter. In another example, a system including several DC loads may benefit if

some of the loads are connected in series.

Ripple is a difference between the actual voltage across the load and the reference

value. The quality of the voltage may be quantified by the parameter of ripple. Three

cases are illustrated in Fig.2-2. The first case, shown in Fig.2-2 (a), illustrates the

ripple for low switching frequency and filter with small inductor and capacitor. To

reduce the ripple, the switching frequency may be increased for the same filter

parameters [Fig.2-2 (b)]. The advantage of this solution is improvement in quality

without the extra cost of passive circuit elements (inductor and capacitor). However,

the disadvantage is an increase in the switching loss and a decrease in the efficiency

of the system. The other solution is to increase the values of filter parameters with

the same switching frequency. The result of this case is illustrated in Fig.2-2 (c).

ripple V

v(t)

ripple Vv(t)

(a)

(c)

ripple Vv(t)

(b)

Fig.2-2: Output voltage (V), average of the output voltage (V ), reference voltage

(Vref) ; a) Low quality b) same LC components higher frequency and c) large LC

components same frequency

129

The building blocks of multi-output DC-DC converters are based on traditional DC-

DC converters such as Buck, Boost, and positive Buck-Boost. Before starting the

circuit analysis of multi-output converters, the traditional DC-DC converters are

briefly explained.

Conventionally, switching DC-DC converters are designed to provide a regulated

DC-source required by a specific load. There is an input power supply of which the

voltage (vin(t)) may fluctuate, and the level of the input current (iin(t)) may vary. The

required property of the DC-DC converter is to provide the demanded output voltage

(vout(t)) despite variations of the input voltage and the load current. If the efficiency

of the DC-DC converter is 100%, then the output power is equal to the input power.

Fig.2-3 illustrates a general schematic of a DC-DC converter.

DC-DC Convertervin(t) vout(t)

iout(t)iin(t)

+

-

L

O

A

D

Fig.2-3: General schematic of a DC-DC converter

There are two basic DC-DC converters, namely, Buck and Boost converters. By

cascading Buck and Boost converters, the topology of positive Buck-Boost

converter can be developed. Fig.2-4 illustrates the topologies of these three

converters, and their multi-output modifications are presented in this chapter.

Although all of the converters shown in Fig.2-4 fit with the representation in Fig.2-

3, each one of these topologies has limitations.

The conversion ratios of Buck and Boost converters are determined by the duty

cycle of their switch. Assuming the ripple is negligible (vout(t)=Vout and vin(t)=Vin),

(2-1 and 2-2) illustrate the relationship between the input voltage, the output voltage,

and the duty cycle of Buck and Boost converters.

inSout VDVBuck

(2-1)

130

inS

out VD

V

Boost1

1 (2-2)

where BuckSD is the duty cycle of SBuck, and BoostSD is the duty cycle of SBoost.

Considering that the duty cycle is between 0 and 1, the output voltage of the Buck

converter is less than its input voltage. For the Boost converter, the output voltage is

more than the input voltage.

L

O

A

D

vin(t) vout(t)

iout(t)iin(t) SBuck

DBuck

L

C+

-

(a)

L

O

A

D

vin(t) vout(t)

iout(t)iin(t)

SBoost

DBoostL

C+

-

(b)

L

O

A

D

vin(t) vout(t)

iout(t)iin(t)

SBoost

SBuck

DBuck

DBoostL

C

(c)

+

-

Fig.2-4: a) Buck converter b) Boost converter and c) positive Buck-Boost converter

Other DC-DC converters may be developed based on Buck and Boost converters.

For instance, the positive Buck-Boost converter is developed by connecting a Buck

131

and a Boost converter in series, as shown in Fig.2-4.(c). The Positive Buck-Boost

converter covers the operation areas of Buck and Boost converters. The relationship

between the input voltage, the output voltage, and the duty cycles is presented in (2-

3).

inS

Sout V

D

DV

Boost

Buck

1 (2-3)

In addition, the positive Buck-Boost converter has a switching state which is

unavailable in either Buck or Boost converters. By turning SBuck off and turning SBoost

on, the inductor current will be circulated in a closed loop. Therefore, it is not

conducted to any load nor it is discharged significantly.

In this chapter, multi-output modifications of these three converters are presented.

Topologies of a Buck, a Boost and a Positive Buck-Boost multi-output converter are

presented in the next sections.

Generally, the concept of the multi-output DC-DC converters is to share one part of

the converter between several loads. However, there are components which should

be devoted to one load. There are two general topologies of multi-output converters:

series connected loads and parallel connected loads. Other topologies may be

developed from these two general topologies; however, this is not the focus of this

chapter. Fig.2-5 illustrates two general topologies of the multi-output converter with

series and parallel loads.

Parallel connected loads are more common since most of the loads have a

connection to a common node.

As seen in Fig.2-5, an inductor, a switch, and a diode are the common components

of a DC-DC converter which can be the front part of a Buck, a Boost or a Positive

Buck-Boost converter. Since each load may require a different level of voltage, the

output capacitors may not be shared between different loads. Diodes (D1-Dn) in

series with switches (S1-Sn), in both parallel and series load configurations are

included for protection of the switches. The switches are designed to block forward

voltage when they are turned off. However, since turning on each switch changes

the voltage across other switches, the diodes in series with switches are included to

block any reverse voltage across the turned off switches. For instance, when the

loads are connected in series [Fig.2-5.(a)], if S1 turns on, S2 should be turned off and

the voltage across S2 would be –v2(t), which is negative and may damage the switch.

132

By adding a diode in series with the switch (S2 in this case), the reverse voltage will

be blocked by the diode (D2 in this case).

vin(t)

v3(t)

v2(t)

v1(t)

Dn

D2

D1S1

S2

+

-

Sn

(a)

vin(t)

vn(t)v2(t)v1(t)

Dn

D2

D1S1

S2

Sn

+

-

(b)

Fig.2-5: Multi-output DC-DC converter a) parallel-connected and b) series-

connected

To develop steady state equations of the multi-output converters, we need to explain

the mathematical modeling of the steady state performance of the converters based

on the averaging method; this is explained below.

133

2.2 Averaging Method

In steady state analysis, when the converter operates in continuous conduction mode

(CCM), the output voltages and the inductor current have a constant DC level and a

high frequency component with small amplitude, which is referred to as a “ripple”.

To calculate the relationship between the input voltage, the output voltages, the load

resistances and the duty cycles of the switches, the ripple can be ignored. The duty

cycle of each switch is defined as the ratio of the turn on time of the switch to the

switching cycle (Tsw).

In the steady state condition, the DC levels of the inductor current and the output

voltages do not change over one switching cycle. In other words, in the steady state

condition, the inductor current or the capacitor voltages at the beginning and at the

end of each switching cycle are equal, as is formulated in (2-4).

)()(

)()(

tvTtv

tiTti

jj CswC

LswL (2-4)

Where iL(t) and )(tvjC are instantaneous levels of the inductor current and the j

th

output voltage respectively. To derive the steady state equations, the average of the

inductor current over one switching cycle is named IL. The average of the output

voltage ( )(tvjC ) over one switching cycle is named

jCV . In the steady state

condition, the average of the inductor current and the output voltages is constant, but

the instantaneous values of the inductor current and the output voltages change.

Fig.2-6 illustrates the inductor current (iL(t)) and the capacitor voltage ( )(tvjC ) and

their averages values (LI ,

jCV ). The instantaneous change in the inductor current

(iL(t)) depends on the inductance value (L), the voltage across the inductor (vL(t)),

and the time interval at which the voltage has been applied. Likewise, the change of

the capacitor voltage ( )(tvjC ) depends on the capacitance value (Cj), the capacitor

current ( )(tijC ), and the time interval at which the current is conducted. (2-5)

formulates this fundamental relationship.

134

iL(t) iL(t+Tsw)

0dt

diL 0dt

diL

t t+Tsw

vCj(t) vCj(t+Tsw)

iL(t)

0dt

dvCj0

dt

dvCj

t t+Tsw

(a)

(b)

tvjC

Fig.2-6: Actual and average quantities of a) inductor current and b) capacitor voltage

Assuming that the switching frequency is high and the current or the voltage ripple

is not significant, the instantaneous current or voltage variation is not important.

dt

tdvCti

dt

tdiLtv

j

jC

LL

j

)()(

)()(

(2-5)

Averaging the above equation over one switching cycle and considering the steady

state condition:

135

00)()(1

)(1

)(

00)()(1

)(1

)(

sw

j

CswC

j

Tt

t

Cj

sw

Tt

t

C

sw

CC

swsw

LswL

Tt

t

L

sw

Tt

t

L

sw

LL

TC

Tsw

tvTtvCdvC

Tdtti

TtiI

TL

T

tiTtiLLdi

Tdttv

TtvV

jj

sw

j

sw

jjj

swsw

(2-6)

where VL is the average of vL(t), and jCI is the average of )(ti

jC , over one

switching cycle. According to (2-4) the average voltage across the inductor (VL) and

the average current through the capacitor Cj are zero.

(2-6) is applied to calculate the steady state levels of the inductor current, and the

output voltages as functions of the input voltage, the load resistances and the duty

cycle. For each converter, the average of vL(t) over one switching cycle (VL) is

determined by the time interval of each switching state and the voltage applied to the

inductor in that switching cycle; a similar concept applies for the current through the

capacitor ( )(tijC ). Assuming a multi-output DC-DC converter with n switching

states (s1, s2, …, sn) with time intervals (Ts1, Ts2, …, Tsn) which applies voltages (Vs1,

Vs2, …, Vsn) across the inductor and currents (Is1j, Is2j, … , Isnj) through the capacitor

Cj, (2-6) may be rewritten as below:

0]...[1

)(1

)(

0]...[1

)(1

)(

2211

2211

nnjjj

sw

jj

nn

sw

SSSSSS

sw

Tt

t

C

sw

C

SSSSSS

sw

Tt

t

L

sw

L

TITITIT

dttiT

ti

TVTVTVT

dttvT

tv

(2-7)

Solving these equations for a topology allows the calculation of the steady state

levels of the inductor current and the output voltages as a function of the input

voltage, the output loads, and the time interval of each switching state or the duty

cycle of each switch. For simplicity, steady state equations for double-output DC-

DC converters are explained in detail. Using the averaging method, switching states

and waveforms are presented to clarify the analysis.

2.3 Topologies and Circuit Analysis

Multi-output topologies presented in this chapter are categorized into parallel and

series configurations. According to the traditional DC-DC converters, three different

136

DC-DC converters – Buck, Boost and Positive Buck-Boost – have been modified to

create multi-output converters. In this chapter, we analyze six general double-output

DC-DC converter topologies and define steady state equations.

2.3.1 Multi-output Buck Converter

In a multi-output Buck converter, SBuck, DBuck, and the inductor are common

components between loads. Each load has a devoted capacitor, a diode, and a

switch. Topologies with parallel and series loads are explained in this section.

Fig.2-7 shows a multi-output Buck converter topology with parallel loads. The first

part of the circuit is similar to the conventional Buck converter; and the input

switch, SBuck controls the power flow. There is a common inductor for several output

LC filters. Since the inductor current must be circulated through one of the outputs,

one of the output switches, S1, S2, … ,Sn must be turned on at any instant.

R1C1

DBuck

L

vin(t)

SBuck S1D1

S2

R2C2 RnCn

D2

Dn

v1(t) v2(t) vn(t)

Sn

Common

components

Fig.2-7: Multi-output Buck converter with parallel-connected loads

As may be observed in Fig.2-7, the switches used to supply loads may conduct

current in single direction and may block voltage in both directions. The reason is

that the inductor current flows only from the inductor to the loads. However, the

voltage across each switch depends on the operation of other switches; therefore, the

voltage across each switch may be positive or negative.

If one of the output voltages (in this case, vn(t)) is known to be more than other

output voltages, the switch (Sn) which conducts the inductor current to that output

voltage vn(t) may be removed. The reason is that when all other switches are turned

137

off, the inductor current automatically flows through Dn and supplies vn(t). Since

vn(t) is more than other output voltages when any other switch (Sk) is turned on, the

voltage at the anode of Dn is vk(t) and vk(t) <vn(t); therefore, Dn does not conduct

and acts like a turned off switch.

Fig.2-8 shows a multi-output Buck converter topology with series loads. Similar to

the multi-output Buck converter with parallel loads, the inductor current must be

conducted through one of the output switches (S1 to Sn-1). In other words, if the

inductor current is conducted by Sk, it supplies a series connected loads (R1-Rk).

R1C1DBuck

L

vin(t)

SBuck

C2 R2

S1

S2

D1

D2

Cn Rn

Dn

vn(t)

v2(t)

v1(t)

Common

components

Sn

Fig.2-8: Multi-output Buck converter with series loads

As can be seen in Fig.2- 8, the last load, Rn, can be connected to the inductor

through only one diode, Dn, and without any switch. The reason is the fact that when

all Sj switches are turned off, the current stored in the inductor turns the diode on

and supplies Rn and the rest of the loads. When any of the switches (Sj) is turned on,

the voltage across the diode Dn becomes negative and Dn will be turned off.

Therefore, there is no need to add an extra switch in series with Dn.

138

2.3.1.1 Double-output Buck Converter Analysis with Parallel

Connected Loads

The topology of a double-output Buck converter with parallel loads is illustrated in

Fig.2-9, considering that V2 is more than V1 and the switch S2 has been removed.

R1C1DBuck

L

vin(t)

SBuck S1 D1

R2C2

D2

v1(t) v2(t)

Common

components

Fig.2-9: Double-output Buck converter

Four switching states of the double-output Buck converter supplying two parallel-

connected loads are illustrated in Fig.2-10.

Considering the switching states illustrated in Fig.2-10, one switching cycle

including all the switching states for the double-output Buck converter with the

parallel loads is shown in Fig.2-11.

Fig.2-11 (a) illustrates the voltage and current waveforms of the inductor. In each

switching state, the voltage across the inductor changes and as a result, the inductor

current is changed, with different slope in each switching state. Fig.2-11 (b) and (c)

illustrate the current through each output capacitor and the resultant variation of the

voltages across the output capacitors. The effect of each switching state on the

inductor current and the output voltages is explained here in detail.

139

R1C1DBuck

L

vin(t)

SBuck S1 D1

R2C2

D2

v1(t) v2(t)

(a): 11: SBuck: on , S1: on

R1C1DBuck

L

vin(t)

SBuck S1

D1

R2C2

D2

v1(t) v2(t)

(b): 10: SBuck: on , S1: off

R1C1DBuck

L

vin(t)

SBuck S1 D1

R2C2

D2

v1(t) v2(t)

(c): 00: SBuck: off , S1: off

R1C1DBuck

L

vin(t)

SBuck S1 D1

R2C2

D2

v1(t) v2(t)

(d): 01: SBuck: off , S1: on

Fig.2-10: Switching states of a double-output Buck converter

140

Tsw

Tsw

vL(t)

iL(t)

IL

t0 t1 t2 t3

t0 t1 t2 t3

t4

t4

11 10 0100

Vin-V1

Vin-V2

-V2

-V1

(a)

Tsw

Tsw

IL-IR1

-IR1

iC1(t)

v1(t)

IL

V1

t0 t1 t2 t3 t4

t0 t1 t2 t3 t4

11 10 0100

(b)

Tsw

Tsw

IL-IR2

-IR2

11 10 0100

v2(t)

iC2(t)

IL

V2

t0 t1 t2 t3 t4

t0 t1 t2 t3 t4

(c)

Fig.2-11: One switching cycle of a double-output Buck converter supplying parallel

connected loads a) inductor voltage and inductor current b) current and voltage of C1

and c) current and voltage of C2

141

Switching state 11 and time interval T11 (t0-t1)

The switches SBuck and S1 are turned on. As a result, the voltage across the inductor is

vL(t)=Vin-V1. If Vin>V1, the inductor current increases [Fig.2-11 (a)]. The inductor

current is supplied to the output capacitor C1. Therefore, the output voltage v1(t) is

increased while the output voltage v2(t) is decreased because C2 supplies the load R2.


The switch SBuck is turned on and S1 is turned off. As a result, the voltage across the

inductor is vL(t)=Vin-V2. If Vin>V2, the inductor current is increased [Fig.2-11 (a)].

The inductor current is supplied to the output capacitor C2. Therefore, the output

voltage v2(t) is increased and the output voltage v1(t) is decreased because C1

supplies the load R1.


The switches SBuck and S1 are turned off. As a result, the voltage across the inductor

is vL(t)= -V2 and the inductor current is decreased [Fig.2-11 (a)]. The inductor

current is supplied to the output capacitor C2. Therefore, the output voltage v2(t) is

increased and the output voltage v1(t) is decreased because C1 supplies the load R1.


The switch SBuck is turned off and S1 is turned on. As a result, the voltage across the

inductor is vL(t)=-V1 and the inductor current is decreased [Fig.2-11 (a)]. The

inductor current is supplied to the output capacitor C1. Therefore, the output voltage

v1(t) is increased and the output voltage v2(t) is decreased because C2 supplies the

load R2.

According to the switching states shown in Fig.2-10, and (2-7), voltage average

across the inductor and the average current through each capacitor over one

switching cycle can be determined as follows:

142

0)()()()(1

)(1

)(

0)()()()(1

)(1

)(

0)()()()(1

)(1

)(

4

3

2

3

2

2

2

1

2

1

0

222

4

3

1

3

2

1

2

1

1

1

0

111

4

3

3

2

2

1

1

0

t

t

C

t

t

C

t

t

C

t

t

C

sw

Tt

t

C

sw

C

t

t

C

t

t

C

t

t

C

t

t

C

sw

Tt

t

C

sw

C

t

t

L

t

t

L

t

t

L

t

t

L

sw

Tt

t

L

sw

L

dttidttidttidttiT

dttiT

ti

dttidttidttidttiT

dttiT

ti

dttvdttvdttvdttvT

dttvT

tv

sw

sw

sw

(2-8)

The following time intervals are shown in Fig.2-11;

3401

2300

1210

0111

ttT

ttT

ttT

ttT

(2-9)

Assuming that the ripple is negligible, v1(t)=V1, v2(t)=V2, iL(t)=IL, vin(t)=Vin.

(2-8) may be rewritten as follows:

0)()()()( 101200210111 VTVTVVTVVT inin (2-10)

0)()()()(1111 01001011 RLRRRL IITITITIIT (2-11)

0)()()()(2222 01001011 RRLRLR ITIITIITIT (2-12)

By factorizing Vin, IL, V1, V2 and rewriting the (2-10 to 2-12), we can simplify these

equations as follows:

0)()()( 00102011111011 TTVTTVTTVin (2-13)

0)()(10111 swRL TITTI (2-14)

0)()(20010 swRL TITTI (2-15)

Dividing both sides of the (2-13 to 2-15) by Tsw, the duty cycles of switches SBuck, S1,

and D2 can be defined as follows:

143

sw

D

sw

S

sw

S

T

TTD

T

TTD

T

TTD

Buck

)(

)(

)(

0010

0111

1011

2

1 (2-16)

Considering that,

swTTTTT 01000111 (2-17)

(2-16 and 2-17) yield: 121 DS DD .

Considering IRj=Vj/Rj, (2-13 to 2-15) may be rewritten as:

021 21VDVDVD DSinSBuck

(2-18)

LSLSRLS IRDVR

VIDIID 11

1

11 111

0 (2-19)

LDLDRLD IRDVR

VIDIID 22

2

22 222

0 (2-20)

The average level of the inductor current and output voltages may be formulated as:

22

122

21

2

21

210

RDRD

VDIIRDIRDVD

DS

inSLLDLSinS

Buck

Buck

(2-21)

According to (2-19 and 2-20):

22

12

11

21

1

RDRD

VRDDV

DS

inSS Buck (2-22)

22

12

22

21

2

RDRD

VRDDV

DS

inSD Buck (2-23)

As (2-22 and 2-23) indicate, the level of output voltages depend on the resistance of

the loads, the duty cycles of the switches SBuck and S1, and the input voltage (Vin). For

any special case where (R1=R2=R) the output voltages are related to the input

voltage and the duty cycles, as presented in the following equations:

221

21

1

DS

inSS

DD

VDDV Buck (2-24)

144

222

21

2

DS

inSD

DD

VDDV Buck (2-25)

To analyze the effect of the load variations on the steady state operation, three

different cases – R1=R2, R1=2R2 and 2R1=R2 – are considered. For each case, V1/Vin

and V2/Vin are plotted vs. 1SD for four different BuckSD values. Since 1

21 DS DD

, when 1SD increases, 2DD decreases linearly. According to (2-22 and 2-23), the

effect of 1SD on V1 is the same as the effect of 2DD on V2. BuckSD has a proportional

relationship with V1 and V2.

When one of the load resistors increases compared to the other one, the relevant

output voltage reduces compared to the equal load resistances case. For R1=2R2=2R,

the output voltage equations are:

221

21

1

2

2

DS

inSS

DD

VDDV Buck (2-26)

222

21

2

2DS

inSD

DD

VDDV Buck (2-27)

And for R2=2R1=2R, the output voltage equations are:

221

21

1

2DS

inSS

DD

VDDV Buck (2-28)

222

21

2

2

2

DS

inSD

DD

VDDV Buck (2-29)

Two other case studies are considered, and the results are presented in Fig.2-12.

Case study: 01SD

In all cases considered in Fig.2-12, for 01SD , the output voltage V1 has the same

level of zero independent from load resistances R1 and R2. This fact may be

explained by considering the topology of a double output Buck converter with

parallel loads. With 01SD the converter acts the same as a traditional Buck

converter with only the second load as its output, and the first load continuously

145

disconnected. As a result, the voltage V1 is zero for all cases and the voltage V2

varies proportional to BuckSD .

Fig.2-12: V1/Vin and V2/Vin with respect to 1SD and for different

BuckSD in a

double output Buck converter with parallel loads

146

Case study: 11SD

Considering the above explanation, for the case study with 11SD , the only change

is replacement of V1 and V2. Therefore, in this case, V2 is continuously zero and V1

varies proportional to BuckSD .

2.3.1.2 Double-output Buck Converter Analysis with Series

Connected Loads

Double output Buck converter topology with series loads is illustrated in Fig.2-13.

The switching states of the double-output Buck converter with the series loads are

illustrated in Fig.2-14. The front side of the converter is similar to the traditional

Buck converter and the output part consists of two switch-capacitor units connected

in series which supply two different loads.

The inductor and the capacitor current and voltage waveforms are illustrated in

Fig.2-15. The name of the switching state for each time interval is also mentioned.

Comparing these waveforms with the waveforms of the double output Buck

converter with parallel loads, the shape of the inductor voltage is similar, but the

levels of the voltages are changed.

Common

components

R1C1DBuck

L

vin(t)

SBuck

C2 R2

S1D1

D2

v2(t)

v1(t)

Fig.2-13: A double output Buck converter with series loads

147

R1C1DBuck

L

vin(t)

SBuck

C2 R2

S1D1

D2

v2(t)

v1(t)

11: SBuck: on , S1: on

(a)

R1C1DBuck

L

vin(t)

SBuck

C2 R2

S1D1

D2

v2(t)

v1(t)

10: SBuck: on , S1: off

(b)

R1C1DBuck

L

vin(t)

SBuck

C2 R2

S1D1

D2

v2(t)

v1(t)

00: SBuck: off , S1: off

(c)

R1C1DBuck

L

vin(t)

SBuck

C2 R2

S1D1

D2

v2(t)

v1(t)

01: SBuck: off , S1: on

(d)

Fig.2-14: Switching states of a double-output Buck converter with series loads

148

VL

iL

Tsw

Tsw

IL

t0 t1 t2 t3

t0 t1 t2 t3

11 10 0100

Vin-V1

Vin-V1-V2

-V1-V2

-V1

(a)

V1

iC1

Tsw

Tsw

IL -IR1

IR1

V1

t0 t1 t2 t3

t0 t1 t2 t3

11 10 0100

(b)

iC2

V2

Tsw

Tsw

IL-IR2

-IR2

11 10 0100

V2

IL

t0 t1 t2 t3

t0 t1 t2 t3

(c)

Fig.2- 15: One switching cycle of a double-output Buck converter supplying series-

connected loads a) inductor voltage and inductor current b) C1 current and voltage

and c) C2 current and voltage

149

The effect of each switching state on the inductor current and the output voltages are

explained in the following sections. In all switching states, the inductor current is

conducted to the first load (R1) continuously. Therefore, in the steady state, the

inductor current must be equal to the first load (R1) current.


The switches SBuck and S1 are turned on. As a result, the voltage across the inductor is

vL(t)=Vin-V1. Since Vin>V1, the inductor current is increased [Fig.2-15 (a)] and

supplies the output capacitor C1. Since the inductor current is equal to the first load

(R1) current, the output voltage v1(t) remains unchanged and the output voltage v2(t)

is decreased because of supplying the load R2 [Fig.2-15 (b) and (c)].


The switch SBuck is turned on and S1 is turned off. As a result, the voltage across the

inductor is vL(t)=Vin-V1-V2. Since Vin>V1+V2, the inductor current is increased

[Fig.2- 15 (a)]. The inductor current is supplied to the output capacitors C1 and C2.

Therefore, the output voltage v2(t) is increased and the output voltage v1(t) stays

unchanged [Fig.2-15 (b) and (c)] because the inductor current is equal to the first

load (R1) current.


The switches SBuck and S1 are turned off. As a result, the voltage across the inductor

is vL(t)= -V1-V2 and the inductor current is decreased [Fig.2-15 (a)]. The inductor

current is supplied to the output capacitors C1 and C2. Therefore, the output voltage

v1(t) stays unchanged and v2(t) is increased [Fig.2-15 (b) and (c)].


The switch SBuck is turned off and S1 is turned on. As a result, the voltage across the

inductor is vL(t)=-V1 and the inductor current decreases [Fig.2-15 (a)]. The inductor

current is supplied to the output capacitor C1. Therefore, the output voltage v1(t)

stays unchanged and the output voltage v2(t) is decreased because of supplying the

load R2 [Fig.2-15 (b) and (c)].

150

According to the switching state waveforms shown in Fig.2-15 and (2-7), the steady

state equation can be derived based on the average voltage across the inductor and

the average current through the capacitors over one switching cycle, as follows:

0)()()()(1

)(1

)(

0)()()()(1

)(1

)(

0)()()()(1

)(1

)(

4

3

2

3

2

2

2

1

2

1

0

222

4

3

1

3

2

1

2

1

1

1

0

111

4

3

3

2

2

1

1

0

t

t

C

t

t

C

t

t

C

t

t

C

sw

Tt

t

C

sw

C

t

t

C

t

t

C

t

t

C

t

t

C

sw

Tt

t

C

sw

C

t

t

L

t

t

L

t

t

L

t

t

L

sw

Tt

t

L

sw

L

dttidttidttidttiT

dttiT

ti

dttidttidttidttiT

dttiT

ti

dttvdttvdttvdttvT

dttvT

tv

sw

sw

sw

(2-30)

Assuming the ripple is negligible, v1(t)=V1, v2(t)=V2, vin(t)=Vin, and iL(t)=IL,

(2-30) may be rewritten as follows:

0)()()()( 10121002110111 VTVVTVVVTVVT inin (2-31)

0)()()()(1111 01001011 RLRLRLRL IITIITIITIIT (2-32)

0)()()()(2222 01001011 RRLRLR ITIITIITIT (2-33)

where T11, T10, T00, and T01 are the time intervals of switching states 11, 10, 00, and

01, respectively. By factorizing Vin, IL, V1, V2 and rewriting (2-31 to 2-33):

0)()()( 0010211011 TTVTVTTV swin (2-34)

0)()(1 swRswL TITI (2-35)

0)()(20010 swRL TITTI (2-36)

Dividing both sides of (2-34 to 2-36) by Tsw, the duty cycles of the switch SBuck and

the diode D2 can be derived as follows:

sw

D

sw

S

T

TTD

T

TTD

Buck

)(

)(

0010

1011

2

(2-37)

151

Considering IRj=Vj/Rj, (2-34 to 2-36) may be rewritten as:

021 2VDVVD DinSBuck

(2-38)

LLRL IRVR

VIII 11

1

1 01

(2-39)

LDLDRLD IRDVR

VIDIID 22

2

22222

0 (2-40)

The average inductor current and the output voltages may be formulated as:

22

1

22

1

2

20

RDR

VDIIRDIRVD

D

inSLLDLinS

Buck

Buck (2-41)

Substituting IL from (2-41) to (2-38 to 2-40) yields:

22

1

11

2RDR

VRDV

D

inSBuck (2-42)

22

1

22

2

2

RDR

VRDDV

D

inSD Buck (2-43)

As (2-42 and 2-43) indicate, the output voltages depend on the resistance of the

loads, the duty cycles of the switches SBuck and S1, and the input voltage (Vin). For an

especial case where (R1=R2=R), the output voltages are related to the input voltage

and the duty cycles presented in (2-44 and 2-45)

21

21

D

inS

D

VDV Buck (2-44)

22

2

2

1D

inSD

D

VDDV Buck (2-45)

For R1=2R2=2R, the output voltage equations are:

21

22

2

D

inS

D

VDV Buck (2-46)

22

2

2

2D

inSD

D

VDDV Buck (2-47)

152


21

221

D

inS

D

VDV Buck (2-48)

22

2

2

21

2

D

inSD

D

RVDDV Buck (2-49)

To analyze the effect of the load variations on the steady state operation, Fig.2-16 is

presented. Three different cases – R1=R2, R1=2R2 and 2R1=R2 – are considered and

for each case, V1/Vin and V2/Vin are plotted vs.

1SD for four BuckSD values. Since the

loads are connected in series, R1 is supplied with the inductor current continuously;

therefore, V2/Vin is lower than V1/Vin for equal resistances. (2-43) indicates that if V2

needs to be increased, 2DD must increase; as a result, the inductor current will

decrease based on (2-41). Reduction in inductor current causes reduction in V1.

BuckSD has a proportional relationship with V1 and V2.

Two other case studies have been considered for the results presented in Fig.2-16.

Case study: 01SD

In all cases considered in Fig.2-16, when 01SD , the topology of the double-output

Buck converter with series loads reduces to a traditional Buck converter with both

loads connected in series as one load. Therefore, the summation of the output

voltages would be equal to BuckSinDV .

Case study: 11SD

With 11SD , the second load is disconnected from the inductor continuously;

therefore, the output voltage is zero. The rest of the circuit acts as a traditional Buck

converter only with the first load. Therefore, the output voltage V1 varies

proportional to BuckSD .

153

Fig.2-16: V1/Vin and V2/Vin with respect to 1SD and for different

BuckSD in a double

output Buck converter with series loads .

154

2.3.2 Multi-output Boost Converters

In a multi-output Boost converter, SBoost and the inductor are common components

between loads. Each load has a devoted capacitor, diode, and a switch. Topologies

with parallel and series loads are explained in this section.

Fig.2-17 shows a multi-output Boost converter topology with parallel loads. The

first part of the circuit is similar to the conventional Boost converter, and the switch

SBoost controls the power flow. Since the inductor current must be circulated all the

time, one of the output switches, S1, S2, … , Sn or SBoost must be turned on at any

instant. As can be observed in Fig.2-17, as for a conventional Boost converter, the

inductor current may be increased by conduction of SBoost. Therefore, the multi-

output Boost converter may increase its output voltages over input voltage.

Although there is no theoretical limit, in practice, the conversion ratio of multi-

output Boost converter supplying parallel connected loads reduces because of losses

in active and passive elements.

R1C1

L

vin(t) SBoost

S1

D1

S2

R2C2 RnCn

D2

Dn

v1(t) v2(t) vn(t)

Sn

Common

components

Fig.2-17: Multi-output Boost converter with parallel-connected loads

As may be observed in Fig.2-17, the switches used to supply loads conduct current

in single direction and block voltage in both directions. The reason is the inductor

current flows only from the inductor to loads. However, the voltage across each

switch depends on the operation of other switches; therefore, the voltage across each

switch may be positive or negative.


output voltages, the switch conducting the inductor current to that output voltage

(Sn) may be removed because, when all other switches are turned off, the inductor

current automatically conducts from Dn and supplies vn(t). Since vn(t) is more than

155

other output voltages when any other switch (Sk) is turned on, the voltage at the

anode of Dn is vk(t) and vk(t) <vn(t); therefore, Dn does not conduct and acts like a

turned off switch.

Fig.2-18 shows a multi-output Boost converter topology with series loads. Similar to

the multi-output Boost converter with parallel loads, the inductor current must be

conducted through one of the output switches (S1 to Sn-1 and Dn) or SBoost. In other

words, if the inductor current is conducted by Sk, it supplies the series connected

loads (R1-Rk).

R1C1

L

vin(t) SBoost

C2 R2

S1

S2

D1

D2

Cn Rn

Dn

vn(t)

v2(t)

v1(t)

Common

components

Fig.2-18: Multi-output Boost converter with series connected loads

As can be seen in Fig.2-18, the last load, Rn, can be connected to the inductor

through only one diode, Dn, and without any switch. The reason is due to the fact

that when all Sj switches are turned off, the current stored in the inductor turns the

diode on and supplies Rn and the rest of the loads. When any of the switches (Sj) or

SBoost is turned on the voltage across the diode Dn is negative and Dn is turned off.

Therefore, there is no need to add a switch in series with Dn.

2.3.2.1 Double-output Boost Converter Analysis with Parallel

Connected Loads

The topology of a double-output Boost converter with parallel loads is illustrated in

Fig.2-19. Considering that V2 is more than V1, the switch S2 has been removed.

156

R1C1

L

vin(t) SBoost

S1

D1

R2C2

D2

v1(t) v2(t)

Common

components

Fig.2-19: Double-output Boost converter

The switching states of the double-output Boost converter with two parallel-

connected loads are illustrated in Fig.2-20. The number of the switching states

equals the number of loads plus 1. For example, in the case of multi-output Buck

converter with parallel loads, the number of loads is 2. Therefore, the number of

switching states is 2+1=3. Switching states are named according to the condition of

SBoost and S1 in each switching state.

Considering the switching states illustrated in Fig.2-20, one switching cycle

including all switching states for the double-output Boost converter with parallel

loads is shown in Fig.2-21.

Fig.2-21 (a) illustrates the voltage and current waveforms of the inductor. The

operation of switches causes the switching states to change. In each switching state,

the voltage across the inductor changes. As a result, the inductor current is changed

with a different slope in each switching state. Fig.2-21 (b) and (c) illustrate the

current through each output capacitor over each switching cycle and the resultant

variation of the voltages across the output capacitors. The effect of each switching

state on the inductor current and the output voltages is explained here in detail.

157

R1C1

L

vin(t) SBoost

S1

D1

R2C2

D2

v1(t) v2(t) vn(t)

10: SBoost: on , S1: off

(a)

R1C1

L

vin(t) SBoost

S1

D1

R2C2

D2

v1(t) v2(t) vn(t)

01: SBoost: off , S1: on

(b)

R1C1

L

vin(t) SBoost

S1

D1

R2C2

D2

v1(t) v2(t) vn(t)

00: SBoost: off , S1: off

(c)

Fig.2-20: Switching states of double-output Boost converter

158

vL(t)

iL(t)

Tsw

Tsw

IL

t0 t1 t2 t3

t0 t1 t2 t3

10 01 00

Vin

Vin-V1 Vin-V2

(a)

iC1(t)

v1(t)

Tsw

Tsw

IL-IR1

-IR1

10 01 00

V1

IL

t0 t1 t2 t3

t0 t1 t2 t3

(b)

v2(t)

iC2(t)

Tsw

Tsw

IL-IR2

-IR2

V2

IL

t0t1 t2 t3

t0 t1 t2 t3

10 01 00

(c)

Fig.2-21: One switching cycle of a double-output Boost converter supplying parallel



159


The switch SBoost is turned on and the switch S1 is turned off. As a result, the voltage

across the inductor is vL(t)=Vin and the inductor current increases [Fig.2- 21 (a)]. The

inductor current is not supplied to the output capacitors. Therefore, the output

voltages v1(t) and v2(t) are decreased because of supplying the loads R1 and R2

respectively.


The switch SBoost is turned off and the switch S1 is turned on. As a result, the voltage

across the inductor is vL(t)=Vin-V1. Since Vin<V1, the inductor current decreases

[Fig.2- 21 (a)]. The inductor current is supplied to the output capacitor C1; therefore,

the output voltage v1(t) is increased and the output voltage v2(t) is decreased because

of supplying the load R2.


The switch SBoost and S1 is turned off. As a result, the diode D2 is conducting and the

voltage across the inductor is vL(t)=Vin-V2. Since Vin<V2, the inductor current

decreases [Fig.2-21 (a)]. The inductor current is supplied to the output capacitor C2.

Therefore, the output voltage v2(t) is increased and the output voltage v1(t) is

decreased because of supplying the load R1. The same calculations developed for

the double-output Buck converter are required for the double-output Boost converter

to extract the average levels of inductor current and output voltages in a steady state

condition.

According to the switching states shown in Fig.2-20 and (2-7), the voltage average

across the inductor and the average current through each capacitor over one

switching cycle can be determined as follows:

160

0)()()(1

)(1

)(

0)()()(1

)(1

)(

0)()()(1

)(1

)(

3

2

2

2

1

2

1

0

222

3

2

1

2

1

1

1

0

111

3

2

2

1

1

0

t

t

C

t

t

C

t

t

C

sw

Tt

t

C

sw

C

t

t

C

t

t

C

t

t

C

sw

Tt

t

C

sw

C

t

t

L

t

t

L

t

t

L

sw

Tt

t

L

sw

L

dttidttidttiT

dttiT

ti

dttidttidttiT

dttiT

ti

dttvdttvdttvT

dttvT

tv

sw

sw

sw

(2-50)

The following time intervals are shown in Fig.2-21:

2301

1200

0110

ttT

ttT

ttT

(2-51)

where T10, T00, and T01 are the time intervals of switching states 10, 00, and 01,

respectively.

Assuming that the ripple is negligible, v1(t)=V1, v2(t)=V2, iL(t)=IL, vin(t)=Vin, (2-45)

can be rewritten as follows:

0)()()( 20010110 VVTVVTVT ininin (2-52)

0)()()(111 000110 RRLR ITIITIT (2-53)

0)()()(222 000110 RLRR IITITIT (2-54)

By factorizing Vin, IL, V1, V2 and rewriting (2-52 to 2-54) we can simplify these


0)()()( 002011 TVTVTV swin (2-55)

0)()(101 swRL TITI (2-56)

0)()(200 swRL TITI (2-57)

Dividing both sides of (2-55 to 2-57) by Tsw, the duty cycles of switches SBuck, S1,

and D2 can be defined as follows:

161

sw

D

sw

S

T

TD

T

TD

)(

)(

00

01

2

1

(2-58)

where

swTTTT 010010 (2-59)

from (2-59) yields: 121 BoostSDS DDD

Assuming that the output voltage ripple is negligible, IRj=Vj/Rj, (2-55 to 2-57) can be

rewritten as:

021 21VDVDV DSin (2-60)

LSLSRLS IRDVR

VIDIID 11

1

11111

0 (2-61)

LDLDRLDIRDV

R

VIDIID 22

2

22222

0 (2-62)

The average level of the inductor current and the output voltages can be formulated

as:

22

122

21

2

21

210

RDRD

VIIRDIRDV

DS

inLLDLSin (2-63)


22

12

11

21

1

RDRD

VRDV

DS

inS (2-64)

22

12

22

21

2

RDRD

VRDV

DS

inD (2-65)

As (2-64 and 2-65) indicate, the level of the output voltages depend on the resistance

of the loads, the duty cycles of switch S1 and diode D2, and the input voltage

magnitude (Vin).

162

For a special case where (R1=R2=R), the output voltages are related to the input

voltage and the duty cycles, as presented in the following equations:

221

21

1

DS

inS

DD

VDV (2-66)

222

21

2

DS

inD

DD

VDV (2-67)


221

21

1

2

2

DS

inS

DD

VDV (2-68)

222

21

2

2 DS

inD

DD

VDV (2-69)


221

21

1

2 DS

inS

DD

VDV (2-70)

222

21

2

2

2

DS

inD

DD

VDV (2-71)

To analyze the effect of the load variations on the steady state operation, three

different cases – R1=R2, R1=2R2 and 2R1=R2 – are considered. For each case, V1/Vin

and V2/Vin are plotted vs. 1SD for four different BoostSD values. Since for constant

BoostSD and for alueconstant v a21 DS DD , when 1SD increases, 2DD decreases

linearly. According to (2-64 and 2-65), the effect of 1SD on V1 is the same as the

effect of 2DD on V2.

When one of the load resistors increases compared to the other one, the relevant

output voltage reduces compared to the equal load resistance case.


Case study: 01SD

In all cases considered in Fig.2-16, for 01SD , the topology of the double-output

Boost converter with parallel loads reduces to a traditional Boost converter with

163

second load as the only load. Therefore, the output voltage V2 would be equal to

)1/(BoostSin DV where V1=0.

Fig.2-22: The visualization of (2-57 to 2-59): the level of output voltage (V1,V2) for

variable d1 and different dBuck values

164

Case study: 11SD


therefore, the output voltage V2 is zero. The rest of the circuit acts as a traditional

Boost converter, only with the first load. Therefore, the output voltage V1 equals

)1/(BoostSin DV .

2.3.2.2 Double-output Boost Converter Analysis with Series

Connected Loads

Double output Boost converter topology with series loads is illustrated in Fig.2-23.

Common

components

R1C1

L

vin(t) SBoost

C2 R2

S1D1

D2

v2(t)

v1(t)

Fig.2-23: Double-output Boost converter supplying series connected loads

The switching states of the double-output Boost converter with series loads are

illustrated in Fig.2-24. The front side of the converter is similar to the traditional

Boost converter and the output part consists of two switch-capacitor units connected

in series which supply two different loads.



Comparing these waveforms with the waveforms of the double output Boost

converter with parallel loads, the shape of the inductor voltage is similar but the

levels of the voltages are changed.

The waveforms of Fig.2-25 (a) present the step changes of the inductor voltage as a

result of switching and gradual change of inductor current depending on the inductor

voltage. Fig.2-25 (b) and (c) illustrate the waveforms of capacitor currents and

voltages.

165

R1C1

L

vin(t) SBoost

C2 R2

S1D1

D2

v2(t)

v1(t)

10: SBoost: on , S1: off

(a)

R1C1

L

vin(t) SBoost

C2 R2

S1D1

D2

v2(t)

v1(t)

01: SBoost: off , S1: on

(b)

R1C1

L

vin(t) SBoost

C2 R2

S1D1

D2

v2(t)

v1(t)

00: SBoost: off , S1: off

(c)

Fig.2-24: Switching states of a double-output Boost converter supplying series

connected loads

166

VL

iL

Tsw

Tsw

IL

t0 t1 t2

t0 t1 t2

10 01 00

Vin

Vin-V1 Vin-V1-V2

t3

t3

(a)

iC1

V1

Tsw

Tsw

IL-IR1

-IR1

10 01 00

V1

IL

t0 t1 t2

t0 t1 t2

(b)

V2

iC2

Tsw

Tsw

IL-IR2

-IR2

V2

IL

t0 t1 t2

t0 t1 t2

10 01 00

(c)

Fig.2-25: One switching cycle of a double-output Boost converter supplying series



167


explained below.


The switch SBoost is turned on and the switch S1 is turned off. As a result, the voltage

across the inductor is vL(t)=Vin and the inductor current is increased [Fig.2-25 (a)].

The inductor current is not supplied to the output capacitors. Therefore, the output

voltages v1(t) and v2(t) are decreased because of supplying the loads R1 and R2

[Fig.2-25 (b) and (c)].


The switch SBoost is turned off and the switch S1 is turned on. As a result, the voltage

across the inductor is vL(t)=Vin-V1. Since Vin<V1, the inductor current is decreased

[Fig.2-25 (a)] and supplies the output capacitor C1. Therefore, the output voltage

v1(t) is increased and the output voltage v2(t) is decreased because of supplying the

load R2.

Switching state 00 and time interval: T00 (t2-t3)

The switch SBoost and S1 is turned off. As a result, the diode D2 conducts and the

voltage across the inductor is vL(t)=Vin-V1-V2. Since Vin<V1+V2, the inductor current

is decreased [Fig.2-25 (a)] and supplies the output capacitors C1 and C2. Therefore,

the output voltages v1(t) and v2(t) are increased.

According to the switching state waveforms shown in Fig.2- 25 and (2-7), the steady

state equation can be derived based on the average voltage across the inductor and

the average current through the capacitors over one switching cycle as follows:

0)()()(1

)(1

)(

0)()()(1

)(1

)(

0)()()(1

)(1

)(

3

2

2

2

1

2

1

0

222

3

2

1

2

1

1

1

0

111

3

2

2

1

1

0

t

t

C

t

t

C

t

t

C

sw

Tt

t

C

sw

C

t

t

C

t

t

C

t

t

C

sw

Tt

t

C

sw

C

t

t

L

t

t

L

t

t

L

sw

Tt

t

L

sw

L

dttidttidttiT

dttiT

ti

dttidttidttiT

dttiT

ti

dttvdttvdttvT

dttvT

tv

sw

sw

sw

(2-72)

168

Assuming the ripple is negligible, v1(t)=V1, v2(t)=V2, v3(t)=V3, and v4(t)=V4,

(2-72) can be rewritten as follows:

0)()()( 210010110 VVVTVVTVT ininin (2-73)

0)()()(111 000110 RLRLR IITIITIT (2-74)

0)()()(222 000110 RLRR IITITIT (2-75)

where T10, T00, and T01 are the time intervals of switching states 10, 00, and 01,

respectively. By factorizing Vin, IL, V1, V2 and rewriting (2-73 to 2-75):

0)()()( 00200011 TVTTVTV swin (2-76)

0)()(10001 swRL TITTI (2-77)

0)()(200 swRL TITI (2-78)

Dividing both sides of (2-76 to 2-78) by Tsw, the duty cycles of the switch SBuck and

diode D2 can be derived as follows:

sw

D

sw

S

T

TD

T

TD

)(

)(

00

01

2

1

(2-79)

Assuming that the output voltage ripple is negligible, IRj=Vj/Rj, (2-76 to 2-78) can be

rewritten as:

0)( 21 221VDVDDV DDSin

(2-80)

LDSLDSRLDS IRDDVR

VIDDIIDD 11

1

1 )(0)()(2121121

(2-81)

LDLDRLD IRDVR

VIDIID 22

2

22222

0 (2-82)

where 1SD and 2DD are the duty cycles of the switch S1, and the diode D2.

The average inductor current and output voltages can be formulated as:

169

2

2

1

22

2

1

2

221

221 )(0)(

RDRDD

VIIRDIRDDV

DDS

inLLDLDSin

(2-83)

Substituting IL from (2-83) in (2-81 and 2-82) yields:

2

2

1

2

1

1

221

21

)(

)(

RDRDD

VRDDV

DDS

inDS (2-84)

2

2

1

2

2

2

221

2

)( RDRDD

VRDV

DDS

inD (2-85)

As (2-84 and 2-85) indicate, the output voltages depend on the resistance of the

loads, the duty cycles of the switch S1 and the diode D2 and the input voltage

magnitude (Vin). For a special case where (R1=R2=R), the output voltages are related

to input voltage magnitude and the duty cycles, as presented in (2-86 and 2-87):

221

221

21

)(

)(

DDS

inDS

DDD

VDDV (2-86)

222

221

2

)( DDS

inD

DDD

VDV (2-87)


221

221

21

2)(

)(

DDS

inDS

DDD

VDDV (2-88)

222

221

2

2)(

2

DDS

inD

DDD

VDV (2-89)


221

221

21

)(2

)(2

DDS

inDS

DDD

VDDV

(2-90)

222

221

2

)(2 DDS

inD

DDD

VDV

(2-91)

170

To analyze the effect of the load variations on the steady state operation, Fig.2-26 is

presented. Three different cases – R1=R2, R1=2R2 and 2R1=R2 – are considered. For

each case, V1/Vin and V2/Vin are plotted vs.

1SD for four BoostSD values. Since the

loads are connected in series, V1 is supplied by the inductor current for BoostSD <1;

however, V2 is supplied only when SBoost and S1 are turned off. Therefore, V2/Vin is

lower than V1/Vin for equal resistances. (2-85) indicates that if V2 needs to be

increased, 2DD must be increased; as a result, the inductor current will decrease

based on (2-83).


Case study: 01SD

In all cases considered in Fig.2-26, for 01SD , the topology of the double-output

Boost converter with series loads reduces to a traditional Boost converter with both

loads connected in series as one load. Therefore, the summation of the output

voltages would be equal to )1/(BoostSin DV .

Case study: 11SD


therefore, the output voltage is zero. The rest of the circuit acts as a traditional Boost

converter only with the first load. Therefore, the output voltage V1 is

)1/(BoostSin DV .

2.3.3 Multi-output Positive Buck-Boost Converters

In a multi-output Positive Buck-Boost converter, SBuck, DBuck, SBoost and an inductor

are common components between loads and a power source. Each load has a

devoted capacitor, a diode, and a switch. Topologies with parallel connected and

series connected loads are explained in this section.

Fig.2-27 shows a multi-output Buck converter topology with parallel loads. The first

part of the circuit is similar to the conventional Buck-Boost converter; and the input

switch, SBuck controls the power flow. Similar to a traditional Buck-Boost converter,

171

there is a common inductor for several output filters. Since the inductor current must

be circulated through one of the outputs, one of the output switches, S1, S2, … ,Sn, or

SBoost must be turned on at any instant.

Fig.2-26: The visualization of (2-75 to 2-77): the level of output voltage (V1,V2) for

variable d1 and different dBuck values

172

The positive Buck-Boost converter may be modified with the same developments to

support multiple loads. In comparison with multi output Buck and multi-output

Boost converters, a multi-output Positive Buck Boost has an advantage of zero

switching state. When SBuck is turned off and SBoost is turned on, the inductor current

circulates without being charged or discharged; this switching state is named “zero

switching state”. This switching state may be used to store some energy in the

inductor and uses this energy to improve the dynamic behavior of the converter.

The topology of the multi-output Buck-Boost converter with parallel loads (Fig.2-

27) may perform as a multi-output Buck or a multi-output Boost converter in the

simplest operation modes. In these modes, either Buck switch or Boost switch is

idling. However, as will be explained later, the availability of the zero switching

state allows improving the dynamic performance of this converter. The inductor

current increases when the number of loads increases and the power and the voltage

of each load do not limit the power and the voltage of other loads.

vin(t)

SBuck

DBuck R1C1

L

SBoost

S1 D1

S2

R2C2RnCn

D2

Dn

v1(t) v2(t) vn(t)

Sn

Fig.2-27: Multi-output Buck-Boost converter supplying parallel connected loads

As may be observed in Fig.2-27, the switches used to supply loads may conduct

current in single direction and may block voltage in both directions. The reason is

that the inductor current flows only from the inductor to loads. However, the voltage

across each switch depends on the operation of other switches; therefore, the voltage

across each switch may be positive or negative.


output voltages, the switch conducting the inductor current to that output voltage

(Sn) may be removed because, when all other switches are turned off, the inductor

current automatically conducts from Dn and supplies vn(t). Since vn(t) is more than

173

other output voltages when any other switch (Sk or SBoost) is turned on, the voltage at

the anode of Dn is vk(t) and vk(t)<vn(t); therefore, Dn does not conduct and acts like a

turned off switch.

Fig.2-28 shows a multi-output Positive Buck-Boost converter topology with series

loads. Similar to the multi-output Buck-Boost converter with parallel loads, the

inductor current must be conducted through one of the output switches (S1 to Sn-1 and

Dn) or SBoost. If the inductor current is conducted by Sk, it supplies the series

connected loads (R1-Rk). This topology may operate the same as the multi-output

Buck or multi-output Boost converter. Nevertheless, applying the zero switching

state, the dynamics of the multi-output Buck-Boost converter can be improved

compared to both the multi-output Buck and multi-output Boost converter.

R1C1

L

vin(t) SBoost

C2 R2

S1

S2

D1

D2

Cn Rn

Dn

vn(t)

v2(t)

v1(t)

SBuck

DBuck

Fig.2-28: Multi-output Buck-Boost converter supplying series connected loads

As can be seen in Fig.2-28, the last load, Rn can be connected to the inductor

through only one diode, Dn and without any switch. The reason is the fact that when

all Sj and SBoost switches are turned off, the current stored in the inductor turns the

diode on and supplies Rn and the rest of the loads. When any of the switches (Sj) is

turned on, the voltage across the diode Dn is negative and Dn is turned off.

Therefore, there is no need to add a switch in series with Dn.

174

2.3.3.1 Double-output Positive Buck-Boost Converter Analysis

with Parallel Loads

The topology of a double-output Positive Buck-Boost converter with parallel loads

is illustrated in Fig.2-29 and is driven from the topology of the positive Buck-Boost

converter. Considering that V2 is more than V1, the switch S2 has been removed.

The switching states of the double-output Buck-Boost converter with two parallel

loads are illustrated in Fig.2-30. The number of the switching states is 6. Except for

switching state (010), all switching states of the double-output Positive Buck-Boost

converter consist of the switching states of either a double-output Buck (001, 000,

101, 100) or a double-output Boost (110, 101, 100) converter.

vin(t)

SBuck

DBuck R1C1

L

SBoost

S1 D1

R2C2

D2

v1(t) v2(t)

Common

components

Fig.2-29: Double-output Buck-Boost converter supplying parallel connected loads

Considering the switching states illustrated in Fig.2-30, one switching cycle of the

double-output Positive Buck Boost converter with parallel loads including all

switching states is shown in Fig.2-31.

Fig.2-31 (a) illustrates the voltage and current waveforms of the inductor. The

operation of the switches causes the switching states to be changed. In each

switching state, the voltage across the inductor changes. As a result, the inductor

current is changed with a different slope in each switching state.

Fig.2-31 (b) and (c) illustrate the current through each output capacitor over each

switching cycle and the resultant variation of the capacitor voltages. The effect of

each switching state on the inductor current and the output voltages is explained

here in detail.

175

vin(t)

SBuck

DBuck R1C1

L

SBoost

S1 D1

R2C2

D2

v1(t) v2(t)

(a): 110: SBuck: on , SBoost: on , S1: off

vin(t)

SBuck

DBuck R1C1

L

SBoost

S1 D1

R2C2

D2

v1(t) v2(t)

(b): 010: SBuck: off , SBoost: on , S1: off

vin(t)

SBuck

DBuck R1C1

L

SBoost

S1 D1

R2C2

D2

v1(t) v2(t)

(c): 101: SBuck: on , SBoost: off , S1: on

vin(t)

SBuck

DBuck R1C1

L

SBoost

S1 D1

R2C2

D2

v1(t) v2(t)

(d): 001: SBuck: off , SBoost: off , S1: on

176

vin(t)

SBuck

DBuck R1C1

L

SBoost

S1 D1

R2C2

D2

v1(t) v2(t)

(e): 100: SBuck: on , SBoost: off , S1: off

vin(t)

SBuck

DBuck R1C1

L

SBoost

S1 D1

R2C2

D2

v1(t) v2(t)

(f): 000: SBuck: off , SBoost: off , S1: off

Fig.2-30: Switching states of a double-output Buck Boost converter supplying

parallel connected loads


The switch SBoost is turned on and the switches SBuck and S1 are turned off. As a

result, the voltage across the inductor is vL(t)=0. Therefore, the inductor current is

constant in this time interval [Fig.2-31 (a)]. The inductor current is not supplied to

the output capacitors. Therefore, the output voltages v1(t) and v2(t) are decreased

because of supplying the loads R1 and R2 [Fig.2-31 (b) and (c)].


The switches SBoost and SBuck are turned on and the switch S1 is turned off. As a

result, the voltage across the inductor is vL(t)=Vin. Therefore, the inductor current is

increased in this time interval [Fig.2-31 (a)]. The inductor current is not supplied to

the output capacitors. Therefore, the output voltages v1(t) and v2(t) are decreased

because of supplying the loads R1 and R2 [Fig.2-31 (b) and (c)].

177

Fig.2-31: One switching cycle of a double-output Buck-Boost converter supplying

parallel connected loads, a) inductor voltage and current b) capacitor current and

voltages of first load and c) capacitor current and voltages of second

Tsw

Tsw

IL

vL(t)

iL(t)

t0 t1 t2 t3 t4 t5 t6

t0 t1 t2 t3 t4 t5 t6

010 110 101 001 000 100

VinVin-V1

-V1 -V2

Vin-V2

(a)

Tsw

Tsw

IL-IR1

-IR1

V1

iC1(t)

v1(t)

IL

t0 t1 t2 t3 t4 t5 t6

t0 t1 t2 t3 t4 t5 t6

010 110 101 001 000 100

(b)

Tsw

Tsw

IL-IR2

-IR2

010 110 101 001 000 100

V2

v2(t)

iC2(t)

IL

t0 t1 t2 t3 t4 t5 t6

t0 t1 t2 t3 t4 t5 t6

(c)

178


The switches S1 and SBuck are turned on and the switch SBoost is turned off. As a result,

the voltage across the inductor is vL(t)=Vin-V1. If Vin>V1, the inductor current

increased in this time interval [Fig.2-31 (a)]. The inductor current is supplied to the

output capacitor C1. Therefore, the output voltage v1(t) is increased and the output

voltage v2(t) is decreased because of supplying the load R2 [Fig.2-31 (b) and (c)].


The switch S1 is turned on and the switches SBuck and SBoost are turned off. As a result,

the voltage across the inductor is vL(t)=-V1. Since 0>-V1, the inductor current is

decreased in this time interval [Fig.2-31 (a)]. The inductor current is supplied to the

output capacitor C1. Therefore, the output voltage v1(t) is increased and the output

voltage v2(t) is decreased because of supplying the load R2.


The switches S1, SBuck, and SBoost are turned off. As a result, the diode D2 conducts

and the voltage across the inductor is vL(t)=-V2. Since 0>-V2, the inductor current is


output capacitor C2. Therefore, the output voltage v2(t) is increased, and the output

voltage v1(t) is decreased because of supplying the load R1.


The switches S1 and SBoost are turned off and the switch SBuck is turned on. As a

result, the diode D2 conducts and the voltage across the inductor is vL(t)=Vin-V2.

Since Vin<V2, the inductor current is decreased in this time interval [Fig.2-31 (a)].

The inductor current supplies the output capacitor C2. Therefore, the output voltage

v2(t) is increased and the output voltage v1(t) is decreased because of supplying the

load R1.

The same calculations developed for the double-output Buck and Boost converters

are required for the double-output Positive Buck-Boost converter to extract the

average levels of the inductor current and the output voltages in steady state

condition. According to the switching states shown in Fig.2-31 and (2-7), the

179

average voltage across the inductor and the average current through each capacitor

over one switching cycle can be determined as follows:

0)()()()()()(1

)(1

)(6

5

5

4

4

3

3

2

2

1

1

0

dttvdttvdttvdttvdttvdttvT

dttvT

tv

t

t

L

t

t

L

t

t

L

t

t

L

t

t

L

t

t

L

sw

Tt

t

L

sw

L

sw

(2-92)

0)()()()()()(1

)(1

)(6

5

1

5

4

1

4

3

1

3

2

1

2

1

1

1

0

111

t

t

C

t

t

C

t

t

C

t

t

C

t

t

C

t

t

C

sw

Tt

t

C

sw

C dttidttidttidttidttidttiT

dttiT

tisw

(2-93)

0)()()()()()(1

)(1

)(6

5

2

5

4

2

4

3

2

3

2

2

2

1

2

1

0

222

t

t

C

t

t

C

t

t

C

t

t

C

t

t

C

t

t

C

sw

Tt

t

C

sw

C dttidttidttidttidttidttiT

dttiT

tisw

(2-94)

The following time intervals are shown in Fig.2-31:

56100

45000

34001

23101

12110

01010

ttT

ttT

ttT

ttT

ttT

ttT

Assuming that the ripple is negligible, v1(t)=V1, v2(t)=V2, iL(t)=IL, vin(t)=Vin.

(2-92 to 2-94) can be rewritten as follows:

0)()()0()()()0( 2100200010011101110010 VVTVTVTVVTVTT ininin (2-95)

0))(())((11 101001000100110010 RLR IITTITTTT (2-96)

0))(())((22 100000101001110010 RLR IITTITTTT (2-97)

where T010, T110, T101, T001, T000, and T100 are the time intervals of the switching states

010, 110, 101, 001, 000, and 100, respectively.

By factorizing Vin, IL, V1, V2 and rewriting (2-95 to 2-97) we can simplify these


180

0)()()( 10000020011011100101110 TTVTTVTTTVin (2-98)

0)()(1101001 swRL TITTI (2-99)

0)()(2100000 swRL TITTI (2-100)

Dividing both sides of (2-98 to 2-100) by Tsw, the duty cycles of the switches SBuck,

S1, and D2 can be defined as follows:

sw

D

sw

S

sw

S

T

TTD

T

TTD

T

TTTD

Buck

)(

)(

)(

100000

001101

100101110

2

1 (2-101)

where, BuckSD ,

1SD , and 2DD are the duty cycles of switches SBuck, S1 and diode

D2, respectively. Considering that

swTTTTTTT 010001000100101111 (2-102)

and considering that IRj=Vj/Rj, (2-98 to 2-100) can be rewritten as:

021 21VDVDVD DSinSBuck

(2-103)

LSLSRLS IRDVR

VIDIID 11

1

11111

0 (2-104)

LDLDRLD IRDVR

VIDIID 22

2

22222

0 (2-105)

The average level of the inductor current and output voltages may be formulated as:

22

122

21

2

21

210

RDRD

VDIIRDIRDVD

DS

inSLLDLSinS

Buck

Buck (2-106)

Substituting (2-106) in (2-104 and 2-105), yields:

22

12

11

21

1

RDRD

VRDDV

DS

inSS Buck (2-107)

181

22

12

22

21

2

RDRD

VRDDV

DS

inSD Buck (2-108)

As (2-107 and 2-108) indicate, the levels of the output voltages depend on the

resistance of the loads, the duty cycles of switches SBoost, SBuck and S1, and the input

voltage magnitude (Vin). For the special case where (R1=R2=R), the output voltages

are related to the input voltage and the duty cycles, as presented in the following

equations:

221

21

1

DS

inSS

DD

VDDV Buck (2-109)

222

21

2

DS

inSD

DD

VDDV Buck (2-110)


221

21

1

2

2

DS

inSS

DD

VDDV Buck (2-111)

222

21

2

2 DS

inSD

DD

VDDV Buck (2-112)


221

21

1

2 DS

inSS

DD

VDDV Buck

(2-113)

222

21

2

2

2

DS

inSD

DD

VDDV Buck

(2-114)

However, since the double output positive Buck-Boost converter has a zero

switching state, there is an extra degree of freedom in (2-107 and 2-108). When

compared with (2-64 and 2-65), this extra freedom shows as the duty cycle BuckSD

which allows controlling the inductor current and output voltages independently.

Therefore, the level of the inductor current in steady state is not determined by input

voltage, output voltages and loads. There is a capacity for extra current storage,

which may improve the dynamic behavior of the converter. As (2-107 and 2-108)

indicate, the level of output voltages depends on the resistance of the loads, duty

cycles of switches SBuck and S1, and input voltage (Vin).

182

2.3.3.2 Double-output Positive Buck-Boost Converter Analysis

with Series Loads

A double-output Positive Buck-Boost converter topology with series loads is

illustrated in Fig.2-32. The common components are the same as the topology of the

double-output Positive Buck-Boost converter supplying parallel connected loads.

Common

Components

R1C1

L

vin(t) SBoost

C2 R2

S1 D1

D2

v2(t)

v1(t)

SBuck

DBuck

Fig.2-32: Double-output Buck-Boost converter supplying series connected loads

The switching states of the double-output Positive Buck-Boost converter with series

loads are illustrated in Fig.2-33. The front side of the converter is similar to the

traditional Buck-Boost converter and the output part consists of two switch-

capacitor units connected in series which supply two different loads. Except for the

switching state 010, all the switching states presented in Fig.2-33 are the same as the

switching states either in a double-output Buck (000, 001, 1000, 101) or in a double-

output Boost converter (110, 101, 100) with series loads.



Comparing these waveforms with the waveforms of the double output Positive

Buck-Boost converter with parallel loads, the shape of the inductor voltage is

similar, but the levels of the voltages are changed.

183

R1C1

L

vin(t) SBoost

C2 R2

S1 D1

D2

v2(t)

v1(t)

SBuck

DBuck

110: SBuck: on , SBoost: on , S1: off

(a)

R1C1

L

vin(t) SBoost

C2 R2

S1 D1

D2

v2(t)

v1(t)

SBuck

DBuck

101: SBuck: on , SBoost: off , S1: on (b)

R1C1

L

vin(t) SBoost

C2 R2

S1 D1

D2

v2(t)

v1(t)

SBuck

DBuck

100: SBuck: on , SBoost: off , S1: off

(c)

184

R1C1

L

vin(t) SBoost

C2 R2

S1 D1

D2

v2(t)

v1(t)

SBuck

DBuck

010: SBuck: off , SBoost: on , S1: off

(d)

R1C1

L

vin(t) SBoost

C2 R2

S1 D1

D2

v2(t)

v1(t)

SBuck

DBuck

001: SBuck: off , SBoost: off , S1: on

(e)

R1C1

L

vin(t) SBoost

C2 R2

S1 D1

D2

v2(t)

v1(t)

SBuck

DBuck

000: SBuck: off , SBoost: off , S1: off

(f)

Fig.2-33: Switching states of a double-output Buck-Boost converter supplying series

connected loads

185

Fig.2-34: One switching cycle of a double-output Buck-Boost converter supplying

series-connected loads a) inductor voltage and inductor current b) C1 current and

voltage and c) C2 current and voltage

VL

iL

Tsw

Tsw

IL

t0 t1 t3t2 t4 t5

t0 t1 t3t2 t4 t5

100000001101110010

VinVin-V1

-V1

-V2-V1

Vin-V1-V2

(a)

iC1

V1

Tsw

Tsw

IL-IR1

-IR1

V1

IL

t0 t1 t3t2 t4 t5

t0 t1 t3t2 t4 t5

100000001101110010

(b)

V2

iC2

Tsw

Tsw

IL-IR2

-IR2

100

V2

000001101110010

IL

t0 t1 t3t2 t4 t5

t0 t1 t3t2 t4 t5

(c)

186


explained below.


The switch SBoost is turned on and the switches SBuck and S1 are turned off. As a

result, the voltage across the inductor is vL(t)=0. Therefore, the inductor current is

kept constant over this time interval [Fig.2-34 (a)]. The inductor current does not

supply the output capacitors. Therefore, the output voltages v1(t) and v2(t) are

decreased because of supplying the loads R1 and R2 [Fig.2-34 (b) and (c)].


The switches SBoost and SBuck are turned on and the switch S1 is turned off. As a

result, the voltage across the inductor is vL(t)=Vin. Therefore, the inductor current is

increased over this time interval and it does not supply the output capacitors.

Therefore, the output voltages v1(t) and v2(t) are decreased because of supplying the

load R1 and R2 [Fig.2-35 (b) and (c)].


The switches S1 and SBuck are turned on and the switch SBoost is turned off. As a result,

the voltage across the inductor is vL(t)=Vin-V1. If Vin>V1, the inductor current is

increased in this time interval. The inductor current does not supply the output

capacitor C1. Therefore, the output voltage v1(t) is increased and the output voltage

v2(t) is decreased because of supplying the load R2.


The switch S1 is turned on and the switches SBuck and SBoost are turned off. As a result,

the voltage across the inductor is vL(t)= -V1. Since 0>-V1, the inductor current is


output capacitor C1. Therefore, the output voltage v1(t) is increased and output

voltage v2(t) is decreased because of supplying the load R2 [Fig.2-35 (b) and (c)].


The switches S1, SBuck, and SBoost are turned off. As a result, the diode D2 conducts

and the voltage across the inductor is vL(t)=-V1-V2. Since 0>-V1-V2, the inductor

187

current is decreased in this time interval [Fig.2-35 (a)]. The inductor current is

supplied to the output capacitors C1 and C2. Therefore, the output voltages v1(t) and

v2(t) are increased.

Switching state 100 time interval: T100 (t5-t6)

The switches S1 and SBoost are turned off and the switch SBuck is turned on. As a

result, the diode D2 conducts and the voltage across the inductor is vL(t)=Vin-V1-V2.

Since Vin<V1+V2, the inductor current decreases in this time interval. The inductor

current supplies the output capacitors C1 and C2. Therefore, the output voltages v1(t)

and v2(t) are increased.

According to the switching states and waveforms shown in Fig.2-34 and (2-7), the

steady state equation can be derived based on the average voltage across the

inductor and the average current through the capacitors over one switching cycle, as

follows:

0)()()()()()(1

)(1

)(

0)()()()()()(1

)(1

)(

0)()()()()()(1

)(1

)(

6

5

2

5

4

2

4

3

2

3

2

2

2

1

2

1

0

222

6

5

1

5

4

1

4

3

1

3

2

1

2

1

1

1

0

111

6

5

5

4

4

3

3

2

2

1

1

0

t

t

C

t

t

C

t

t

C

t

t

C

t

t

C

t

t

C

sw

Tt

t

C

sw

C

t

t

C

t

t

C

t

t

C

t

t

C

t

t

C

t

t

C

sw

Tt

t

C

sw

C

t

t

L

t

t

L

t

t

L

t

t

L

t

t

L

t

t

L

sw

Tt

t

L

sw

L

dttidttidttidttidttidttiT

dttiT

ti

dttidttidttidttidttidttiT

dttiT

ti

dttvdttvdttvdttvdttvdttvT

dttvT

tv

sw

sw

sw

(2-115)

Assuming the ripple is negligible, v1(t)=V1 and v2(t)=V2, (2-115) may be rewritten as

follows:

0)()0()()()()0( 21100210001001101110010 VVVTVVTVTvTVTT inin (2-116)

0))(())((11 000100101001110010 RLR IITTTTITT (2-117)

0))(())((22 100000101001110010 RLR IITTITTTT (2-118)

where T010, T110, T101, T001, T000, and T100 are the time intervals of switching states

010, 110, 101, 001, 000, and 100 respectively. By factorizing Vin, IL, V1, V2 and

rewriting (2-116 and 2-117):

188

0)()()( 10000021000001010011100101110 TTVTTTTVTTTVin (2-119)

0)()(1100000101001 swRL TITTTTI (2-120)

0)()(2100000 swRL TITTI (2-121)

Dividing both sides of (2-119 and 2-121) by Tsw, the duty cycle of switches SBuck, S1,

D2 can be defined as follows:

sw

D

sw

S

sw

S

T

TTD

T

TTD

T

TTTD

Buck

)(

)(

)(

100000

001101

100101110

2

1

(2-122)

where, BoostSD , 1SD , and 2DD are the duty cycles of the switches SBoost, S1 and the

diode D2, respectively.

Considering IRj=Vj/Rj, (2-119 and 2-121) can be rewritten as follows:

0)( 21 221VDVDDVD DDSinSBuck

(2-123)

LDSLDSRLDS IRDDVR

VIDDIIDD 11

1

1 )(0)()(2121121

(2-124)

LDLDRLD IRDVR

VIDIID 22

2

22222

0 (2-125)

The average inductor current can be formulated by substituting (2-124 and 2-125) in

(2-123):

2

2

1

22

2

1

2

221

221 )(0)(

RDRDD

VDIIRDIRDDVD

DDS

inS

LLDLDSinSBuck

Buck

(2-126)


2

2

1

2

1

1

221

21

)(

)(

RDRDD

VRDDDV

DDS

inSDS Buck (2-127)

2

2

1

2

2

2

221

2

)( RDRDD

VRDDV

DDS

inSD Buck (2-128)

189

Considering (2-127 and 2-128), a special case of equal load resistances (R1=R2=R)

is considered here. The output voltages would be related to the input voltage and the

duty cycles, as presented in (2-129 and 2-130):

221

221

21

)(

)(

DDS

inSDS

DDD

VDDDV Buck (2-129)

222

221

2

)( DDS

inSD

DDD

VDDV Buck (2-130)

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