Advances in Die Extraction and Re-Packaging for Obsolete Semiconductors

Design/Sales/Support partner for EMEA: Research/Design Manu. Facilities

GCI/Force Provides High-

Reliability Electronic

Components for Oil/Gas

Drilling in Harsh

Environments

GCI/Force Engineers

Integrated Circuit

Obsolescence Solutions for

Military and Commercial

Applications

GCI/Force Manufactures and

Services Products On Site

Who is GCI/Force

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Inadequate Overlap between Component Product Lifecycles and Required

Lifecycle of End Product/System

Common in Military Electronic System Platforms

(Thousands of Commercial ICs are Obsoleted Every Year)

Also seen in Commercial Systems (e.g, Medical)

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Why a Demand for our Obsolescence Solutions?

Solution for Obsolescence - DER™

If one Package Footprint or Type is Obsolete, but the Die can still be

Located in Another Package Footprint, the Die can be Extracted and

Re-Assembled As Needed (DERTM)

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- Or the DERTM

Process Can be

Used to

Inventory

Functional Die.

Solution For Obsolescence - DERTM

Die Extraction and Re-Packaging Considerations:

- What is the End Application?: (Bare Die, Hybrid, Monolithic.MCM)

- Original Package, Target Package Selection, Bond Map, etc.

- Plastic SOIC to Ceramic TSOP (Hermetic)

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Die Extraction & Re-Packaging (DERTM)

Remove Die from Original Low-Reliability, Low-Temp Plastic Casing

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Hermetic Packaging

Hybrids & Multi-Chip Modules

Re-Assembly into High-Reliability Ceramic Package of any Footprint using Proprietary Processes

OR

DERTM Technology

Extraction Technology Provides Very Clean Front-Side and Back-Side

Surfaces

Relies on Chemical and Mechanical Processes Which Are No More

Aggressive Than Those Used During Wafer Fabrication

- Extremely Clean

Bond Pads

- No Inadvertent

Etching

- Die Surface Free of

Contaminants

- Die Back-Side Surface Free

of Contaminants and Returned

to Original Mirror Finish

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Conventional Bonding During Re-Packaging

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Re-manufactured Part Process Flow

PRODUCT FLOW

PE

RF

OR

MA

NC

E/R

EL

IAB

ILIT

Y

Commercial CMOS ASYNCHRONOUS FIFO Military CMOS ASYNCHRONOUS FIFO

• IDT7201LA50XEB

• 28 Pin CERDIP

• IDT7201LA5OP

• 28 Pin PDIP

• Purchased from

Franchised

Distributor

• GCI7201LA50XEB

• 28 Pin CERDIP

• Qualified

OBSOLETE PART

DONOR

REMANUFACTURED PART

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DERTM Process Improvements – Pad Re-Plating , Now DEERTM

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Pad Re-Conditioning Using Gold Ball Removal Followed by ENEPIG

(Electroless Nickel, Electroless Palladium, Immersion Gold) Plating - DEERTM

Potential Original Poor Ball Bond Quality/Reliability is Removed

Subsequent Bonding is Non-Compound with More Consistent and

Reliable Bond Pull Strength

New Bond Pad Surface Eliminates Possibility of Kirkendall Voiding with

Gold Bond Wire at Operating Temperatures Above 150°C

General Appearance

of Kirkendall or

Horsting Voiding at

Bond Pad Location -

Specifically at Gold

Ball to Aluminum

Bond Pad Interface

the following

dielectrics can be

formed: Au5Al2,

Au4Al, Au2Al and

AuAl2

DERTM Process Improvements – Pad Re-Plating (DEERTM)

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Process Flow for Pad Re-Conditioning Following Extraction Targeted Thicknesses: 4 um Ni, 0.25 um Pd, 0.04 um Au

Gold Ball Removal, Pad Re-Plating with Electroless Ni/Pd/Au Process DEERTM

Aluminum Pad Reconditioning for an Extracted Die (Target Total Plate Up is 4 - 5 um)

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Packaging Option Key: 1 – Standard Plastic (25h) 2 – Extraction, Standard Ceramic Assembly (DERTM) (95h) 3 – Extraction, Hi-Temp Ceramic Assembly (DERTM ) (600h) 4 – Extraction, Ni/Pd/Au Process, Hi-Temp Ceramic Assembly (DEERTM) (+6000h) 5 – Extraction, Ni/Pd/Au Process, Standard Ceramic Assembly (DEERTM) (+2500h)

1

10

100

1000

10000

1 2 3 4 5

Hours

Packaging Options

Hours to Failure @ 250°C

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GCI’s Ni/Pd/Au Pad Re-Plating Performance at 250°C

Avg. Bond Std. Mean- Plastic Pull Strength Dev. 3 SD Mean Device as Received: 7.154g 1.03g 4.06g Control Device After Pad Re-Conditioning: T=0 13.302g 1.52g 8.74g 6.8g T=168 (250°C) 12.650g 1.26g 8.89g 3.2g T=1000 (250°C) 11.540g 0.90g 8.50g 1.0g T=2000 (250°C) 10.913g 0.76g 8.65g 0.0g Data Reflects 16 Data Points for Each Component

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Ni/Pd/Au Pad Performance at 250°C

Ni/Pd/Au Pad Re-Plating Performance at 250°C

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Bond Pull Strength vs. Time at 250°C for ENEPIG Pad Plating, DEERTM

U.S. Department of Defense DER Research (Air Force)

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F-16 P/N (GEN#)

Original

Package

New

Package

Counterfeit

Analysis

Variability

Analysis

Reliabilit

y

Study

DER

HERM

ASSY

SMD

Military

3-T

Electrical

100%

Screen/

Group A

QCI

Group B

QCI

Group C

1K Hour

Life

QCI

Group D

Ext.

2K Hour

Life

AT28C64B

Memory Device

28-pin

SOIC

Plastic

Ceramic-

28 Pin

SideBraze

Authorized

Distributor

- Franchised PASS PASS 100% 100% PASS PASS PASS PASS PASS PASS

XC4013XL

Field Programmable

Gate Array

160-pin

TQFP

Plastic

Ceramic-

144 CQFP

Authorized

Distributor

-

Franchised PASS PASS 100% 100% PASS PASS PASS PASS 7/10/17 PASS

• DER PROCESS PASSED “V” LEVEL TESTING PER MIL-PRF-38535 AND MIL-STD-883 / 5004 & 5005 QCI AND PERFORMS BEYOND 2000 HOUR LIFE TEST. • QCI LIFE TEST EXTENDED FROM 2,000 HOURS TO 4,000 HOURS TO MEET DLA’S NEW TECHNOLOGY INSERTION LIFE TEST REQUIREMENT. • TO DATE THE RESULTS SHOW GCI’S DER PROCESS IS HIGHLY RELIABLE AFTER SUCCESSFUL SCREENING AND QCI IN ACCORDANCE WITH MIL-PRF-38535, MIL-STD-

883/5004/5005. • 100% SCREENED PARTS ARE AVAILABLE FOR LRU AND SYSTEM LEVEL TESTING TO THE USG. • GCI HAS SUCCESSFULLY QUALIFIED A DER PART IN ACCORDANCE WITH MIL-PRF-38535, MIL-STD-883/5004/5005 AND THE NAVY IS PRESENTING A SUCCESS STORY AT

THE NOVEMBER 2016 DMSMS CONFERENCE.

• NET RESULT: GCI HAS BEEN AWARDED A $2.75M CONTRACT WITH THE AIR FORCE TO BUILD AND QUALIFY 20 – 25 OTHERWISE OBSOLETE IC DEVICES

CANDIDATE DEVICE TYPE SELECTED (NAVY)

NM24C04

8-lead Ceramic Side Braze Package

SCD 80202739004

• Process Die Removal

• Hermetic Packaging

• Donor Electrical Variability Analysis

• Reliability Temperature Stress Cycling

• MIL-PRF-38535 Appendix B (V Level)

• 100% Screening 883/5004

• QCI Per 883/5005, 1K Hour Life Test

Donor Device Target Device

Ceramic Package Drawing

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NSWC 24C04DMB

Project Franchised

Distributor Only

Pass / Fail?

System and Piece Part Screening

100% “B” Level

Screening Per MIL-

STD-883/5004

QCI Per STD-

883/5005 Groups A,

B, C, D

Life Test 1,000 Hrs.

Candidate Parts Selection

YES 100% Visuals

Pre & Post Burn-in Delta

Measurements

Hermetically Sealed, meeting

SMD Requirements Marking is for

illustration only

Bond Pull Data: Identical Strength for Compound or Single Bonds

DER DEVICE SELECTION, SCREENING & QCI FLOW (NAVY)

NO

100% PIND, Read & Record Data

DER Assembly

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Die Thinning t0 75 um & Stacking

Additional GCI/Force Capabilities

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Additional GCI Capabilities

Vacuum Bake & Sealing

- Low-Pressure (10-5 Torr) Vacuum Bake and Sealing for MEMs Devices – Controlled Cavity/Sealing Atmosphere

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GCI’s Extraction Capability is Proven and Reliable

- Over 100K GCI DERTM Processed ICs Currently in the Field

Standard High-Temperature Packaging Increases Life Times

by More Than 250x for Applications > 150°C)

Ni/Pd/Au Pad Re-Plating Increases Life Times by More than

1000x (for Applications > 150°C)

Ni/Pd/Au Pad Reconditioning DEERTM Allows for Conventional

Assembly with Increased Quality While Maintaining Hi-Temp

Reliability!

Summary of GCI Capabilities/Services

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Counterfeit Screening

In-house IC & Hybrid Assembly Facility

Turnkey High-Volume Production IC Solutions for Extreme

Environments (High Shock @ >150°C) as well as

Aerospace, Defense, and Industrial Applications

Quick-Turn Prototype Development

Failure Analysis

Summary of GCI/Force Capabilities/Services

Solutions for Obsolescence

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Die Thinning and Vacuum Sealing

Contact Information

Michael Salmon

Director of Engineering

Tel+44(0)1264 731200

www.forcetechnologies.co.uk (EMEA)

Erick Spory

President & CTO

www.GCI-Global.com (ROW)

ISO 9001:2008 Certified Company

EMEA Distributor/Partner for GCI

DER™ DEER™ are the Registered Trade Marks of Global Circuit Innovations. Presentation in part, shown by kind permission of GCI

AS9100D tba Dec’17 Certified Company