Welcome! NEW LINK: https://training.ti.com/aerospace-defense-2020-webinar-series

Aerospace and Defense Webinar Series

• Every Tuesday at 2:30pm EST.

• Webinar WILL BE RECORDED and posted in LINK above

• Please send questions to TI contact who invited you to this session or use the chat feature in Webex

• Reminder: Multiple companies are on the line, please refrain from sharing anything proprietary.

• Please MUTE YOUR AUDIO

1

Texas Instruments

RF Sampling Converters Basics

2

Outline

• Dynamic Performance

– Noise contributions (thermal, jitter, quantization)

– Jitter breakdown (clock, aperture)

– Thermal noise impact to clock (slew rate)

• Frequency Planning

– DAC planning – keep wide swath of clear spectrum

– ADC planning – no interference in band

• Advanced System Features

– High BW (continuous or aggregate)

– Multi-band

• Dual DUC/DDC

• Multi-NCO (frequency agile, hopping, band monitoring)

– High Frequency

• Multi-Nyquist/high input BW - ADC

• Mixed mode, Multi-Nyquist DAC

• RF Sampling Roadmap Trends

3

Setting the Stage

• RF Sampling ADC Architecture

– Folding Interpolation

• High sampling rates 10 GSPS … pushing towards 50 GSPS

• 12-bit performance with reasonable power consumption

– Pipeline

• Core sample rates at 3 GSPS … pushing towards 10 GSPS

• 14-bit performance with good power consumption

• RF Sampling DACs

– 14-bit operating up to 12 GSPS – support 6 GHz RF in 1st Nyquist zone

– Multi-mode operation to operate in 2nd Nyquist zone (or higher) up to 12 GHz

4

Anatomy of the RF Sampling Converter

5

SNR Contribution Breakdown

• Total SNR can be calculated by the sum of the individual sources:

– SNRQuant: SNR due to quantization noise (typically out of the picture)

𝑆𝑁𝑅𝑄𝑢𝑎𝑛𝑡 = 6.02𝑁 + 1.76 𝑑𝐵

– SNRTherm: SNR due to thermal noise

– SNRJitter: SNR due to clock and aperture jitter

𝑆𝑁𝑅𝑇𝑜𝑡𝑎𝑙 = −10log 10−𝑆𝑁𝑅𝑄𝑢𝑎𝑛𝑡

10 + 10−𝑆𝑁𝑅𝐽𝑖𝑡𝑡𝑒𝑟

10 + 10−𝑆𝑁𝑅𝑇ℎ𝑒𝑟𝑚

10

6

Thermal

Clock Jitter

Aperture Jitter

Quantization

Jitter Impact with respect to Frequency

• SNR is independent of sampling rate

• SNR is dependent on input frequency

– For a given amount of jitter, SNR degrades as input

frequency increases

• Higher sampling rates indirectly lead to more

stringent jitter requirements

– High sampling rate device are not “more sensitive”;

rather, high sampling rates allow higher input

frequencies

Clk

IF1

IF2

t=Jitter

)2log(20 jinj fSNR

Jitter Contributions

• The total clock jitter for a data converter is sum of:

– Clock jitter: jitter contribution from the external clock source; measured with a phase

noise analyzer

– Aperture jitter (a.k.a. aperture uncertainty): jitter contribution from the internal clock

path of the data converter; value taken from datasheet

• Total clock jitter is the rms sum of individual contributors

𝜏𝐽𝑖𝑡𝑡𝑒𝑟 = 𝜏𝐶𝑙𝑘2 + 𝜏𝐴𝑝𝑒𝑟𝑡𝑢𝑟𝑒

2

• Critical to provide lowest phase noise, lowest jitter clock for best SNR

9

Impact of Wideband Clock Noise

10

Input Signal Clock Signal

Clock bandwidth typically

limited to 2Fs

• Input signal and clock signal

• Clock (signal+noise) effectively “mix

down” to input signal

• All noise aliases down to 1st Nyquist

zone

• Low clock noise floor or clock band-pass

filter is critical

n

t

Slew Rate and Jitter Performance

• Slower slew rate is more susceptible to zero crossing variations due to noise

• BPF filters broadband noise but also removes harmonics

– Square-wave-like clocks become sinusoid clocks

– Sinusoid signals have lower slew rate

• Increase signal to large amplitude to minimize slew rate impact

11

n

t1

t2

Reality of RF Sampling Transmitter

12

Freq Fs/2 band

HD2 HD3 Clk Mix

Fs/2 - RF …

Filter 2nd Nyquist

Image RF

• Ideal Transmitter: Fundamental signal at the frequency of interest

• Real World Impairments:

– HD2, HD3 (aliased) Component

– Clock Mixing, Fs/2 Spurious

– Image Frequency in 2nd (and higher) Nyquist zone

• Analog filter added to minimize/eliminate spurious outputs

Strategy for Spectral Mask with RF DAC

• Meeting in-band spectral mask

– No filtering is possible; inherent performance must meet mask

– Frequency plan to move known spurious product outside of band

• Meeting out-of-band spectral mask

– Optimize sampling rate to move spurious far away from desired band

– Incorporate filtering to suppress out-of-band spurious from being transmitted

– Farther the separation of spurious products, the easier to filter

– With proper planning, filtering eliminated or relaxed compared to other architectures 13

Freq

Fs/2 RF DAC …

Filter

TX Frequency Planning Example RF = 2140 MHz; BW = 60 MHz

• Fs = 6144 MHz

• In-band is clear but HD2 and HD4 are close

and hard to filter

• Increase sampling rate:

– Fs = 8024 MHz

• In band still clear but HD3, HD5, and Clock

mixing spur hard to filter

• Decrease sampling rate:

– Fs = 5683.2 MHz

• In-band clear and lots of spacing to other

spurious easy filtering

14

Reality of RF Sampling Receiver

• Real World Spectral Impairments

– Spurious signals (i.e. IM3, HD2, HD3 etc.) from in-band interferers generated in analog chain (i.e.

LNA, VGA)

– Out-of-band Interferers from Blockers/Jammers

– TX signal bleed-through to the RX path

– IM3 Mixing products between Jammers and TX bleed-thorough

• Real World Overdrive Impairments

– TX Bleed-through

– Blockers/Jammers

• Broadband Noise folding into 1st Nyquist Zone

Freq Fs/2 Band

RF ADC

15

Strategy for Maintaining Sensitivity w/ RX

• Duplexer Filter

– Suppresses TX Bleed-through into receiver

– Eliminates IM3 Spurious generation

• Channel Filter

– Suppress out-of-band spurious generated from in-band interferers

– Suppress Blocker signals

– Suppress harmonic/mixing spurs from blocker(s)

• Anti-aliasing filter to eliminate broadband noise

Freq Fs/2 band

RF ADC

Duplexer Filter

Channel Filter

16

RF Sampling ADC - Frequency Planning

• Spurs from out-of-band interferers or TX bleed-through – Proper filtering can minimize or eliminate these threats

• Spurs from in-band interferers – Can not filter these signal out

– Need to frequency plan around

• Higher sampling rate affords flexibility in frequency planning around troublesome harmonic and spurious products

• Frequency planning in High IF systems – Choose available sampling rate converter

– Optimize IF location for best results

• Frequency Planning in RF Sampling – Can not choose location of RF signal; this is fixed

– Optimize sampling rate to achieve best results

17

Frequency Planning Example

• Case 1: High IF Sampling

– Fs = 500 MHz

– IF = 375 MHz

– BW = 100 MHz

• Can not escape from aliased

HD2 and higher harmonics

• Case 2: RF Sampling

– Fs = 6144 MHz

– BW = 100 MHz

– RF = 1950 MHz

• Higher order harmonics do

not fall in band

18

High Bandwidth - Multi-band Operation

• Signal BW does not need to be contiguous

– i.e. Two smaller BW signal separated in frequency considered as one larger signal BW

• RF Sampling solution provides a mechanism to support multiple bands, each

with arbitrary signal bandwidth and with variable spacing

19

Band 1 Band 2

BW1 BW2

System BW

High Bandwidth / Flexibility - Tunable

• Allocated RF Frequency Band is pre-defined

– i.e. defined from standards requirement, regulatory requirements, or from system

specifications

• Within the allocated band, desired signal can be assigned to specific (narrow

band) channel

• RF Sampling Solution provide mechanism to easily place/capture desired signal

at any arbitrary channel.

20

Multiple NCO – Multi-Band

• Include multiple NCOs to tune separate channels to arbitrary RF frequency

location

– Supports non-contiguous multi-carrier operation

– Supports multi-band or multi-mode operation

• Keeps input data rates low; sufficient to meet bandwidth requirements of each

signal

• Supports very wide effective output bandwidth

21

NCO – Numerically Controlled Oscillator

• Includes 2 switchable NCOs

– NCOs programmed via SPI

– Switch accomplished via SPI or GPIO

• Why multiple NCOs?

– Switch to different bands quickly: calibration purposes, band flexibility, etc.

– Quick frequency hopping

• Resolution

– 32-bit Resolution = 𝑁 ∗𝐹𝑠

232

– Fixed 5 kHz raster with Reference = N*61.44 MHz

• All NCOs maintain phase 22

NCO Phase Cohesion

23

Phase

information

retained

Synchronization

maintained when

frequency shifting

Standard Zero-order Hold Sampling AKA Non-return to Zero (NRZ)

24

1st N

yquis

t

2n

d N

yquis

t

Reference: Digital-to-Analog Converter (DAC) Output Response presentation at ti.training.com

Mixed Mode DAC AKA Return-to-Complement (RTC)

25

1st N

yquis

t

2n

d N

yquis

t

Mixed Mode Option

• Mixed mode provides option to use 2nd Nyquist zone

• Operation up to 6 GHz output

– 1st Nyquist zone with 12 GHz clock

– 2nd Nyquist zone with 6 GHz clock

Saves power

• Operation above 6 GHz possible in mixed mode operation with 12 GHz clock

26

Inverse SINC filter

• Digital pre-emphasis filter corrects for the expected SINC response

– Zero-Order hold – 1st Nyquist operation

– Mixed Mode - 2nd Nyquist Operation

• Digitally back-off signal to account for iSINC gain to avoid saturation

Dis

cre

te A

DC

/DA

C

An

alo

g F

ron

t E

nd

s

RF Sampling Roadmap Trends

Released Sampling

1.6x BW increase

Multi-Channel Integration

DAC38RF80/83/90/93 • Dual, 14-bit 9-GSPS DAC • Internal PLL/VCO

ADC12J4000 • Single, 12-bit 4-GSPS ADC

AFE74xx • 4T4R • 9-GSPS DAC / 3-GSPS ADC • Integrated DSA / PLL/VCO

AFE7950/00 • 4T6R – 30M-12GHz • Integrated DSA / PLL/VCO • BW: 2.4 / 1.2 GHz TX / RX

ADC12DJ3200 • Dual, 12-bit 3.2-GSPS ADC • Single, 12-bit 6.4-GSPS ADC

ADC12QJ1600 • Quad, 12-bit 1.6-GSPS ADC

ADC12DJ5200 • Dual, 12-bit 5.2-GSPS ADC • Single, 12-bit 10.4-GSPS

2x Channel Integration

1.5x Power Reduction

4 Channel Integration 2x BW increase

Higher SNR

ADC32RF80/83 • Dual, 14-bit 3-GSPS ADC • 4-GHz input BW • NSD = -155 dBFS/Hz

2x Power Reduction

FB Channel Integration

2x SerDes Speed

2x Frequency Range

Development

AFE80xx • Coming 2021

DAC39RF10 • High Performance • Multi-Nyquist DAC

ADC32RF54 • High Performance • Multi-Nyquist ADC

Texas Instruments Check Out High Speed Signal Chain University for more information: https://training.ti.com/high-speed-signal-chain-university