Ambrish VarmaAmbrish Varma 1

Effect of Pin Parasitics on SSN

Ambrish Varmaakvarma@ncsu.edu

26th September 2005

Ambrish VarmaAmbrish Varma 2

Three Cases

GRND

3.3 V

40 Ω 40 Ω50 Ω

L1

L3

L1

L6

L2L2

► Adapted from Hall, Hall and McCall, “High-Speed Digital System Design,” p.121► Buffers are Arpad’s IBIS class HSPICE design (not IBIS)► Receiver is disabled driver► Transmission line references are universal ground

► GRND is not ”ideal 0” – a DC source with 0 V is placed between “GRND” and 0This slide same as Michael Mirmak’s

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Case1.options accurate post probe numdgt=10 measdgt=10 ingold .tran 10p 100n* NOTE - "ideal ground node 0" is defined as an effectively* lossless low-impedance ground plane.* Similarly the voltage node 1.5 V is assumed an* effectively lossless low-impedance power plane.Vpwr pwr 0 DC=3.3Vgnd grnd 0 DC=0

Xdriver input drv_out drv_pwr drv_gnd enable IO_buf Xreceiver rcv_pwr rcv_in rcv_pwr rcv_gnd rcv_pwr IO_buf Venable enable drv_gnd DC=0Vinput input drv_gnd pul(0 3.3 0 100p 100p 7.4n 15n)

Tdrv drv_bw grnd line_out grnd Z0=40 TD='0.0254*0.180n' L=0.5Trcv rcv_bw grnd line_in grnd Z0=40 TD='0.0254*0.180n' L=3.3Tline line_out grnd line_in grnd Z0=50 TD='0.0254*0.180n' L=0.5

Lgnd_drv drv_gnd grnd L=7.5nLline_drv drv_out drv_bw L=9nLpwr_drv drv_pwr pwr L=9n

Lgnd_rcv rcv_gnd grnd L=7.5nLline_rcv rcv_in rcv_bw L=9nLpwr_rcv rcv_pwr pwr L=9n

.print V(pwr,grnd) V(drv_pwr, drv_gnd) V(rcv_in,grnd) V(rcv_in, rcv_gnd)+ I(Vpwr) I(Vgnd).end

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Case2.options accurate post probe numdgt=10 measdgt=10 ingold .tran 10p 100n* NOTE - "ideal ground node 0" is defined as an effectively* lossless low-impedance ground plane.* Similarly the voltage node 1.5 V is assumed an* effectively lossless low-impedance power plane.Vpwr pwr 0 DC=3.3Vgnd grnd 0 DC=0

Xdriver input drv_out drv_pwr drv_gnd enable IO_buf Xreceiver rcv_pwr rcv_in rcv_pwr rcv_gnd rcv_pwr IO_buf Venable enable drv_gnd DC=0Vinput input drv_gnd pul(0 3.3 0 100p 100p 7.4n 15n)

Tdrv drv_bw grnd line_out grnd Z0=40 TD='0.0254*0.180n' L=0.5Trcv rcv_bw grnd line_in grnd Z0=40 TD='0.0254*0.180n' L=3.3Tline line_out grnd line_in grnd Z0=50 TD='0.0254*0.180n' L=0.5

Lgnd_drv drv_gnd grnd L=0nLline_drv drv_out drv_bw L=16.5nLpwr_drv drv_pwr pwr L=1.5nK1 Lline_drv Lpwr_drv 0.476731295Lgnd_rcv rcv_gnd grnd L=0nLline_rcv rcv_in rcv_bw L=16.5nLpwr_rcv rcv_pwr pwr L=1.5nK2 Lline_rcv Lpwr_rcv 0.476731295

.print V(pwr,grnd) V(drv_pwr, drv_gnd) V(rcv_in,grnd) V(rcv_in, rcv_gnd)+ I(Vpwr) I(Vgnd).end

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Case3.options accurate post probe numdgt=10 measdgt=10 ingold .tran 10p 100n* NOTE - "ideal ground node 0" is defined as an effectively* lossless low-impedance ground plane.* Similarly the voltage node 1.5 V is assumed an* effectively lossless low-impedance power plane.Vpwr pwr 0 DC=3.3Vgnd grnd 0 DC=0

Xdriver input drv_out drv_pwr drv_gnd enable IO_buf Xreceiver rcv_pwr rcv_in rcv_pwr rcv_gnd rcv_pwr IO_buf Venable enable drv_gnd DC=0Vinput input drv_gnd pul(0 3.3 0 100p 100p 7.4n 15n)

Tdrv drv_bw grnd line_out grnd Z0=40 TD='0.0254*0.180n' L=0.5Trcv rcv_bw grnd line_in grnd Z0=40 TD='0.0254*0.180n' L=3.3Tline line_out grnd line_in grnd Z0=50 TD='0.0254*0.180n' L=0.5

Lgnd_drv drv_gnd grnd L=0nLline_drv drv_out drv_bw L=9nLpwr_drv drv_pwr pwr L=9n

Lgnd_rcv rcv_gnd grnd L=15nLline_rcv rcv_in rcv_bw L=9nLpwr_rcv rcv_pwr pwr L=9n

.print V(pwr,grnd) V(drv_pwr, drv_gnd) V(rcv_in,grnd) V(rcv_in, rcv_gnd)+ I(Vpwr) I(Vgnd).end

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Receiver Input Vs Receiver Ground (rcv_gnd)

Case1

Case2

Case3

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Receiver Input Vs System Ground (grnd)

Case1

Case2

Case3

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Case1 – 4 drivers* Case1.options accurate post probe numdgt=10 measdgt=10 ingold .tran 10p 100n* NOTE - "ideal ground node 0" is defined as an effectively* lossless low-impedance ground plane.* Similarly the voltage node 1.5 V is assumed an* effectively lossless low-impedance power plane.Vpwr pwr 0 DC=3.3Vgnd grnd 0 DC=0Xdriver1 input1 drv_out1 drv_pwr drv_gnd enable IO_buf Xdriver2 input2 drv_out2 drv_pwr drv_gnd enable IO_buf Xdriver3 input3 drv_out3 drv_pwr drv_gnd enable IO_buf Xdriver4 input4 drv_out4 drv_pwr drv_gnd enable IO_buf

Xreceiver1 pwr rcv_in1 rcv_pwr rcv_gnd pwr IO_buf Xreceiver2 pwr rcv_in2 rcv_pwr rcv_gnd pwr IO_buf Xreceiver3 pwr rcv_in3 rcv_pwr rcv_gnd pwr IO_buf Xreceiver4 pwr rcv_in4 rcv_pwr rcv_gnd pwr IO_buf

Venable enable drv_gnd DC=0

Vinput1 input1 drv_gnd pul(0 3.3 0 100p 100p 7.4n 15n)Vinput2 input2 drv_gnd pul(0 3.3 0 100p 100p 7.4n 15n)Vinput3 input3 drv_gnd pul(0 3.3 0 100p 100p 7.4n 15n)*Vinput4 input4 drv_gnd pul(0 3.3 0 100p 100p 7.4n 15n)Vinput4 input4 drv_gnd DC=0

Tdrv1 drv_bw1 grnd line_out1 grnd Z0=40 TD='0.0254*0.180n' L=0.5Trcv1 rcv_bw1 grnd line_in1 grnd Z0=40 TD='0.0254*0.180n' L=3.3Tline1 line_out1 grnd line_in1 grnd Z0=50 TD='0.0254*0.180n' L=0.5

Tdrv2 drv_bw2 grnd line_out2 grnd Z0=40 TD='0.0254*0.180n' L=0.5Trcv2 rcv_bw2 grnd line_in2 grnd Z0=40 TD='0.0254*0.180n' L=3.3Tline2 line_out2 grnd line_in2 grnd Z0=50 TD='0.0254*0.180n' L=0.5

Ambrish VarmaAmbrish Varma 9

Cont..Tdrv3 drv_bw3 grnd line_out3 grnd Z0=40 TD='0.0254*0.180n' L=0.5Trcv3 rcv_bw3 grnd line_in3 grnd Z0=40 TD='0.0254*0.180n' L=3.3Tline3 line_out3 grnd line_in3 grnd Z0=50 TD='0.0254*0.180n' L=0.5

Tdrv4 drv_bw4 grnd line_out4 grnd Z0=40 TD='0.0254*0.180n' L=0.5Trcv4 rcv_bw4 grnd line_in4 grnd Z0=40 TD='0.0254*0.180n' L=3.3Tline4 line_out4 grnd line_in4 grnd Z0=50 TD='0.0254*0.180n' L=0.5

Lgnd_drv drv_gnd grnd L=7.5n

Lline_drv1 drv_bw1 drv_out1 L=9nLline_drv2 drv_bw2 drv_out2 L=9nLline_drv3 drv_bw3 drv_out3 L=9nLline_drv4 drv_bw4 drv_out4 L=9n

Lpwr_drv drv_pwr pwr L=9nLgnd_rcv rcv_gnd grnd L=7.5n

Lline_rcv1 rcv_bw1 rcv_in1 L=9nLline_rcv2 rcv_bw2 rcv_in2 L=9nLline_rcv3 rcv_bw3 rcv_in3 L=9nLline_rcv4 rcv_bw4 rcv_in4 L=9n

Lpwr_rcv rcv_pwr pwr L=9n

.print V(pwr,grnd) V(drv_pwr, drv_gnd) V(rcv_in1,grnd) V(rcv_in1, rcv_gnd)+ V(rcv_in4,grnd) V(rcv_in4, rcv_gnd) I(Vpwr) I(Vgnd).end

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Case3 – 4 Drivers* Case1.options accurate post probe numdgt=10 measdgt=10 ingold .tran 10p 100n* NOTE - "ideal ground node 0" is defined as an effectively* lossless low-impedance ground plane.* Similarly the voltage node 1.5 V is assumed an* effectively lossless low-impedance power plane.Vpwr pwr 0 DC=3.3Vgnd grnd 0 DC=0Xdriver1 input1 drv_out1 drv_pwr drv_gnd enable IO_buf Xdriver2 input2 drv_out2 drv_pwr drv_gnd enable IO_buf Xdriver3 input3 drv_out3 drv_pwr drv_gnd enable IO_buf Xdriver4 input4 drv_out4 drv_pwr drv_gnd enable IO_buf

Xreceiver1 pwr rcv_in1 rcv_pwr rcv_gnd pwr IO_buf Xreceiver2 pwr rcv_in2 rcv_pwr rcv_gnd pwr IO_buf Xreceiver3 pwr rcv_in3 rcv_pwr rcv_gnd pwr IO_buf Xreceiver4 pwr rcv_in4 rcv_pwr rcv_gnd pwr IO_buf

Venable enable drv_gnd DC=0

Vinput1 input1 drv_gnd pul(0 3.3 0 100p 100p 7.4n 15n)Vinput2 input2 drv_gnd pul(0 3.3 0 100p 100p 7.4n 15n)Vinput3 input3 drv_gnd pul(0 3.3 0 100p 100p 7.4n 15n)*Vinput4 input4 drv_gnd pul(0 3.3 0 100p 100p 7.4n 15n)Vinput4 input4 drv_gnd DC=0

Tdrv1 drv_bw1 grnd line_out1 grnd Z0=40 TD='0.0254*0.180n' L=0.5Trcv1 rcv_bw1 grnd line_in1 grnd Z0=40 TD='0.0254*0.180n' L=3.3Tline1 line_out1 grnd line_in1 grnd Z0=50 TD='0.0254*0.180n' L=0.5

Tdrv2 drv_bw2 grnd line_out2 grnd Z0=40 TD='0.0254*0.180n' L=0.5Trcv2 rcv_bw2 grnd line_in2 grnd Z0=40 TD='0.0254*0.180n' L=3.3Tline2 line_out2 grnd line_in2 grnd Z0=50 TD='0.0254*0.180n' L=0.5

Ambrish VarmaAmbrish Varma 11

Cont..Tdrv3 drv_bw3 grnd line_out3 grnd Z0=40 TD='0.0254*0.180n' L=0.5Trcv3 rcv_bw3 grnd line_in3 grnd Z0=40 TD='0.0254*0.180n' L=3.3Tline3 line_out3 grnd line_in3 grnd Z0=50 TD='0.0254*0.180n' L=0.5

Tdrv4 drv_bw4 grnd line_out4 grnd Z0=40 TD='0.0254*0.180n' L=0.5Trcv4 rcv_bw4 grnd line_in4 grnd Z0=40 TD='0.0254*0.180n' L=3.3Tline4 line_out4 grnd line_in4 grnd Z0=50 TD='0.0254*0.180n' L=0.5

Lgnd_drv drv_gnd grnd L=0n

Lline_drv1 drv_bw1 drv_out1 L=9nLline_drv2 drv_bw2 drv_out2 L=9nLline_drv3 drv_bw3 drv_out3 L=9nLline_drv4 drv_bw4 drv_out4 L=9n

Lpwr_drv drv_pwr pwr L=9nLgnd_rcv rcv_gnd grnd L=15n

Lline_rcv1 rcv_bw1 rcv_in1 L=9nLline_rcv2 rcv_bw2 rcv_in2 L=9nLline_rcv3 rcv_bw3 rcv_in3 L=9nLline_rcv4 rcv_bw4 rcv_in4 L=9n

Lpwr_rcv rcv_pwr pwr L=9n

.print V(pwr,grnd) V(drv_pwr, drv_gnd) V(rcv_in1,grnd) V(rcv_in1, rcv_gnd)+ V(rcv_in4,grnd) V(rcv_in4, rcv_gnd) I(Vpwr) I(Vgnd).end

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4 Drivers Switching Receiver Input Vs Receiver Ground (rcv_gnd)

Case1

Case3

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4 Drivers Switching Receiver Input Vs System Ground (grnd)

Case1

Case3

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Quiet Line Receiver Input Vs Receiver Ground (rcv_gnd)

Case1

Case3

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Quiet Line Receiver Input Vs System Ground (grnd)

Case1

Case3

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Quiet Line Receiver Input Vs Receiver Ground (rcv_gnd)

Case1

Case3

Entire simulation Data

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Quiet Line Receiver Input Vs System Ground (grnd)

Case1

Case3

Entire simulation Data

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Quiet Line (with Mutual Inductance) Receiver Input Vs Receiver Ground (rcv_gnd)

Case1

Case3

Entire simulation Data

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Quiet Line(with mutual Ind.) Receiver Input Vs System Ground (grnd)

Case1

Case3

Entire simulation Data

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Mutual Inductance on Case 3 with 4 Drivers

……Lgnd_drv drv_gnd grnd L=0n

Lline_drv1 drv_out1 drv_bw1 L=9nLline_drv2 drv_out2 drv_bw2 L=9nLline_drv3 drv_out3 drv_bw3 L=9nLline_drv4 drv_out4 drv_bw4 L=9n

Lpwr_drv drv_pwr pwr L=9n

K1 Lline_drv1 Lpwr_drv 0.476731295K2 Lline_drv2 Lpwr_drv 0.476731295K3 Lline_drv3 Lpwr_drv 0.476731295K4 Lline_drv4 Lpwr_drv 0.476731295

Lgnd_rcv rcv_gnd grnd L=15n

Lline_rcv1 rcv_bw1 rcv_in1 L=9nLline_rcv2 rcv_bw2 rcv_in2 L=9nLline_rcv3 rcv_bw3 rcv_in3 L=9nLline_rcv4 rcv_bw4 rcv_in4 L=9n

Lpwr_rcv rcv_pwr pwr L=9n……

Ambrish VarmaAmbrish Varma 21

Conclusions

►Case 1 and Case 3 are not similar.►Quiet Line analysis shows that more the number of

drivers, the more obvious the results get (even with Mutual Inductance).

►Also notable is that in case 3, we keep the inductance equivalent. In actual cases, inductances (or parasitics) need not add up. Hence this is more like ‘best case scenario’.