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AN INTELLIGENT MOBILE
ROBOT NAVIGATION
TECHNIQUE
USING RFID TECHNOLOGY
TABLE OF CONTENTS
TITLE PAGE No.
1 ABSTRACT
2 INTRODUCTION
3 BASIC BLOCK DIAGRAM
4 RFID TAGS, READER & OPERATING PRINCIPLE
5 THE ANTENNA
6 MICROCONTROLLER
7 EEPROM
8 LIQUID CRYSTAL DISPLAY (LCD)
9 KEYPAD
10 RS232 SETUP
11 POWER SUPPLY SECTION
12 COMPLETE CIRCUIT DIAGRAM
13 PCB DESIGN
14 SOFTWARE TOOLS
15 PROGRAM (SOURCE CODE)
16 CONCLUSION
17 FUTURE POSSIBILITIES
18 REFERENCES
2
LIST OF FIGURES & DIAGRAMSPAGE No.
1 BASIC BLOCK DIAGRAM
2 OVERALL CIRCUIT DIAGRAM
3 POWER SUPPLY BLOCK DIAGRAM
4 POWER SUPPLY CIRCUIT DIAGRAM
5 MICROCONTROLLER CIRCUIT
6 KEYPAD CIRCUIT
7 EEPROM CIRCUIT
8 RS-232 SETUP CIRCUIT
3
ABSTRACT
Existing techniques for autonomous indoor navigation are often
environment-specific and thus limited in terms of their applicability.
In this project, we take a fundamentally different approach to indoor
navigation and propose an active environment based navigation system. We
argue that for a versatile navigation system the environment itself should
provide spatial information.
In our proposed approach, navigation is based on the concept of space
partitions where the location of an agent is approximated by the closest
partition.
We show that Radio Frequency Identification (RFID) technology is a
viable option for generating space partitions. We present a cost effective
deployment strategy for passive RFID tags to construct a complete
partitioning of the environment.
Our experiments show that the deployment allows efficient path
planning even under a large degree of imprecision.
This project analyses potentials, challenges, and applications of using
passive, stationary RFID tags for marking routes for autonomous vehicles in
manufacturing environments.
Our approach promises to be flexible, robust, and inexpensive. A
prototype has been designed and developed. Two algorithms are
programmed and tested using four RFID tags.
4
INTRODUCTION
Automatic Guided Vehicles (AGVs) are robots moving freely in
manufacturing environments or warehouses require a means of navigation.
Frequently transportation routes are marked with optical lines or electric
wires embedded into the floor. More recently, electric wires are replaced by
RFID tags returning static IDs in defined positions. All approaches share the
inflexibility if routes have to be changed or require to determine the exact
locations of all RFID tags.
This project is about a mobile robot navigation technique using Radio
Frequency Identification (RFID) technology. Navigation based on
processing some analog features of an RFID signal is a promising alternative
to different types of navigation methods in the state of the art. The main idea
is to exploit the ability of a mobile robot to navigate a priori unknown
Environments without a vision system and without building an approximate
map of the robot workspace, as is the case in most other navigation
algorithms.
This project achieved by placing RFID tags in the 3-D space so that
the lines linking their projections on the ground define the “free way’s”
along which the robot can (or is desired to) move. The algorithm is capable
of reaching a target point in its a priori unknown workspace, as well as
tracking a desired trajectory with a high precision. The proposed solution
offers a modular, computationally efficient, and cost-effective alternative to
other navigation techniques for a large number of mobile robot applications,
particularly for service robots, such as, for instance, in large offices and
assembly lines. The effectiveness of the proposed approach is practically
understood by designing a prototype of mobile robot.
5
BASIC BLOCK DIAGRAM
6
RFID TAGS, READER & OPERATING PRINCIPLE
RFID Tags & Reader has three Components
Transponder – RFID tag
Transceiver – Tag Reader
Antenna
Transponder – RFID tag
There are two types of RFID tags: (1) Passive tags, (2) Active tags
Passive tags are those energized by the reader itself, they contain no power
source, typically have very long lifetimes (near indefinite) a drawback over
active tags is the read range, typically 2cm (1in) to 1.5m (4.5 ft), a strong
positive is individual tag cost. RFID Passive tag is composed of a integrated
electronic chip and a antenna coil that includes basic modulation circuitry
and non-volatile memory.
Fig 4.1 - Different types of tags
7
Fig 4.2 – Real tags
For most general applications passive tags are usually the most cost
effective. These are made in a wide variety of sizes and materials: there are
durable plastic tags for discouraging retail theft, wafer thin tags for use
within "smart" paper labels, tiny tracking tags which are inserted beneath an
animal's skin and credit card sized tags for access control. In most cases the
amount of data storage on a passive tag is fairly limited - capacity often
being measured in bits as opposed to bytes.
However for most applications only a relatively small amount of data
usually needs to be codified and stored on the tag, so the limited capacity
does not normally pose a major limitation. Most tags also carry an
unalterable unique electronic serial number, which makes RFID tags
potentially very useful in applications where item tracking is needed or
where security aspects are important.
8
Fig 4.3 - Interaction between tag and reader
The reader powers the tag (transponder), by emitting a radio frequency
wave. The tag then responds by modulating the energizing field. This
modulation can be decoded to yield the tags unique code, inherent in the tag.
The resultant data can be the passed to a computer from processing. Tags
have various salient features apart from their physical size: Other available
features are: Read Only, Read Write, Anti-Collision.
Operating principles of RFID systems
There are a huge variety of different operating principles for RFID
systems. The most important principle is inductive coupling, which is
described in detail below.
Inductive coupling
An inductively coupled transponder comprises of an electronic data-
carrying device, usually a single microchip and a large area coil that
functions as an antenna.
9
Fig 4.4 - Inductive Coupling
Inductively coupled transponders are almost always operated passively.
This means that all the energy needed for the operation of the microchip has
to be provided by the reader. For this purpose, the reader's antenna coil
generates a strong, high frequency electro-magnetic field, which penetrates
the cross-section of the coil area and the area around the coil. Because the
wavelength of the frequency range used (< 135 kHz: 2400 m, 13.56 MHz:
22.1 m) is several times greater than the distance between the reader's
antenna and the transponder, the electro-magnetic field may be treated as a
simple magnetic alternating field with regard to the distance between
transponder and antenna.
A small part of the emitted field penetrates the antenna coil of the
transponder, which is some distance away from the coil of the reader. By
induction, a voltage ‘VI’ is generated in the transponder's antenna coil. This
voltage is rectified and serves as the power supply for the data-carrying
device (microchip). A capacitor ‘C1’ is connected in parallel with the
reader's antenna coil, the capacitance of which is selected such that it
10
combines with the coil inductance of the antenna coil to form a parallel
resonant circuit, with a resonant frequency that corresponds with the
transmission frequency of the reader. Very high currents are generated in the
antenna coil of the reader by resonance step-up in the parallel resonant
circuit, which can be used to generate the required field strengths for the
operation of the remote transponder.
The antenna coil of the transponder and the capacitor ‘C1’ to form a
resonant circuit tuned to the transmission frequency of the reader. The
voltage V at the transponder coil reaches a maximum due to resonance step-
up in the parallel resonant circuit.
As described above, inductively coupled systems are based upon a
transformer-type coupling between the primary coil in the reader and the
secondary coil in the transponder. This is true when the distance between the
coils does not exceed 0.16 times the wavelength, so that the transponder is
located in the near field of the transmitter antenna.
If a resonant transponder (i.e. the self-resonant frequency of the
transponder corresponds with the transmission frequency of the reader) is
placed within the magnetic alternating field of the reader's antenna, then this
draws energy from the magnetic field. This additional power consumption
can be measured as voltage drop at the internal resistance in the reader
antennae through the supply current to the reader's antenna. The switching
on and off of a load resistance at the transponder's antenna therefore effects
voltage changes at the reader's antenna and thus has the effect of an
amplitude modulation of the antenna voltage by the remote transponder. If
the switching on and off of the load resistor is controlled by data, then this
data can be transferred from the transponder to the reader. This type of data
transfer is called load modulation.
11
To reclaim the data in the reader, the voltage measured at the
reader's antenna is rectified. This represents the demodulation of an
amplitude-modulated signal.
Technical Specifications of the tags used
Frequency: 125 KHz Read only
Distance: Up to 30 mm
Dimensions: 75mm x 40mm
Weight: 6.4g
Memory: 16 bits
Data durability: 20 Years or more
The advantages of a passive tag are:
The tag functions without a battery; these tags have a useful life of
twenty years or more. The tag is typically much less expensive to
manufacture
The tag is much smaller (some tags are the size of a grain of rice). These
tags have almost unlimited applications in consumer goods and other areas.
Tags can be read through a variety of substances such as snow, fog, ice,
paint, crusted grime, and other visually and environmentally challenging
conditions, where barcodes or other optically read technologies would be
useless.
RFID tags can also be read in challenging circumstances at remarkable
speeds, in most cases responding in less than 100 millisecond
12
Fig 4.5 – RFID Reader Module
13
THE ANTENNA
A reader reads identifiers from tags on pallets conveyed past the
reader. The reader includes two interleaved linear arrays of antennas with
circularly polarized fields. Each antenna is composed of a pair of crossed
rods phased to have adjacent antennas of an array generate circularly
polarized fields of opposite rotation.
Fig 5.1 – Some Antennas
The vector components of the polarization in the direction across
the width of the conveyor have peaks and nulls, and the interleaved arrays
are arranged such that the nulls of one array's fields are covered with the
peaks of the other array's fields. This arrangement allows the reader to the
identifier from the tag when the tag is at any orientation. A tag at the side of
the reader is aligned in the direction of travel by rails on the conveyor. The
reader has antennas aligned in the direction of travel to read such tags.
14
Loop antenna would provide better gain and also a larger bandwidth.
The inductance and capacitance of the antenna can be calculated from the
equations below:
N = number of turns
w = length of one side (inches)
a = wire radius (inches)
A simple loop antenna was made in order to enhance the reading
distance of the reader. This distance was in fact increased for about half an
inch. Antenna matching was unnecessary as the reader and antenna had
close impedance. It was concluded that antenna constructs two oblong
shapes both in front and rear, which is the case in most square loop antennas.
Fig 5.2 – Radiation Pattern
15
MICROCONTROLLER(AT89S52)
The AT89S52 is a low-power, high-performance CMOS 8-bit
microcontroller with 8K bytes of in-system programmable Flash memory.
The device is manufactured using Atmel’s high-density nonvolatile memory
technology and is compatible with the industry- standard 80C51 instruction
set and pinout. The on-chip Flash allows the program memory to be
reprogrammed in-system or by a conventional nonvolatile memory
programmer. By combining a versatile 8-bit CPU with in-system
programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful
microcontroller which provides a highly-flexible and cost-effective solution
to many embedded control applications.
The AT89S52 provides the following standard features: 8K bytes of
Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers,
three 16-bit timer/counters, a six-vector two-level interrupt architecture, a
full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the
AT89S52 is designed with static logic for operation down to zero frequency
and supports two software selectable power saving modes. The Idle Mode
stops the CPU while allowing the RAM, timer/counters, serial port, and
interrupt system to continue functioning. The Power-down mode saves the
RAM contents but freezes the oscillator, disabling all other chip functions
until the next interrupt or hardware reset.
Features:
• Compatible with MCS-51® Products
• 8K Bytes of In-System Programmable (ISP) Flash Memory
[Endurance: 1000 Write/Erase Cycles]
• 4.0V to 5.5V Operating Range
16
• Fully Static Operation: 0 Hz to 33 MHz
• Three-level Program Memory Lock
• 256 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-bit Timer/Counters
• Eight Interrupt Sources
• Full Duplex UART Serial Channel
• Low-power Idle and Power-down Modes
• Interrupt Recovery from Power-down Mode
• Watchdog Timer
• Dual Data Pointer
• Power-off Flag
17
Fig 6.1 – Microcontroller (AT 89S52) Block Diagram
18
Fig 6.2 – Microcontroller (AT 89S52) Pin Details
Pin Description
VCC - Supply voltage.
GND - Ground.
Port 0 - Port 0 is an 8-bit open drain bidirectional I/O port. As an output
port, each pin can sink eight TTL inputs. When 1s are written to
port 0 pins, the pins can be used as high impedance inputs. Port
19
0 can also be configured to be the multiplexed low order
address/data bus during accesses to external program and data
memory. In this mode, P0 has internal pullups. Port 0 also
receives the code bytes during Flash programming and outputs
the code bytes during program verification. External pullups are
required during program verification.
Port 1 - Port 1 is an 8-bit bidirectional I/O port with internal pullups.
The Port 1 output buffers can sink/source four TTL inputs.
When 1s are written to Port 1 pins, they are pulled high by the
internal pullups and can be used as inputs. As inputs, Port 1
pins that are externally being pulled low will source current
(IIL) because of the internal pullups. In addition, P1.0 and P1.1
can be configured to be the timer/counter 2 external count input
(P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX),
respectively, as shown in the following table. Port 1 also
receives the low-order address bytes during Flash programming
and verification.
Table 6.1 – Microcontroller (AT 89S52) Port 1 Alternate Functions
20
Port 2 - Port 2 is an 8-bit bidirectional I/O port with internal pullups.
The Port 2 output buffers can sink/source four TTL inputs.
When 1s are written to Port 2 pins, they are pulled high by the
internal pullups and can be used as inputs. As inputs, Port 2
pins that are externally being pulled low will source current
(IIL) because of the internal pullups. Port 2 emits the high-order
address byte during fetches from external program memory and
during accesses to external data memory that use 16-bit
addresses (MOVX @ DPTR). In this application, Port 2 uses
strong internal pull-ups when emitting 1s. During accesses to
external data memory that use 8-bit addresses (MOVX @ RI),
Port 2 emits the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some
control signals during Flash programming and verification.
Port 3 - Port 3 is an 8-bit bidirectional I/O port with internal pullups.
The Port 3 output buffers can sink/source four TTL inputs.
When 1s are written to Port 3 pins, they are pulled high by the
internal pullups and can be used as inputs. As inputs, Port 3
pins that are externally being pulled low will source current
(IIL) because of the pullups. Port 3 also serves the functions of
various special features of the AT89S52, as shown in the
following table. Port 3 also receives some control signals for
Flash programming and verification.
21
Table 6.2 – Microcontroller (AT 89S52) Port 3 Alternate Functions
RST - Reset input. A high on this pin for two machine cycles while
the oscillator is running resets the device. This pin drivesHigh
for 96 oscillator periods after the Watchdog times out. The
DISRTO bit in SFR AUXR (address 8EH) can be used to
disable this feature. In the default state of bit DISRTO, the
RESET HIGH out feature is enabled.
ALE/PROG - Address Latch Enable (ALE) is an output pulse for latching
the low byte of the address during accesses to external memory.
This pin is also the program pulse input (PROG) during Flash
programming. In normal operation, ALE is emitted at a
constant rate of 1/6 the oscillator frequency and may be used
for external timing or clocking purposes. Note, however, that
one ALE pulse is skipped during each access to external data
memory. If desired, ALE operation can be disabled by setting
22
bit 0 of SFR location 8EH. With the bit set, ALE is active only
during a MOVX or MOVC instruction. Otherwise, the pin is
weakly pulled high. Setting the ALE-disable bit has no effect if
the microcontroller is in external execution mode.
PSEN - Program Store Enable (PSEN) is the read strobe to external
program memory. When the AT89S52 is executing code from
external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped
during each access to external data memory.
EA/VPP - External Access Enable. EA must be strapped to GND in order
to enable the device to fetch code from external program
memory locations starting at 0000H up to FFFFH, However,
that if lock bit 1 is programmed, EA will be internally latched
on reset. EA should be strapped to VCC for internal program
executions. This pin also receives the 12-volt programming
enable voltage (VPP) during Flash programming.
XTAL1 - Input to the inverting oscillator amplifier and input to the
internal clock operating circuit.
XTAL2 - Output from the inverting oscillator amplifier
Special Function Registers (SFR)
A map of the on-chip memory area called the Special Function Register
(SFR). Note that not all of the addresses are occupied, and unoccupied
addresses may not be implemented on the chip. Read accesses to these
addresses will in general return random data, and write accesses will have an
indeterminate effect. User software should not write 1s to these unlisted
locations, since they may be used in future products to invoke new features.
In that case, the reset or inactive values of the new bits will always be 0.
23
Table 6. – Microcontroller (AT 89S52) SFR Map & Reset values
Timer 2 Registers
Control and status bits are contained in registers T2CON and T2MOD
for Timer 2. The register pair (RCAP2H, RCAP2L) is the Capture/Reload
registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.
Interrupt Registers
The individual interrupt enable bits are in the IE register. Two priorities
can be set for each of the six-interrupt sources in the IP register.
T2CON – Timer/Counter 2 Control Register
TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2 CP/RL2
7 6 5 4 3 2 1 0
24
Table 6.1 Interrupt registers
Symbol Function
TF2Timer 2 overflow flag set by a Timer 2 overflow and must be cleared by software. TF2 will not be set when either RCLK = 1 or TCLK = 1.
EXF2
Timer 2 external flag set when either a capture or reload is caused by a negative transition on T2EX and EXEN2 = 1.When Timer 2 interrupt is enabled, EXF2 = 1 will cause the CPU to vector to the Timer 2 interrupt routine. EXF2 must becleared by software. EXF2 does not cause an interrupt in up/down counter mode (DCEN = 1).
RCLK
Receive clock enable. When set, causes the serial port to use Timer 2 overflow pulses for its receive clock in serial portModes 1 and 3. RCLK = 0 causes Timer 1 overflow to be used for the receive clock.
TCLK
Transmit clock enable. When set, causes the serial port to use Timer 2 overflow pulses for its transmit clock in serial portModes 1 and 3. TCLK = 0 causes Timer 1 overflows to be used for the transmit clock.
EXEN2
Timer 2 external enable. When set, allows a capture or reload to occur as a result of a negative transition on T2EX if Timer2 is not being used to clock the serial port. EXEN2 = 0 causes Timer 2 to ignore events at T2EX.
TR2 Start/Stop control for Timer 2. TR2 = 1 starts the timer.
C/T2Timer or counter select for Timer 2. C/T2 = 0 for timer function. C/T2 = 1 for external event counter (falling edge triggered).
CP/RL2
Capture/Reload select. CP/RL2 = 1 causes captures to occur on negative transitions at T2EX if EXEN2 = 1. CP/RL2 = 0causes automatic reloads to occur when Timer 2 overflows or negative transitions occur at T2EX when EXEN2 = 1. Wheneither RCLK or TCLK = 1, this bit is ignored and the timer is forced to auto-reload on Timer 2 overflow.
Table 6.2 T2CON Timer/Counter 2 Control Register
Dual Data Pointer Registers:
25
To facilitate accessing both internal and external data memory, two banks
of 16-bit Data Pointer Registers are provided: DP0 at SFR address locations
82H-83H and DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0
and DPS = 1 selects DP1.
The user should always initialize the DPS bit to the appropriate value
before accessing the respective Data Pointer Register.
Power Off Flag:
The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON
SFR. POF is set to “1” during power up. It can be set and rest under software
control and is not affected by reset.
Memory Organization
MCS-51 devices have a separate address space for Program and Data
Memory. Up to 64K bytes each of external Program and Data Memory can
be addressed.
Program Memory
If the EA pin is connected to GND, all program fetches are directed to
external memory. On the AT89S52, if EA is connected to VCC, program
fetches to addresses 0000H through 1FFFH are directed to internal memory
and fetches to addresses 2000H through FFFFH are to external memory.
Data Memory
The AT89S52 implements 256 bytes of on-chip RAM. The upper 128
bytes occupy a parallel address space to the Special Function Registers. This
means that the upper 128 bytes have the same addresses as the SFR space
but are physically separate from SFR space. When an instruction accesses an
internal location above address 7FH, the address mode used in the
instruction specifies whether the CPU accesses the upper 128 bytes of RAM
26
or the SFR space. Instructions, which use direct addressing access of the
SFR space.
For example, the following direct addressing instruction accesses the
SFR at location 0A0H (which is P2). MOV 0A0H, #data Instructions that
use indirect addressing access the upper 128 bytes of RAM.
For example, the following indirect addressing instruction, where R0
contains 0A0H, accesses the data byte at address 0A0H, rather than P2
(whose address is 0A0H). MOV @R0, #data Note that stack operations are
examples of indirect addressing, so the upper 128 bytes of data RAM are
available as stack space.
Watchdog Timer (WDT)(One-time Enabled with Reset-out)
The WDT is intended as a recovery method in situations where the CPU
may be subjected to software upsets. The WDT consists of a 13-bit counter
and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to
disable from exiting reset. To enable the WDT, a user must write 01EH and
0E1H in sequence to the WDTRST register (SFR location 0A6H). When the
WDT is enabled, it will increment every machine cycle while the oscillator
is running. The WDT timeout period is dependent on the external clock
frequency. There is no way to disable the WDT except through reset (either
hardware reset or WDT over-flow reset). When WDT overflows, it will
drive an output RESET HIGH pulse at the RST pin.
Using the WDT
To enable the WDT, a user must write 01EH and 0E1H in sequence to
the WDTRST register (SFR location 0A6H). When the WDT is enabled, the
user needs to service it by writing 01EH and 0E1H to WDTRST to avoid a
WDT over-flow.
27
The 13-bit counter overflows when it reaches 8191 (1FFFH), and this
will reset the device. When the WDT is enabled, it will increment every
machine cycle while the WDT at least every 8191-machine cycles.
To reset the WDT the user must write 01EH and 0E1H to WDTRST.
WDTRST is a write-only register. The WDT counter cannot be read or
written. When WDT overflows, it will generate an output RESET pulse at
the RST pin. The RESET pulse duration is 96xTOSC, where
TOSC=1/FOSC. To make the best use of the WDT, it should be serviced in
those sections of code that will periodically be executed within the time
required to prevent a WDT.
WDT During Power-down and Idle
In Power-down mode the oscillator stops, which means the WDT also
stops. While in Power-down mode, the user does not need to service the
WDT. There are two methods of exiting Power-down mode: by a hardware
reset or via a level-activated external interrupt, which is enabled prior to
entering Power-down mode. When Power-down is exited with hardware
reset, servicing the WDT should occur as it normally does whenever the
AT89S52 is reset. Exiting Power-down with an interrupt is significantly
different. The interrupt is held low long enough for the oscillator to stabilize.
When the interrupt is brought high, the interrupt is serviced. To prevent
the WDT from resetting the device while the interrupt pin is held low, the
WDT is not started until the interrupt is pulled high. It is suggested that the
WDT be reset during the interrupt service for the interrupt used to exit
Power-down Mode. To ensure that the WDT does not overflow within a few
states of exiting Power-down, it is best to reset the WDT just before entering
Power-down mode. Before going into the IDLE mode, the WDIDLE bit in
28
SFR AUXR is used to determine whether the WDT continues to count if
enabled.
The WDT keeps counting during IDLE (WDIDLE bit = 0) as the default
state. To prevent the WDT from resetting the AT89S52 while in IDLE
mode, the user should always set up a timer that will periodically exit IDLE,
service the WDT, and reenter IDLE mode. With WDIDLE bit enabled, the
WDT will stop to count in IDLE mode and resumes the count upon exit
from IDLE.
Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an
event counter. The type of operation is selected by bit C/T2 in the SFR
T2CON. Timer 2 has three operating modes: capture, auto-reload (up or
down counting), and baud rate generator. The modes are selected by bits in
T2CON. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer
function, the TL2 register is incremented every machine cycle. Since a machine cycle
consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.
RCLK +TCLK CP/RL2 TR2 MODE
0 0 1 16-bit Auto-reload
0 1 1 16-bit Capture
1 X 1 Baud Rate Generator
X X 0 (Off)
Table 6.3 Timer2 Operating Modes
29
In the Counter function, the register is incremented in response to a 1-to-
0 transition at its corresponding external input pin, T2. In this function, the
external input is sampled During S5P2 of every machine cycle. When the
samples show a high in one cycle and a low in the next cycle, the count is
incremented. The new count value appears in the register during S3P1 of the
cycle following the one in which the transition was detected. Since two
machine cycles (24 oscillator periods) are required to recognize a 1-to-0
transition, the maximum count rate is 1/24 of the oscillator frequency. To
ensure that a given level is sampled at least once before it changes, the level
should be held.
Capture Mode
In the capture mode, two options are selected by bit EXEN2 in T2CON.
If EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets
bit TF2 in T2CON. This bit can then be used to generate an interrupt. If
EXEN2 = 1, Timer 2 performs the same operation, but a 1- to-0 transition at
external input T2EX also causes the current value in TH2 and TL2 to be
captured into RCAP2H and RCAP2L, respectively. In addition, the
transition at T2EX causes bit EXF2 in T2CON to be set. The EXF2 bit, like
TF2, can generate an interrupt.
Fig 6.2 Timer2 in capture mode
30
Auto-reload (Up or Down Counter)
Timer 2 can be programmed to count up or down when configured in its
16-bit auto-reload mode. This feature is invoked by the DCEN (Down
Counter Enable) bit located in the SFR T2MOD (see Table 4). Upon reset,
the DCEN bit is set to 0 so that timer 2 will default to count up. When
DCEN is set, Timer 2 can count up or down, depending on the value of the
T2EX pin.
Fig 6.3 - Timer 2 Auto Reload mode
Figure 6.3 shows Timer 2 automatically counting up when DCEN=0. In
this mode, two options are selected by bit EXEN2 in T2CON.
If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets the TF2 bit
upon overflow. The overflow also causes the timer registers to be reloaded
with the 16-bit value in RCAP2H and RCAP2L. The values in Timer in
Capture ModeRCAP2H and RCAP2L are preset by software. If EXEN2 = 1,
a 16-bit reload can be triggered either by an overflow or by a 1-to-0
transition at external input T2EX.
31
This transition also sets the EXF2 bit. Both the TF2 and EXF2 bits can
generate an interrupt if enabled. Setting the DCEN bit enables Timer 2 to
count up or down. In this mode, the T2EX pin controls the direction of the
count. Logic 1 at T2EX makes Timer 2 count up. The timer will overflow at
0FFFFH and set the TF2 bit.
This overflow also causes the 16-bit value in RCAP2H and RCAP2L to
be reloaded into the timer registers, TH2 and TL2, respectively. Logic 0 at
T2EX makes Timer 2 count down. The timer underflows when TH2 and
TL2 equal the values stored in RCAP2H and RCAP2L. The underflow sets
the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. The
EXF2 bit toggles whenever Timer 2 overflows or underflows and can be
used as a 17th bit of resolution. In this operating mode, EXF2 does not flag
an interrupt.
Fig 6.4 Timer 2 Auto reload mode (DCEN=1)
32
Baud Rate Generator
Timer 2 is selected as the baud rate generator by setting TCLK and/or
RCLK in T2CON.Note that the baud rates for transmit and receive can be
different if Timer 2 is used for the receiver or transmitter and Timer 1 is
used for the other function. Setting RCLK and/or TCLK puts Timer 2 into
its baud rate generator mode. The baud rate generator mode is similar to the
auto-reload mode, in that a rollover in TH2 causes the Timer 2 registers to
be reloaded with the 16-bit value in registers RCAP2H and RCAP2L, which
are preset by software. The baud rates in Modes 1 and 3 are determined by
Timer 2’s overflow rate according to the following equation. Mode 1 and 3
Baud Rates = Timer 2 Overflow Rate/16 The Timer can be configured for
either timer or counter operation. In most applications, it is configured for
timer operation (CP/T2 = 0). The timer operation is different for Timer 2
when it is used as a baud rate generator. Normally, as a timer, it increments
every machine cycle (at 1/12 the oscillator frequency). As a baud rate
generator, however, it increments every state time (at 1/2 the oscillator
frequency).
The baud rate formula is given below.
(Mode 1 and 3)/Baud Rate =
Oscillator Frequency/(32*[65536- RCAP2H, RCAP2L])
Where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L
taken as a 16-bit unsigned integer. This figure is valid only if RCLK or
TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2 and will
not generate an interrupt. Note too, that if EXEN2 is set, a 1-to-0 transition
in T2EX will set EXF2 but will not cause a reload from (RCAP2H,
33
RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud rate
generator, T2EX can be used as an extra external interrupt. Note that when
Timer 2 is running (TR2 = 1) as a timer in the baud rate generator mode,
TH2 or TL2 should not be read from or written to. Under these conditions,
the Timer is incremented every state time, and the results of a read or write
may not be accurate. The RCAP2 registers may be read but should not be
written to, because a write might overlap a reload and cause write and/or
reload errors. The timer should be turned off (clear TR2) before accessing
the Timer 2 or RCAP2 registers.
Fig 6.5 Timer 2 in Baud Rate Generator Mode
Interrupts
The AT89S52 has a total of six interrupt vectors: two external interrupts
(INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial
port interrupt. Each of these interrupt sources can be individually enabled or
disabled by setting or clearing a bit in Special Function Register IE. IE also
34
contains a global disable bit, EA, which disables all interrupts at once. In the
AT89S52, bit position IE.5 is also unimplemented.
User software should not write 1s to these bit positions, since they may
be used in future AT89 products.
Fig 6.6 Interrupt Sources
Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in
registers T2CON. Neither of these flags is cleared by hardware when the
service routine is vectored to. In fact, the service routine may have to
determine whether it was TF2 or EXF2 that generated the interrupt, and that
bit will have to be cleared in software. The Timer 0 and Timer 1 flags, TF0
and TF1, are set at S5P2 of the cycle in which the timers overflow. The
values are then polled by the circuitry in the next cycle. However, the Timer
2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer
overflows.
35
LIQUID CRYSTAL DISPLAY (LCD)
Liquid crystal displays (LCDs) have materials, which combine the
properties of both liquids and crystals. Rather than having a melting point,
they have a temperature range within which the molecules are almost as
mobile as they would be in a liquid, but are grouped together in an ordered
form similar to a crystal.
An LCD consists of two glass panels, with the liquid crystal material
sand witched in between them. The inner surface of the glass plates are
coated with transparent electrodes which define the character, symbols or
patterns to be displayed polymeric layers are present in between the
electrodes and the liquid crystal, which makes the liquid crystal molecules to
maintain a defined orientation angle.
One each polarizes are pasted outside the two glass panels. These
polarizes would rotate the light rays passing through them to a definite
angle, in a particular direction. When the LCD is in the off state, light rays
are rotated by the two polarizes and the liquid crystal, such that the light rays
come out of the LCD without any orientation, and hence the LCD appears
transparent.
When sufficient voltage is applied to the electrodes, the liquid crystal
molecules would be aligned in a specific direction. The light rays passing
through the LCD would be rotated by the polarizes, which would result in
activating / highlighting the desired characters. The LCD’s are lightweight
with only a few millimeters thickness. Since the LCD’s consume less power,
they are compatible with low power electronic circuits, and can be powered
for long durations.
36
The LCD does not generate light and so light is needed to read the
display. By using backlighting, reading is possible in the dark. The LCD’s
have long life and a wide operating temperature range. Changing the display
size or the layout size is relatively simple which makes the LCD’s more
customers friendly.
The LCDs used exclusively in watches, calculators and measuring
instruments are the simple seven-segment displays, having a limited amount
of numeric data. The recent advances in technology have resulted in better
legibility, more information displaying capability and a wider temperature
range. These have resulted in the LCDs being extensively used in
telecommunications and entertainment electronics. The LCDs have even
started replacing the cathode ray tubes (CRTs) used for the display of text
and graphics, and also in small TV applications.
Crystalonics dot–matrix (alphanumeric) liquid crystal displays are
available in TN, STN types, with or without backlight. The use of C-MOS
LCD controller and driver ICs result in low power consumption. These
modules can be interfaced with a 4-bit or 8-bit microprocessor /Micro
controller.
The built-in controller IC has the following features:
Correspond to high speed MPU interface (2MHz)
80 x 8 bit display RAM (80 Characters max)
9,920-bit character generator ROM for a total of 240 character
fonts. 208 character fonts (5 x 8 dots) 32 character fonts (5 x 10
dots)
64 x 8 bit character generator RAM 8 character generator RAM 8
character fonts (5 x 8 dots) 4 characters fonts (5 x 10 dots)
Programmable duty cycles
37
1/8 – for one line of 5 x 8 dots with cursor
1/11 – for one line of 5 x 10 dots with cursor
1/16 – for one line of 5 x 8 dots with cursor
Wide range of instruction functions display clear, cursor home,
display on/off, cursor on/off, display character blink, cursor shift,
display shift.
Automatic reset circuit, which initializes the controller / driver ICs
after power on.
KEYPAD
38
A numeric keypad, or numpad for short, is the small, palm-sized,
seventeen key section of a computer keyboard, usually on the very far right.
The numeric keypad features digits 0 to 9, addition (+), subtraction (-),
multiplication (*) and division (/) symbols, a decimal point (.) and Num
Lock and Enter keys. Laptop keyboards often do not have a numpad, but
may provide numpad input by holding a modifier key (typically lapelled
"Fn") and operating keys on the standard keyboard. Particularly large
laptops (typically those with a 17 inch screen or larger) may have space for a
real numpad, and many companies sell separate numpads which connect to
the host laptop by a USB connection.
Numeric keypads usually operate in two modes: when Num Lock is off,
keys 8, 6, 2, 4 act like an arrow keys and 7, 9, 3, 1 act like Home, PgUp,
PgDn and End; when Num Lock is on, digits keys produce corresponding
digits. These, however, differ from the numeric keys at the top of the
keyboard in that, when combined with the Alt key on a PC, they are used to
enter characters which may not be otherwise available: for example, Alt-
0169 produces the copyright symbol. These are referred to as Alt codes. On
Apple Computer Macintosh computers, which lack a Num Lock key, the
numeric keypad always produces only numbers. The num lock key is
replaced by the clear key.
39
Fig – Key Pad Architecture
RS232-SETUP
40
Fig 10.1 – RS 232 Communication Setup
RS232:
In telecommunications, RS-232 is a standard for serial binary data
interconnection between a DTE (Data terminal equipment) and a DCE (Data
Circuit-terminating Equipment). It is commonly used in computer serial
ports.
Scope of the Standard:
The Electronic Industries Alliance (EIA) standard RS-232-C [3] as of
1969 defines:
“Electrical signal characteristics such as voltage levels, signaling rate,
timing and slew-rate of signals, voltage withstand levels, short-circuit
behavior, maximum stray capacitance, cable length, interface mechanical
characteristics, pluggable connectors and pin identification Functions of
each circuit in the interface connector, standard subsets of interface circuits
for selected telecom applications”
41
The standard does not define such elements as character encoding (for eg.
ASCII,or EBCDIC), or the framing of characters in the data stream (bits per
character, start/stop bits, parity).
The standard does not define protocols for error detection or algorithms
for data compression.
The standard does not define bit rates for transmission, although the
standard says it is intended for bit rates lower than 20,000 bits per second.
Many modern devices can exceed this speed (38,400 and 57,600 bit/s being
common, and 115,200 and 230,400 bit/s making occasional appearances)
while still using RS-232 compatible signal levels.
Details of character format and transmission bit rate are controlled by the
serial port hardware, often a single integrated circuit called a UART that
converts data from parallel to serial form. A typical serial port includes
specialized driver and receiver integrated circuits to convert between internal
logic levels and RS-232 compatible signal levels.
Interfacing the hard ware with the PC has the following advantages:
Storing and retrieval of data becomes easier.
Networking can be done and hence the entire system can be
monitored online.
Access can be user friendly.
Interfacing the hard ware with the PC is done using MAX232 (rs232)
The MAX220–MAX249 family of line drivers/receivers is intended for all
EIA/TIA-232E and V.28/V.24 communications interfaces, particularly
applications where ±12V is not available. These parts are especially useful
in battery-powered systems, since their low-power shutdown mode reduces
power dissipation to less than 5μW. The MAX225, MAX233, MAX235, and
42
MAX245/MAX246/MAX247 use no external components and are
recommended for applications where printed circuit board space is critical.
Features:
Operate from Single +5V Power Supply (+5V and +12V—
MAX231/MAX239)
Low-Power Receive Mode in Shutdown (MAX223/MAX242)
Meet All EIA/TIA-232E and V.28 Specifications
Multiple Drivers and Receivers
3-State Driver and Receiver Outputs
Open-Line Detection (MAX243)
Circuit working Description:
In this circuit the MAX 232 IC used as level logic converter. The
MAX232 is a dual driver/receiver that includes a capacive voltage generator
to supply EIA 232 voltage levels from a single 5v supply. Each receiver
converts EIA-232 to 5v TTL/CMOS levels. Each driver converts
TLL/CMOS input levels into EIA-232 levels.
43
Fig 10.2 – RS 232 Function Tables & Logic Diagram
In this circuit the microcontroller transmitter pin is connected in the
MAX232 T2IN pin which converts input 5v TTL/CMOS level to RS232
level. Then T2OUT pin is connected to reviver pin of 9 pin D type serial
connector which is directly connected to PC.
In PC the transmitting data is given to R2IN of MAX232 through
transmitting pin of 9 pin D type connector which converts the RS232 level
to 5v TTL/CMOS level. The R2OUT pin is connected to receiver pin of the
microcontroller. Likewise the data is transmitted and received between the
microcontroller and PC or other device vice versa.
44
POWER SUPPLY SECTION
The ac voltage, typically 220V rms, is connected to a transformer,
which steps that ac voltage down to the level of the desired dc output. A
diode rectifier then provides a full-wave rectified voltage that is initially
filtered by a simple capacitor filter to produce a dc voltage. This resulting dc
voltage usually has some ripple or ac voltage variation.
A regulator circuit removes the ripples and also remains the same dc
value even if the input dc voltage varies, or the load connected to the output
dc voltage changes. This voltage regulation is usually obtained using one of
the popular voltage regulator IC units.
Figure: 11.1 Block diagram (Power supply)
Working principle
Transformer: The transformer will step down the power supply voltage
(0-230V) to (0-12V) level. Then the secondary of the potential transformer
will be connected to the bridge rectifier.
Bridge rectifier: When four diodes are connected as shown in figure, the
circuit is called as bridge rectifier.
Let us assume that the transformer is working properly and there is a
positive potential, at terminal ‘0’ and a negative potential at terminal ‘9’. the
positive potential at terminal ‘0’ will forward bias D1 and reverse bias D2.
45
TRANSFORMER RECTIFIER FILTER IC REGULATOR LOAD
The negative potential at terminal ‘9’ will forward bias D4 and reverse
D3. At this time D1 and D4 are forward biased and will allow current flow
to pass through them; D2 and D3 are reverse biased and will block current
flow.
Figure: 11.2 Circuit diagram (Power supply)
One-half cycle later the polarity across the secondary of the transformer
reverses, forward biasing D2 and D3 and reverse biasing D1 and D4.
One advantage of a bridge rectifier over a conventional full-wave
rectifier is that with a given transformer the bridge rectifier produces a
voltage output that is nearly twice that of the conventional full-wave circuit.
IC voltage regulators
Voltage regulators comprise a class of widely used ICs. Regulator IC
units contain the circuitry for reference source, comparator amplifier, control
device, and overload protection all in a single IC.
IC units provide regulation of either a fixed positive voltage, a fixed
negative voltage, or an adjustably set voltage. The regulators can be selected
for operation with load currents from hundreds of milli amperes to tens of
amperes, corresponding to power ratings from milli watts to tens of watts.
46
A fixed three-terminal voltage regulator has an unregulated dc input
voltage, Vi, applied to one input terminal, a regulated dc output voltage, Vo,
from a second terminal, with the third terminal connected to ground.
The series 78 regulators provide fixed positive regulated voltages
from 5 to 24 volts. Similarly, the series 79 regulators provide fixed negative
regulated voltages from 5 to 24 volts.
For ICs, microcontroller, LCD --------- 5 volts
For alarm circuit, op-amp, relay circuits ---------- 12 volts
.
47
COMPLETE CIRCUIT DIAGRAM
48
PCB DESIGN
Printed circuit boards, or PCBs, form the core of electronic equipment
domestic and industrial. Some of the areas where PCBs are intensively used
are computers, process control, telecommunications and instrumentation.
The manufacturing process consists of two methods; print and etch, and
print, plate and etch.
The single sided PCBs are usually made using the print and etch method.
The double sided plate through – hole (PTH) boards are made by the print
plate and etch method.
The production of multi layer boards uses both the methods. The inner
layers are printed and etch while the outer layers are produced by print, plate
and etch after pressing the inner layers.
SOFTWARE: There are plenty of software packages available which
can convert a schematic into PCB layouts. The software used in our project
to obtain the layout is MICROSIM.
PANELISATION: Here the schematic transformed in to the working
positive/negative films. The circuit is repeated conveniently to accommodate
economically as many circuits as possible in a panel, which can be operated
in every sequence of subsequent steps in the PCB process. This is called
penalization. For the PTH boards, the next operation is drilling.
DRILLING: PCB drilling is a state of the art operation. Very small
holes are drilled with high speed CNC drilling machines, giving a wall finish
with less or no smear or epoxy, required for void free through hole plating.
PLATING: The heart of the PCB manufacturing process. The holes
drilled in the board are treated both mechanically and chemically before
depositing the copper by the electro less copper platting process.
49
ETCHING: Once a multiplayer board is drilled and electro less
copper deposited, the image available in the form of a film is transferred on
to the out side by photo printing using a dry film printing process. The
boards are then electrolytic plated on to the circuit pattern with copper and
tin. The tin-plated deposit serves an etch resist when copper in the unwanted
area is removed by the conveyor’s spray etching machines with chemical
enchants. The etching machines are attached to an automatic dosing
equipment, which analyses and controls enchants concentrations.
SOLDERMASK: Since a PCB design may call for very close
spacing between conductors, a solder mask has to be applied on the both
sides of the circuitry to avoid the bridging of conductors. The solder mask
ink is applied by screening. The ink is dried, exposed to UV, developed in a
mild alkaline solution and finally cured by both UV and thermal energy.
HOT AIR LEVELLING: After applying the solder mask, the circuit
pads are soldered using the hot air leveling process. The bare bodies fluxed
and dipped in to a molten solder bath. While removing the board from the
solder bath, hot air is blown on both sides of the board through air knives in
the machines, leaving the board soldered and leveled. This is one of the
common finishes given to the boards. Thus the double sided plated through
whole printed circuit board is manufactured and is now ready for the
components to be soldered.
50
SOFTWARE TOOLS
Keil C compiler:
Keil development tools for the 8051 Microcontroller Architecture support
every level of software developer from the professional applications
engineer to the student just learning about embedded software development.
The industry-standard Keil C Compilers, Macro Assemblers, Debuggers,
Real-time Kernels, Single-board Computers, and Emulators support all 8051
derivatives and help you get your projects completed on schedule.
The Keil 8051 Development Tools are designed to solve the complex
problems facing embedded software developers.
When starting a new project, simply select the microcontroller you use
from the Device Database and the µVision IDE sets all compiler, assembler,
linker, and memory options for you.
Numerous example programs are included to help you get started with
the most popular embedded 8051 devices.
The Keil µVision Debugger accurately simulates on-chip peripherals
(I²C, CAN, UART, SPI, Interrupts, I/O Ports, A/D Converter, D/A
Converter, and PWM Modules) of your 8051 device.
Simulation helps you understand hardware configurations and avoids
time wasted on setup problems. Additionally, with simulation, you can write
and test applications before target hardware is available.
When you are ready to begin testing your software application with target
hardware, use the MON51, MON390, MONADI, or FlashMON51 Target
Monitors, the ISD51 In-System Debugger, or the ULINK USB-JTAG
Adapter to download and test program code on your target system.
51
It's been suggested that there are now as many embedded systems in
everyday use as there are people on planet Earth. Domestic appliances from
washing machines to TVs, video recorders and mobile phones, now include
at least one embedded processor. They are also vital components in a huge
variety of automotive, medical, aerospace and military systems. As a result,
there is strong demand for programmers with 'embedded' skills, and many
desktop developers are moving into this area.
Embedded C is designed for programmers with desktop experience in C,
C++ or Java who want to learn the skills required for the unique challenges
of embedded systems.
Key techniques required in all embedded systems are covered in detail,
including the control of port pins and the reading of switches.
A complete embedded operating system was available with the compiler,
with full source code.
All code is written in C, so no assembly language is required. Industry-
standard C compiler from Keil software is used to write the programs.
MICROSIM.
For PCB design (explained in the earlier chapter)
C SCOPE & LINT
For learning C (There are a number of tools available to aid in
developing, maintaining, and improving your C programs)
.
52
PROGRAM (SOURCE CODE)
#include <at89x52.H>#include "smcl_lcd8.h"#include "AT_serial.h"sbit buz=P1^0;sbit s1=P2^0;sbit s2=P2^1;sbit s3=P2^2;sbit s4=P2^3;sbit s5=P2^4;sbit l1=P1^1;sbit l2=P1^2;sbit r1=P1^3;sbit r2=P1^4;unsigned char dat[10],i,a=0;b=0,c=0,d=0,sec,j,k,z=0;void LLLL();void main(){
buz=0;Lcd8_Init();Serial_Init(9600);Receive(1);r1=r2=l1=l2=1; Lcd8_Display(0x80,"RFID MOBILE ",16);Lcd8_Display(0xC0,"ROBOT NAVIGATION",16);
while(1)/*to retain in the loop when turn on & reset con*/{
if(s1==0&&a==0){a=1;Lcd8_Display(0x80,"CARD NO 1: ",16);Lcd8_Display(0xc0," ",16);}
if(s1==1&&a==1){l1=1;l2=0;r1=1;r2=0;}
if(s2==0&&b==0){b=1;Lcd8_Display(0x80,"CARD NO 2: ",16);Lcd8_Display(0xc0," ",16);}
if(s2==1&&b==1){l1=1;l2=0;r1=1;r2=0;}
if(s3==0&&c==0){c=1;Lcd8_Display(0x80,"CARD NO 3: ",16); Lcd8_Display(0xc0," ",16);}
53
if(s3==1&&c==1){l1=1;l2=0;r1=1;r2=0;}
if(s4==0&&d==0){d=1;Lcd8_Display(0x80,"CARD NO 4: ",16);Lcd8_Display(0xc0," ",16);}
if(s4==1&&d==1){l1=1;l2=0;r1=1;r2=0;}
if(i>8) { ES=0; Delay(30000);
if((dat[7]=='4'||dat[7]=='F')&&(dat[8]=='F'||dat[8]=='1')&&(a==1)){r1=1;r2=1;l1=1;l2=1;a=0;Lcd8_Display(0xC0,"CARD:1
DETECTED ",16);buz=1;}
else if((dat[7]=='D'||dat[7]=='9')&&(dat[8]=='9'||dat[8]=='4')&&(a==1)){l1=1;l2=0;r1=0;r2=1;Lcd8_Display(0x80,"CARD NO 2: ",16);Delay(65000);Delay(65000);Delay(65000);l1=1;l2=0;r1=1;r2=0;}
else if((dat[7]=='1'||dat[7]=='F')&&(dat[8]=='F'||dat[8]=='F')&&(a==1)){l1=1;l2=0;r1=0;r2=1;Lcd8_Display(0x80,"CARD NO 3: ",16);Delay(65000);Delay(65000);Delay(65000);l1=1;l2=0;r1=1;r2=0;}
else if((dat[7]=='C'||dat[7]=='9')&&(dat[8]=='9'||dat[8]=='C')&&(a==1))
{l1=1;l2=0;r1=0;r2=1;Delay(65000);Delay(65000);Delay(65000); l1=1;l2=0;r1=1;r2=0;}
else is if((dat[7]=='4'||dat[7]=='F')&&(dat[8]=='F'||dat[8]=='1')&&(b==1)){r1=1;r2=0;l1=0;l2=1;Lcd8_Display(0x80,"CARD NO 1: ",16);Delay(65000);Delay(65000);Delay(65000);l1=1;l2=0;r1=1;r2=0;}
else if((dat[7]=='D'||dat[7]=='9')&&(dat[8]=='9'||dat[8]=='4')&&(b==1))
{l1=1;l2=1;r1=1;r2=1;b=0;Lcd8_Display(0xC0,"CARD:2 DETECTED " ,16); buz=1;}
else if((dat[7]=='1'||dat[7]=='F')&&(dat[8]=='F'||dat[8]=='F')&&(b==1))
{l1=1;l2=0;r1=0;r2=1;Lcd8_Display(0x80,"CARD NO 3: ",16);Delay(65000);Delay(65000);Delay(65000);l1=1;l2=0;r1=1;r2=0;}
else if((dat[7]=='C'||dat[7]=='9')&&(dat[8]=='9'||dat[8]=='C')&&(b==1))
{l1=1;l2=0;r1=0;r2=1;Delay(65000);Delay(65000);Delay(65000);l1=1;l2=0;r1=1;r2=0;}
else if((dat[7]=='4'||dat[7]=='F')&&(dat[8]=='F'||dat[8]=='1')&&(c==1))
54
{r1=1;r2=0;l1=0;l2=1;Lcd8_Display(0x80,"CARD NO 1: ",16);Delay(65000);Delay(65000);Delay(65000);l1=1;l2=0;r1=1;r2=0;}
else if((dat[7]=='D'||dat[7]=='9')&&(dat[8]=='9'||dat[8]=='4')&&(c==1))
{l1=1;l2=0;r1=0;r2=1;Lcd8_Display(0x80,"CARD NO 2: ",16);Delay(65000);Delay(65000);Delay(65000);l1=1;l2=0;r1=1;r2=0;}
else if((dat[7]=='1'||dat[7]=='F')&&(dat[8]=='F'||dat[8]=='F')&&(c==1)){l1=1;l2=1;r1=1;r2=1;c=0;Lcd8_Display(0xC0,"CARD:3 DETECTED ",16);buz=1;}
else if((dat[7]=='C'||dat[7]=='9')&&(dat[8]=='9'||dat[8]=='C')&&(c==1))
{l1=1;l2=0;r1=0;r2=1;Delay(65000);Delay(65000);Delay(65000);l1=1;l2=0;r1=1;r2=0;}
else if((dat[7]=='4'||dat[7]=='F')&&(dat[8]=='F'||dat[8]=='1')&&(d==1)){r1=1;r2=0;l1=0;l2=1;Lcd8_Display(0x80,"CARD NO 1:",16);Delay(65000);Delay(65000);Delay(65000);l1=1;l2=0;r1=1;r2=0;}
else if((dat[7]=='D'||dat[7]=='9')&&(dat[8]=='9'||dat[8]=='4')&&(d==1))
{l1=1;l2=0;r1=0;r2=1;Lcd8_Display(0x80,"CARD NO 2: ",16);Delay(65000);Delay(65000);Delay(65000);l1=1;l2=0;r1=1;r2=0;}
else if((dat[7]=='1'||dat[7]=='F')&&(dat[8]=='F'||dat[8]=='F')&&(d==1)){l1=1;l2=0;r1=0;r2=1;Lcd8_Display(0x80,"CARD NO 3: ",16);Delay(65000);Delay(65000);Delay(65000);l1=1;l2=0;r1=1;r2=0;}
else if((dat[7]=='C'||dat[7]=='9')&&(dat[8]=='9'||dat[8]=='C')&&(d==1))
{l1=1;l2=1;r1=1;r2=1;d=0;Lcd8_Display(0xC0,"CARD:4 DETECTED ",16);buz=1;}
for(i=0;i<=8;i++)dat[i]=0;
i=0;ES=1;
} }
}
void receiver(void) interrupt 4
55
{ if(RI==1)
{dat[i]=SBUF;i++;RI=0;}
}ADVANTAGES
1. Low power consumption.
2. This project is viable and cost effective.
3. Navigation path can be easily redefined
4. Less complex navigation program
5. infrastructural changes in the navigation path Doesn’t affect as in
the case of visual based navigation systems
6. Simple on its design
7. Easy to use
8. Reliability.
56
APPLICATION:
This project can be used in places for
1. Industrial companies,
2. Colleges, Schools, Offices for Library Management
3. Warehousing etc.
4. Application areas of RFID technology is many and a few are
5. Logistics
6. Toll Collection
7. Animal Tracking
8. Vehicle Identification
57
CONCLUSION
Completion of this project brings a new product to the world of industry
to increase speed and efficiency while reducing the loss. To implement
the idea, project was divided into four different parts: RFID system and
antenna, RFID system communication, Navigation algorithm, and Robot.
Each part was handled by a member of a group.
In developing this project, new and innovative solutions were needed to
tackle the design challenges that were encountered. Each problem was
dealt with further research and trial and error method in a timely manner.
Various objective of electrical engineering was used in developing this
project including radio frequency, digital design, and signal processing.
Overall the learning objective of this project provided an opportunity to
research beyond the academic requirements.
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FUTURE POSSIBILITIES
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REFERENCES
1 Mill Man J and Hawkies c.c. “Integrated
Electronics” Mcgraw Hill 1972
2 Roy Choudhury D, Shail Jain, “ Linear Integrated Circuit”, New
Age International Publishers, New Delhi,2000
3 Referred Websites Such As wikipeidia, atmel.com,
howstuffworks.com, ieee.projects.robotics Etc.,
4 “The 8051 Microcontroller and Embedded system” by
Mohammad Ali Mazidi.
WEBSITES:
http://www.sparrel.com/ http://www.atmel.com/
http://www.rfid - handbook.com/
http://www.microchip.com/
http://www.philips.com/
http://www.rfidjournal.com/
http://www.aimglobal.org/
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