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Announcements - University of Tennessee

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3/10/2015 1 PCB Layout ECE 482 Lecture 7 March 10, 2015 Announcements Prelab 5 due Thursday Decide on System Improvements Experiment 4 report moved to Thurs. 3/26 Midterm after spring break Open note, book, instructor Today: Experiment 5 No report; deliverables are layout files
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Page 1: Announcements - University of Tennessee

3/10/2015

1

PCB Layout

ECE 482 Lecture 7

March 10, 2015

Announcements• Prelab 5 due Thursday

− Decide on System Improvements

• Experiment 4 report moved to Thurs. 3/26

• Midterm after spring break

− Open note, book, instructor

• Today: Experiment 5

− No report; deliverables are layout files

Page 2: Announcements - University of Tennessee

3/10/2015

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Lab 5: PCB Layout

Trapezoidal Comm. Implementation

Page 3: Announcements - University of Tennessee

3/10/2015

3

Circuit Connections

Page 4: Announcements - University of Tennessee

3/10/2015

4

Basic PCB Layout Concepts

• Trace Parasitics

• Kelvin Connection

• Parasitic Capacitances and Decoupling

• Loop Inductances

• Ground Plane / Return Currents

• Partitioning

Trace Parasitics

Kester, W. “Tips about printed circuit board design: Part 1 ‐ Dealing with harmful PCB effects”

Page 5: Announcements - University of Tennessee

3/10/2015

5

Trace Sizing Rough Guidelines

Kester, W. “Tips about printed circuit board design: Part 1 ‐ Dealing with harmful PCB effects”

Kelvin Connection

Texas Instruments, “LMP8640/‐Q1/HV Precision High Voltage Current Sense Amplifiers”

Page 6: Announcements - University of Tennessee

3/10/2015

6

Common Source Inductance

Persson E., “What really limits MOSFET performance: silicon, package, driver or circuit board?”

Gate‐Drain Capacitance

Persson E., “What really limits MOSFET performance: silicon, package, driver or circuit board?”

Page 7: Announcements - University of Tennessee

3/10/2015

7

High Impedance Nodes and Capacitive Coupling

Analog Devices, “Decoupling Techniques,” MT‐101

Capacitive Shielding

Analog Devices, “Decoupling Techniques,” MT‐101

Page 8: Announcements - University of Tennessee

3/10/2015

8

Supply Decoupling

Pulsed Circuit Decoupling

Analog Devices, “Decoupling Techniques,” MT‐101

Page 9: Announcements - University of Tennessee

3/10/2015

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Decoupling Capacitance

Analog Devices, “Decoupling Techniques,” MT‐101

Decoupling

• Always add bypass capacitor at power supply for any IC/reference

• Use small‐valued (~100nf), low ESR and ESL capacitors (ceramic)

• Limit loop for any di/dt

Page 10: Announcements - University of Tennessee

3/10/2015

10

Loop Inductances

Loop Inductance: Experiment

Page 11: Announcements - University of Tennessee

3/10/2015

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Loop Inductance: Experiment

Current Return at DC Current Return at High Frequency AC

Half Bridge Loop Inductance

Page 12: Announcements - University of Tennessee

3/10/2015

12

Gate Drive Signal Routing

Complete Routing of Signal

• Always consider return path

• Ground plane can help, but still need to consider the path and optimize

Page 13: Announcements - University of Tennessee

3/10/2015

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Buck Example Bridge Layout

Example Bridge Layout #2

Page 14: Announcements - University of Tennessee

3/10/2015

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Example Layout Experimental Results

Example Layout #1

Example Layout #2

Star‐Grounding Vs. Daisy Chain

Page 15: Announcements - University of Tennessee

3/10/2015

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Another View

Kester, W. “Tips about printed circuit board design: Part 1 ‐ Dealing with harmful PCB effects”

Adding a Ground Plane

Page 16: Announcements - University of Tennessee

3/10/2015

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Ground Plane

• Benefits:

− Common reference voltage

− Shielding

− Heat dissipation

− Reduced inductance (increased capacitance)

• Resist urge to cut ground plane as much as possible; consider paths of return currents when cuts are unavoidable

Ground Currents

Page 17: Announcements - University of Tennessee

3/10/2015

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A Poor Ground Plane Layout

Cuts in Ground Plane

• Goals: − minimize inductance/loops

− Minimize ground interference

• Routing cuts should be kept short and out of the path of any significant (high frequency) return paths

• Cuts can be used effectively for ground isolation, and to reduce noise coupled between digital/analog/power circuitry

• Reducing parasitic capacitance in sensitive signal locations (i.e. op‐amp circuitry)

Page 18: Announcements - University of Tennessee

3/10/2015

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Effective Ground Plane Cuts

Experiment 5: Starting Files

Page 19: Announcements - University of Tennessee

3/10/2015

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IGBT Moduleshttp://www.irf.com/product/Motor‐Control‐Solutions‐Motor‐Control‐Modules‐IRAM/_/N~1nje1uhttp://www.onsemi.com/PowerSolutions/parametrics.do?id=407

Low Power MOSFET Moduleshttps://www.apexanalog.com/apex‐products/sa306/http://www.ti.com/lit/ds/symlink/drv8332.pdf

Before selecting any parts, check stock and check with instructor on permissible cost


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