Very small coupling capacitors are required for bandpass filters in the frequency range between 100MHz and 1GHz, often with values under 0.5pF. Implementing these interdigital ca- pacitors in microstrip gives some ad- vantages. This will be demonstrated in the following practical development. 1. Introduction As an introduction into microstrip inter- digital capacitors (Fig 1), an extract from the on-line help of the CAD program Gunthard Kraus, DG8GB Ansoft Designer SV project: Using microstrip interdigital capacitors Fig 1: The famous interdigital capacitor. Easily to manufacture but because of the many measurements some work to design. VHF COMMUNICATIONS 2/2009 78
Transcript
Very small coupling capacitors arerequired for bandpass filters in thefrequency range between 100MHz and1GHz, often with values under 0.5pF.Implementing these interdigital ca-pacitors in microstrip gives some ad-vantages. This will be demonstrated inthe following practical development.
1. Introduction
As an introduction into microstrip inter-digital capacitors (Fig 1), an extract fromthe on-line help of the CAD program
Gunthard Kraus, DG8GB
Ansoft Designer SV project: Using microstrip interdigitalcapacitors
Fig 1: The famousinterdigitalcapacitor. Easily tomanufacture butbecause of the manymeasurements somework to design.
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gives all the necessary explanation anddetails.The design is not simple, however mod-ern microwave CAD programs facilitatesimulation; these should already containthis component in their component li-brary as a microstrip model.That is the case for the free AnsoftDesigner SV software, this is the list ofthe advantages: • After optimisation of the PCB layout
very small tolerances are achievedleading to good reproducibility offilter parameters without additionalcomponents or assembly costs forquantity production.
• No discrete components need to besoldered. These would be difficult toobtain for such small capacitancesand exhibit larger tolerances.
• Using high quality printed circuitboard material with the smallestlosses produces very high qualitycapacitors that are useful up to morethan 10GHz.
2.The project, a 145MHzbandpass filter
A bandpass filter with the following data
is to be designed, built and measured: • Centre frequency: 145MHz • Ripple bandwidth: 2MHz • System resistance Z: 50Ω • Filter degree: n = 2 • PCB size: 30mm x 50mm • Tschebyschev narrow bandpass filter
The filter program contained in AnsoftDesigner SV was used. The developmentof the circuit after the draft and a shortoptimisation is shown in Fig 2. Thefurther work necessary to produce thefinished PCB layout is described in thefollowing article. A prototype was pro-duced and tested using a network ana-lyser to give the measurement results. The design of the filter using AnsoftDesigner SV giving all the steps leading
Fig 2: The Ansoft filter tool supplies the finished circuit. The couplingcapacitor to be investigated is marked with a circle.
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to Fig 2 is shown in Appendix 1.Appendix 2 contains guidance for suc-cessful control of the circuit simulationusing Ansoft Designer SV.It will also be helpful to download a copyof the authors tutorial on using AnsoftDesigner SV. This is available free ofcharge in German or English from theweb site [1].To continue with the filter development;a look at the circuit of Fig 2 shows: • The problematic coupling capacitor C
= 0.3pf is identified by the blackcircle. The problem is not only thevery small capacitance but also thehigh requirement for accuracy. A de-viation of more than 1% gives anoticeable change in the transmissioncharacteristics.
• It was optimised until all remainingcapacitors can be realised usingstandard values, if necessary by paral-lel connection of several capacitorswith different values.
3.1. Input problemsThe component in the model library isunder “Circuit Elements/Microstrip/Capacitor/MSICAPSE”. The layout ofthe interdigital capacitor in series con-nection is shown in Fig 1. Double clickon the circuit symbol to access the list ofthe dimensions. At the end of the listthere is a “MSICAP“ button that opensthe on-line help with an explanation ofthe individual inputs and dimensions.Experience is required to make theseinputs but if the following rules are usedthen incorrect inputs will be avoided: • Set the finger width W to 0.5mm.
This ensures that the design does notbecome too large and under etchinghas less effect on the finger widthwhen the PCB is made.
• The gap width S should not be TOOsmall otherwise the PCB manufac-turer complains. A value of 0.25mmcan be achieved even in your ownworkshop. On the other hand itshould not be too large because thenthe capacitance value falls, requiringlarger finger lengthens or more fin-gers.
• The number of the fingers and theirlength specifies the capacitance value.As an example, start with 4 fingersand vary the length of the fingersensuring that they do not become toolarge. Set an upper limit of about 8 to10mm. Instead of making the fingerslonger simply increase the number offingers.
With this data (and the PCB data) a draftdesign can begin BUT unfortunately theCAD program can make an analysis.That means that all the data and dimen-sions can be entered and the simulationstarted but the result will be an S-parameter file of the capacitor. It is onlyat this point that it is known if thecapacitance of the draft capacitor is toolarge or too small.Things become more difficult becausethe circuit diagram of the component hasadditional capacitors from each end toearth. These two unavoidable parallelcapacitors detune the resonant circuits.How can these three capacitances beisolated to optimise the circuit, particu-larly if the filters are more complex andseveral interdigital capacitors are used?
3.2. Determination of the purecoupling capacitanceIt is a challenge to determine the exactvalue of the coupling capacitor, but thetwo parallel capacitors are less difficultto deal with, just make the resonantcircuit capacitors smaller in the simula-tion until the desired transmission curve
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is achieved. The difference correspondsto the additional parallel capacitance con-tributed by the interdigital capacitor.Their value is not much different fromthe actual coupling capacitor.Sometimes experience helps: e.g. crystalfilters in a bridge connection presented asimilar problem. In that case the housingcapacitance was eliminated using a trans-former circuit. The principle applied tothe current problem is shown in Fig 3.The voltage across the two secondarywindings are the same magnitude butopposite phases. Thus the voltage, V,across the terminating resistor, RL, iszero if the two capacitors Cx and C2 areequal and in this case equal 0.3pF. The
two parallel capacitances Cp1 and Cp2do not play a role when the bridge isbalanced thus only the value of Cx isbeing measured. Cp1 is parallel to thesecondary winding of the transformerand cannot affect the balance of thebridge. Likewise Cp2 is in parallel withthe 50Ω load resistor. In the balancedcondition no voltage is developed acrossthe parallel capacitor and the load there-fore Cp2 has no effect on the circuit. Thismeans that the value of interdigital ca-pacitor can be simulated to be exactly thesame as the known capacitor C2 and itsparameters will then be known independ-ent of the parallel capacitance values.The simulation circuit shown in Fig 4 canbe developed using Ansoft Designer SV.The transformer can be found in thec o m p o n e n t l i b r a r y u n d e r“Components/Circuit Elements/Lumped/Transformers/TRF1x2” and theseries connected interdigital capacitor un-der “Components/Circuit Elements/Microstrip/Capacitors/MSICAPSE”.A microwave port with internal resist-ance of 50Ω feeds a broadband trans-former with two secondary windings.The upper coil is connected to the outputport by the interdigital capacitor. Theopposite phase signal supplied by thelower coil is fed via a second capacitor tothe output port.
Fig 3: Using an idea from crystal filtertechnology, this circuit is used todevelop the exact value of theinterdigital capacitor required.
Fig 4: Fig. 3 converted into a form for Ansoft Designer SV simulation.
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Importantly:This second capacitor must have thesame value of 0.3pF (value of the inter-digital coupling capacitor required).The important data for the simulation(and the later draft layout) is entered inthe Property Menu of the interdigitalcapacitor. Double clicking on the symbolin the circuit diagram opens the menu;the entries required are shown in Fig 5.However there are two important thingsthat are not immediately obvious: • There is a line missing from the
window shown in Fig. 5, this can befound by scrolling down. This line tofind is: GAP (between end of fingerand terminal strip) = 0.25mm
• The total width “MCA” must becalculated by hand and entered intothe relevant field. It should be notedthat the units do not automaticallydefault to mm so take care to enterthis value otherwise the default willbe metres and the simulation will bemeaningless.
The above dimension is calculated as
follows: MCA = 4 x Finger length + 3 xGap width = 4 x 0.5mm + 3 x 0.25mm =2.75mmFinally the correct PCB material datamust be selected. Scroll to the line“SUB” in the open Property Menu for theinterdigital capacitor. Click on the buttonin the second column to open the menu“Select Substrate” and then click on“Edit”. Fill out this form, as shown in Fig6 for the RO4003 PCB material to beused: thickness = 32MIL = 0.813mm,dielectric constant εr = 3.38, tand =0.001, copper coating 35µm thick and theroughness is 2µm. Once everything iscorrect click OK twice to accept the dataand close the Property Menu.Everything is now ready for the simula-tion. Programme for a sweep from100MHz to 200MHz with 5MHz incre-ments and look at the results for S21 (Ifyou do not know the individual inputsteps necessary for Ansoft Designer SVthey are described in appendix 2). The finger lengths of the interdigitalcapacitor are varied and the simulationrun again until the minimum for S21 isfound. Now the bridge is balanced and
Fig 5: Somewhat complex: the inputs required for the interdigital capacitor.Take care to examine each value. There is a line that is not visible but shouldnot be forgotten (see text).
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the mechanical data for the interdigitalcapacitor with exactly the correct valuecan be transferred to the PCB layout. Theoptimised results are shown Fig 7. The
finger length of 4.25mm gives a mini-mum for S21 and further refinement isnot needed. It is interesting to see theresults that the circuit will provide.
Fig 6: The data for the Rogers R04003 PCB material are entered correctly intothe Property Menu.
Fig 7: The minimum is easy to recognise: a finger length of 4.25mm gives thecorrect value for the 0.3pF coupling capacitor.
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3.3. Completing the circuitA new project is started with the circuitas shown in Fig 2 from the introduction(with discrete components) and thesweep adjusted from 140 to 150MHz insteps of 100kHz with S11 and S21displayed. This result is shown in Fig 8.This is the starting point for the follow-ing actions, if these result in the sameresult the you can be quite content. Replacing the 0.3pF coupling capacitorwith the interdigital component that hasbeen designed, this gives the simulationcircuit shown in Fig 9. Naturally theresults shown in Fig 10 are worse be-
cause the additional parallel capacitancesof the interdigital capacitor have not beenconsidered. The parallel capacitors inboth resonant circuits must be reduceduntil the curves of Fig 8 are achieved. Fig10 shows an additional surprise that apartfrom the expected shift of the centrefrequency from 145MHz to 143.3MHz(caused by the parallel capacitance of theinterdigital capacitor) the S11 curve has adiagonal dip. Trying to compensate thiseffect with different values of two paral-lel inductances is surprising because asS11 improves, S22 gets worse. Thismeans that this interdigital solution hasits peculiarities based on the frequency
Fig 8: This curve is the goal for this project.
Fig 9: The discrete 0.3pF coupling capacitor is replaced by interdigitalcapacitor.
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response of the capacitors. Probably analternative circuit diagram with only 3capacitors can be imagined but the effectis more complex because it can be seenon the finished PCB. The effect can belived with so the easy solution is just tomove the centre frequency to the requiredvalue of 145MHz.The parallel capacitors must be reducedto 13.8pf = 12pf + 1.8pf, using standardvalues that can be connected in parallel.The remaining adjustment is to fine tunethe two coils using the adjustable cores.The new inductances of L = 72.3nHcorresponds to the simulation resultshown in Fig 10.But this is not the conclusion because thePCB layout and its influence must beconsidered. Fig 11 shows the PCB layout
that is principally a 50Ω microstrip line.It starts on the left (at the input SMAconnectors) with a gap for the 2.2pFSMD coupling capacitor followed by theresonant circuit. The interdigital capaci-tor is in the centre and the right half is amirror image of the left hand side. Thiscorresponds to an additional conductorlength of approximately 40mm for thecircuit and this has the following conse-quences: • Four additional sections of 50Ω
microstrip line (with a width of1.83mm for the given PCB data) mustbe added to the Ansoft Designer SVcircuit if the simulation is to agreewith the reality.
• The lengths of the pieces of line are 2x 13mm = 26mm (from the SMAconnector to the 2.2pF coupling ca-
Fig 10: The centre frequency has, as expected, moved lower and there is adiagonally dip in the S11 curve.
Fig 11: The printedcircuit boardmeasures 30mm x50mm made fromRogers RO4003with a thickness of0.813mm.
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pacitor) and 2 x 7mm = 14mm (fromthe resonant circuit to the interdigitalcapacitor).
Fig 12 shows the circuit. At these rela-tively low frequencies the microstrip linedetunes capacitors so the parallel compo-nents must be adjusted again. Doing thisgives the simulation results shown in Fig13. The simulation of the wider fre-quency range from 100MHz to 200MHzis shown in Fig 14. Finally it is time toprepare the prototype PCB, the resultafter some hours of work are shown inFig 15.
About 50 0.8mm hollow rivets were usedfor the plated through holes from theground islands to the continuous lowerground surface. The SMD capacitors andcoils are soldered and copper angles arescrewed on to fit the SMA sockets. Theadjustment cores of the coils are noweasily accessible and from experience itis known that nearly no further adjust-ments are necessary when fitting the PCBinto a machined aluminium housing.The truth comes with the comparison ofthe curves of Fig 13 and 14 with theimage that the network analyser producesfrom the prototype.
Fig 12: The sections of microstrip line are included into the simulation to reflectthe real circuit.
Fig 13: If the results of measurement look the same as this simulation resultthe final goal will be achieved.
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By the way: the tear on the PCB that canbe seen in Fig 15 was caused by humanerror. It is hard work fitting so manysmall rivets and takes some hours. Butafterwards when finishing the PCB witha file in a hurry to see the results, toomuch pressure was applied. So you findout that RO4003 material can be drilledand milled but protests when it meets astronger opponent. More care needed infuture.
3.4. Results of measurement on theprototypeThe measurements gave some unpleasantsurprises shown in Fig 16, which is theS21 transmission curve (measured aftercorrect alignment) and the simulationfrom Fig 13. The first mystery is that the
attenuation has risen from 5.5 to 7dB atthe centre frequency. There are some doubts about the methoddevised to measure the value of thecoupling capacitor even though the au-thor is proud of the technique devised. Sothe best was to look for an owner of theAPLAC simulation software (full ver-sion). APLAC has a text based commandline simulator that can directly computethe value of an interdigital capacitor andthe two "end capacitors". Entering themechanical data for our capacitor designinto APLAC and waiting for the resultgave great relief because it gave a valueof 0.29pF that is very close to the 0.3pFaimed at with Ansoft Designer SV. Theinterdigital capacitor is probably not thecause of the discrepancy but the sceptical
Fig 14: The wider frequency range between 100MHz and 200MHz does notgive cause for objection.
Fig 15. Thesimulationconverted into aprototype withSMA connectors.The circuit mustnow be measuredon the networkanalyser.
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developer leaves nothing to chance. Theeffect of changing the finger length by0.2mm, and thus the coupling capacity,on the filter curve is shown in Fig 17.This gives the all-clear signal because thefrequency range of the transmissioncurve only changes slightly but the at-tenuation is not affected.This leaves the parallel coils as thepossible problem (once again) becausethe NP0 material used in the SMDcapacitors is above suspicion at thesefrequencies. Therefore the coil quality
must be worse than shown on the datasheet (Q = 130) and the reason could bebecause the inductance is adjustable us-ing a brass core. Eddy currents inducedin the core oppose the magnetic field toreduce the inductance but unfortunatelythe quality falls. The quality Q = 130specified, only applies when the core isfully unscrewed and thus almost ineffec-tive, giving the maximum inductancevalue. There is no mention of this in thedata sheet.This explains everything but to double
Fig. 16: The measured S21 response shown with the simulation.
Fig. 17: Different finger lengths and therefore different coupling capacitorvalues only move the centre frequency of the transmission curve but have noinfluence on the attenuation.
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check a further simulation was per-formed. Fig 18 shows the proof becausewith Q = 75 the simulation follows themeasured S21 curve accurately. Themeasurements also agreed with the widefrequency sweep shown in Fig 14.
3.5. SummaryInterdigital capacitors are a fascinatingcomponent; as long as the PCB processhas an accuracy of 0.01mm they are agood component for problem free mass
production. Only the coils were a prob-lem, more tests would be required to finda better solution.After the prototype was built and discrep-ancies noticed the simulations served asan analysis tool to determine the cause ofthe errors. This was all at no cost and wasfun to do. The author wishes that this hasinspired you to use Ansoft Designer SVfor your own projects, the appendicesgive more information for filter design.
Fig. 18: This proves the coils are the problem, the picture speaks for itself (seetext).
Fig. 19: The startmenu for the FilterTools. Please set allvalues as shown.
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4.Appendix 1: Help for using thefilter program in the AnsoftDesigner SV
There is no need to continue searchingthe Internet for suitable CAD softwarefor filter design, because Ansoft DesignerSV deals with almost every filter typepossible. The problem is how to find thecorrect selection:To start the designer with a new file go tothe “Project Open” option on the menuand click on “Insert filter Design”. Thenuse something like:
Step 1 (see Fig 19):In the five menus (from left to right)s e l e c t : “ B a n d p a s s / C o u p l e dResonator/Chebyshev/Ideal/CapacitivelyCoupled”.Select the button for “lumped design”(button with circuit diagram). If every-thing is done click on “Q factors”.
Step 2 (see Fig 20):The coil quality is set to Qmin = 100 at100MHz (the filter quality rises linearwith frequency). Click OK to return tothe previous screen and then click “Next”.
Step 3 (see Fig 21):Now for the serious entry of the filterdata:
Fig. 20: The coilsneed specialattention (asalways). Thequality is set asshown.
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Order (filter degree): 2Ripple: 0.3dBfp1 (lower cut off frequency): 0.144GHzfp2 (upper cut off frequency): 0.146GHzfo (centre frequency): 0.145GHzBW (Bandwidth) 0.002GHz
Source, Rs (source resistance): 50ΩLoad, Ro (load resistance): 50ΩInductor L: 73nH(selected parallel inductance, all the same)
Press “Next” and the circuit is produced,
Fig. 21: These are the settings for the filter and should be copied exactly (seetext).
Fig. 22: The circuitand the character-istics of the idealfilter.
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then select “Finish”.
Step 4:Click “Tile vertically” to produce a dis-play of the circuit diagram and associatedsimulation of S11 and S22 as shown inFig 22. The vertical axis is marked with“Insertion Loss (dB)” and “Return Loss(dB)”. S11 and S22 are obtained byreversing the sign of these..
Step 5:To show the effect of the coil quality Q =
100 select the view shown in Fig 23 byusing the “Filter” menu from the Filter 1window border and select “Analysis”then “Q Factor Losses”. If a checkmarkis set then Fig 24 shows the filtercharacteristics adjusted for the quality Q= 100.Print the circuit an place it beside the PCbecause the next appendix needs thecomponent values.
5.Appendix 2: Simulation of thecircuit with the Ansoft DesignerSV
Start a new project using the “InsertCircuit Design” option. The “LayoutTechnology Window” shows: MS-FR4(Er=4.4), 0.060 inch, 0.5oz.copper,
At first place the two ports required.Initially they are interconnect ports, dou-ble clicking on their circuit symbolsgives the chance to change them toMicrowave Ports (Fig 25).Now the remaining components can befound in the Project Window under the“Components/Lumped”. For the capaci-
Fig. 23: The addition of the filterquality will distort the characteristics.
Fig. 24: The filtercircuit with a coilquality Q = 100.
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tors a simple “Capacitor” is used but forthe coils “INDQ” (Inductor with Q fac-tor) should be used.The circuit is drawn as shown in Fig 26using “Wire” to connect the components
and the component values added. Do notforget to double click on the coil symbolsand set the quality to Q = 100 at 0.1GHz.
The PCB material should be changed to
Fig. 25: Do notforget to changethe InterconnectPorts to MicrowavePorts.
Fig. 26: The simulation circuit shows all the correct components.
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“32MIL = 0.813mm thickness andR04003 material” as described in Fig 6. Note: When a component is attached tothe cursor it can be rotated by pressing“R”. If the component is already placed itcan be selected with a single mouse clickand rotated by pressing “Control” and“R”.The circuit is stored under a suitablename and a sweep for 140 - 150MHz in
100kHz steps carried out as shown in Fig27:
Step 1:Click the setup button and continue with“Next”.
Step 2:Select “Add” on the next menu to showthe sweep programming (Fig 28) and setthe following: 1: Control “linear Sweep”2: Sweep attributes (140MHz to150MHz in 100kHz steps)3: Press “Add”4. Check the sweep values selected5: Press “OK”6. Lock the sweep programming with“Finish”
Step 3:Pressing the simulate button starts thesimulation but nothing is displayed untilthe create report button is pressed (Fig29). Check that “Rectangular Plot” isselected; this can be changed on the pulldown menu, e.g. Smith Chart representa-tion.
Step 4:Use the “Traces” menu to add S-param-eters to the list shown in Fig 30. SelectS11 and then click “Add Trace”. Use thesame procedure to add an S21 trace and
press “Done”. The display shown in Fig31 is now produced which is the same asFig 8. Double clicking on the appropriateaxis can change the axis divisions.
6.Literature
[1] www.elektronikschule.de/~krausg - isthe main German web page and:http://www.elektronikschule.de/~krausg/Ansoft%20Designer%20SV/English%20Tutorial%20Version/index_english.html- is the relevant English page[2] www.ansoft.com
Fig. 29: The display type can also beSmithchart. Also different forms ofthe representation can be selected.
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