Date post: | 19-Jan-2016 |
Category: |
Documents |
Upload: | georgia-wood |
View: | 212 times |
Download: | 0 times |
Appendix C
Basics of Digital LogicPart I
Florida A & M University - Department of Computer and Information Sciences
Modern Computer Digital electronics
operate with only two voltage levels – high and low other levels are temporary and occur while
transitioning between these values binary system matches the underlying abstraction
inherent in electronics
Use signals instead of voltage levels which are complements or inverses of one another
logically true : 1 (asserted) logically false : 0 (deasserted)
Florida A & M University - Department of Computer and Information Sciences
Logic Block Each input maybe 0 or 1 Each output maybe 0 or 1
Input(s)Logic block
Output(s)
Florida A & M University - Department of Computer and Information Sciences
Logic Blocks Combinational
without memory output depends on only on the current input completed in one machine cycle
Sequential Retains memory of previous state output depends on both the inputs and the logic block
state
Florida A & M University - Department of Computer and Information Sciences
Combinational Logic Block Defined by the values of the outputs for each
possible set of input values (truth table)
n inputs 2n combinations of input values
Florida A & M University - Department of Computer and Information Sciences
Truth Table - example Output y is 1 when inputs
w and x have the same value
Output z is 1 when both inputs are 0
Inputs Outputs
w x y z
1 1 1 0
1 0 0 0
0 1 0 0
0 0 1 1
Florida A & M University - Department of Computer and Information Sciences
Truth Table Completely describes combinational logic
function
Grow in size quickly
May not be easy to understand
Florida A & M University - Department of Computer and Information Sciences
Boolean Algebra Another approach to express logic function as
logic equations
All variables have the values 0 or 1
Three operators OR AND NOT (unary)
Florida A & M University - Department of Computer and Information Sciences
Boolean Algebra OR operator
result is 1 if either of the operands (variables) is 1 also known as logical sum notation: A + B
AND operator result is 1 only if both operands (variables) is 1 also known as logical product notation: A B
NOT operator Result is 1 only if operand is 0 Inversion or negation of the value Notation: A
Florida A & M University - Department of Computer and Information Sciences
Boolean Algebra Laws Identity : A + 0 = A A 1 = A
Zero and One : A 0 = 0 A + 1 = 1
Inverse:
Commutative: A B = B A A + B = B + A
Associative: A + (B + C) = (A + B) + C
A (B C) = (A B) C
Distributive: A (B + C) = (A B) + (A C)
A + (B C) = (A + B) (A + C)
1AA 0AA
Florida A & M University - Department of Computer and Information Sciences
Boolean Algebra Laws Idempotent : A + A = A A A = A
DeMorgan’s : BABA BABA
Florida A & M University - Department of Computer and Information Sciences
Boolean Algebra - example
y = wx +
z =
Inputs Outputs
w x y z
1 1 1 0
1 0 0 0
0 1 0 0
0 0 1 1
xw
xw
Florida A & M University - Department of Computer and Information Sciences
Logic Gates
Used to build logic blocks by implementing basic logic functions
AND gate May have multiple inputs Output equal to the AND of all inputs
OR gate May have multiple inputs Output equal to the OR of all inputs
NOT gate inverter Single input
Florida A & M University - Department of Computer and Information Sciences
Logic Gates - example
y = wx +
z =
Inputs Outputs
w x y z
1 1 1 0
1 0 0 0
0 1 0 0
0 0 1 1
xw
xw
z
x
w
What is logic gate implementation for y?
Florida A & M University - Department of Computer and Information Sciences
Logic Gate Implementation Algorithm
1. Determine the truth table for problem statement
2. Consider each output independently
a. Consider all nonzero entries for the output
b. Write the logic equation
c. Simplify the logic equation using the laws of
Boolean algebra (if possible)
3. Draw the digital logic gate implementation
of the simplified logic equation
Florida A & M University - Department of Computer and Information Sciences
Logical Function Find a logical expression for the logical function with
three inputs A, B, and C and four outputs W, X, Y and Z such that W is true if at least two of the inputs is true, X is true if exactly one of the inputs is true, Y is true if B is false, and Z is true if all three inputs are true.
A
B
C
W
X
Y
Z
Digital Logic Gate
Implementation
Florida A & M University - Department of Computer and Information Sciences
Logical Function – Truth Table
Inputs Outputs
A B C W X Y Z
1 1 1 1 0 0 1
1 1 0 1 0 0 0
1 0 1 1 0 1 0
1 0 0 0 1 1 0
0 1 1 1 0 0 0
0 1 0 0 1 0 0
0 0 1 0 1 1 0
0 0 0 0 0 1 0
Florida A & M University - Department of Computer and Information Sciences
Logic Function –Boolean Algebra
Find a logical expression for the logical function with three inputs A, B, and C and four outputs W, X, Y and Z such that W is true if at least two of the inputs is true, X is true if exactly one of the inputs is true, Y is true if B is false, and Z is true if all three inputs are true.
CBAZ
CBACBACBACBA Y
CBACBACBA X
CBACBACBA CBAW
Florida A & M University - Department of Computer and Information Sciences
Function – Simplified Boolean Algebra
Find a logical expression for the logical function with three inputs A, B, and C and four outputs W, X, Y and Z such that W is true if at least two of the inputs is true, X is true if exactly one of the inputs is true, Y is true if B is false, and Z is true if all three inputs are true.
CBAZ
B Y
CBACBACBA X
CBCABAW
Florida A & M University - Department of Computer and Information Sciences
Multiplexor / Selector
n inputs
1 output – one of the inputs
Control (selector) lines determine which input becomes the output
log2 n = # of required control
Florida A & M University - Department of Computer and Information Sciences
Multiplexor (2-1)
S0 A B Z
0
1 1 1
1 0 1
0 1 0
0 0 0
1
1 1 1
1 0 0
0 1 1
0 0 0
Florida A & M University - Department of Computer and Information Sciences
Multiplexor (4-1)
Florida A & M University - Department of Computer and Information Sciences
Don’t Cares Situations where one does not care what the value of
some output is Another output is true Subset of input combinations determines the values of the
outputs Make it easier to optimize implementation of a logic
function due to simpler expression Two types
Output : don’t care about its value for some input combination Input : output depends on only some of the inputs
Appear as x’s in truth table
Florida A & M University - Department of Computer and Information Sciences
Don’t Cares – example
Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that:
W is true if A or C are true, no matter the value of B,
Y is true if A or B is true, no matter the value of C, and
Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true.
Inputs Outputs
A B C W Y Z
1 1 1
1 1 0
1 0 1
1 0 0
0 1 1
0 1 0
0 0 1
0 0 0
Florida A & M University - Department of Computer and Information Sciences
Don’t Cares – example
Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that:
W is true if A or C are true, no matter the value of B,
Y is true if A or B is true, no matter the value of C, and
Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true.
Inputs Outputs
A B C W Y Z
1 1 1 1
1 1 0 1
1 0 1 1
1 0 0 1
0 1 1 1
0 1 0 0
0 0 1 1
0 0 0 0
Florida A & M University - Department of Computer and Information Sciences
Don’t Cares – example
Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that:
W is true if A or C are true, no matter the value of B,
Y is true if A or B is true, no matter the value of C, and
Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true.
Inputs Outputs
A B C W Y Z
1 1 1 1 1
1 1 0 1 1
1 0 1 1 1
1 0 0 1 1
0 1 1 1 1
0 1 0 0 1
0 0 1 1 0
0 0 0 0 0
Florida A & M University - Department of Computer and Information Sciences
Don’t Cares – example
Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that:
W is true if A or C are true, no matter the value of B,
Y is true if A or B is true, no matter the value of C, and
Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true.
Inputs Outputs
A B C W Y Z
1 1 1 1 1 0
1 1 0 1 1 0
1 0 1 1 1 0
1 0 0 1 1 1
0 1 1 1 1 0
0 1 0 0 1 1
0 0 1 1 0 1
0 0 0 0 0 0
Florida A & M University - Department of Computer and Information Sciences
Don’t Cares – example
Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that:
W is true if A or C are true, no matter the value of B,
Y is true if A or B is true, no matter the value of C, and
Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true.
Inputs Outputs
A B C W Y Z
1 1 1 1 1 x
1 1 0 1 1 x
1 0 1 1 1 x
1 0 0 1 1 x
0 1 1 1 1 x
0 1 0 0 1 1
0 0 1 1 0 1
0 0 0 0 0 0
Florida A & M University - Department of Computer and Information Sciences
Don’t Cares – example
Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that:
W is true if A or C are true, no matter the value of B,
Y is true if A or B is true, no matter the value of C, and
Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true.
Inputs Outputs
A B C W Y Z
1 1 1 1 1 x
1 1 0 1 1 x
1 0 1 1 1 x
1 0 0 1 1 x
0 1 1 1 1 x
0 1 0 0 1 1
0 0 1 1 0 1
0 0 0 0 0 0
Florida A & M University - Department of Computer and Information Sciences
Don’t Cares – example
Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that:
W is true if A or C are true, no matter the value of B,
Y is true if A or B is true, no matter the value of C, and
Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true.
Inputs Outputs
A B C W Y Z
1 x x 1 1 x
1 x x 1 1 x
1 x x 1 1 x
1 x x 1 1 x
0 1 1 1 1 x
0 1 0 0 1 1
0 0 1 1 0 1
0 0 0 0 0 0
Florida A & M University - Department of Computer and Information Sciences
Don’t Cares – example
Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that:
W is true if A or C are true, no matter the value of B,
Y is true if A or B is true, no matter the value of C, and
Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true.
Inputs Outputs
A B C W Y Z
1 x x 1 1 x
0 1 1 1 1 x
0 1 0 0 1 1
0 0 1 1 0 1
0 0 0 0 0 0
Florida A & M University - Department of Computer and Information Sciences
Array of Logic Elements Combinational operations must be performed on an
entire word (32 bits) Represent by showing that a given operation will happen
to entire collection of inputs Example:
A and B are both 32 bits Output, which is also 32 bits, gets A or B
Florida A & M University - Department of Computer and Information Sciences
What is the digital logic implementation?
Florida A & M University - Department of Computer and Information Sciences
What is the digital logic implementation?
•All multiplexers controlled by the same selector input
•0 selects A
•1 selects B
Florida A & M University - Department of Computer and Information Sciences
Arithmetic Logic Unit (ALU) Brawn of the computer Performs arithmetic operations
Addition Subtraction
Performs logical operations AND OR
Florida A & M University - Department of Computer and Information Sciences
Arithmetic Logic Unit (ALU) MIPS need 32-bit wide ALU
Connect 32 1-bit ALUs
Florida A & M University - Department of Computer and Information Sciences
ALU Logical Operations Operation value
selects logical operation
0 for a AND b 1 for a OR b
Florida A & M University - Department of Computer and Information Sciences
ALU Addition (Adder) Three inputs
two operands carryin : carryout of
neighbor adder Two outputs
sum carryout
Florida A & M University - Department of Computer and Information Sciences
Adder Implementation?Inputs Outputs
a b CarryIn Sum Carryout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Florida A & M University - Department of Computer and Information Sciences
Adder Implementation
baCarryInaCarryInb
CarryInbaCarryInbaCarryInbaCarryInbaCarryOut
CarryInbaCarryInbaCarryInbaCarryInbaSum
Florida A & M University - Department of Computer and Information Sciences
AND, OR, Adder implementation
32-bit ALU constructed from 32 1-bit ALUs
Florida A & M University - Department of Computer and Information Sciences
AND, OR, Adder implementation
32-bit ALU constructed from 32 1-bit ALUs
Florida A & M University - Department of Computer and Information Sciences
Adder Modification for Subtraction Add a 2:1 multiplexor that chooses between b and CarryIn of ALU0 set to 1 for subtraction Remember two’s complement
b
babababa )()1(1
Florida A & M University - Department of Computer and Information Sciences
NOR functionality Recall DeMorgan’s
BABA
Florida A & M University - Department of Computer and Information Sciences
slt Functionality RECALL: All bits except the least significant bit is 0, with
the least significant bit set according to comparison Expand multiplexor to 4:1 with new input Less
Less = 0 on ALU1 – ALU31 (a - b) < 0 a < b ALU31 (most significant bit ALU) has extra output line
Set adder output (also used for overflow detection) used only for slt input LESS on ALU0 (least significant bit ALU)
Florida A & M University - Department of Computer and Information Sciences
ALU Building Blocks
ALU0 – ALU30
ALU31
Florida A & M University - Department of Computer and Information Sciences
ALU
Florida A & M University - Department of Computer and Information Sciences
Branch Instructions Branch if either two registers are equal or if they
are unequal Equality Test: subtract b from a and then test to
see if result is 0
REMEMBER: a – b = 0 a = b Implement:
Result0Result1Result32Result31Zero
Florida A & M University - Department of Computer and Information Sciences
MIPS ALU Combine CarryIn and Binvert into one single
control line Bnegate both set to 1 for subtraction both set to 0 for addition and logical operations
4 bit control lines Ainvert (1 bit) Bnegate (1 bit) Operation (selector) for multiplexor (2 bits)
Florida A & M University - Department of Computer and Information Sciences
MIPS ALU
Florida A & M University - Department of Computer and Information Sciences
MIPS ALU
Control Lines
FunctionAinvert Bnegate Operation
0 0 00 AND
0 0 01 OR
0 0 10 add
0 1 10 subtract
0 1 11 slt
1 1 00 NOR