Page 1 of 16 2401 Research Blvd. Ste. 108 Fort Collins, CO 80526 (970) 493-1901 www.ixysrf.com Application Note Demonstrating the IXZH10N50LA/B, IXZ210N50L, IXZ2210N50L In a Class AB 2 to 30 MHz CW 250 to 400 Watt Amplifier Abstract: The following application note describes an evaluation circuit highlighting the IXYSRF IXZ210N50L, IXZ2210N50L, and IXZH10N50L Ultra Linear RF MOSFETs. These devices are available in our low- inductance RF package as a single or dual die, and in the industry-standard TO-247 package. The circuit operates in the ISM and HF bands from 2 to 30 MHz utilizing class AB topology, producing 250 to 400 watts CW. The operating efficiency is greater than 50% for the frequency coverage, with a minimum power gain of 18.5 dB ±1 dB. This evaluation board and application note are to assist engineers in evaluating our components and to serve as a reference design for industrial, commercial, scientific, and HF RF amplifier applications. Martin Jones and Gilbert Bates R&D/Application Engineering
Transcript
Page 1 of 16
2401 Research Blvd. Ste. 108 Fort Collins, CO 80526
(970) 493-1901 www.ixysrf.com
Application Note
Demonstrating the IXZH10N50LA/B, IXZ210N50L, IXZ2210N50L
In a Class AB 2 to 30 MHz CW 250 to 400 Watt Amplifier
Abstract: The following application note describes an evaluation circuit highlighting the IXYSRF IXZ210N50L, IXZ2210N50L, and IXZH10N50L Ultra Linear RF MOSFETs. These devices are available in our low- inductance RF package as a single or dual die, and in the industry-standard TO-247 package. The circuit operates in the ISM and HF bands from 2 to 30 MHz utilizing class AB topology, producing 250 to 400 watts CW. The operating efficiency is greater than 50% for the frequency coverage, with a minimum power gain of 18.5 dB ±1 dB. This evaluation board and application note are to assist engineers in evaluating our components and to serve as a reference design for industrial, commercial, scientific, and HF RF amplifier applications.
Martin Jones and Gilbert Bates
R&D/Application Engineering
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Purpose Building and testing high frequency circuits is often complicated and difficult. Getting
suitable performance while minimizing development failures usually means that the designer is well versed on RF engineering principles, has more than a few years of hands-‐on experience, and the ability to sort out problems as they arise when testing RF circuits. It must also be noted that RF MOSFETs are expensive, RF circuit board layouts can be difficult to optimize the first time and high frequency good quality test equipment is a luxury. By offering a completely tested and operational RF circuit by way of this evaluation board, we are able to jump start the end user by eliminating the above mentioned items and place them in a position to simply connect and power up the circuit. A designer can then immediately evaluate the performance of the board and components to see if it is suitable for their application.
This application note will demonstrate the advantages of using the IXZ210N50L or IXZ2210N50L in the DE Series surface mount plastic package, and the IXFH10N50L in the standard TO-‐247 style package. Advantages include a 500V maximum rating which allows for a high 100V-‐150V operating voltage and lower DC currents, less complicated 50Ω or75Ω load matching networks, and very low thermal impedance. The evaluation board uses these advantages to provide a starting point for RF power amplification in the Industrial, Scientific, Medical (ISM) and HF bands. DE-‐Series Package DE-‐Series MOSFETs are a class of unique, high-‐power devices designed from the ground up as a circuit element for high-‐speed, high-‐frequency, and high-‐power applications. DE Series MOSFETs features low insertion inductance (≅1.5 nH) in a low cost, low profile plastic package with a very low thermal resistance that provides exceptional switching speeds and power handling capabilities.
For high power applications, the DE-‐Series incorporates several design features that provide excellent thermal dissipation and high power handling capability while offering a less cumbersome mounting technique than conventional devices. By minimizing substrate thickness, and selecting substrate materials with a low thermal impedance, a multi-‐layer configuration is assembled that not only provides low thermal impedance and low die stress but also allows for electrically-‐isolated elements (gate, drain, and source). An additional electrical advantage of the DE-‐Series mechanical assembly is that the case (drain)-‐to-‐ground capacitance is approximately 10 pF, much lower than the 100 pF capacitance common with a TO-‐247 case isolated from its heat sink with a 2-‐mil-‐thick kapton insulator. In high-‐frequency, high-‐power applications, a large capacitance can cause large ground currents and EMI problems. Furthermore, the capacitance appears directly across the drain and contributes to COSS losses. [3]
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Support The following documentation is available for download from IXYSRF or by email from our customer service team.
• Bill of materials • Schematic • Gerber files • Test procedure • Proper mounting procedures[4] • The bare printed circuit board is available for purchase from our sales department
Testing was done at IXYSRF with a Wakefield Thermal Solutions XX6274 heatsink and an air
flow of 120 CFM across the fins. Gerber files are provided for those who wish to arrange for PCB fabrication. In addition, PC boards can be purchased from IXYSRF.
The basic equipment needed to conduct the tests in this application note are listed below. Any differences in equipment used at IXYSRF are discussed later in this paper.
• RF signal generator (2 MHz to 30 MHz) • RF power meters capable of measuring both forward and reflected power • RF 50Ω power load capable of handling a minimum of 500W • 15 V DC power supply for bias voltage • 150 V 12 A adjustable DC power supply for the drain voltage • Voltage meter • 100 MHz Oscilloscope
Description Class AB amplifier topology is defined as having a conduction angle that is greater than 180° but less than 360°. In other words, DC bias and drive level are adjusted so device output current flows during appreciably more than half the drive cycle but less than the whole drive cycle. This is done by setting VGS to a value greater than VGS(th). Efficiency is much better than Class A, typically reaching 50-‐65% or greater at maximum output power levels, with a theoretical maximum of 78.5% in an ideal situation. [1 , 2] MOSFET Capacitance The following chart plots the value of the parasitic capacitance with the top curve representing input capacitance (CISS), the middle curve representing output capacitance (COSS), and lower curve representing reverse transfer or Miller capacitance (Crss).
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Figure 1- Parasitic Capacitance Input Capacitance Figure 1 shows that the input capacitance is approximately 660 pF for a drain voltage of 100 V. The desired frequency range of 2MHz to 30MHz requires a bandwidth of 28MHz. Using the formula for capacitive reactance, 𝑋𝑐 = !
!" [1]; we find that the input impedance ranges from
approximately 125 ohms at 2 MHz to 8 ohms at 30 MHz.
A relatively large input capacitance results in a large range of input impedances at these frequencies. Thus, for wideband performance, a small input capacitance is preferred to reduce design complications. The parasitic capacitance values can also be measured using a Vector Network Analyzer, or calculated using the S-‐Parameters provided on the data sheet, but both methods are time-‐consuming and complicated. Additionally, the input capacitance is large with respect to the gate inductance and resistance, dominating the gate circuit, and can be used as the approximate input impedance, ignoring the residual parasitic resistance and inductance in the gate circuit. Amplifier Input Section
In order to achieve a good match and to keep the VSWR at the input to a minimum, the input impedance to the gates of the MOSFETs must be kept relatively constant. We also want the evaluation board input to be the standard 50 ohms. So now we will consider the gate impedance range over 2MHz to 30MHz while matching that to the 50-‐ohm input using an impedance matching transformer.
A brief review of transformer characteristics yields
!"!"= !"
!"= !"
!" 𝑎𝑛𝑑 𝑍𝑖𝑛 = !"
!!,[1]
VDS vs. Capacitance
1
10
100
1000
10000
0 50 100 150 200 250 300 350 400
VDS, Drain-to-Source Voltage (V)
Cap
acita
nce
(pF
)
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where: NS = Number of secondary turns NP = Number of primary turns VS = Secondary voltage VP = Primary voltage IP = Primary current IS = Secondary current ZIN = Reflected secondary impedance looking into the primary ZS = Secondary impedance n = NS/NP Turns ratio
As discussed earlier, the gate impedance range is very large, so we will use the lowest value
of ZIN as the value to transform. To do this we just divide 50Ω by the lowest ZIN value, which in this case is 8Ω as shown in table 1. Now we have a value that would be a perfect impedance transform of 6.25 to 1. But referring back to the above characteristic formula, this 6.25 is the turn’s ratio value of n2. Finding the square root of 6.25 results in a turn’s ratio of 2.5:1. Since this type of transformer would be impractical and difficult to use we will have to chose a more practical value. Also, when we lower the input impedance at 2MHz, this will also lower the impedance at 30MHz to less than 8Ω. Noting that the input impedance at the higher frequencies is 8Ω and the reflected impedance is smaller than a 4:1 transform to the desired 50Ω input impedance, we select a 3:1 ratio which is a 9:1 impedance transform, as it is more practical to lower the input impedance 5.55Ω rather than to raise it across the entire bandwidth. In other words, it is more desirable to place an impedance in parallel to the gate impedance to lower it, routing more signal voltage to the gate, than inserting series resistance and consuming more signal power in the series resistance.
The transformer is constructed using binocular ferrite core #BN43-‐6802 from Amidon with 3
turns of #26 insulated wire on the primary and 1 turn of copper braid or 16AWG insulated wire on the secondary. See figure 2.
Figure 2
The next task is to stabilize the input impedance of the MOSFETs over the 28MHz bandwidth
to a value that would be close to a 9:1 impedance transformation to 50Ω. The ideal value would be 5.55Ω, or 50 divided by 9, but it is impractical to maintain this exact value of input impedance over the entire 28 MHz bandwidth. Therefore we will need to place a shunt resistor across each MOSFET gate to decrease the effective input impedance the transformer will reflect. To achieve a 2:1 VSWR
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or less at the input with respect to the 5.55Ω ideal value, the effective input Z needs to be 3Ω to 8Ω across the entire bandwidth.
Let’s first take a look at the data sheet and spice model. The values of interest are the Rg (ac gate resistance), Lg and Ls (gate and source inductors), and the Ciss at the chosen operating voltage, which is 100 V in this case. We find that the Rg is 0.2Ω, Lg and Ls combined is 1.5 nH, and the Ciss is 660 pF. The following chart will show the calculated values of XC, XL, R, and ZIN. ZIN is calculated using formula 1 and is listed in table 1.
Formula 1 𝑍 = 𝑅𝑔! + 𝑋𝑇𝑜𝑡𝑎𝑙! [1] We see that the difference between XC and ZIN is very small, and that XL and RG play a small
role in the overall input impedance of the MOSFET. Therefore we can ignore the gate resistance and inductive reactance for this frequency range and use just the capacitive reactance for simplicity.
Now we need to match the input impedance of the MOSFET to the 5.55Ω of the input source impedance (Zsource). In order to accomplish this we will be inserting a shunt resistance across the gate of the MOSFET to ground. To choose the best possible value we will use the center frequency 16MHz value of XC. Formula 2 is used to calculate this value of shunt resistance. Formula 2 𝑅𝑠ℎ𝑢𝑛𝑡 = !"∗!"#$%&'
!!!!!"#$%&!!
This formula was derived from Formula 3 for calculating Z from R and X in a parallel circuit. Formula 3 𝑍𝑖𝑛 = !∗!
!!!!! [1]
Table 2 is a list of the results from the calculations using formula 2 with XC and ZIN of the gate.
Frequency MHz RShunt Ω using XC RShunt Ω using ZIN Gate 2 5.558 5.558 16 5.969 5.982 30 7.672 8.054
Table 2
Again, we can see a small difference between the two values of RShunt using just the capacitive reactance and the input impedance of the MOSFET in the calculations. The value for RShunt will be 5.969Ω or the closet possible value. Any one of the calculated values will work for a desired 2:1 or less VSWR; but for a better overall match through the entire bandwidth, the center frequency
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value should be used. The value of 6.7Ω was selected for this design. Table 3 is a list of effective ZIN with RShunt using formula 3.
Frequency MHz ZIN with RShunt = 6Ω ZIN with RShunt = 6.7Ω 2 5.99Ω 6.69Ω 16 5.57Ω 6.12Ω 30 4.81Ω 5.13Ω
Table 3 Additionally, there are three resistors across the secondary of the input matching transformer, 150Ω each, giving a total resistance of 50Ω. The purpose of this resistance is to provide balance and stability to the secondary winding Amplifier Output Section
Now that the input of the amplifier is completed, we need to focus on the output matching for the amplifier and using Formula 4 we will determine the proper load impedance for the amplifier.
Formula 4 𝑅𝐿 = (!""×!.!")!
!×!"#$ [1, 2]
This amplifier has been designed to operate at 100V with 300W CW or continuous output power into a 50Ω load. The POUT is the power out of a single MOSFET or 150W. When we use these design values in Formula 4, a value of 24.1Ω is calculated for each MOSFET. Since RL is in series in a push-‐pull configuration, we have 48.2Ω for our output load resistance. The output matching section is then a 1:1 impedance transformer matching the 48.2Ω to the 50Ω output load. The output matching transformer is wound on two BN-‐61-‐002 binocular cores with 3 windings of #18 AWG magnetic wires on both the primary and secondary, see Figure 3.
Output Section Drain Supply:
An RF choke inductor is now added to supply the drains of the MOSFETs and to isolate the supply voltage from the RF energy. The inductance value for the choke is large enough for the XL of the choke to block the RF energy and to create a constant current source to feed the output stage. The choke is wound on a single toriodal Amidon T-‐106-‐2 core with 15 bifilar turns of #18 AWG magnetic wire. To prevent DC heating of the core, the chokes are supplied voltage in opposite directions to cancel flux in the core. See Figures 4, 5 for choke picture and winding diagram.
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Figure 3
Figure 4
Figure 5
Input Section Bias Supply
Class AB operation implies that some amount of DC biasing exists. Each MOSFET is DC biased at a quiescent (idle) level of 500 mA drain current when cold and 600 mA after warming for a combined value of 1 A cold to 1.2 A warmed up. Both gate circuits have multi-‐stage resistive “pi” filter networks that feed shunt resistor banks R3-‐R10.
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Operating Conditions NOTE: MOSFET packages must be properly cooled on a suitable heatsink. Water cooling is preferred, but a heat sink with a very low thermal resistance and forced air cooled will be adequate. A heatsink is not supplied. The heatsink used for testing is a WakeField Thermal Solutions model #XX6274 Flat Back Aluminum extrusion. Drain Supply Voltage: VDD = 100 V ±5 V Quiescent Idle Current: IDQ = 1.2 A ±100 mA after warm-‐up (cold startup set to 1 A or 500 mA per MOSFET). Note that the bias has been preset during testing using 12 V to establish 1.2 A of bias current after warm-‐up. Input Power Requirements: 2.5 W to 7 W depending on frequency. This is due to the input matching requirements for the broadband 2-‐30 MHz frequency range. Output Load: 50Ω ±1Ω capable of dissipating 500 W. Equipment used at IXYSRF for Testing Rhode & Schwarz model SML01 9 KHz to 1.1 GHz signal generator ENI model 5100L-‐NMR RF power amplifier used at input for drive power. Bird model 4421 RF power meter with model 4024 power sensor to measure input power Bird 43 RF power meter with 2 to 30 MHz 1000 W slug to measure output power Xantrek XFR150-‐18 DC power supply, 0-‐150 V, 0-‐18 A Bird Termaline Coaxial Resistor Model 8201 500 W, 50Ω Agilent Model 54641A Oscilloscope Vizatek DC power supply used as bias supply Fluke 87V DMM digital voltmeter Operation Instructions
1. Ensure the circuit board is mounted to a water-‐cooled cold plate or a heat sink with a low thermal impedance that is capable of sinking 500 W of power with forced air.
2. Ensure that the RF load resistor is capable of dissipating 500 W and measures 50Ω ±5%. 3. Connect a power supply set to 12 V to the Vbias input connectors. 4. Connect a power supply set to 100 V to the Vdrain connectors. The supply should be rated
at 125 V, 10 A minimum. 5. Connect a 20 W (minimum) power meter that is capable of reading both forward and
reflected power to the RF input. The RF input connecter is centered at one end of board. 6. Connect a 500 W (minimum) power meter that is capable of reading both forward and
reflected power to the RF output. The RF output connector is positioned at one corner of board.
7. Connect the 50Ω, 500 W RF load to the output of the 500 W power meter. 8. Connect an adjustable 2 to 30 MHz low power RF amplifier to the input of the 20 W power
meter. Input drive power was produced by the ENI model 5100L amplifier and driven by the Rohde & Schwarz signal generator at IXYSRF.
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9. Turn on Vbias, measure and note the voltage on each gate of the MOSFETs. This voltage was preset at IXYSRF during testing.
10. Turn off Vbias. 11. Ensure the evaluation board is adequately heat sunk. 12. Turn on the Vdrain supply and ensure the voltage is 100 V. 13. Turn on Vbias and monitor the 100 V supply (drain) current. This current should be between 1
and 1.2 A. The drain current will initially go to 1 A and gradually increase to ≤1.2 A as the components warm up. If the Idrain is too low or high adjust the Vgs at R1 and R2 equally to ensure the Idrain on both MOSFETs remains equal. If the drain current continues to rise the component is not adequately cooled or is mounted improperly.
14. Adjust signal generator at the input of driving RF amp for the desired frequency and 2 W of drive power.
15. Apply the RF signal at the input and adjust input power level until desired output power is achieved. Do not exceed 400 W output power for the IXZ components (DE series package) and 340 W output power for the IXZH10N50L components.
16. To calculate the efficiency use formula 5.
Formula 5 𝑒𝑓𝑓% = !"#$!"#
∗ 100 [1]
17. To calculate gain use formula 6, with RF Pin = RF input forward power – RF input reflected power.
Formula 6 𝑑𝐵 = 10 ∗ log !"#$!"#
[1]
To power down, turn off RF signal generator, 100 V drain supply voltage, and bias voltage. Conclusion The evaluation circuit demonstrates the advantages the IXYSRF components have with higher operating voltages and simplistic design. These advantages lead to simple output matching to the load, less DC current, higher gain, lower component count, and lower thermal resistance. This circuit is to be used as a starting point for applications in the ISM and HF bands. By providing a complete and fully tested board, engineers can save time and money in determining if IXYSRF components fit their application needs.
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Chart 1
Chart 2
10
20
30
40
50
60
70
80
0
5
10
15
20
25
0 5 10 15 20 25 30
Effi
cien
cy %
Gai
n dB
Frequency MHz
Frequency vs. Gain vs. Efficiency Power Out = 300W
Appendix CISS – The input gate capacitance of the MOSFET, consisting of the gate-‐to-‐source and gate-‐to-‐drain capacitance. COSS – The output capacitance of the MOSFET CRSS – The Miller or gate-‐to-‐drain capacitance, sometimes referred as the feedback capacitance of the MOSFET. dB – A logarithmic unit that indicates the ratio of a physical quantity (usually power or intensity) relative to a specified or implied reference level. A ratio in decibels is ten times the logarithm to base 10 of the ratio of two power quantities. [1] IDQ – Quiescent drain current or static drain current Impedance (Z) – The combined opposition to current when a circuit contains both resistance and reactance. Symbolized by the letter Z, impedance is a more general term than either resistance or reactance. The term is frequently used even for circuits containing only resistance or reactance. [1] VDD – Drain supply voltage VGS(th) -‐ Gate Threshold voltage. It is the gate-‐source voltage at which drain current starts to flow and the device is considered ON. It has a negative temperature coefficient. VSWR -‐ Voltage Standing Wave Ratio, a measure of how well the components of the RF network are matched in impedance. When impedances are improperly matched, signal power is lost, resulting in weak transmissions, poor reception, or both. [1]
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References [1] The ARRL Handbook for Radio Communications 2008 Copyright 2007 The American Radio Relay League, Inc. ISBN: 0-87259-101-8 [2] RF Circuit Design Second Edition Chris Bowick Elsevier, LTD. 2008 ISBN: 9780750685184 [3] DE-Series Fast Power MOSFET An Introduction Directed Energy Inc. 2002 George J. Krausse Document #9300-0002 Revision 3 [4] De-Series MOSFET, DEIC420 & SOP-28 Gate Driver Mooring and Installation Directed Energy Inc. George J. Krausse Document #9300-0005 Revision 3
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