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Applied Materials Confidential / Restricted Use Only / 2012 Applied Materials Technical Symposium in Japan (CMOS Image Sensors) Attendees Only

The Flip Side of CMOS Image Sensors

John T. Boland Front End Products Group Applied Materials

Japan Technical Symposium December 7th, 2012


Agenda

The Move to Backside illumination (BSI) Sensors

Laser Anneal Solutions for BSI Sensors

Low-Temperature Oxidation for BSI Sensors

Summary


CMOS Image Sensors Benefits of Backside illumination Architecture

Free from optical interference of metal layers Short optical path for increased sensitivity and reduced crosstalk 100% fill factor Potential to achieve very high peak color QE’s (> 70 %) Excellent chief ray angle (CRA) and angular response Multi-level metallization (MLM) on front-side with no performance penalty Better compatibility to SOC and 3D (TSV)

Substrate (Silicon) Surface


CMOS Image Sensors Some Process Challenges of Backside illumination (BSI) Architecture

Transistors and interconnects formed first

Processing is similar to typical CMOS flow which includes isolation, implant, RTA anneal, silicide formation, metallization, etc.

After transistors and interconnects formed and a carrier is bonded to the top, everything is “turned upside down” and processing continues

Additional steps are required, however, severe thermal budget limitations now exist due to existing circuitry in place


CMOS BSI Processing Challenges

It is well known that for improved performance in BSI architectures, the surface and near surface area of the silicon detector must be properly engineered Affects Dark Current, Cross-

talk, and Quantum Efficiency

Techniques include P+ implant with laser activation, as well as a surface oxidation step

These steps must not subject the transistors or interconnect to temperatures which could degrade their performance (typically < 400C)

Process Step Applied Solution P+ Implant PTC-II/III, PLAD

Anneal / Activation Next-Gen Laser

Surface Oxidation DPO

Substrate (Silicon) Surface


Anneal Process Landscape

200

400

600

800

1000

1200

1400

1.E-09 1.E-07 1.E-05 1.E-03 1.E-01 1.E+01 1.E+03 1.E+05

Tem

pera

ture

(Cel

cius

)

Anneal Time (sec) Less Diffusion

Mor

e A

ctiv

atio

n

Furnace RTA Nano-Sec -> PTA

(Sub-Melt)

Superheated Melt

Bulk Heating Surface Heating

Core technologies have been developed and productized that cover an extremely wide range of anneal times and temperature

Nano-second anneal is well suited to support BSI integration requirements

Flash


Next-Generation Anneal System System Overview

Designed for use in high-volume semiconductor manufacturing environments

- Production proven factory interface and wafer handling - Optics module based around production proven frame and stage designs

Wide process window with unique capabilities – Short pulse times and excellent optical roll off – Pulse shaping and control


Next-Generation Anneal System Thermal Contours @ 1400C Surface Peak Temperature

Simulation shows < 400C @ >2um depth when surface peaks at 1400C

2.0µm

4.0µm

6.0µm 400C 250C

100C

Silicon Surface


Next Generation Anneal System Process Data Rs/Xj for Ultra-Low Energy B Implant

Fluence (energy) level can be precisely targeted to achieve optimal results Note: Applied Internal Data


Next Generation Anneal System Process Data P Implant and Anneal

SIMS data shows progressive increase in melt depth w/ fluence Note: Applied Internal Data

1E+16

1E+17

1E+18

1E+19

1E+20

1E+21

0 50 100 150 200 250 300 350 400

P C

once

ntra

tion

(Ato

ms/

cm3)

Depth (nm)

60keV, As-Implanted 60keV, 0.7J/cm2, Single Pulse 60keV, 0.9J/cm2, Single Pulse


Next Generation Anneal System Process Data P Implant and Anneal

As- Implanted P, 60keV, 1e15 cm-2

Implant damage is completely repaired with the melt anneal

Annealed 0.9 J/cm2

Note: Applied Internal Data


Oxidation Process Landscape General Trends

High temperature thermal oxidation provides the best quality, but process temperature is too high

Low temperature thermal oxides and chemical oxides are generally poor quality, but plasma based oxidation can provide significant improvement

Temperature

Qua

lity

(Vbd

, SIL

C, D

it)

1000C 25C (RT) 400C

Too High for Backside Processing


Decoupled Plasma Oxidation (DPO) Chamber

Room to moderate temperature oxidation – Good growth rates at

room temperature

Improves quality of already deposited (CVD/ALD) dielectric films

Designed for Applied’s Centura ACP platform – Can be clustered with

other chambers for integrated, sequential processing w/o ambient exposure Electro-Static

Chuck Centering

Ring

Gas Injection

Inner and Outer Inductive Coils


DPO Process Data Room Temperature Process

DPO chamber provides direct oxidation of silicon at room temperature Excellent uniformity achieved (< 1%, 1sigma)

0

10

20

30

40

50

60

70

80

90

100

0 60 120 180 240 300 360

Aler

is T

hick

ness

(A)

Time (s)

2kW1kWLog. (1kW)

Growth Rate

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

59.5

60.0

60.5

61.0

61.5

62.0

0 20 40 60

NU

%

Thic

knes

s (Å

) Div Cap %

Thickness

NU%

Thickness Uniformity



DPO Process Data

DPO process provides relatively good quality oxidation at room temperature Room temperature DPO process also significantly improves the quality of as-

deposited CVD oxide (better than high-temp thermal reoxidation)

1

10

100

1000

0 500 1000

Qua

ntox

Dit

(E10

)

Oxidation Temperature (C)

DPO 60%H2RTORadOx 10%H2

Room Temp DPO 60% H2 MOSCAP

Sensed at -4.4V

1E-14

1E-13

1E-12

1E-11

1E-10

1E-09

1E-08

50 55 60 65 70

EOT (Å)

Leak

age

Cur

rent

(A)

HTO + DPO

HTO

RadOx

HTO+RadOx

Oxide (Grown or

CVD) Treatment MOSCAP



Summary

Backside illuminated CMOS image sensors provide a path for significant performance improvements and continued device scaling

Advanced laser annealing allows the surface and near surface engineering of the backside photodiodes necessary to realize the performance improvements that the backside architecture brings

Plasma oxidation provides a means for good quality oxidation all the way down to room temperature

Thank You……

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