ArchitecturalConsidera1onsfor50GbEandNG100GbE

AliGhiasi GhiasiQuantumLLC

IEEE802.3cdTaskForceMee@ng

Whistler

May23,2016

Compa1bility,Synergy,andInterac1onwithFEC

q  Inthetaskforceneedtoinves@gateuseofcommonFECaddressingall50GbEPMDswithlikelychoicesbeing:–  RS-FEC(528,514)couldsa1sfy3mCuDACbut30dBbackplanerequireRS-FEC(544,514)

•  SeehOp://www.ieee802.org/3/cd/public/May16/ghiasi_3cd_02_0516.pdf•  MarketisservedbestbyusingsingleFECRS(544,514)FECwhichcanmeetCuPMDsandop1calPMDs

–  Compa1bilityandusecaseincludingopera1ngwith25GMSAneedstoconsidered–  Needtosupporteitherbitmuxifbursterrorismanageableotherwisesymbolmuxinsupportof50GAUI-2/1

q  Inthetaskforceneedtoinves@gatepossiblybothRS-FEC(544,514)and(528,514)FEC:–  RS-FEC(528,514)couldsa1sfy3mCuDACbut30dBbackplanerequireRS-FEC(544,514)

•  SeehOp://www.ieee802.org/3/cd/public/May16/ghiasi_3cd_02_0516.pdf–  CuPMDsbenefitfromRS(544,514)buthighergainFECcouldenablefutureMSAop1cs–  Insupportoflegacy100GbEPMDsalsoneedtodefineCAUI-2withRS(528,514)–  NeedtosupporteitherbitmuxifbursterrorismanageableotherwisesymbolmuxinsupportofCAUI-4/2

q  Transi@onto50G/laneop@csmayhappenfasterthanmigra@ontoASICswith50GIO–  50GbEorNG100GbEimplementa1onmaytakeadvantageof400GbEhardwarewhichsupports16x25G

electricalbut50G/laneor100G/laneop1cs–  Tosupportflexiblemigra1onthe50GbEPCSandNG100GbEPCSsshouldsupportrespec1vely50AUI-2/1

andCAUI-4/2PMAMux–  IfFECperformanceisunacceptablewithbitdistributedPMAMUX,symboldistributedPMAisanacceptable

alterna1veandpreferableoverimplemen1ngthefullFECinthePMA/PHYdeviceq  Applica@onoverlayshouldbekeyconsidera@ontoallowbuildingcommonportssuppor@ngoverlayand

breakoutports–  1x400GbE,2x200GbE,4x100GbE,8x50GbE.

A.Ghiasi 2IEEE802.3cdTaskForce

Possible50GbEImplementa1onsq  Thekeytosuppor@nganyexis@ng50GbEorearlyimplementa@onof50GbEistosupport50AUI-2aswellassupportwith25GbEMSA50GbE

overtwolanes,whatneedstobedefinedin802.3cd–  Define50GAUI-2basedon½ofCAUI-4underinves1ga1on–  Define50GAUI-2basedon1/8ofCDAUI-16seebaselineinLi_3cd_01_0516.pdf–  Define50GAUI-1basedon1/8ofCDAUI-8seebaselineinLi_3cd_01_0516.pdf.

A.Ghiasi 3

NewSOCwith50GIOKR4orKP4FEC

PMAMux(Bit/SymbolMux)

CommonEnd-EndFECImpliesRS-FEC(528,514)

PMAMux+RS(544,514) DifferentFEC

FEC

50GbEHost 50GbEHost

DifferentFEC

FEC

CDR

LegacySOCwith25GIOKR4FEC

CDR

CDR

CDR

PMAMux+RS(544,514)

25.78GBdNRZ(FECon)

25.78GBdPAM4(FECon)

26.55GBdPAM4(FECon)

25.78GBdNRZ(FECoff)

26.55GBdPAM4(FECon)

25.78GBdNRZ(FECoff)

CommonEnd-EndFEC

CDR CDR

PMAMux(Bit/Symbol)

CommonEnd-EndFEC

CDR CDR

PMAMux(Bit/Symbol) 26.55GBd

PAM4(FECon)

NewSOCwith25GIOKP4FEC

26.55GBdPAM4(FECon)

26.55GBdPAM4(FECon)

26.55GBdPAM4(FECon)

IEEE802.3cdTaskForce

Legacy100GbEPMDsAssumingSingleKR4FECisSharedwithCAUI-2

q  KR4FECwith20PCSlanesoffershighestlevelofbackwardcompa@bilitytoCL82PCSandCL91KR4-FECq  ArchitectureshownbelowlikelynotbeviableifRS(528,514)FECgainisdividedbetweenCAUI-2andlegacy

100GbEPMDthatusethefullRS(528,514)FECgain–  Toovercomethislimita1onCAUI-2wouldhavetooperateerrorfreesimilartoCAUI-4(1E-15)whichmaybe

onerous–  Inengineeredlinkapplica1onwhereop1callinkoperatebeOerthan5E-5someoftheFECgaincouldbeshared

withCAUI-2q  TosupporttheseusecaseneedtodefineCAUI-2withKR4FEC

–  Underinves1ga1on.

A.Ghiasi 4

CAUI-4SOCwith25GIORS-FEC

(528,514)

CAUI-2SOCwith50GIORS-FEC

(528,514)

CDR

Legacy100GbEPMDs

100GbEHost 100GbEHostCDR+Bit/SymbolMux

CDR

Legacy100GbEPMDs

PMAMux(BitMux)

CDR

25.78GBdPAM4(FECon)

25.78GBdPAM4(FECon)

25.78GBdNRZ(FECon)

25.78GBdNRZ(FECon)

IEEE802.3cdTaskForce

100GbEImplementa1onsofLegacyPMDsifCAUI-2usesKP4FEC

q  Needtobalancethelevelofbackwardcompa@bilitywithoverallsynergyandburden–  PMA-PMA+FECdeviceplacedinmoduleoronthelinecardcanprovidebackward

compa1bilityq  TosupportthisusecaseneedtodefineCAUI-2withRS(544,514)FEC

–  Currentlythereisno100GbEop1calPMDonthetablesowedon’thavetodefineKP4FECforanapplica1onnotunderconsidera1oninIEEE

–  PMA-PMAextendedsublayerinsupportofbackplaneandCuDACrequiredefiningCAUI-2withRS(544,514)FECbasedon¼ofCDAUI-8•  SeebaselineinhOp://www.ieee802.org/3/cd/public/May16/li_3cd_01_0516.pdf

A.Ghiasi 5

CAUI-4SOCwith25GIORS-FEC

(528,514)

CDR

Legacy100GbEPMDs100GbEHost 100GbEHost

NewCAUI-2SOCwith50GIORS-FEC

(544,514)

CDR

Legacy100GbEPMDs

PMAMux(Bit/Symbol)RS(528,514)èRS(544,514)

CDR

26.55GBdPAM4(FECon)

26.55GBdPAM4(FECon)

25.78GBdNRZ(FECon)

25.78GBdNRZ(FECon)

FEC

RS(528,514)èRS(544,514)

FEC

*3mCuDACcouldbesa1sfiedwithRS(528,514)butitispreferredtohavecommoninterfaceandFEC.IEEE802.3cdTaskForce

New100GbEPMDsAssumingKP4FECisRequired

q  Withnonew100GbEPMDonthetableIEEE802.3cddoesnothavetoconsidertheseusecases–  DefiningCAUI-2extendedsub-layerinsupportof100G-KR2/CR2willalsobeaservicetoMSAs

•  DefineCAUI-4basedon1/4ofCDAUI-16seebaselineinLi_3cd_01_0516.pdf•  DefineCAUI-2basedon1/4ofCDAUI-8seebaselineinLi_3cd_01_0516.pdf.

A.Ghiasi 6

CAUI-4SOCwith25GIORS-FEC

(528,514)

New100GbEPMDs

100GbEHost 100GbEHost

NewCAUI-2SOCwith50GIORS-FEC

(544,514)

26.55GBdNRZ(FECon)

26.55GBdPAM4(FECon)

26.55GBdPAM4(FECon)

25.78GBdNRZ(FECoff)

New100GbEPMDs

26.55GBdNRZ(FECon)

26.55GBdPAM4(FECon)

NewCAUI-4SOCwith25GIORS-FEC

(544,514)

CDR

FEC/PMABit/SymbolMuxNew100GbEPMDsF

EC

25.78GBdNRZ(FECoff)

CDR

FEC/PMABit/SymbolMuxNew100GbEPMDsF

EC

CDR

26.55GBdPAM4(FECon)

PMABit/SymbolMux

PMABit/SymbolMux

CDR

CDR

CDR

IEEE802.3cdTaskForce

Applica1onOverlay

q  Akeyconsidera@onofthe50GbEandNG100GbEisapplica@onoverlayof200G/400Gportsinsupportofbreakoutfromacommonport–  Suppor1ngboth50GAUI-2/1isrequiredfor50GbEapplica1onoverlayshownbelow

•  CAUI-4alreadyexist–  25G/laneenablesearlyimplementa1onsaswellastransi1onfrom25GMSA50GbEmode.

A.Ghiasi 7

Super-setSOC400GbE2x200GbE4x100GbE8x50GbE

Super-setHostCDAUI-16/82xCCAUI-8/44xCAUI-4/28xLAUI-2/1

PMA-PMAMux+

FEC*

PMD

CDAUI-82xCCAUI-44xCAUI-28xLAUI-1

400GbE

Or2x200GbE

Or4x100GbE

Or8x50GbE

*Insomeimplementa1onFECmaybepartofthePMA-PMAotherwiseinthesuper-sethost.IEEE802.3cdTaskForce

ExampleNIC/NPUwithNoImmediateBenefitfrom50GI/O

q  50GI/Odoesnotofferbenefitinlowportcountapplica@ons–  Limitedavailabilityof50GSerDescanbecostlyand/ornotavailable–  TheASICmayalreadyhave50GbEbasedontwolanesMSA–  Nothavingtheop1onof50GAUI-2mayforceanewASICdevelopmentwithcostly

50GSerDes–  Thestandardshouldofferflexibilityandchoicetoeitheruse50GAUI-2or

50GAUI-1.

A.Ghiasi 8hOp://www.ieee802.org/3/50G/public/Mar16/booth_50GE_NGOATH_01a_0316.pdf

LAUI-2 LAUI-1

IEEE802.3cdTaskForce

Why50GAUI-2IsNeeded

q  25GbE1sttaskforcemee@ngwasJan2015whereproducts(switches,NIC,Phys,CFP2,CFP4,andQSFP28)alreadyavailableinthemarketplacebasedon25G/lane–  25GbEwasbasedonthedefini1onofthe25GMSAwhichhappened

toleverageCL49insteadoftheMLDPCSq  Todaythematurityofthe50G/laneIOisnotatthesamelevelas

25GIOwas2014/2015@meframeq  Followingclassofproductdonotbenefitfrommigra@onto50G/

laneIO–  Corelimited–  NIC/NPUapplica1onswithjustafewports

q  Unlessapplica@oncanbenefitfrom50GIO(largeswitch)nothavingtheop@onofthe50GAUI-2forcestheeco-systemtohigherriskandcostof50GIOovercommodity25GIO!

A.Ghiasi 9IEEE802.3cdTaskForce

Summaryq  PCS/FECop@onsfor50GbE

–  SpeedupCL82with4PCSlanes(12.5G)offersbackwardcompa1bilitytothe25GbEMSA(2x25Gmode)andsupport50GAUI-2/1

–  Needtodefine50GAUI-2/1withRS(544,514)FEC•  Where50GAUI-2is1/8oftheCDAUI-16•  Where50GAUI-1is1/8oftheCDAUI-8•  Defining50GAUI-2being½CAUI-4needfurtherstudy

q  PCS/FECop@onsforNG100GbE–  UseCL82100GbEPCSbaseon5GPCSlaneofferingbackwardcompa1bility

andsupportsCAUI-4/CAUI-2–  NeedtodefineCAUI-4/2withRS(544,514)FEC

•  WhereCAUI-4is1/4oftheCDAUI-16•  WhereCAUI-4is1/4oftheCDAUI-8•  DefiningCAUI-4withRS(528,514)needsfurtherstudy

q  With25GMSA50GbEmodeand100GbEalreadyinthemarketplaceIEEEneedstoconsidercompa@bilityscenariosillustratedhereaswellassupportforPMAbit/symbolmuxtoeasetransi@on.

A.Ghiasi 10IEEE802.3cdTaskForce