Arria V GX Starter Kit Board - Analog Devices€¦ · Power 3 - 1.15V & 1.5V FPGA SDI TX/RX Cable...

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

On-Board USB Blaster II

29

26

27

DESCRIPTIONREV DATE PAGES

PAGE DESCRIPTION

30 Power 5 - Linear Regulator

Power 7 - Arria V GX Power

Flash

5M2210 System Controller

User I/O (LEDs, Buttons, Switches, LCD)

Power 3 - 1.15V & 1.5V FPGA

SDI TX/RX Cable Driver & SMB

31

32

33

Power 1 - DC Input, 12V, 3.3V

Arria V GX Clocks

Arria V GX Configuration

DDR3 SDRAM

Ethernet PHY & RJ-45

SRAM

Power 4 - 2.5V

HSMC Port

Power 6 - Power Monitor

5

6

HDMI

28

FPGA Package Top

Arria V GX Decoupling

Power 8 - Arria V GX GND

PAGE DESCRIPTION

2

C All

PCI Express Edge Connector

Arria V GX Bank 4

Arria V GX Bank 3

Arria V GX Transceiver Banks

Title, Notes, Block Diagram, Rev. History1

3

4

7

8

Arria V GX Bank 79

Arria V GX Bank 810

11

12

13

14

15

16

PLL

17

JTAG

18

19

20

21

22

23

24

25

Arria V GX Starter Kit Board

System Block Diagram

Power Tree

Clock Tree

100-0320806-C1110-0320806-C1120-0320806-C1130-0320806-C1140-0320806-C1150-0320806-C1160-0320806-C1170-0320806-C1180-0320806-C1210-0320806-C1220-0320806-C1320-0320806-C1

Project Drawing Numbers: Raw PCB Gerber Files PCB Design Files Assembly Drawing Fab Drawing Schematic Drawing PCB Film Bill of Materials Schematic Design Files Functional Specification PCB Layout Guidelines Assembly Rework

1.

NOTES:6 July 2012 INITIAL REVISION C RELEASE

34

35 Arria V GX Decoupling


2. 1011 Parts, 187 Library Parts, 982 Nets, 4837 Pins

INITIAL REVISION B RELEASEINITIAL REVISION A RELEASEA

B 4 April 201213 Dec 2011 All

All

C1.1 21 Sept 2012 1 - 3, 23 Update know issues list and block diagram. Edited MDIO bus CAD noteKnown Issue List: (1) Full duplex x8 transceivers @ 6G interface at HSMC connector can not be compiled in the same Quartus II project. Up to x7 transceivers @ 6G can be compiled at in one Quartus II project. (2) LVDS channels in bank 2 and bank 3 of HSMC connector with total of 17 channels can not be compiled in the same Quartus II project. LVDS channels in HSMC bank 2 needs clock source from bottom banks while bank 3 needs clock source from top banks of FPGA.

Title

Size Document Number Rev

Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B

1 35Friday, September 21, 2012

Altera Worldwide Service, Plot 6, Bayan Lepas Technoplex, Penang, Malaysia

Copyright (c) 2012, Altera Corporation. All Rights Reserved.

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

FPGA Package Top View

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Link Width DIP Switch

PCI Express x8 Edge Connector

MAX V Interface

Design Note:Custom PCI bracket

FPGA Interface

PCIE_SMBCLK

PCIE_RX_P4PCIE_RX_N4

PCIE_TX_N1PCIE_TX_P1

PCIE_PRSNT2n_x8



PCIE_PRSNT2n_x4


PCIE_SMBDAT


PCIE_JTAG_TCK

PCIE_WAKEn

PCIE_JTAG_TMS


PCIE_PRSNT2n_x1


PCIE_TX_CP6PCIE_TX_CN6


PCIE_TX_CN5PCIE_TX_CP5



PCIE_PERSTn




PCIE_WAKEn_R3.3V_PCIE_AUX



PCIE_JTAG_TDOPCIE_JTAG_TDI




PCIE_PRSNT1n



PCIE_REFCLK_PPCIE_REFCLK_NPCIE_RX_P0

PCIE_RX_N0

PCIE_PRSNT2n_x4PCIE_PRSNT2n_x1

PCIE_PRSNT2n_x8FAN_FORCE_ON

12V_PCIE 3.3V_PCIE12V_PCIE3.3V_PCIE

12V_PCIE 3.3V_PCIE

2.5V

FAN_FORCE_ON19

PCIE_TX_P[7:0]11

PCIE_TX_N[7:0]11

PCIE_RX_P[7:0]11

PCIE_RX_N[7:0]11

PCIE_REFCLK_P11

PCIE_REFCLK_N11

PCIE_PERSTn12

PCIE_JTAG_TDO 15

PCIE_JTAG_TCK15

PCIE_JTAG_TMS 15

PCIE_JTAG_TDI15

PCIE_WAKEn9

PCIE_SMBCLK9

PCIE_SMBDAT9

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




C130.1uF

C170.1uF

C180.1uF

C40.1uF

OPEN

SW1

Switch, DIP x4, TDA04H0SB1

1234 5

678

C90.1uF

C140.1uF

C190.1uF

C200.1uF

C50.1uF

C210.1uF

C100.1uF

C150.1uF

C220.1uF

KEY

X4

X8

X1

J1

PCIe x8 Edge Finger

+12VB1

+12VB2

+12VB3

GNDB4

SMCLKB5

SMDATB6

GNDB7

+3_3VB8

JTAG_TRSTNB9

+3_3VAUXB10

WAKE_NB11

RSVD1B12

GNDB13

PET0PB14

PET0NB15

GNDB16

PRSNT2_N_X1B17

GNDB18

PET1PB19

PET1NB20

GNDB21

GNDB22

PET2PB23

PET2NB24

GNDB25

GNDB26

PET3PB27

PET3NB28

GNDB29

RSVD3B30

PRSNT2_N_X4B31

GNDB32

PET4PB33

PET4NB34

GNDB35

GNDB36

PET5PB37

PET5NB38

GNDB39

GNDB40

PET6PB41

PET6NB42

GNDB43

GNDB44

PET7PB45

PET7NB46

GNDB47

PRSNT2_N_X8B48

GNDB49

PRSNT1_NA1

+12VA2

+12VA3

GNDA4

JTAG_TCKA5

JTAG_TDIA6

JTAG_TDOA7

JTAG_TMSA8

+3_3VA9

+3_3VA10

PERST_NA11

GNDA12

REFCLK+A13

REFCLK-A14

GNDA15

PER0PA16

PER0NA17

GNDA18

RSVD2A19

GNDA20

PER1PA21

PER1NA22

GNDA23

GNDA24

PER2PA25

PER2NA26

GNDA27

GNDA28

PER3PA29

PER3NA30

GNDA31

RSVD4A32

RSVD5A33

GNDA34

PER4PA35

PER4NA36

GNDA37

GNDA38

PER5PA39

PER5NA40

GNDA41

GNDA42

PER6PA43

PER6NA44

GNDA45

GNDA46

PER7PA47

PER7NA48

GNDA49

R1 10K

R2 DNI

C20.1uF

B3

PCI BRACKET

C60.1uF

C110.1uF

C230.1uF

C160.1uF

R3 DNI

C240.1uF

C70.1uF

C10.1uF

C120.1uF

C30.1uF

C80.1uF

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Arria V GX Bank 3

SRAM, Flash, MAX V Interface

2.5V

2.5V

2.5V

2.5V

On-board USB Blaster II Interface

SDI Interface

FSM_D11

FSM_D31

FSM_D15

FSM_D30

FSM_D1FSM_D0

FSM_D24

FSM_D2

FSM_D3

FSM_D20

FSM_D4

FSM_D5

FSM_D6

FSM_D7

FSM_D8

FSM_D9

FSM_D10

FSM_D12

FSM_D13

FSM_D14FSM_D16

FSM_D17

FSM_D18FSM_D21

FSM_D22FSM_D23

FSM_D26

FSM_D25

FSM_D27

FSM_D28FSM_D29

FSM_A0FSM_A1FSM_A2FSM_A3

FSM_A4FSM_A5

FSM_A6FSM_A7FSM_A8

FSM_A9

FSM_A10

FSM_A11

FSM_A12FSM_A13

FSM_A14

FSM_A15

FSM_A16

FSM_A17

FSM_A18

FSM_A19FSM_A20

FSM_A21

FSM_A22

FSM_A23FSM_A24

FSM_A25

FSM_A26

FLASH_WEnFLASH_RESETn

FLASH_OEn

FLASH_CLKFLASH_CEn0

FLASH_CEn1FLASH_ADVn

SRAM_ADSCn

SRAM_BWEn

SRAM_BWn3

SRAM_BWn2

SRAM_BWn1

SRAM_BWn0

SRAM_CEn

SRAM_CLK

SRAM_OEn

USB_RDnUSB_SCL

USB_WRn

FLASH_RDYBSYn0FLASH_RDYBSYn1

SRAM_MODESRAM_GWn

SRAM_DQP2SRAM_DQP3

SRAM_DQP0SRAM_DQP1

SRAM_ADSPnSRAM_ADVn

SRAM_ZZ

SDI_RX_EN

SDI_RX_BYPASS

SDI_TX_ENSDI_TX_SD_HDn

SDI_CLK148_UP

SDI_CLK148_DN

FSM_D19

2.5V_OCT_RZQ

FSM_D[31:0]17,18,19

FSM_A[26:0]17,18,19

FLASH_RDYBSYn[1:0]17,19

FLASH_OEn17,19

FLASH_RESETn17,19

FLASH_WEn17,19

FLASH_CLK17,19

FLASH_ADVn17,19

FLASH_CEn[1:0]17,19

SRAM_BWn[3:0]18

SRAM_CEn 18

SRAM_BWEn18

SRAM_OEn18

SRAM_ADSCn18

SRAM_CLK18

USB_SCL24

USB_RDn24

USB_WRn 24

SRAM_MODE18

SRAM_GWn18

SRAM_ADSPn18

SRAM_ADVn18

SRAM_ZZ18

SRAM_DQP[3:0]18

SDI_RX_EN19,21

SDI_TX_EN19,21

SDI_TX_SD_HDn21

SDI_RX_BYPASS19,21

SDI_CLK148_UP14

SDI_CLK148_DN14

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




R316 100

1%

Arria V GX Bottom IO Bank 3

Bank 3A

Bank 3B

Bank 3C

Bank 3D

Version 2.0 Pin Out5AGXFB3H4F35

U1C

DIFFIO_RX_B11n/DQSN2B/CQN2B/WE#_3AAG27 DIFFIO_RX_B11P/DQS2B/CQ2B/CAS#_3AAH27

DIFFIO_RX_B13N/DQ2B/BA_3A_1AP27 DIFFIO_RX_B13P/DQ2B/BA_3A_0AP28

DIFFIO_RX_B15N/DQ2B/A_3A_13AK27 DIFFIO_RX_B15P/DQ2B/A_3A_12AL27

DIFFIO_RX_B17N/DQ3B/A_3A_9AJ26 DIFFIO_RX_B17P/DQ3B/A_3A_8AK26

DIFFIO_RX_B19N/DQSN3B/CQN3B/A_3A_5AL26 DIFFIO_RX_B19P/DQS3B/CQ3B/A_3A_4AM26

DIFFIO_RX_B21N/DQ3B/A_3A_1AP25 DIFFIO_RX_B21P/DQ3B/A_3A_0AP26

DIFFIO_RX_B23N/DQ3B/CK#_3AAL25 DIFFIO_RX_B23P/DQ3B/CK_3AAM25

DIFFIO_RX_B25N/DQ4B/DQ1_3B_7AC24 DIFFIO_RX_B25P/DQ4B/DQ1_3B_6AC25

DIFFIO_RX_B27N/DQSN4B/CQN4B/DQS#1_3BAD24 DIFFIO_RX_B27P/DQS4B/CQ4B/DQS1_3BAE25

DIFFIO_RX_B29N/DQ4B/DQ1_3B_4AH24 DIFFIO_RX_B29P/DQ4B/DQ1_3B_3AH25

DIFFIO_RX_B30N/DQ4B/DQ1_3B_1AJ25 DIFFIO_RX_B30P/DQ4B/DQ1_3B_0AK24

DIFFIO_RX_B32N/DQ5B/DQ2_3B_7AF23 DIFFIO_RX_B32P/DQ5B/DQ2_3B_6AG23

DIFFIO_RX_B34N/DQSN5B/CQN5B/DQS#2_3BAH23 DIFFIO_RX_B34P/DQS5B/CQ5B/DQS2_3BAJ23

DIFFIO_RX_B36N/DQ5B/DQ2_3B_4AN23 DIFFIO_RX_B36P/DQ5B/DQ2_3B_3AN24

DIFFIO_RX_B38N/DQ5B/DQ2_3B_1AP22 DIFFIO_RX_B38P/DQ5B/DQ2_3B_0AP23

DIFFIO_RX_B40N/DQ6B/DQ3_3C_7AL21 DIFFIO_RX_B40P/DQ6B/DQ3_3C_6AL22

DIFFIO_RX_B42N/DQSN6B/CQN6B/DQS#3_3CAH21 DIFFIO_RX_B42P/DQS6B/CQ6B/DQS3_3CAH22

DIFFIO_RX_B44N/DQ6B/DQ3_3C_4AJ22 DIFFIO_RX_B44P/DQ6B/DQ3_3C_3AK21

DIFFIO_RX_B46N/DQ6B/DQ3_3C_1AM22 DIFFIO_RX_B46P/DQ6B/DQ3_3C_0AN21

DIFFIO_RX_B48N/DQ7B/DQ4_3C_7AN20 DIFFIO_RX_B48P/DQ7B/DQ4_3C_6AP20

DIFFIO_RX_B50N/DQSN7B/CQN7B/DQS#4_3CAL20 DIFFIO_RX_B50P/DQS7B/CQ7B/DQS4_3CAM20

DIFFIO_RX_B52N/DQ7B/DQ4_3C_4AG20 DIFFIO_RX_B52P/DQ7B/DQ4_3C_3AH20

DIFFIO_RX_B53N/DQ7B/DQ4_3C_1AE20 DIFFIO_RX_B53P/DQ7B/DQ4_3C_0AF20

DIFFIO_RX_B71N/DQ8BAL19 DIFFIO_RX_B71P/DQ8BAM19

DIFFIO_RX_B73N/DQSN8B/CQN8BAN18 DIFFIO_RX_B73P/DQS8B/CQ8BAP19

DIFFIO_RX_B75N/DQ8BAK18 DIFFIO_RX_B75P/DQ8BAL18

DIFFIO_TX_B1N/RZQ_0AL31DIFFIO_TX_B1P/DQ1BAM31

DIFFIO_TX_B3NAD27DIFFIO_TX_B3P/DQ1BAD26

DQ1BAF28

DIFFIO_TX_B8N/CS#_3A_1AL29DIFFIO_TX_B8P/DQ2B/CS#_3A_0AM29

DIFFIO_TX_B10N/ODT_3A_1AE29DIFFIO_TX_B10P/DQ2B/ODT_3A_0AF29

DIFFIO_TX_B12N/RAS#_3AAL28DIFFIO_TX_B12P/DQ2B/BA_3A_2AM28

DIFFIO_TX_B14N/A_3A_15AG29DIFFIO_TX_B14P/DQ2B/A_3A_14AH29

DIFFIO_TX_B16N/A_3A_11AG26DIFFIO_TX_B16P/DQ3B/A_3A_10AH26

DIFFIO_TX_B18N/A_3A_7AD29DIFFIO_TX_B18P/DQ3B/A_3A_6AE28

DIFFIO_TX_B20N/A_3A_3AN27DIFFIO_TX_B20P/DQ3B/A_3A_2AN26

DIFFIO_TX_B22N/CKE_3A_1AE26DIFFIO_TX_B22P/DQ3B/CKE_3A_0AF26

DIFFIO_TX_B24N/RESET#_3AAE23DIFFIO_TX_B24P/DQ4B/DQ1_3B_8AE24

DIFFIO_TX_B26NAA25DIFFIO_TX_B26P/DQ4B/DM1_3BAB25

DIFFIO_TX_B28NAF25DIFFIO_TX_B28P/DQ4B/DQ1_3B_5AG24

DQ4B/DQ1_3B_2AB24

DIFFIO_TX_B31NAK23DIFFIO_TX_B31P/DQ5B/DQ2_3B_8AL24

DIFFIO_TX_B33NAC23DIFFIO_TX_B33P/DQ5B/DM2_3BAD23

DIFFIO_TX_B35NAL23DIFFIO_TX_B35P/DQ5B/DQ2_3B_5AM23

DIFFIO_TX_B37NAA23DIFFIO_TX_B37P/DQ5B/DQ2_3B_2AB23

DIFFIO_TX_B39NAE21DIFFIO_TX_B39P/DQ6B/DQ3_3C_8AE22

DIFFIO_TX_B41NAB22DIFFIO_TX_B41P/DQ6B/DM3_3CAC22

DIFFIO_TX_B43NAF22DIFFIO_TX_B43P/DQ6B/DQ3_3C_5AG21

DIFFIO_TX_B45NAA21DIFFIO_TX_B45P/DQ6B/DQ3_3C_2AB21

DIFFIO_TX_B47NAC21DIFFIO_TX_B47P/DQ7B/DQ4_3C_8AD21

DIFFIO_TX_B49NAA20DIFFIO_TX_B49P/DQ7B/DM4_3CAB20

DIFFIO_TX_B51NAJ20DIFFIO_TX_B51P/DQ7B/DQ4_3C_5AK20

DQ7B/DQ4_3C_2AD20

DIFFIO_TX_B70NAH19DIFFIO_TX_B70P/DQ8BAJ19

DIFFIO_TX_B72NAB19DIFFIO_TX_B72P/DQ8BAC19

DIFFIO_TX_B74NAE19DIFFIO_TX_B74P/DQ8BAF19

DQ8BAA18

DIFFIO_TX_B77NAN17DIFFIO_TX_B77P/DQ9BAP17

DIFFIO_TX_B81NAL17DIFFIO_TX_B81P/DQ9BAM17

DIFFIO_TX_B83NAC17DIFFIO_TX_B83P/DQ9BAC18

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Arria V GX Bank 4 HSMC Port Interface

2.5V

2.5V

2.5V

2.5V

Ethernet PHY Interface


HDMI Interface

HSMA_CLK_OUT0 HSMA_TX_D_P4HSMA_TX_D_N4HSMA_TX_D_P5HSMA_TX_D_N5HSMA_TX_D_P6HSMA_TX_D_N6

HSMA_CLK_OUT_P1HSMA_CLK_OUT_N1

HSMA_D0HSMA_D1

HSMA_D2

HSMA_D3

HSMA_RX_D_P0HSMA_RX_D_N0


HSMA_SCLHSMA_SDA

HSMA_TX_D_P0HSMA_TX_D_N0


HSMA_TX_D_P2


HSMA_TX_D_N2



ENET_RX_PENET_RX_N

ENET_TX_PENET_TX_N

ENET_RESETn

ENET_MDIOENET_MDC

ENET_INTn

USB_ADDR1

USB_ADDR0

USB_DATA0USB_DATA1

USB_DATA2

USB_DATA3USB_DATA4

USB_DATA5USB_DATA6

USB_DATA7

USB_CLK

USB_EMPTYUSB_FULL

USB_OEn

FX2_RESETn HDMI_FPGA_HPD

HDMI_FPGA_SDA_DDCHDMI_FPGA_SCL_DDC

HDMI_FPGA_OE_N

HSMA_RX_D_N2HSMA_RX_D_P2




ENET_RX_D0

ENET_RX_D2ENET_RX_D3ENET_RX_D1

ENET_TX_D0ENET_TX_D1

ENET_TX_D2

ENET_TX_D3

ENET_GTX_CLK

ENET_RX_DV

ENET_TX_EN

ENET_MDIO23

ENET_RX_P 23

ENET_TX_P 23

ENET_TX_N23

ENET_RX_N 23

ENET_RESETn 23

ENET_MDC 23

HSMA_CLK_OUT0 22

HSMA_TX_D_P[6:0]22

HSMA_RX_D_P[7:0]22

HSMA_D[3:0]22

USB_CLK19,24

USB_OEn24

ENET_INTn23

HSMA_CLK_OUT_P1 22

HSMA_CLK_OUT_N1 22

HSMA_SCL 22

HSMA_SDA 22

HSMA_TX_D_N[6:0]22

HSMA_RX_D_N[7:0]22

USB_ADDR[1:0]24

USB_DATA[7:0]24

USB_FULL24

USB_EMPTY 24

FX2_RESETn24

HDMI_FPGA_HPD20

HDMI_FPGA_SCL_DDC20

HDMI_FPGA_SDA_DDC20

HDMI_FPGA_OE_N20

ENET_RX_D[3:0]23

ENET_TX_D[3:0]23

ENET_RX_DV 23

ENET_GTX_CLK 23

ENET_TX_EN 23

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Arria V GX Bottom IO Bank 4

Bank 4A

Bank 4B

Bank 4C

Bank 4D


U1D

DIFFIO_RX_B124N/DQ14B/DQ3_4B_7AM11 DIFFIO_RX_B124P/DQ14B/DQ3_4B_6AN11

DIFFIO_RX_B126N/DQSN14B/CQN14B/DQS#3_4BAP10 DIFFIO_RX_B126P/DQS14B/CQ14B/DQS3_4BAP11

DIFFIO_RX_B128N/DQ14B/DQ3_4B_4AH10 DIFFIO_RX_B128P/DQ14B/DQ3_4B_3AJ10

DIFFIO_RX_B130N/DQ14B/DQ3_4B_1AN9 DIFFIO_RX_B130P/DQ14B/DQ3_4B_0AN8

DIFFIO_RX_B132N/DQ15B/DQ4_4B_7AG9 DIFFIO_RX_B132P/DQ15B/DQ4_4B_6AH9

DIFFIO_RX_B134N/DQSN15B/CQN15B/DQS#4_4BAL8 DIFFIO_RX_B134P/DQS15B/CQ15B/DQS4_4BAM8

DIFFIO_RX_B136N/DQ15B/DQ4_4B_4AJ8 DIFFIO_RX_B136P/DQ15B/DQ4_4B_3AK8

DIFFIO_RX_B137N/DQ15B/DQ4_4B_1AG8 DIFFIO_RX_B137P/DQ15B/DQ4_4B_0AH8

DIFFIO_RX_B109N/DQ12B/DQ1_4C_7AN14 DIFFIO_RX_B109P/DQ12B/DQ1_4C_6AP14

DIFFIO_RX_B111N/DQSN12B/CQN12B/DQS#1_4CAL13 DIFFIO_RX_B111P/DQS12B/CQ12B/DQS1_4CAM13

DIFFIO_RX_B113N/DQ12B/DQ1_4C_4AK12 DIFFIO_RX_B113P/DQ12B/DQ1_4C_3AL12

DIFFIO_RX_B114N/DQ12B/DQ1_4C_1AH13 DIFFIO_RX_B114P/DQ12B/DQ1_4C_0AJ13

DIFFIO_RX_B116N/DQ13B/DQ2_4C_7AG12 DIFFIO_RX_B116P/DQ13B/DQ2_4C_6AH12

DIFFIO_RX_B118N/DQSN13B/CQN13B/DQS#2_4CAE13 DIFFIO_RX_B118P/DQS13B/CQ13B/DQS2_4CAF13

DIFFIO_RX_B120N/DQ13B/DQ2_4C_4AD12 DIFFIO_RX_B120P/DQ13B/DQ2_4C_3AE12

DIFFIO_RX_B122N/DQ13B/DQ2_4C_1AF11 DIFFIO_RX_B122P/DQ13B/DQ2_4C_0AG11

DIFFIO_RX_B94N/DQ10BAH16 DIFFIO_RX_B94P/DQ10BAJ16

DIFFIO_RX_B96N/DQSN10B/CQN10B/WE#_4DY15 DIFFIO_RX_B96P/DQS10B/CQ10B/CAS#_4D

AA15

DIFFIO_RX_B98N/DQ10B/BA_4D_1AL16 DIFFIO_RX_B98P/DQ10B/BA_4D_0AM16

DIFFIO_RX_B99N/DQ10B/A_4D_13AL14 DIFFIO_RX_B99P/DQ10B/A_4D_12AM14

DIFFIO_RX_B101N/DQ11B/A_4D_9AK15 DIFFIO_RX_B101P/DQ11B/A_4D_8AL15

DIFFIO_RX_B103N/DQSN11B/CQN11B/A_4D_5AG15 DIFFIO_RX_B103P/DQS11B/CQ11B/A_4D_4AH15

DIFFIO_RX_B105N/DQ11B/A_4D_1AE14 DIFFIO_RX_B105P/DQ11B/A_4D_0AF14

DIFFIO_RX_B107N/DQ11B/CK#_4DAC14 DIFFIO_RX_B107P/DQ11B/CK_4DAD14

DQ16BAL6

DIFFIO_TX_B163NAH6DIFFIO_TX_B163P/DQ17BAJ6

DIFFIO_TX_B165NAC7DIFFIO_TX_B165P/DQ17BAC6

DIFFIO_TX_B167NAM3DIFFIO_TX_B167P/DQ17B/RZQ_1AM4

DIFFIO_TX_B123NAD9DIFFIO_TX_B123P/DQ14B/DQ3_4B_8AE9

DIFFIO_TX_B125NAL10DIFFIO_TX_B125P/DQ14B/DM3_4BAM10

DIFFIO_TX_B127NAA10DIFFIO_TX_B127P/DQ14B/DQ3_4B_5AB10

DIFFIO_TX_B129NAK9DIFFIO_TX_B129P/DQ14B/DQ3_4B_2AL9

DIFFIO_TX_B131NAC9DIFFIO_TX_B131P/DQ15B/DQ4_4B_8AC10

DIFFIO_TX_B133NAE10DIFFIO_TX_B133P/DQ15B/DM4_4BAF10

DIFFIO_TX_B135NAC8DIFFIO_TX_B135P/DQ15B/DQ4_4B_5AD8

DQ15B/DQ4_4B_2AF8

DIFFIO_TX_B108N/RESET#_4DAB13DIFFIO_TX_B108P/DQ12B/DQ1_4C_8AC13

DIFFIO_TX_B110NAN12DIFFIO_TX_B110P/DQ12B/DM1_4CAP13

DIFFIO_TX_B112NY11DIFFIO_TX_B112P/DQ12B/DQ1_4C_5AA12

DQ12B/DQ1_4C_2AL11

DIFFIO_TX_B115NAB11DIFFIO_TX_B115P/DQ13B/DQ2_4C_8AB12

DIFFIO_TX_B117NAH11DIFFIO_TX_B117P/DQ13B/DM2_4CAJ11

DIFFIO_TX_B119NAC11DIFFIO_TX_B119P/DQ13B/DQ2_4C_5AC12

DIFFIO_TX_B121NAD11DIFFIO_TX_B121P/DQ13B/DQ2_4C_2AE11

DIFFIO_TX_B93N/CS#_4D_1AP16DIFFIO_TX_B93P/DQ10B/CS#_4D_0AN15

DIFFIO_TX_B95N/ODT_4D_1AE16DIFFIO_TX_B95P/DQ10B/ODT_4D_0AF16

DIFFIO_TX_B97N/RAS#_4DAB16DIFFIO_TX_B97P/DQ10B/BA_4D_2AC16

DQ10B/A_4D_14AK14

DIFFIO_TX_B100N/A_4D_11AA14DIFFIO_TX_B100P/DQ11B/A_4D_10AB15

DIFFIO_TX_B102N/A_4D_7AG14DIFFIO_TX_B102P/DQ11B/A_4D_6AH14

DIFFIO_TX_B104N/A_4D_3AD15DIFFIO_TX_B104P/DQ11B/A_4D_2AE15

DIFFIO_TX_B106N/CKE_4D_1AB14DIFFIO_TX_B106P/DQ11B/CKE_4D_0AC15

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Arria V GX Bank 7

2.5V

HSMC PORT Interface

MAX V System Controller Interface

LED Interface

PCIe Edge Connector Interface

DIP Switch Interface

Push Button Switch Interface

2.5V

2.5V

2.5V

Fan Interface


MAX5_BEn0MAX5_BEn1

MAX5_BEn2MAX5_BEn3

MAX5_CLK

MAX5_CSn

MAX5_OEnMAX5_WEn

PCIE_LED_X4

PCIE_LED_X8

PCIE_SMBDAT

PCIE_SMBCLK

PCIE_WAKEnUSER_DIPSW0

USER_DIPSW1USER_DIPSW2

USER_DIPSW3

USER_LED0

USER_LED1

USER_LED2

USER_LED3

USER_PB0USER_PB1

USER_PB2

OVERTEMP_FPGA

HSMA_RX_LEDHSMA_TX_LED

HSMA_PRSNTnHSMA_RX_D_P16HSMA_RX_D_N16HSMA_RX_D_P15HSMA_RX_D_N15
















INT_TSD_SDA

INT_TSD_SCL

HSMA_RX_D_P[16:8]22

HSMA_TX_D_P[16:8]13,22

HSMA_CLK_OUT_P222

HSMA_CLK_OUT_N222

HSMA_TX_D_N[16:8]13,22

HSMA_RX_D_N[16:8]22

MAX5_BEn[3:0]19

MAX5_CLK19

MAX5_CSn19

MAX5_OEn19

MAX5_WEn19

PCIE_SMBCLK6

PCIE_SMBDAT6

PCIE_LED_X425

PCIE_LED_X825

PCIE_WAKEn6

USER_DIPSW[3:0]25

USER_LED[3:0]25

USER_PB[2:0]25

OVERTEMP_FPGA31

HSMA_RX_LED25

HSMA_TX_LED25

HSMA_PRSNTn19,22,25

INT_TSD_SCL19

INT_TSD_SDA19

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Arria V GX Top IO Bank 7

Bank 7A

Bank 7B

Bank 7C

Bank 7D


U1E

DIFFIO_RX_T32P/DQ3T/DQ4_7B_0K9

DIFFIO_RX_T32N/DQ3T/DQ4_7B_1K8

DIFFIO_RX_T33P/DQ3T/DQ4_7B_3C8

DIFFIO_RX_T33N/DQ3T/DQ4_7B_4D7

DIFFIO_RX_T35P/DQS3T/CQ3T/DQS4_7BN10

DIFFIO_RX_T35N/DQSN3T/CQN3T/DQS#4_7BN11

DIFFIO_RX_T37P/DQ3T/DQ4_7B_6H8

DIFFIO_RX_T37N/DQ3T/DQ4_7B_7J8

DIFFIO_RX_T39P/DQ4T/DQ3_7B_0B6

DIFFIO_RX_T39N/DQ4T/DQ3_7B_1C7

DIFFIO_RX_T41P/DQ4T/DQ3_7B_3A7

DIFFIO_RX_T41N/DQ4T/DQ3_7B_4A6

DIFFIO_RX_T43P/DQS4T/CQ4T/DQS3_7BD8

DIFFIO_RX_T43N/DQSN4T/CQN4T/DQS#3_7BD9


DIFFIO_RX_T45N/DQ4T/DQ3_7B_7B9

DIFFIO_RX_T47P/DQ5T/DQ2_7C_0F10

DIFFIO_RX_T47N/DQ5T/DQ2_7C_1G10

DIFFIO_RX_T49P/DQ5T/DQ2_7C_3G11

DIFFIO_RX_T49N/DQ5T/DQ2_7C_4H11

DIFFIO_RX_T51P/DQS5T/CQ5T/DQS2_7CE11

DIFFIO_RX_T51N/DQSN5T/CQN5T/DQS#2_7CF11

DIFFIO_RX_T53P/DQ5T/DQ2_7C_6G12

DIFFIO_RX_T53N/DQ5T/DQ2_7C_7H12

DIFFIO_RX_T55P/DQ6T/DQ1_7C_0A11

DIFFIO_RX_T55N/DQ6T/DQ1_7C_1B11

DIFFIO_RX_T56P/DQ6T/DQ1_7C_3C11

DIFFIO_RX_T56N/DQ6T/DQ1_7C_4D11

DIFFIO_RX_T58P/DQS6T/CQ6T/DQS1_7CA13

DIFFIO_RX_T58N/DQSN6T/CQN6T/DQS#1_7CB12



DIFFIO_RX_T62P/DQ7T/CK_7DH14

DIFFIO_RX_T62N/DQ7T/CK#_7DJ14

DIFFIO_RX_T64P/DQ7T/A_7D_0F14

DIFFIO_RX_T64N/DQ7T/A_7D_1G14

DIFFIO_RX_T66P/DQS7T/CQ7T/A_7D_4G15

DIFFIO_RX_T66N/DQSN7T/CQN7T/A_7D_5H15

DIFFIO_RX_T68P/DQ7T/A_7D_8D14

DIFFIO_RX_T68N/DQ7T/A_7D_9E14

DIFFIO_RX_T70P/DQ8T/A_7D_12B14

DIFFIO_RX_T70N/DQ8T/A_7D_13C14

DIFFIO_RX_T71P/DQ8T/BA_7D_0A14

DIFFIO_RX_T71N/DQ8T/BA_7D_1B15

DIFFIO_RX_T73p/DQS8T/CQ8T/CAS#_7DF16

DIFFIO_RX_T73N/DQ8T/WE#_7DG16

DIFFIO_RX_T75P/DQ8TC16

DIFFIO_RX_T75N/DQ8TD16

DIFFIO_TX_T2P/DQ1T/RZQ_5E1

DIFFIO_TX_T2NF1

DIFFIO_TX_T4P/DQ1TG6

DIFFIO_TX_T4NH6

DIFFIO_TX_T6P/DQ1TE5

DIFFIO_TX_T6NF6

DQ2TL6

DQ3T/DQ4_7B_2M10

DIFFIO_TX_T34P/DQ3T/DQ4_7B_5E8

DIFFIO_TX_T34NF7

DIFFIO_TX_T36P/DQ3T/DM4_7BG8

DIFFIO_TX_T36NG7

DIFFIO_TX_T38P/DQ3T/DQ4_7B_8L9

DIFFIO_TX_T38NM8

DIFFIO_TX_T40P/DQ4T/DQ3_7B_2E9

DIFFIO_TX_T40NF8

DIFFIO_TX_T42P/DQ4T/DQ3_7B_5G9

DIFFIO_TX_T42NH9

DIFFIO_TX_T44P/DQ4T/DM3_7BA8

DIFFIO_TX_T44NB8

DIFFIO_TX_T46P/DQ4T/DQ3_7B_8J10

DIFFIO_TX_T46NK10

DIFFIO_TX_T48P/DQ5T/DQ2_7C_2J11

DIFFIO_TX_T48NK11

DIFFIO_TX_T50P/DQ5T/DQ2_7C_5K12

DIFFIO_TX_T50NL11

DIFFIO_TX_T52P/DQ5T/DM2_7CC10

DIFFIO_TX_T52ND10

DIFFIO_TX_T54P/DQ5T/DQ2_7C_8L12

DIFFIO_TX_T54NM12

DQ6T/DQ1_7C_2N13


DIFFIO_TX_T57NK13

DIFFIO_TX_T59P/DQ6T/DM1_7CD12

DIFFIO_TX_T59NE12

DIFFIO_TX_T61P/DQ6T/DQ1_7C_8M11

DIFFIO_TX_T61N/RESET#_7DN12

DIFFIO_TX_T63P/DQ7T/CKE_7D_0K14

DIFFIO_TX_T63N/CKE_7D_1L14

DIFFIO_TX_T65P/DQ7T/A_7D_2M14

DIFFIO_TX_T65N/A_7D_3M15

DIFFIO_TX_T67P/DQ7T/A_7D_6C13

DIFFIO_TX_T67N/A_7D_7D13

DIFFIO_TX_T69P/DQ7T/A_7D_10K15

DIFFIO_TX_T69N/A_7D_11L15

DQ8T/A_7D_14N15

DIFFIO_TX_T72P/DQ8T/BA_7D_2D15

DIFFIO_TX_T72N/RAS#_7DE15

DIFFIO_TX_T74P/DQ8T/ODT_7D_0J16

DIFFIO_TX_T74N/ODT_7D_1K16

DIFFIO_TX_T76P/DQ8T/CS#_7D_0M16

DIFFIO_TX_T76N/CS#_7D_1N16

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Arria V GX Bank 8

DDR3 X32 SDRAM INTERFACE

1.5V

1.5V

1.5V

2.5V

2x16 LCD DISPLAY INTERFACE

DDR3_CKE

DDR3_A2DDR3_A3DDR3_A6DDR3_A7DDR3_A10DDR3_A11

DDR3_BA2DDR3_RASnDDR3_ODT

DDR3_CSn

DDR3_OCT_RZQ

DDR3_CLK_PDDR3_CLK_NDDR3_A0DDR3_A1DDR3_A4DDR3_A5DDR3_A8DDR3_A9DDR3_A12DDR3_A13DDR3_BA0DDR3_BA1DDR3_CASnDDR3_WEn

DDR3_DQ8DDR3_DQ9DDR3_DQ11DDR3_DQ12DDR3_DQS_P1DDR3_DQS_N1DDR3_DQ14DDR3_DQ15DDR3_DQ0DDR3_DQ1DDR3_DQ3DDR3_DQ4DDR3_DQS_P0DDR3_DQS_N0DDR3_DQ6DDR3_DQ7

DDR3_DQ2

DDR3_DQ5

DDR3_DQ10

DDR3_DQ13

DDR3_RESETn

DDR3_DM1

DDR3_DM0

DDR3_DQ24

DDR3_DQ27

DDR3_DQ22

DDR3_DQ29

DDR3_DQ28

DDR3_DQ23

DDR3_DQ19

DDR3_DQS_P3

DDR3_DQ16

DDR3_DQ20

DDR3_DQS_N3

DDR3_DQ17

DDR3_DQ30

DDR3_DQS_P2

DDR3_DQ31DDR3_DQ21

DDR3_DQS_N2

DDR3_DM3DDR3_DQ25

DDR3_DQ26

DDR3_DQ18

DDR3_DM2

LCD_DATA0

LCD_DATA1LCD_DATA2

LCD_DATA3LCD_DATA4

LCD_DATA6LCD_DATA7

LCD_DATA5

LCD_CSn

LCD_D_Cn

LCD_WEn

DDR3_DQ[31:0]16

DDR3_A[13:0]16

DDR3_BA[2:0]16

DDR3_DM[3:0]16

DDR3_DQS_P[3:0]16

DDR3_DQS_N[3:0]16

DDR3_CLK_P16

DDR3_CLK_N16

DDR3_CKE 16

DDR3_CSn 16

DDR3_RASn16

DDR3_CASn16

DDR3_WEn16

DDR3_RESETn16

DDR3_ODT16

LCD_DATA[7:0]25

LCD_CSn25

LCD_D_Cn25

LCD_WEn25

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




R4 100

1%

Arria V GX Top IO Bank 8

Bank 8A

Bank 8B

Bank 8C

Bank 8D

Version 2.0 Pin-out5AGXFB3H4F35

U1F

DIFFIO_RX_T146P/DQ15T/CK_8AE26

DIFFIO_RX_T146N/DQ15T/CK#_8AF26

DIFFIO_RX_T148P/DQ15T/A_8A_0D26

DIFFIO_RX_T148N/DQ15T/A_8A_1E27

DIFFIO_RX_T150P/DQS15T/CQ15T/A_8A_4G26

DIFFIO_RX_T150N/DQSN15T/CQN15T/A_8A_5H26

DIFFIO_RX_T152P/DQ15T/A_8A_8D27

DIFFIO_RX_T152N/DQ15T/A_8A_9C28

DIFFIO_RX_T154P/DQ16T/A_8A_12G27

DIFFIO_RX_T154N/DQ16T/A_8A_13G28

DIFFIO_RX_T156P/DQ16T/BA_8A_0A29

DIFFIO_RX_T156N/DQ16T/BA_8A_1A28

DIFFIO_RX_T158P/DQS16T/CQ16T/CAS#_8AF28

DIFFIO_RX_T158N/DQSN16T/CQN16T/WE#_8AF29

DIFFIO_RX_T131P/DQ13T/DQ2_8B_0H23

DIFFIO_RX_T131N/DQ13T/DQ2_8B_1J23



DIFFIO_RX_T135P/DQS13T/CQ13T/DQS2_8BF23

DIFFIO_RX_T135N/DQSN13T/CQN13T/DQS#2_8BG23

DIFFIO_RX_T137P/DQ13T/DQ2_8B_6D24

DIFFIO_RX_T137N/DQ13T/DQ2_8B_7E24

DIFFIO_RX_T139P/DQ14T/DQ1_8B_0G24

DIFFIO_RX_T139N/DQ14T/DQ1_8B_1H24


DIFFIO_RX_T140N/DQ14T/DQ1_8B_4A25

DIFFIO_RX_T142P/DQS14T/CQ14T/DQS1_8BF25

DIFFIO_RX_T142N/DQSN14T/CQN14T/DQS#1_8BG25



DIFFIO_RX_T116P/DQ11T/DQ4_8C_0K20

DIFFIO_RX_T116N/DQ11T/DQ4_8C_1L20



DIFFIO_RX_T119P/DQS11T/CQ11T/DQS4_8CD20

DIFFIO_RX_T119N/DQSN11T/CQN11T/DQS#4_8CE20



DIFFIO_RX_T123P/DQ12T/DQ3_8C_0D21

DIFFIO_RX_T123N/DQ12T/DQ3_8C_1E21

DIFFIO_RX_T125P/DQ12T/DQ3_8C_3C22

DIFFIO_RX_T125N/DQ12T/DQ3_8C_4D22

DIFFIO_RX_T127P/DQS12T/CQ12T/DQS3_8CF22

DIFFIO_RX_T127N/DQSN12T/CQN12T/DQS#3_8CG22



DIFFIO_RX_T94P/DQ10TC19

DIFFIO_RX_T94N/DQ10TB18

DIFFIO_RX_T96P/DQS10T/CQ10TH18

DIFFIO_RX_T96N/DQSN10T/CQN10TJ19

DIFFIO_RX_T98P/DQ10TD19

DIFFIO_RX_T98N/DQ10TD18

DIFFIO_TX_T147P/DQ15T/CKE_8A_0K29

DIFFIO_TX_T147N/CKE_8A_1L29

DIFFIO_TX_T149P/DQ15T/A_8A_2A27

DIFFIO_TX_T149N/A_8A_3B27

DIFFIO_TX_T151P/DQ15T/A_8A_6K27

DIFFIO_TX_T151N/A_8A_7L27

DIFFIO_TX_T153P/DQ15T/A_8A_10C29

DIFFIO_TX_T153N/A_8A_11D28

DIFFIO_TX_T155P/DQ16T/A_8A_14J26

DIFFIO_TX_T155N/A_8A_15K26

DIFFIO_TX_T157P/DQ16T/BA_8A_2B29

DIFFIO_TX_T157N/RAS#_8AB30

DIFFIO_TX_T159P/DQ16T/ODT_8A_0H27

DIFFIO_TX_T159N/ODT_8A_1J27

DIFFIO_TX_T161P/DQ16T/CS#_8A_0D30

DIFFIO_TX_T161N/CS#_8A_1E30

DQ17TL26

DIFFIO_TX_T166P/DQ17TJ28

DIFFIO_TX_T166NK28

DIFFIO_TX_T168P/DQ17TD32

DIFFIO_TX_T168N/RZQ_6E32

DIFFIO_TX_T132P/DQ13T/DQ2_8B_2K24

DIFFIO_TX_T132NL24

DIFFIO_TX_T134P/DQ13T/DQ2_8B_5D23

DIFFIO_TX_T134NE23

DIFFIO_TX_T136P/DQ13T/DM2_8BM23

DIFFIO_TX_T136NN23

DIFFIO_TX_T138P/DQ13T/DQ2_8B_8K23

DIFFIO_TX_T138NL23

DQ14T/DQ1_8B_2M24

DIFFIO_TX_T141P/DQ14T/DQ1_8B_5C25

DIFFIO_TX_T141ND25

DIFFIO_TX_T143P/DQ14T/DM1_8BM25

DIFFIO_TX_T143NN25

DIFFIO_TX_T145P/DQ14T/DQ1_8B_8J25

DIFFIO_TX_T145N/RESET#_8AK25

DQ11T/DQ4_8C_2M20

DIFFIO_TX_T118P/DQ11T/DQ4_8C_5B20

DIFFIO_TX_T118NC20

DIFFIO_TX_T120P/DQ11T/DM4_8CK21

DIFFIO_TX_T120NL21

DIFFIO_TX_T122P/DQ11T/DQ4_8C_8H20

DIFFIO_TX_T122NJ20

DIFFIO_TX_T124P/DQ12T/DQ3_8C_2M21

DIFFIO_TX_T124NN21

DIFFIO_TX_T126P/DQ12T/DQ3_8C_5G21

DIFFIO_TX_T126NH21

DIFFIO_TX_T128P/DQ12T/DM3_8CM22

DIFFIO_TX_T128NN22


DIFFIO_TX_T130NK22

DIFFIO_TX_T86P/DQ9TK17

DIFFIO_TX_T86NL17

DIFFIO_TX_T88P/DQ9TD17

DIFFIO_TX_T88NE17

DIFFIO_TX_T92P/DQ9TB17

DIFFIO_TX_T92NC17

DQ10TM18 DIFFIO_TX_T95P/DQ10T

G18

DIFFIO_TX_T95NG19

DIFFIO_TX_T97P/DQ10TM19

DIFFIO_TX_T97NN19

DIFFIO_TX_T99P/DQ10TE18

DIFFIO_TX_T99NF19

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Arria V GX Transceivers Banks

PCIe Connector Interface

CMU PLL (PCIe Gen2)

CAD Note:Place resistor near GXB_RX pins

Design Note:Tie unused refclk/rx pin toGND through 10K resistor

SDI Cable Driver/Equalizer Interface

SMA Connector Interface

PLL Interface HSMA Connector Interface


CAD Note:Place resistor near RREF_TL pins

CAD Note:Place resistor near RREF_BR pins


HDMI Level Shifter Interface

From CH0 Si5338A

From CH1 Si5338A From CH2 Si5338A

From CH0 Si5338A

CAD Note:Place resistors & capacitorsnear SMA connectors

From HSMA connector100MHz

PCIE_RX_P0

PCIE_REFCLK_PPCIE_REFCLK_N

PCIE_RX_N0

PCIE_RX_N1PCIE_RX_P1




PCIE_TX_P0PCIE_TX_N0




PCIE_TX_P1PCIE_TX_N1PCIE_TX_P2PCIE_TX_N2PCIE_TX_P3PCIE_TX_N3

SDI_TX_PSDI_TX_N

SDI_RX_PSDI_RX_N

SMA_XCVR_RX_CPSMA_XCVR_RX_CN

SMA_XCVR_TX_RPSMA_XCVR_TX_RN

UNUSED_XCVR_RX_L0

SMA_XCVR_RX_P

SMA_XCVR_RX_N

SMA_XCVR_TX_P

SMA_XCVR_TX_N

HSMA_RX_P7HSMA_RX_N7HSMA_RX_P6HSMA_RX_N6

HSMA_RX_P5HSMA_RX_N5HSMA_RX_P4HSMA_RX_N4HSMA_RX_P3HSMA_RX_N3HSMA_RX_P2HSMA_RX_N2HSMA_RX_P1HSMA_RX_N1HSMA_RX_P0HSMA_RX_N0 HSMA_TX_N0

HSMA_TX_P0HSMA_TX_N1HSMA_TX_P1

HSMA_TX_P2HSMA_TX_N2






UNUSED_XCVR_RX_L1

XCVR_RREF_TL XCVR_RREF_BR

UNUSED_XCVR_RX_R0 HDMI_TX_P0HDMI_TX_N0HDMI_TX_P1HDMI_TX_N1HDMI_TX_P2HDMI_TX_N2HDMI_TX_CLK_PHDMI_TX_CLK_N

REFCLK2_QR1_PREFCLK2_QR1_N

REFCLK2_QL1_PREFCLK2_QL1_N

REFCLK1_QL0_PREFCLK1_QL0_N

REFCLK1_QR0_PREFCLK1_QR0_N

CLK_148_PCLK_148_N

REFCLK3_QR1_P

SMA_XCVR_RX_CP

SMA_XCVR_RX_CN

SMA_XCVR_TX_RP

SMA_XCVR_TX_RN

PCIE_TX_P6PCIE_TX_N6PCIE_TX_P7PCIE_TX_N7



UNUSED_XCVR_REFCLK_R0

REFCLK3_QR1_N

PCIE_RX_P[7:0]6

PCIE_TX_P[7:0]6

PCIE_RX_N[7:0]6

PCIE_TX_N[7:0]6

PCIE_REFCLK_P6

PCIE_REFCLK_N6

SDI_RX_P21

SDI_RX_N21

SDI_TX_P21

SDI_TX_N21

HSMA_RX_P[7:0]22

HSMA_RX_N[7:0]22

HSMA_TX_P[7:0]22

HSMA_TX_N[7:0]22

HDMI_TX_P[2:0]20

HDMI_TX_N[2:0]20

HDMI_TX_CLK_P20

HDMI_TX_CLK_N20

REFCLK1_QL0_P14

REFCLK1_QL0_N14

REFCLK1_QR0_P14

REFCLK1_QR0_N14

REFCLK2_QL1_P14

REFCLK2_QL1_N14

REFCLK2_QR1_P 14

REFCLK2_QR1_N14

CLK_148_P14

CLK_148_N14

REFCLK3_QR1_P22

REFCLK3_QR1_N22

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




J21

2 3 4 5

R6

0

C422 0.1uF J31

2 3 4 5

Arria V GX Transceiver Left Bank

Bank L0

Bank L1

Version 2.0 Pin Out

Reference Resistor

5AGXFB3H4F35

U1G

GXB_RX_L0P,GXB_REFCLK_L0PAK34

GXB_RX_L0N,GXB_REFCLK_L0NAK33

GXB_RX_L1P,GXB_REFCLK_L1PAH34

GXB_RX_L1N,GXB_REFCLK_L1NAH33

GXB_RX_L2P,GXB_REFCLK_L2PAF34

GXB_RX_L2N,GXB_REFCLK_L2NAF33

GXB_RX_L3P,GXB_REFCLK_L3PAD34

GXB_RX_L3N,GXB_REFCLK_L3NAD33

GXB_RX_L4P,GXB_REFCLK_L4PAB34

GXB_RX_L4N,GXB_REFCLK_L4NAB33

GXB_RX_L5P,GXB_REFCLK_L5PY34

GXB_RX_L5N,GXB_REFCLK_L5NY33

REFCLK0LNAA28 REFCLK0LPAA27

REFCLK1LNW27 REFCLK1LPW26

GXB_RX_L6P,GXB_REFCLK_L6PV34

GXB_RX_L6N,GXB_REFCLK_L6NV33

GXB_RX_L7P,GXB_REFCLK_L7PT34

GXB_RX_L7N,GXB_REFCLK_L7NT33

GXB_RX_L8P,GXB_REFCLK_L8PP34

GXB_RX_L8N,GXB_REFCLK_L8NP33

GXB_RX_L9P,GXB_REFCLK_L9PM34

GXB_RX_L9N,GXB_REFCLK_L9NM33

GXB_RX_L10P,GXB_REFCLK_L10PK34

GXB_RX_L10N,GXB_REFCLK_L10NK33

GXB_RX_L11P,GXB_REFCLK_L11PH34

GXB_RX_L11N,GXB_REFCLK_L11NH33

REFCLK2LNU27 REFCLK2LPU26

REFCLK3LNR27 REFCLK3LPR26

GXB_TX_L0NAJ31GXB_TX_L0PAJ32

GXB_TX_L1NAG31GXB_TX_L1PAG32

GXB_TX_L2NAE31GXB_TX_L2PAE32

GXB_TX_L3NAC31GXB_TX_L3PAC32

GXB_TX_L4NAA31GXB_TX_L4PAA32

GXB_TX_L5NW31GXB_TX_L5PW32

GXB_TX_L6NU31GXB_TX_L6PU32

GXB_TX_L7NR31GXB_TX_L7PR32

GXB_TX_L8NN31GXB_TX_L8PN32

GXB_TX_L9NL31GXB_TX_L9PL32

GXB_TX_L10NJ31GXB_TX_L10PJ32

GXB_TX_L11NG31GXB_TX_L11PG32

RREF_TLF34

R5

0

J51

2 3 4 5

Arria V GX Transceiver Right Bank

Bank R0

Bank R1

Version 2.0 Pin Out

Reference Resistor

5AGXFB3H4F35

U1H

GXB_RX_R0N,GXB_REFCLK_R0NAK2 GXB_RX_R0P,GXB_REFCLK_R0PAK1

GXB_RX_R1N,GXB_REFCLK_R1NAH2 GXB_RX_R1P,GXB_REFCLK_R1PAH1

GXB_RX_R2N,GXB_REFCLK_R2NAF2 GXB_RX_R2P,GXB_REFCLK_R2PAF1

GXB_RX_R3N,GXB_REFCLK_R3NAD2 GXB_RX_R3P,GXB_REFCLK_R3PAD1

GXB_RX_R4N,GXB_REFCLK_R4NAB2 GXB_RX_R4P,GXB_REFCLK_R4PAB1

GXB_RX_R5N,GXB_REFCLK_R5NY2 GXB_RX_R5P,GXB_REFCLK_R5PY1

REFCLK0RPAA8

REFCLK0RNAA7

REFCLK1RPW9

REFCLK1RNW8

GXB_RX_R6N,GXB_REFCLK_R6NV2 GXB_RX_R6P,GXB_REFCLK_R6PV1

GXB_RX_R7N,GXB_REFCLK_R7NT2 GXB_RX_R7P,GXB_REFCLK_R7PT1

GXB_RX_R8N,GXB_REFCLK_R8NP2 GXB_RX_R8P,GXB_REFCLK_R8PP1

GXB_RX_R9N,GXB_REFCLK_R9NM2 GXB_RX_R9P,GXB_REFCLK_R9PM1

GXB_RX_R10N,GXB_REFCLK_R10NK2 GXB_RX_R10P,GXB_REFCLK_R10PK1

GXB_RX_R11N,GXB_REFCLK_R11NH2 GXB_RX_R11P,GXB_REFCLK_R11PH1

REFCLK2RPU9

REFCLK2RNU8

REFCLK3RPR9

REFCLK3RNR8

GXB_TX_R0PAJ3

GXB_TX_R0NAJ4

GXB_TX_R1PAG3

GXB_TX_R1NAG4

GXB_TX_R2PAE3

GXB_TX_R2NAE4

GXB_TX_R3PAC3

GXB_TX_R3NAC4

GXB_TX_R4PAA3

GXB_TX_R4NAA4

GXB_TX_R5PW3

GXB_TX_R5NW4

GXB_TX_R6PU3

GXB_TX_R6NU4

GXB_TX_R7PR3

GXB_TX_R7NR4

GXB_TX_R8PN3

GXB_TX_R8NN4

GXB_TX_R9PL3

GXB_TX_R9NL4

GXB_TX_R10PJ3

GXB_TX_R10NJ4

GXB_TX_R11PG3

GXB_TX_R11NG4

RREF_BRAM1R9 2.0K

1%

R10 2.0K

1%

J41

2 3 4 5

R293

0

R282 0

R7

0

C421 0.1uF

R283 0

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A


PCIe Edge Connector Interface

On-board USB Blaster II Interface MAX V System Controller Interface

Design Note:Optional termination resistorfor DCLK

CAD Note:Place near FPGA DCLK pin

Design Note:Remove pull up/pull down resistors and populate series resistors beforechanging the MSEL setting by editing MAX V system controllercode

Default Configuration Mode:- MSEL[4:0] = 00000- FPP x16 - Fast POR Delay- Decompression feature is disabled- Design Security feature is disabled

Push Button Interface

Warning!!Follow MSEL setting in datasheet strictlyto avoid undesirable behavior of FPGA

CAD Note:Overlap resistor pads

PCIE_PERSTn

FPGA_CONFIG_D0FPGA_CONFIG_D1FPGA_CONFIG_D2FPGA_CONFIG_D3

FPGA_CONFIG_D5FPGA_CONFIG_D6

FPGA_CONFIG_D4

FPGA_CONFIG_D7FPGA_CONFIG_D8FPGA_CONFIG_D9FPGA_CONFIG_D10FPGA_CONFIG_D11FPGA_CONFIG_D12FPGA_CONFIG_D13FPGA_CONFIG_D14FPGA_CONFIG_D15

FPGA_DCLK

FPGA_DCLK

MSEL0_RMSEL1_RMSEL2_RMSEL3_RMSEL4_R

CPU_RESETn

FPGA_CONF_DONE

FPGA_nSTATUS

MSEL1MSEL0

MSEL2MSEL3MSEL4

FPGA_nCONFIG

FPGA_PR_DONEFPGA_PR_REQUESTFPGA_PR_ERRORFPGA_PR_READY

FPGA_CvP_CONFDONE

2.5V_VCCIO_VCCPD_VCCPGM




PCIE_PERSTn6

JTAG_TCK15,19,22,24

JTAG_TMS 15,24

JTAG_BLASTER_TDO 15,24

JTAG_FPGA_TDO24

FPGA_CONFIG_D[15:0]19

FPGA_DCLK19

MSEL[4:0]19

CPU_RESETn19,25

FPGA_CONF_DONE19

FPGA_nSTATUS19

FPGA_nCONFIG19

FPGA_CvP_CONFDONE19

FPGA_PR_ERROR19

FPGA_PR_READY19

FPGA_PR_DONE19

FPGA_PR_REQUEST19

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B





Bank 3A

Do Not Use

Bank 4A

Bank 7A

Bank 8A


U1A

DCLKAM32

AS_DATA0,ASDO/DATA0AN34

AS_DATA1/DATA1AN33

AS_DATA2/DATA2AP33

AS_DATA3/DATA3AM33

NCSO/DATA4AM34

DATA5/DIFFIO_RX_B155N/DQ16BAL7

DATA6/DIFFIO_RX_B155P/DQ16BAM7

DATA7/DIFFIO_RX_B157N/DQSN16B/CQN16BAP6

DATA8/DIFFIO_RX_B157P/DQS16B/CQ16BAP5

DATA9/DIFFIO_RX_B159N/DQ16BAM5

DATA10/DIFFIO_TX_B154NAP8

DATA11/DIFFIO_TX_B154P/DQ16BAP7

DATA12/DIFFIO_TX_B156NAM6

DATA13/DIFFIO_TX_B156P/DQ16BAN6

DATA14/DIFFIO_TX_B158NAE7

DATA15/DIFFIO_TX_B158P/DQ16BAF7

DEV_OE/DIFFIO_RX_T10P/DQ2TC6

DEV_CLRN/DIFFIO_RX_T10N/DQ2TD5

CRC_ERROR/DIFFIO_RX_T12N/DQSN2T/CQN2TC4

INIT_DONE/DIFFIO_RX_T14P/DQ2TD6

NCEO/DIFFIO_RX_T14N/DQ2TE6

CONF_DONEC34

NSTATUSB34

NCEA33 NCONFIGC33

DNU_1E33

DNU_2F33

DNU_3AL32

DNU_4AD18

TCKAN32

TMSAF30

TDOAC28

TDIAC29

CLKUSR/DIFFIO_RX_B159P/DQ16BAN5

NPERSTL1/DIFFIO_TX_T11P/DQ2TA2

NPERSTL0/DIFFIO_TX_T11NB2

CVP_CONFDONE/DIFFIO_RX_T12P/DQS2T/CQ2TB5

PR_DONE/DIFFIO_TX_T13P/DQ1TA5

PR_REQUEST/DIFFIO_TX_T13NA4

PR_ERROR/DIFFIO_TX_T15P/DQ1TJ7

PR_READY/DIFFIO_TX_T15NK7

MSEL0D34

MSEL1H30

MSEL2K30

MSEL3M29

MSEL4M30

DNU_5AM2

DNU_6AN2

DNU_7K5

DNU_8L18

R296 0

R17 10K

R11

10K

R297 DNI

R25

DNI

R20 DNI

R298 0

R16 10K

R12

10K

R15 10K

R21 DNI

R299 DNI

C25 DNI

R18 DNI

R13

10K

R24 DNI

R300 0

R22 DNI

R294 0

R14

10K

R301 DNI

R19 DNI

R302 0

R295 DNI

R23 DNI

R303 DNI

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Arria V GX ClockPLL Interface

HSMC PORT Interface


LVDS Clock Input Termination CAD Note:Place near FPGA pins

LED INTERFACE

(2.5V)

(2.5V)

(2.5V)

(2.5V)

(2.5V)

(1.5V)

Ethernet PHY INTERFACE

CAD Note:Place near FPGA pinsand near to each other

SDI Interface

CLKINBOT_100_NCLKINBOT_100_P

HSMA_CLK_IN_N1HSMA_CLK_IN_P1HSMA_CLK_IN_N2HSMA_CLK_IN_P2

CLKINTOP_100_NCLKINTOP_100_P

USB_RESETn

USB_SDA

HSMA_CLK_IN0

HSMA_CLK_IN_P1HSMA_CLK_IN_N1

HSMA_TX_D_P7

HSMA_TX_D_N7


PCIE_LED_G2

PCIE_LED_X1

CLKINTOP_100_PCLKINTOP_100_N

CLKINBOT_100_PCLKINBOT_100_NCLK_125_PCLK_125_N

CLKIN_50_TOP

CLKIN_50_BOT

CLKINBOT_125_PCLKINBOT_125_N

CLKINBOT_125_NCLKINBOT_125_PCLKINTOP_125_NCLKINTOP_125_P

CLKINTOP_125_PCLKINTOP_125_N

CLKOUT_SMA

CLK_125_NCLK_125_P

HSMA_TX_D_P9

HSMA_TX_D_N9

ENET_RX_CLK

CLKOUT_SMA CLKOUT_SMA_R CLKOUT_SMA_CONN

SDI_SDASDI_SCL

SDI_FAULT

HSMA_CLK_IN022

USB_RESETn24

USB_SDA24

HSMA_CLK_IN_P[2:1]22

HSMA_CLK_IN_N[2:1]22

HSMA_TX_D_P7 22

HSMA_TX_D_N722

HSMA_TX_D_P9 22

HSMA_TX_D_N922

PCIE_LED_G225

PCIE_LED_X125

CLKINTOP_100_P14

CLKINTOP_100_N14

CLKINBOT_100_P14

CLKINBOT_100_N14

CLK_125_P14

CLK_125_N14

CLKIN_50_TOP14

CLKIN_50_BOT14

CLKINTOP_125_P14

CLKINTOP_125_N14

CLKINBOT_125_P14

CLKINBOT_125_N14

ENET_RX_CLK 23

SDI_SCL21

SDI_SDA21

SDI_FAULT 21

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




R28 100 1%

R27 100 1%

R314

DNI

J61

2 3 4 5

R29 100 1%R313 0

R26 100 1%

R315 0

R284 100 1%

R30 100 1%

Arria V GX Clock

Bank 3A

Bank 3D

Bank 4A

Bank 7A

Bank 8D

Bank 8A


U1B

CLK0N/DIFFIO_RX_B2N/DQ1BAP31 CLK0P/DIFFIO_RX_B2P/DQ1BAP32

CLK1N/DIFFIO_RX_B4N/DQSN1B/CQN1BAJ29 CLK1P/DIFFIO_RX_B4P/DQS1B/CQ1BAK29

CLK2N/DIFFIO_RX_B7N/DQ1BAH28 CLK2P/DIFFIO_RX_B7P/DQ1BAJ28

CLK3N/DIFFIO_RX_B9N/DQ2BAN29 CLK3P/DIFFIO_RX_B9P/DQ2BAP29

CLK4NDIFFIO_RX_B76N/DQ8BAG18 CLK4PDIFFIO_RX_B76P/DQ8BAH18

CLK5NDIFFIO_RX_B78N/DQ9BAG17 CLK5PDIFFIO_RX_B78P/DQ9BAH17

CLK6N/DIFFIO_RX_B82N/DQ9BAE17 CLK6P/DIFFIO_RX_B82P/DQ9BAF17

CLK7N/DIFFIO_RX_B84N/DQ9BAD17 CLK7P/DIFFIO_RX_B84P/DQ9BAE18

CLK11N/DIFFIO_RX_B160N/DQ16BAH7 CLK11P/DIFFIO_RX_B160P/DQ16BAJ7 CLK10N/DIFFIO_RX_B164N/DQSN17B/CQN17BAP2 CLK10P/DIFFIO_RX_B164P/DQS17B/CQ17BAN3 CLK9N/DIFFIO_RX_B166N/DQ17BAL4 CLK9P/DIFFIO_RX_B166P/DQ17BAL5 CLK8N/DIFFIO_RX_B168N/DQ17BAF6 CLK8P/DIFFIO_RX_B168P/DQ17BAG6

CLK12P/DIFFIO_RX_T1P/DQ1TE3

CLK12N/DIFFIO_RX_T1N/DQ1TE4

CLK13P/DIFFIO_RX_T3P/DQ1TD1


CLK14P/DIFFIO_RX_T5P/DQS1T/CQ1TC1

CLK14N/DIFFIO_RX_T5N/DQSN1T/CQN1TC2

CLK15P/DIFFIO_RX_T9P/DQ2TA3

CLK15N/DIFFIO_RX_T9N/DQ2TB3

CLK23P/DIFFIO_RX_T160P/DQ8TD29


CLK22P/DIFFIO_RX_T162PG29

CLK22N/DIFFIO_RX_T162NH29

CLK21P/DIFFIO_RX_T165PA32

CLK21N/DIFFIO_RX_T165NB32

CLK20P/DIFFIO_RX_T167PD33

CLK20N/DIFFIO_RX_T167NC32


CLK19N/DIFFIO_RX_T85N/DQ9TA17

CLK18P/DIFFIO_RX_T87P/DQ9TK18

CLK18N/DIFFIO_RX_T87N/DQ9TK19

CLK17P/DIFFIO_RX_T91P/DQ9TH17

CLK17N/DIFFIO_RX_T91N/DQ9TJ17


CLK16N/DIFFIO_RX_T93N/DQ10TA20

FPLL_BL_CLKOUT1/CLKOUTN/DIFFIO_TX_B5NAL30

FPLL_BL_CLKOUT0/CLKOUTP/FB0/DIFFIO_TX_B5P/DQ1BAM30

FPLL_BL_CLKOUT3/FBN/DIFFIO_RX_B6N/DQ1BAN30

FPLL_BL_CLKOUT2/FBP/FB1/DIFFIO_RX_B6P/DQ1BAP30

FPLL_BC_CLKOUT1/CLKOUTN/DIFFIO_TX_B79NAA17

FPLL_BC_CLKOUT0/CLKOUTP/FB0/DIFFIO_TX_B79P/DQ9BAB17

FPLL_BC_CLKOUT3/FBN/DIFFIO_RX_B80N/DQSN9B/CQN9BAJ17

FPLL_BC_CLKOUT2/FBP/FB1/DIFFIO_RX_B80P/DQS9B/CQ9BAK17

FPLL_BR_CLKOUT1/CLKOUTN/DIFFIO_TX_B161NAD6

FPLL_BR_CLKOUT0/CLKOUTP/FB0/DIFFIO_TX_B161P/DQ17BAE6

FPLL_BR_CLKOUT3/FBN/DIFFIO_RX_B162N/DQ17BAP3

FPLL_BR_CLKOUT2/FBP/FB1/DIFFIO_RX_B162P/DQ17BAP4

FPLL_TR_CLKOUT2/FBP/FB1/DIFFIO_RX_T7P/DQ1TC3

FPLL_TR_CLKOUT3/FBN/DIFFIO_RX_T7N/DQ1TD3

FPLL_TR_CLKOUT0/CLKOUTP/FB0/DIFFIO_TX_T8P/DQ1TJ6

FPLL_TR_CLKOUT1/CLKOUTN/DIFFIO_TX_T8NK6

FPLL_TL_CLKOUT2/FBP/FB1/DIFFIO_RX_T163P/DQ17TA31

FPLL_TL_CLKOUT3/FBN/DIFFIO_RX_T163N/DQ17TA30

FPLL_TL_CLKOUT0/CLKOUTP/FB0/DIFFIO_TX_T164P/DQ17TC31

FPLL_TL_CLKOUT1/CLKOUTN/DIFFIO_TX_T164ND31

FPLL_TC_CLKOUT2/FBP/FB1/DIFFIO_RX_T89P/DQS9T/CQ9TF17

FPLL_TC_CLKOUT3/FBN/DIFFIO_RX_T89N/DQSN9T/CQN9TG17

FPLL_TC_CLKOUT0/CLKOUTP/FB0/DIFFIO_TX_T90P/DQ9TM17

FPLL_TC_CLKOUT1/CLKOUTN/DIFFIO_TX_T90NN17

R31 100 1%

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

PLL

LVDS

SDI Reference Clocks

Programmable Clock

Design Note:Clock output goes to top/bottom FPGA and MAXV

Si5338 Programmable Oscillator Use Clock Control GUI (Defaults125MHz, 409.6MHz, 156.25MHz, 100MHz)I2C Address 70 HEX

125MHz Clocks for ENET

To bottom CLKIN

CAD Note:Place near NB6L11SMNGclock buffer

LVDS

Si571 Programmable OscillatorUse Clock Control GUI(Default 148.5MHz)I2C Address 55 HEX

From FPGA

Design Note:I2C bus pull up for clock generators

LVDS

From MAXV

From MAXV

LVCMOS

From MAXV

50MHz LVMOS Clocks for FPGA and MAXV

CLK_SEL = HIGH selects (CLK1p/n) Si5338A inputCLK_SEL = LOW selects (CLK2p/n) SMA input

CAD Note:Place 84.5 & 124 ohm resistor near IDT5T9306 pins

CAD Note:Place 100 ohm resistors & cap near IDT5T9306

CAD Note:Place 100 ohm resistor near IDT5T9306 pins

LVDS

LVCMOS

LVDS

100MHz Clock Distribution to Top & Bottom Banks

Clock Distribution to Top & BottomLeft & Right Tranceiver Banks

User Clock Input

100MHz Configuration Clock(Alternate: IDT8R9306I)

CLOCK_SDA

XTAL_25M_Si5338A_P

Si5338A_INTR

XTAL_25M_Si5338A_N

REFCLK1_QL0_CPREFCLK1_QL0_CN

Si5338A_CLK3_100_P

Si5338A_CLK0_125_P

Si5338A_CLK3_100_N

Si5338A_CLK0_125_N

REFCLK1_QR0_CPREFCLK1_QR0_CN

CLKOUT_50

CLOCK_SCL

2.5V_PLL

TERM_MUX_CLKIN

CLK_148_CP

CLK_148_CN

SI571_VCONTROL

VDD_SL18860DC

GL

PDn

CLKIN_SMA_N

Si5338A_CLK0_125_P

REFCLK2_QL1_CP

REFCLK2_QR1_CNREFCLK2_QR1_CP

REFCLK2_QL1_CN

Si5338A_CLK0_125_N

BUFFER_EN

CLKIN_SMA_CPCLKIN_SMA_CN

CLKIN_SMA_CPCLKIN_SMA_CN

CLKIN_SMA_P

OSC_50M_EN

2.5V

2.5V

2.5V

2.5V

2.5V

2.5V

2.5V

2.5V 2.5V

2.5V2.5V

2.5V

2.5V

3.3V

2.5V

2.5V

REFCLK1_QL0_P 11

REFCLK1_QL0_N 11

REFCLK1_QR0_P 11

REFCLK1_QR0_N 11

CLK125_EN19 CLK_125_P 13

CLK_125_N 13

CLKINTOP_100_P13

CLKINTOP_100_N 13

CLKINBOT_100_P13

CLKINBOT_100_N 13

SI571_EN19

CLK_148_P11

CLK_148_N11

CLOCK_SDA19

CLOCK_SCL19

SDI_CLK148_UP7

SDI_CLK148_DN7

CLK50_EN19

CLKIN_50_TOP13

CLKIN_50_BOT13

CLKIN_50_MAXV 19

CLK_CONFIG19

CLK_SEL19,25

CLKINTOP_125_P13

CLKINTOP_125_N 13

CLKINBOT_125_P13

CLKINBOT_125_N 13

REFCLK2_QL1_P11

REFCLK2_QL1_N 11

REFCLK2_QR1_P 11REFCLK2_QR1_N

11

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B



Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B



Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B



C60

2.2uF

C40 0.1uF

R40 4.99K

C31

0.1uF

U6

SL18860DC

VDD2

CLKIN3

OE16

OE27

OE35

GND1

CLKOUT18

CLKOUT29

CLKOUT310

OE_OSC4

C27

0.1uF

C53 0.1uF

C37

0.1uF

R35 10KC44

10uF

C28

0.1uF

C29 DNI

C32

0.1uF

Y1

25.00MHz

13

24

C41 0.1uF

R42124

C65

0.1uF

C35

0.1uFR33 4.7k

L1

BLM15AG221SN1

300mA

U5

IDT5T9306

GN

D2

9

GL8

PDn21

CLK1p6

CLK1n7

CLK2p16

CLK2n15

Gn1

Q4n18Q4p19

Q3n13Q3p12

Q2n11Q2p10

VD

D1

7

Q1n4Q1p3

Q6p26

Q6n25

Q5n23Q5p24

CLK_SEL28

VD

D1

4

VDD5 VDD9

VD

D2

0

VDD2 V

DD

27

NC

22

C38

0.1uF

U3

NB6L11SMNG

GND8

NC6

VTD12 D11

VCC15

D10 GND

7

VCC14

VCC5

EP_GND17

VTD9

VCC13

VCC16

Q01

Q02

Q13

Q14

X1

Si571

OE2

VC1

GND3

CLK+4

CLK-5

VDD6

SDA7

SCL8

R43 4.99K

R47 4.7k

C50

0.1uF

U4

Si5338A-CUSTOM

CLKIN_P1

CLKIN_N2

CLKIN3

I2C_LSB4

FDBK_P5

FDBK_N6

VDD17

VDD224

VDDO311

VDDO215

VDDO116

VDDO020

INTR8

CLK3B9

CLK3A10SCL

12

CLK2B13

CLK2A14

CLK1B17

CLK1A18

SDA19

CLK0B21

CLK0A22

RSVD_GND23

EPAD25

C56 0.1uF

C62

0.1uF

C42 0.1uF

R32 4.7k

R3684.5

R49 49.9X4

Si510 - 50MHz

VCC4

GND2

OUT3

EN1

R46 4.7k

C43

0.1uF

R3784.5

C58

0.1uF

C51

0.1uF

C63 10uF

C46 0.1uF

C57 0.1uF

R285 10K

R45 4.7k

C64

2.2uF

C54 0.1uF

C47 0.1uF

X3

Si510 - 100MHz

VCC4

GND2

OUT3

EN1

C61 0.1uF

C45 0.1uF

C34

0.1uF

R38100 1%

C39 0.1uF

R44 180K

R34 4.7k

C30

0.1uF

C52

2.2uF

J8

1

2345

C48 1000pF

R48

100

1%

C55 0.1uF

C59

10uF

C36

0.1uF

J7

1

2345

C26

0.1uF

X2

Si511 - 125.0MHz

EN1

NC2

GND3

OUT4

OUTn5

VCC6

C33 DNI

C49 0.1uFR39100 1% R41124

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

TS5A23157 Switch Functions

When Pins 1 & 5 are:LOW --> NC to/from COM = ON and NO to/from COM = OFFHIGH --> NC to/from COM = OFF and NO to/from COM = ON

Logic 0 = pin 10 <--> pin 9 (5M2210 Bypass)Logic 1 = pin 10 <--> pin 2 (5M2210 Enable)

JTAG

(uses JTAG mode only)USB Blaster Programming Header

JTAG Chain Control

ON = not-in-chainOFF = in-chain

Logic 0 = pin 6 <--> pin 7 (5M2210 Bypass)Logic 1 = pin 6 <--> pin 4 (5M2210 Enable)

Logic 0 = pin 10 <--> pin 9 (HSMA Bypass)Logic 1 = pin 10 <--> pin 2 (HSMA Enable)

Logic 0 = pin 6 <--> pin 7 (HSMA Bypass)Logic 1 = pin 6 <--> pin 4 (HSMA Enable)

HSMC TDI = JTAG_FPGA_TDO_RETIMER

Design Note:Populate R59 if you would like toMaster the JTAG chain throughHSMC Port .

5M2210_JTAG_EN

JTAG_BLASTER_TDO JTAG_BLASTER_TDI

JTAG_TMS

JTAG_5M2210_TDI

JTAG_BLASTER_TDI

PCIE_JTAG_EN

5M2210_JTAG_ENHSMA_JTAG_EN

5M2210_JTAG_EN

JTAG_TMS

HSMA_JTAG_EN

HSMA_JTAG_EN

JTAG_TCK

JTAG_TMSJTAG_BLASTER_TDI

JTAG_TCKJTAG_BLASTER_TDO

2.5V

2.5V

3.3V

2.5V2.5V

2.5V

2.5V

2.5V

2.5V

2.5V

JTAG_5M2210_TDO19

JTAG_BLASTER_TDI 24

PCIE_JTAG_TDO 6

PCIE_JTAG_TCK 6

PCIE_JTAG_TMS 6

PCIE_JTAG_TDI 6

USB_DISABLEn24 JTAG_TCK 12,19,22,24

JTAG_TMS 12,24

JTAG_BLASTER_TDO 12,24

5M2210_JTAG_TMS 19

HSMA_JTAG_TMS 22

JTAG_FPGA_TDO_RETIMER 22,24HSMA_JTAG_TDO22

JTAG_5M2210_TDI 19

PCIE_JTAG_EN19

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




R52 1k

R60 1k

R55 1k

R541k

R50 1k

R56 1k

J9

2x5-PIN JTAG HEADER

2468

10

13579

OPEN

SW2


1234 5

678

C70 0.1uF

R59 DNI

C69 0.1uF

R51 1k

C670.1uF

R57 1k

U7

Level Shifter, MAX13042

VLB2

IO_VL4C1 IO_VL3C2 IO_VL2C3 IO_VL1C4

GNDB4

VCCB1

IO_VCC1A4

IO_VCC2A3

IO_VCC3A2

IO_VCC4A1

ENB3

U8

TS5A23157

IN11

NO12

GND3

NO24

IN25

COM26

NC27

V+8

NC19

COM110

C68 DNI

U9

TS5A23157

IN11

NO12

GND3

NO24

IN25

COM26

NC27

V+8

NC19

COM110

C660.1uF

R53 DNI

R58 1k

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

256MB DDR3 x32 SDRAMArria V Interface

CAD Note:Place cap arrays nearresistor packs and onthe same side of PCB

CAD Note:Place decoupling caps near SDRAM power pins

CAD Note:Use tree-topology for termination signalsUse star via to branch out address/command/control signals from FPGAto memory devices and termination resistors

CAD Note:Overlap resistor pads

DDR3_DQS_P0

DDR3_DQ5

DDR3_DQ11

DDR3_DQ6

DDR3_DQ12

DDR3_DQ0DDR3_DQ1

DDR3_DQS_N0

DDR3_DQ7

DDR3_DQ13

DDR3_DQS_P1

DDR3_DQ2

DDR3_DQS_N1

DDR3_DQ8

DDR3_DQ14

DDR3_DQ3

DDR3_DQ9

DDR3_DQ15

DDR3_DQ4

DDR3_DQ10

DDR3_DQ20

DDR3_DQ26

DDR3_DQ21

DDR3_DQ27

DDR3_DQ22

DDR3_DQ28

DDR3_DQ17

DDR3_DQ23

DDR3_DQ16

DDR3_DQ29

DDR3_DQS_P2DDR3_DQS_N2

DDR3_DQ18

DDR3_DQ24

DDR3_DQ30

DDR3_DQS_P3DDR3_DQS_N3

DDR3_DQ19

DDR3_DQ25

DDR3_DQ31

DDR3_ZQ01

DDR3_A5

DDR3_A1

DDR3_A6

DDR3_A11

DDR3_A0

DDR3_A7

DDR3_A12

DDR3_A2

DDR3_A8

DDR3_A3

DDR3_A9

DDR3_A4

DDR3_A10

DDR3_A5

DDR3_A1

DDR3_A6

DDR3_A11

DDR3_A0

DDR3_A7

DDR3_A12

DDR3_A2

DDR3_A8

DDR3_A3

DDR3_A9

DDR3_A4

DDR3_A10

DDR3_CKEDDR3_CLK_PDDR3_CLK_N

DDR3_DM2DDR3_DM3

DDR3_CSnDDR3_WEnDDR3_RASnDDR3_CASn

DDR3_BA2DDR3_BA1DDR3_BA0

DDR3_RESETnDDR3_ODTDDR3_ZQ02

DDR3_DM0DDR3_DM1

DDR3_BA2DDR3_BA1DDR3_BA0

DDR3_CKEDDR3_CLK_PDDR3_CLK_N

DDR3_CSnDDR3_WEnDDR3_RASnDDR3_CASn

DDR3_RESETnDDR3_ODT

DDR3_CLK_P

DDR3_CLK_NDDR3_A12

DDR3_A13 DDR3_A13

DDR3_A10DDR3_A1DDR3_A8DDR3_A6DDR3_BA2DDR3_A0

DDR3_A4

DDR3_A2DDR3_A13DDR3_A11

DDR3_A9DDR3_BA1DDR3_RASnDDR3_RESETn

DDR3_BA0DDR3_CSnDDR3_CASnDDR3_A3DDR3_WEnDDR3_A7DDR3_A5DDR3_ODT

DDR3_CKE

1.5V

VREF_DDR3

1.5V

VREF_DDR3

0.75V_VTT

0.75V_VTT

0.75V_VTT

0.75V_VTT

0.75V_VTT

0.75V_VTT

1.5V1.5V

0.75V_VTT

DDR3_DQS_P[3:0]10

DDR3_DQS_N[3:0]10

DDR3_DQ[31:0]10

DDR3_A[13:0]10

DDR3_BA[2:0]10

DDR3_DM[3:0]10

DDR3_CKE10

DDR3_CLK_P10

DDR3_CLK_N10

DDR3_CSn10

DDR3_WEn10

DDR3_RASn10

DDR3_CASn10

DDR3_RESETn10

DDR3_ODT10

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




RN2H 568 9

RN1A 561 16

C100

0.01uF

C73

4.7nFC79

3300pF

RN1H 568 9

C91

0.01uF

RN2D 564 13

C92

0.01uFC95

0.1uF

C76

2200pFC78

4.7nF

R63

100

1%

C98

0.01uF

CN2

0.1uF

17

3546

28

C96

0.1uF

RN2C 563 14

RN3B 562 15

C77

2200pF

RN3G 567 10

RN3D 564 13

C84

2200pF

RN2B 562 15

DDR3 DeviceU10

DDR3 SDRAM, MT41J64M16LA-15E

A5P2 A4P8 A3N2 A2P3 A1P7 A0N3

NC_L9L9

A10/APL7

A11R7

A12/BCnN7

RESETnT2

VSSQB1

VSSQB9

VSSQD1

A9R3 A8T8 A7R2 A6R8

NC/A15M7

NC_J1J1

NC_L1L1

ZQL8

CK_NK7

WEL3

CKEK9

NC/A13T3

ODTK1

NC_J9J9RAS

J3

CK_PJ7

CSL2

BA0M2

BA1N8

BA2M3

CASK3

DM1D3

NC/A14T7

DM0E7

VDDB2

VDDD9

VDDG7

VDDK2

VSSA9

VSSB3

VSSE1

VSSG8

DQ0E3

DQS0pF3

DQ1F7

DQ2F2

DQ3F8

DQ4H3

DQ5H8

DQ6G2

DQ7H7

DQ8D7

DQ9C3

DQ10C8

DQ11C2

DQ12A7

DQ13A2

DQ14B8

DQ15A3

DQS1pC7DQS0nG3

DQS1nB7

VSSQD8

VSSQE2

VSSQE8

VSSQF9

VDDQH9

VDDK8

VDDN1

VDDN9

VDDR1

VDDR9

VREFDQH1

VREFCAM8

VSSQG1

VSSQG9

VDDQA1

VDDQA8

VDDQC1

VDDQC9

VDDQD2

VDDQE9

VDDQF1

VDDQH2

VSSJ2

VSSJ8

VSSM1

VSSM9

VSSP1

VSSP9

VSST1

VSST9

RN1F 566 11

RN3A 561 16

RN2G 567 10

RN1B 562 15

RN3H 568 9

RN3F 566 11

C97

0.1uF

RN1C 563 14

RN3C 563 14

RN1G 567 10

C90

0.01uFC94

0.47uF

R61

240

C89

0.1uF

C81

2200pF

C93

0.47uF

RN1D 564 13

CN1

0.1uF

17

3546

28

CN3

0.1uF

17

3546

28

R62

240

C86

0.47uF

R425 DNI

C72

0.1uF

C85

0.47uF

R423 4.7k

C82

2200pF

RN2F 566 11

C71

0.1uF

C75

2200pF

DDR3 DeviceU11

DDR3 SDRAM, MT41J64M16LA-15E

A5P2 A4P8 A3N2 A2P3 A1P7 A0N3

NC_L9L9

A10/APL7

A11R7

A12/BCnN7

RESETnT2

VSSQB1

VSSQB9

VSSQD1

A9R3 A8T8 A7R2 A6R8

NC/A15M7

NC_J1J1

NC_L1L1

ZQL8

CK_NK7

WEL3

CKEK9

NC/A13T3

ODTK1

NC_J9J9RAS

J3

CK_PJ7

CSL2

BA0M2

BA1N8

BA2M3

CASK3

DM1D3

NC/A14T7

DM0E7

VDDB2

VDDD9

VDDG7

VDDK2

VSSA9

VSSB3

VSSE1

VSSG8

DQ0E3

DQS0pF3

DQ1F7

DQ2F2

DQ3F8

DQ4H3

DQ5H8

DQ6G2

DQ7H7

DQ8D7

DQ9C3

DQ10C8

DQ11C2

DQ12A7

DQ13A2

DQ14B8

DQ15A3

DQS1pC7DQS0nG3

DQS1nB7

VSSQD8

VSSQE2

VSSQE8

VSSQF9

VDDQH9

VDDK8

VDDN1

VDDN9

VDDR1

VDDR9

VREFDQH1

VREFCAM8

VSSQG1

VSSQG9

VDDQA1

VDDQA8

VDDQC1

VDDQC9

VDDQD2

VDDQE9

VDDQF1

VDDQH2

VSSJ2

VSSJ8

VSSM1

VSSM9

VSSP1

VSSP9

VSST1

VSST9

RN2E 565 12

C99

0.01uF

C87

0.1uF

C80

2200pF

RN3E 565 12

RN2A 561 16

RN1E 565 12

C74

3300pFC83

2200pF

C88

0.1uF

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Place capacitors near Flash A Place capacitors near Flash B

Flash A Flash B

Flash

SRAM, FPGA, MAX V Interface

FLASH 1Gb (64M X 16) FLASH 1Gb (64M X 16)

Design Note:- When using a single x16 flash device a word consists of 16 data bits so addressing starts with FSM_A2 mapped to address bit 1 in software.- When using dual x16 flash devices for an equivalent x32 (x16||x16) flash device a word consists of 32 data bits so addressing starts with FSM_A2 mapped to address bit 2 in software.

FLASH_WEn

FLASH_RDYBSYn0FLASH_RDYBSYn1

FLASH_WPn

FLASH_RESETn

FLASH_RESETnFLASH_CEn0FLASH_OEnFLASH_WEnFLASH_ADVn

FSM_D0FSM_D1FSM_D2FSM_D3FSM_D4

FSM_D8FSM_D9FSM_D10FSM_D11FSM_D12

FSM_D5FSM_D6FSM_D7

FLASH_RDYBSYn0

FSM_D13FSM_D14FSM_D15

FLASH_CLK

FLASH_WPn

FSM_D16FSM_D17FSM_D18FSM_D19FSM_D20FSM_D21FSM_D22FSM_D23

FSM_D24FSM_D25FSM_D26FSM_D27FSM_D28FSM_D29FSM_D30FSM_D31

FLASH_CEn1

FLASH_CLKFLASH_RDYBSYn1

FLASH_OEnFLASH_WEnFLASH_ADVnFLASH_WPn

FLASH_RESETn

FSM_A26

FSM_A2FSM_A3FSM_A4FSM_A5FSM_A6FSM_A7FSM_A8FSM_A9FSM_A10FSM_A11FSM_A12FSM_A13FSM_A14FSM_A15FSM_A16FSM_A17FSM_A18FSM_A19FSM_A20FSM_A21FSM_A22FSM_A23FSM_A24FSM_A25

FSM_A1

FSM_A13FSM_A14FSM_A15FSM_A16FSM_A17FSM_A18FSM_A19FSM_A20FSM_A21FSM_A22FSM_A23FSM_A24FSM_A25

FSM_A1

FSM_A26

FSM_A2FSM_A3FSM_A4FSM_A5FSM_A6FSM_A7FSM_A8FSM_A9FSM_A10FSM_A11FSM_A12

2.5V

1.8V 1.8V

1.8V 1.8V

2.5V 2.5V

2.5V 2.5V

FSM_A[26:0]7,18,19

FSM_D[31:0]7,18,19

FLASH_CLK7,19

FLASH_RESETn 7,19FLASH_OEn 7,19FLASH_WEn 7,19FLASH_ADVn 7,19

FLASH_CEn[1:0]7,19

FLASH_RDYBSYn[1:0]7,19

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




C111

0.1uF

R67 10K

PC28FxxxP30B85FLASH

U12

PC28F00AP30BF

A1A1

A2B1

A3C1

A4D1

A5D2

A6A2

A7C2

A8A3

A9B3

A10C3

A11D3

A12C4

A13A5

A14B5

A15C5

A16D7

A17D8

A18A7

A19B7

A20C7

A21C8

A22A8

NC(64M)/A23G1

CE#B4

OE#F8

WE#G8

WP#C6

VCCA6

RESET#D4

VCCH3

D0F2

D1E2

D2G3

D3E4

D4E5

D5G5

D6G6

D7H7

D8E1

D9E3

D10F3

D11F4

D12F5

D13H5

D14G7

D15E7

WAITF7

GNDB2

GNDH4GNDH2

CLKE6

ADV#F6

NC/A26(1G)B8

RFU3E8RFU2F1RFU1G2RFU0H1

NC(64M,128M)/A24H8

NC/A25(512M)B6

VPPA4

VCCQD6VCCQD5

VCCQG4

GNDH6

R65 10K

C101

0.1uF

C108

0.1uF

C112

0.1uF

C106

0.1uF

C102

0.1uF

C109

0.1uF

C103

0.1uF

R66 10K

R68 10K

PC28FxxxP30B85FLASH

U13

PC28F00AP30BF

A1A1

A2B1

A3C1

A4D1

A5D2

A6A2

A7C2

A8A3

A9B3

A10C3

A11D3

A12C4

A13A5

A14B5

A15C5

A16D7

A17D8

A18A7

A19B7

A20C7

A21C8

A22A8

NC(64M)/A23G1

CE#B4

OE#F8

WE#G8

WP#C6

VCCA6

RESET#D4

VCCH3

D0F2

D1E2

D2G3

D3E4

D4E5

D5G5

D6G6

D7H7

D8E1

D9E3

D10F3

D11F4

D12F5

D13H5

D14G7

D15E7

WAITF7

GNDB2

GNDH4GNDH2

CLKE6

ADV#F6

NC/A26(1G)B8

RFU3E8RFU2F1RFU1G2RFU0H1

NC(64M,128M)/A24H8

NC/A25(512M)B6

VPPA4

VCCQD6VCCQD5

VCCQG4

GNDH6

R64 10K

C104

0.1uF

C107

0.1uF

C110

0.1uF

C105

0.1uF

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

FSM BUS

SRAM

SRAM_CE3nSRAM_CE2

FSM_D0

FSM_D14

FSM_D16FSM_D17

FSM_D15

FSM_D18FSM_D19FSM_D20FSM_D21FSM_D22FSM_D23FSM_D24FSM_D25FSM_D26FSM_D27FSM_D28FSM_D29FSM_D30FSM_D31

FSM_D2FSM_D3

FSM_D1

FSM_D4FSM_D5FSM_D6FSM_D7FSM_D8FSM_D9FSM_D10FSM_D11FSM_D12FSM_D13

FSM_A10FSM_A11FSM_A12FSM_A13FSM_A14FSM_A15FSM_A16FSM_A17FSM_A18FSM_A19FSM_A20FSM_A21


FSM_A22

FSM_A6

FSM_A23

FSM_A7

FSM_A24

FSM_A8FSM_A9

SRAM_BWn0SRAM_BWn1SRAM_BWn2SRAM_BWn3

SRAM_CE3nSRAM_CE2

FSM_A25

2.5V

2.5V

2.5V 2.5V

2.5V

SRAM_ADSPn7

SRAM_OEn7

SRAM_ADVn7

SRAM_CEn7

SRAM_ZZ7

FSM_A[26:0]7,17,19

FSM_D[31:0]7,17,19

SRAM_BWn[3:0]

7

SRAM_MODE7

SRAM_DQP1 7SRAM_DQP2 7

SRAM_CLK7

SRAM_DQP3 7SRAM_BWEn7

SRAM_GWn7

SRAM_DQP0 7

SRAM_ADSCn7

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




C121

0.1uFR69 10K

C118

0.1uF

C113

0.1uF

C115

0.1uF

U14

SRAM, IS61VPS51236A

BWD_nB4

BWE_nA7

CE1_nA3

CE2B3

CE3_nA6

CLKB6

DQ0J10

DQ1J11

DQ10E10

DQ11E11

DQ12F10

DQ13F11

DQ14G10

DQ15G11

DQ16D1

DQ17D2

DQ18E1

DQ19E2

NC3H1

VS

SH

2

NC5H3

NC6H9

NC7H10

NC8N2

NC9N5

OE_nB8

TCKR7

TDIP5

TDOP7

TMSR5

VD

DD

4

VD

DD

8

VD

DE

4

VD

DE

8

VD

DF

4

VD

DF

8

DQ2K10

DQ20F1

DQ21F2

DQ22G1

DQ23G2

DQ24J1

DQ25J2

DQ26K1

DQ27K2

DQ28L1

DQ29L2

DQ3K11

DQ30M1

DQ31M2

DQ4L10

DQ5L11

DQ6M10

DQ7M11

DQ9D11

DQPAN11

DQPBC11

DQPCC1

DQPDN1

GW_nB7

MODER1

NC_144MB1

NC_1GC10

NC_288MA1

NC_576MB11

NC1A11

VS

SN

7

NC10N10

NC4P1

NC2C2

VS

SC

5V

SS

C6

VS

SC

7V

SS

D5

VS

SD

6V

SS

D7

VS

SE

5V

SS

E6

VS

SE

7V

SS

F5

VS

SF

6V

SS

C8

VS

SF

7V

SS

G5

VS

SG

6V

SS

G7

VS

SH

5V

SS

H6

VS

SH

7V

SS

J5

VS

SJ6

VS

SJ7

VS

SK

5V

SS

K6

VS

SK

7V

SS

L5

VS

SL

6

ZZH11

A0R6

A1P6

A9P8

A10P9

A11P10

A12P11

NC_BR2

A13R3

A14R4

A15R8

A16R9

A17R10

A2A2

A18R11

A3A10

A4B2

A5B10

NC_AP2

A6N6

A7P3

A8P4

ADSC_nA8

ADSP_nB9

ADV_nA9

BWA_nB5

BWB_nA5

BWC_nA4

DQ8D10

VD

DG

4

VD

DG

8

VD

DH

4

VD

DH

8

VD

DJ4

VD

DJ8

VD

DK

4

VD

DK

8

VD

DL

4

VD

DL

8

VD

DM

4

VD

DM

8

VD

DQ

J3

VD

DQ

J9

VD

DQ

K3

VD

DQ

K9

VD

DQ

L3

VD

DQ

L9

VD

DQ

M3

VD

DQ

M9

VD

DQ

N3

VD

DQ

N9

VD

DQ

C3

VD

DQ

C9

VD

DQ

D3

VD

DQ

D9

VD

DQ

E3

VD

DQ

E9

VD

DQ

F3

VD

DQ

F9

VD

DQ

G3

VD

DQ

G9

VS

SM

6V

SS

M7

VS

SN

4V

SS

N8

VS

SL

7V

SS

M5

VS

SC

4

C122

0.1uF

C119

0.1uF

C116

0.1uF

C120

0.1uF

R70 10K C117

0.1uF

C114

0.1uF

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

LED INTERFACE

PUSH BUTTON INTERFACE

ON-BOARD USB BLASTER II

MAXV DIPSWITCH

5M2210 System Controller

VCCINT 2.5V VCCIO Bank 1 & 2

Flash & SRAM InterfaceFPGA Interface

SDI Interface

Clock Interface

Power Monitor Interface

2.5V VCCIO Bank 3 & 4

PMBus Interface

PGM_LED1

MAX_ERRORMAX_LOAD

SDI_RX_EN

SDI_TX_ENSDI_RX_BYPASS

FSM_A1FSM_A2FSM_A3

FSM_A0


SENSE_SDO

SENSE_SCKSENSE_SDI

SENSE_CS0n

FSM_D1FSM_D2FSM_D3

FSM_D0

FSM_D4FSM_D5FSM_D6FSM_D7

FSM_A21FSM_A22

FPGA_CONFIG_D8FPGA_CONFIG_D9FPGA_CONFIG_D10FPGA_CONFIG_D11FPGA_CONFIG_D12FPGA_CONFIG_D13FPGA_CONFIG_D14FPGA_CONFIG_D15

USB_CFG0

USB_CFG1

USB_CFG2USB_CFG3USB_CFG4USB_CFG5USB_CFG6USB_CFG7USB_CFG8USB_CFG9

USB_CFG10

USB_CFG11

PGM_LED2

FACTORY_STATUS

SECURITY_MODE

FSM_D31FSM_D30

FSM_D28FSM_D29

MAX5_BEn1MAX5_BEn0

MAX5_OEn

MAX5_WEnMAX5_CSn

FSM_A25

FSM_A23FSM_A24 MAX5_CLK

M570_CLOCK

FACTORY_REQUEST

FPGA_DCLKFPGA_CONFIG_D1FPGA_CONFIG_D2FPGA_CONFIG_D3

FPGA_CONFIG_D5FPGA_CONFIG_D6

FPGA_CONFIG_D4

FSM_A14

FSM_A8FSM_A9

FSM_A15


FPGA_nSTATUSFPGA_CONF_DONE

FPGA_CONFIG_D0

FPGA_CONFIG_D7

SI571_EN

CLK50_ENCLK125_ENCLOCK_SDA

FPGA_PR_READYFPGA_PR_REQUESTFPGA_PR_DONE

FPGA_nCONFIG

CLOCK_SCL

MAX_RESETn

CLKIN_50_MAXV

CPU_RESETnPCIE_JTAG_EN

M570_PCIE_JTAG_EN

USB_CLK

FACTORY_LOAD

MAX5_BEn2

EXTRA_SIG0

EXTRA_SIG1

EXTRA_SIG2

FSM_A19FSM_A20

FSM_A18

FSM_A16FSM_A17

FPGA_CvP_CONFDONEFPGA_PR_ERROR


HSMA_PRSNTn

FSM_D19



FSM_D23

FSM_D24

FSM_D14FSM_D15

FSM_D10FSM_D11FSM_D12FSM_D13

FSM_D8FSM_D9

FLASH_CEn1

FLASH_OEn

FLASH_ADVn

FLASH_CEn0

FLASH_CLKFLASH_RESETn

FLASH_WEn

CLK_CONFIG

FLASH_RDYBSYn0

PGM_SEL

MAX_CONF_DONEn

PGM_LED0PGM_CONFIG

CLK_SELCLK_ENABLE

FLASH_RDYBSYn1

MAX5_BEn3

OVERTEMPFAN_FORCE_ON

MSEL0MSEL1MSEL2MSEL3MSEL4

FSM_A26

LTC3880_GPIO0_N_2.5VLTC3880_SDA_2.5V

LTC3880_ALERT_N_2.5V

LTC3880_SCL_2.5VINT_TSD_SDAINT_TSD_SCL

1.8V

2.5V

2.5V

2.5V1.8V 2.5V

M570_CLOCK 24

USB_CFG[11:0]24

CPU_RESETn 12,25

MAX5_BEn[3:0]9

FLASH_RDYBSYn0 7,17

MAX5_WEn9

MAX5_OEn9

MAX5_CSn9

MAX5_CLK9

SENSE_SCK 31

SENSE_SDI 31

JTAG_TCK 12,15,22,24JTAG_5M2210_TDI 15

5M2210_JTAG_TMS15

JTAG_5M2210_TDO 15

FPGA_nCONFIG12

CLK_SEL14,25

CLK_ENABLE25

OVERTEMP 31

FSM_A[26:0]7,17,18

FSM_D[31:0]7,17,18

FPGA_CONF_DONE 12

FPGA_nSTATUS 12

FLASH_CEn0 7,17

CLKIN_50_MAXV14

HSMA_PRSNTn 9,22,25

FLASH_ADVn 7,17

FLASH_WEn7,17

FLASH_OEn 7,17

FLASH_RESETn 7,17FLASH_CLK 7,17

SDI_TX_EN 7,21SDI_RX_BYPASS 7,21SDI_RX_EN 7,21

SENSE_CS0n 31

CLK125_EN 14CLK50_EN 14

SENSE_SDO 31

FPGA_CONFIG_D[15:0]12

FACTORY_LOAD 25SECURITY_MODE 25

PGM_SEL 25PGM_CONFIG 25MAX_RESETn 25

PGM_LED[2:0]25

MAX_ERROR25

MAX_LOAD 25

MAX_CONF_DONEn25

FLASH_CEn1 7,17

FPGA_PR_DONE 12FPGA_PR_REQUEST 12FPGA_PR_READY 12FPGA_PR_ERROR 12FPGA_CvP_CONFDONE 12

FLASH_RDYBSYn1 7,17

SI571_EN 14CLOCK_SDA 14CLOCK_SCL 14

PCIE_JTAG_EN15

M570_PCIE_JTAG_EN 24

FACTORY_STATUS 24

USB_CLK8,24

EXTRA_SIG[2:0]24

FACTORY_REQUEST 24

FAN_FORCE_ON6

FPGA_DCLK 12

MSEL[4:0]12

CLK_CONFIG 14

LTC3880_SDA_2.5V 25,27LTC3880_ALERT_N_2.5V 27LTC3880_GPIO0_N_2.5V 27

LTC3880_SCL_2.5V25,27

INT_TSD_SCL 9

INT_TSD_SDA 9

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




MAX VBANK2

U15B

MAX V, 5M2210ZF256

DIFFIO_T9PB8

DIFFIO_T9NA8

DIFFIO_T8PD8

DIFFIO_T8NA7

DIFFIO_T7PC8

DIFFIO_T7NB7

DIFFIO_T6PB6

DIFFIO_T6NE7

DIFFIO_T5PA5

DIFFIO_T5ND7

DIFFIO_T4PE6

DIFFIO_T4NB5

DIFFIO_T3PB4

DIFFIO_T3ND6

DIFFIO_T2PC5

DIFFIO_T2NC4

DIFFIO_T1PD4

DIFFIO_T1NB1

DIFFIO_T18PC13

DIFFIO_T18NB16

DIFFIO_T17PD12

DIFFIO_T17NB14

DIFFIO_T16PC11

DIFFIO_T16NB13

DIFFIO_T15PE11

DIFFIO_T15NB12

DIFFIO_T14PB11

DIFFIO_T14NA12

DIFFIO_T13PE10

DIFFIO_T13NA11

DIFFIO_T12PA10

DIFFIO_T12NC9

DIFFIO_T11PB9

DIFFIO_T11ND9

DIFFIO_T10PA9

DIFFIO_T10NE9

IOB2_6A13

IOB2_7A15

IOB2_8A2

IOB2_9A4

IOB2_10A6

IOB2_11B10

IOB2_12B3

IOB2_13C10

IOB2_14C12

IOB2_15C6

IOB2_16C7

IOB2_17D10

IOB2_18D11

IOB2_19D5

IOB2_20E8

C130

0.1uF

MAX VPower

U15E

MAX V, 5M2210ZF256

GNDINTF7

GNDINTG6

GNDINTH7

GNDINTH9

GNDIOA1

GNDIOA16

GNDIOB15

GNDIOB2

GNDIOG10

GNDIOG7

GNDIOG8

GNDIOG9

GNDIOK10

GNDIOK7

GNDIOK8

GNDIOK9

GNDIOR15

GNDIOR2

GNDIOT1

GNDIOT16

VCCINTH8VCCINTH10VCCINTG11VCCINTF10

VCCIO1C1

VCCIO1H6

VCCIO1J6

VCCIO1P1

VCCIO2A14

VCCIO2A3

VCCIO2F8

VCCIO2F9

VCCIO3C16

VCCIO3H11

VCCIO3J11

VCCIO3P16

VCCIO4L8

VCCIO4L9

VCCIO4T14

VCCIO4T3

GNDINTJ10

VCCINTJ7

VCCINTL7

GNDINTJ8

GNDINTK11

VCCINTK6VCCINTJ9

GNDINTL10

GNDIOT6

C138

0.1uF

C132

0.1uF

C127

0.1uF

MAX VBANK1

U15A

MAX V, 5M2210ZF256

DIFFIO_L19PN1

IOB1/CLK0H5

IOB1/CLK1J5

DIFFIO_L9PG1

DIFFIO_L9NG4

DIFFIO_L8PG2

DIFFIO_L8NG3

DIFFIO_L7PF1

DIFFIO_L7NF6

DIFFIO_L6PF4

DIFFIO_L6NF2

DIFFIO_L5PF3

DIFFIO_L5NE1

DIFFIO_L4PD1

DIFFIO_L4NE5

DIFFIO_L3PD2

DIFFIO_L3NE4

DIFFIO_L2PC3

DIFFIO_L2NE3

DIFFIO_L21PN3

DIFFIO_L21NP2

DIFFIO_L20PN2

DIFFIO_L20NM3

DIFFIO_L1PD3

DIFFIO_L1NC2

DIFFIO_L19NM4

DIFFIO_L18PL4

DIFFIO_L18NL3

DIFFIO_L17PM1

DIFFIO_L17NM2

DIFFIO_L16PL2

DIFFIO_L16NK3

DIFFIO_L15PK5

DIFFIO_L15NL1

DIFFIO_L14PJ3

DIFFIO_L14NK2

DIFFIO_L13PJ4

DIFFIO_L13NK1

DIFFIO_L12PH4

DIFFIO_L12NJ2

DIFFIO_L11PH3

DIFFIO_L11NJ1

DIFFIO_L10PH2

DIFFIO_L10NG5

IOB1_1E2

IOB1_2F5

IOB1_3H1

IOB1_4K4

IOB1_5L5

TMSN4TDOM5TDIL6TCKP3

C124

0.1uF

C139

0.1uF

C133

0.1uF

MAX VBANK3

U15C

MAX V, 5M2210ZF256

IOB3/CLK2J12

IOB3/CLK3H12

DIFFIO_R9PG12

DIFFIO_R9NG16

DIFFIO_R8PG13

DIFFIO_R8NG15

DIFFIO_R7PG14

DIFFIO_R7NF16

DIFFIO_R6PE16

DIFFIO_R6NF15

DIFFIO_R5PF13

DIFFIO_R5NE15

DIFFIO_R4PF14

DIFFIO_R4ND16

DIFFIO_R3PE12

DIFFIO_R3ND15

DIFFIO_R2PC15

DIFFIO_R2NE13

DIFFIO_R22PP15

DIFFIO_R22NP14

DIFFIO_R21PN15

DIFFIO_R21NN14

DIFFIO_R20PN16

DIFFIO_R20NM13

DIFFIO_R1PE14

DIFFIO_R1NC14

DIFFIO_R19PM15

DIFFIO_R19NL14

DIFFIO_R18PM16

DIFFIO_R18NL13

DIFFIO_R17PL15

DIFFIO_R17NL12

DIFFIO_R16PL16

DIFFIO_R16NL11

DIFFIO_R15PK15

DIFFIO_R15NK14

DIFFIO_R14PK16

DIFFIO_R14NK13

DIFFIO_R13PJ14

DIFFIO_R13NJ15

DIFFIO_R12PJ13

DIFFIO_R12NJ16

DIFFIO_R11PH13

DIFFIO_R11NH16

DIFFIO_R10PH14

DIFFIO_R10NH15

IOB3_21D13

IOB3_22D14

IOB3_23F11

IOB3_24F12

IOB3_25K12

IOB3_26M14

IOB3_27N13

C129

0.1uF

MAX VBANK4

U15D

MAX V, 5M2210ZF256

DIFFIO_B13N/DEV_CLRnM9

DIFFIO_B13P/DEV_OEM8

DIFFIO_B9PP8

DIFFIO_B9NT7

DIFFIO_B8PM7

DIFFIO_B8NR7

DIFFIO_B7PR6

DIFFIO_B7NN7

DIFFIO_B6PT5

DIFFIO_B6NP7

DIFFIO_B5PR5

DIFFIO_B5NM6

DIFFIO_B4PP6

DIFFIO_B4NN6

DIFFIO_B3PR3

DIFFIO_B3NN5

DIFFIO_B2PT2

DIFFIO_B2NP5

DIFFIO_B22PR16

DIFFIO_B22NP13

DIFFIO_B21PP12

DIFFIO_B21NT15

DIFFIO_B20PN12

DIFFIO_B20NR14

DIFFIO_B1PR1

DIFFIO_B1NP4

DIFFIO_B19PT13

DIFFIO_B19NR13

DIFFIO_B18PR12

DIFFIO_B18NP11

DIFFIO_B17PT12

DIFFIO_B17NN11

DIFFIO_B16PP10

DIFFIO_B16NR11

DIFFIO_B15PN10

DIFFIO_B15NT11

DIFFIO_B14PM10

DIFFIO_B14NR10

DIFFIO_B12PR9

DIFFIO_B12NP9

DIFFIO_B11PT8

DIFFIO_B11NT9

DIFFIO_B10PN8

DIFFIO_B10NR8 IOB4_28

M11

IOB4_29M12

IOB4_30N9

IOB4_31R4

IOB4_32T10

IOB4_33T4

C140

0.1uF

C134

0.1uF

C126

0.1uF

C123

0.1uF

C141

0.1uF

C135

0.1uF

C128

0.1uF

C125

0.1uF

C142

0.1uF

C136

0.1uF

C137

0.1uF

C131

0.1uF

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

HDMI Video Output

TMDS Level Shifter

FPGA Interface

Design Note:Place near TMDS level shifter VCC pins

Design Note:Level shifter has 160kinternal pull down

Design Note:Level shifter internalpull down

Design Note:Use weak pull-up in FPGA on DDC signals

HDMI_CONN_HPD

TMDS_DATA_P0TMDS_DATA_N0



TMDS_CLKpTMDS_CLKn

HDMI_SCL_DDCHDMI_SDA_DDC

DDCSCLDDCSDA

HDMI_DDC_EN

HDMI_HPD HDMI_CONN_HPD

DDCSCLDDCSDA

HDMI_SCL_DDCHDMI_SDA_DDC

HDMI_OE_N

HDMI_HPDHDMI_OE_N

HDMI_TX_C_P0HDMI_TX_P0HDMI_TX_C_N0HDMI_TX_N0



HDMI_TX_CLK_C_PHDMI_TX_CLK_PHDMI_TX_CLK_C_NHDMI_TX_CLK_N

HDMI_FUNCTION3

HDMI_REXT

HDMI_ANALOG2

HDMI_FPGA_SCL_DDCHDMI_FPGA_SDA_DDC

HDMI_5V_LVL_SHIFTER_EN

HDMI_FPGA_HPDHDMI_FPGA_OE_N

5.0V3.3V

3.3V

3.3V

3.3V

5.0V

3.3V

3.3V

2.5V


HDMI_FPGA_SCL_DDC8

HDMI_FPGA_SDA_DDC8

HDMI_FPGA_OE_N8

HDMI_TX_P[2:0]11

HDMI_TX_N[2:0]11

HDMI_TX_CLK_P11

HDMI_TX_CLK_N11

HDMI_FPGA_HPD8

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




R86

2.0K

C170

1000pF

R74 4.7k

C144

1000pF

C157 0.1uF

C151 0.1uF

C145 0.1uF

C160

0.1uF

C153 0.1uF

C1750.1uF

C147 0.1uF

C162

0.1uF

R81 DNI

C172

1000pF

C166

0.1uF

C149 0.1uF

U16A

STHDLS101T

SDA_SRC8 SCL_SRC9

HPD_SRC7

OE_N25 DDC_EN32

FUNCTION334

REXT6

IN_D1n38 IN_D1p39

IN_D2n41 IN_D2p42

IN_D3n44 IN_D3p45

IN_D4n47 IN_D4p48

OUT_D1n23OUT_D1p22

OUT_D2n20OUT_D2p19

OUT_D3n17OUT_D3p16

OUT_D4n14OUT_D4p13

HPD_SINK30

SDA_SINK29SCL_SINK28

C163

0.1uF

C161

1000pF

R83

DNI

C148

1000pF

R73 4.7k

C167

0.1uF

C168

1000pF

U17


VLB2

IO_VL4C1 IO_VL3C2 IO_VL2C3 IO_VL1C4

GNDB4

VCCB1

IO_VCC1A4

IO_VCC2A3

IO_VCC3A2

IO_VCC4A1

ENB3

R78DNI

C143 0.1uF

R84

DNI

C164

0.1uF

R77 4.7k

R712.0K

C1740.1uF

C146

1000pF

R722.0K

C171

1000pF

C173

1000pF

R85

2.0K

R82

2.0K

C159

0.1uF

HDMI 19-Pin Connector

J10HDMI-19-01-F-SM

TMDS_DATA_N23 TMDS_DATA_P21



5V_VCC18

SCL15

TMDS_CLK_P10

TMDS_DATA_SHLD22

RESERVED_NC14

MT

G2

G2

TMDS_DATA_SHLD15

TMDS_DATA_SHLD08

SDA16

MT

G1

G1

TMDS_DATA_SHLD_CLK11 TMDS_CLK_N12

CEC13

DDC_CEC_GND17

HOT_PLUG_DETECT19

MT

G3

G3

MT

G4

G4

C169

1000pF

C165

0.1uF

U16B

STHDLS101T

GND1

VCC332

FUNCTION13

FUNCTION24

GND5

ANALOG210

VCC3311

GND12

VCC3315

GND18

VCC3321

GND24

VCC3326

GND27

GND31VCC33

33

FUNCTION435

GND36VCC33

40

GND43GND37VCC33

46

GND_EPAD49

R87

4.7k

C155 0.1uF

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

75 Ohm Impedance

75 Ohm Impedance

SDI Cable Driver, Equalizer, and SMB

RightAngle

RightAngle

From FPGA

From FPGA

Read-Only (Auto-Mute)

CAD Note:Route traces at secondary side

CAD Note:Route traces at secondary side

FPGA Interface

SDI_TXBNC_P

SDI_TXBNC_N

SDI_RX_CDn

SDI_IN_P1

SDI_EQIN_P1SDI_EQIN_N1

SDO_NSDO_P

SDI_TX_RSET

AEC

SDI_TXCAP_PSDI_TXCAP_N SDI_TXDRV_P

SDI_TXDRV_FILTER_P

SDI_TXDRV_FILTER_N

SDI_TXDRV_N

SDI_IN_FILTER_P1

SDI_SDASDI_SCL

SD

I_F

AU

LT

3.3V_SDI

3.3V_SDI

3.3V_SDI

3.3V_SDI

3.3V_SDI

3.3V_SDI

3.3V_SDI

3.3V

3.3V_SDI

3.3V_SDI

3.3V_SDI

SDI_RX_P 11SDI_RX_N 11

SDI_RX_EN7,19

SDI_RX_BYPASS7,19

SDI_TX_N11

SDI_TX_EN7,19

SDI_TX_SD_HDn7

SDI_TX_P11

SDI_SCL13

SDI_SDA13

SDI_FAULT13

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




R93 75

R100 75

C184

220nF

C180

0.01uF

C185

220nF

R99 75

L3 5.6nH1 2

C178 4.7uF

R101 37.4

C176 4.7uF

C186 1.0UF

R104

0

R102 10K

R98

75

CableDriver

U18

SDI Cable Driver, LMH0303SQx

SDI1

SDI2

VEE3

RREF4

VCC9

SD/HD10

SDO12

SDO11

CENTERPAD17

RSTI5

ENABLE6

SDA7

SCL8

FAULT13

NC514

NC615

RSTO16

R422

10K

R89 750

C188 4.7UF

R94 10K

L5 5.6nH1 2

C179 4.7uF

L2 5.6nH1 2

L4

120 ohm FBC181

22uF

R95

49.9

R103

0

C187 1.0UF

J12

Mini SMB

1

2345

C189 4.7UF

J11

Mini SMB

1

2 3 4 5

R90 75

C177 4.7uF

R97 75

D1

Green_LED

C182

0.1uF

U19

SDI Cable Equalizer, LMH0384SQ

VEE11

SPI_EN4

SDI2

SDI3

AEC+5

AEC-6

BYPASS7

MUTEref8 VEE2

9

SDO11

SDO10

AUTO_SLEEP12

MUTE14

CD15

VCC113

VCC216

DAP17

R91 75

R92 10K

R105 75

R96

49.9

C183

0.1uF

C190 1.0UF

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

HSMC Port

A

FPGA Interface

Cad Note:Place resistors near HSMC connector

CAD Note:Place near HSMC connector

CAD Note: Overlap pads on each resistor pair

To FPGA To HSMA connector

Design Note: If HSMC-to-PCIe adapter board is used and FPGA is configured as PCIe root port,remove R309 & R312 and populateR310 & R311 with 0 ohm resistors

HSMA_JTAG_TDO

HSMA_SCL





JTAG_TCK HSMA_JTAG_TMS





HSMA_CLK_OUT0



JTAG_FPGA_TDO_RETIMER







HSMA_RX_N3HSMA_RX_P3HSMA_RX_N4HSMA_RX_P4HSMA_RX_N5HSMA_RX_P5HSMA_RX_N6HSMA_RX_P6

HSMA_RX_N0HSMA_RX_P0

HSMA_RX_N7HSMA_RX_P7


HSMA_RX_N1HSMA_RX_P1HSMA_RX_N2HSMA_RX_P2










HSMA_CLK_IN_R_P2HSMA_CLK_IN_R_N2HSMA_PRSNTn

HSMA_D1HSMA_D3




















HSMA_D0HSMA_D2

HSMA_TX_CN6HSMA_TX_CP6

HSMA_CLK_IN0

HSMA_TX_CN4HSMA_TX_CP4HSMA_TX_CN5



HSMA_TX_CP5




HSMA_SDA

HSMA_CLK_IN_P2

REFCLK3_QR1_P

HSMA_CLK_IN_N2

REFCLK3_QR1_N

HSMA_CLK_IN_R_P2

HSMA_CLK_IN_R_N2

12V 3.3V

12V3.3V

HSMA_CLK_OUT_P[2:1]8,9

HSMA_CLK_OUT_N[2:1]8,9

HSMA_CLK_IN_N[2:1]13

HSMA_CLK_IN_P[2:1]13

HSMA_D[3:0]8

HSMA_TX_D_P[16:0]8,9,13

HSMA_TX_D_N[16:0]8,9,13

HSMA_RX_D_P[16:0]8,9

HSMA_RX_D_N[16:0]8,9

HSMA_PRSNTn9,19,25

REFCLK3_QR1_P11

REFCLK3_QR1_N11

HSMA_TX_P[7:0]11

HSMA_TX_N[7:0]11

HSMA_RX_N[7:0]11

HSMA_RX_P[7:0]11

HSMA_SDA 8

HSMA_SCL8

JTAG_TCK 12,15,19,24

HSMA_JTAG_TMS15

HSMA_JTAG_TDO 15

JTAG_FPGA_TDO_RETIMER 15,24

HSMA_CLK_OUT08

HSMA_CLK_IN013

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




R112 0

R118 0

R106 0R107 0

R113 0

R119 0

R108 0

R114 0

R120 0

R309 0

C191

10uF

R310 DNI

R109 0

R115 0

R121 0

R311 DNI

R312 0

R110 0

R116 0

C192

10uF

BANK 1

BANK 2

BANK 3

J13

CONN, HSMC_Male

11

33

55

77

99

1111

1313

1515

1717

1919

2121

2323

2525

2727

2929

3131

3333

3535

3737

3939

4141

4343

3.3V45

4747

4949

3.3V51

5353

5555

3.3V57

5959

6161

3.3V63

6565

6767

3.3V69

7171

7373

3.3V75

7777

7979

3.3V81

8383

8585

3.3V87

8989

9191

3.3V93

9595

9797

3.3V99

101101

103103

3.3V105

107107

109109

3.3V111

113113

115115

3.3V117

119119

22

44

66

88

1010

1212

1414

1616

1818

2020

2222

2424

2626

2828

3030

3232

3434

3636

3838

4040

4242

4444

12V46

4848

5050

12V52

5454

5656

12V58

6060

6262

12V64

6666

6868

12V70

7272

7474

12V76

7878

8080

12V82

8484

8686

12V88

9090

9292

12V94

9696

9898

12V100

102102

104104

12V106

108108

110110

12V112

114114

116116

12V118

120120

GN

D_

1_

11

61

GN

D_

1_

21

62

GN

D_

1_

31

63

GN

D_

1_

41

64

GN

D_

2_

11

65

GN

D_

2_

21

66

GN

D_

2_

31

67

GN

D_

3_

11

69

GN

D_

2_

41

68

GN

D_

3_

21

70

GN

D_

3_

31

71

GN

D_

3_

41

72

121121

3.3V123

125125

127127

3.3V129

131131

133133

3.3V135

137137

139139

3.3V141

143143

145145

3.3V147

149149

151151

3.3V153

155155

157157

3.3V159

122122

12V124

126126

128128

12V130

132132

134134

12V136

138138

140140

12V142

144144

146146

12V148

150150

152152

12V154

156156

158158

PSNTn160

R111 0

R117 0

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

RGMII Mode (default)

CAD Note: Place near 88E1111 PHY

10/100/1000 Ethernet

Design Note:MDI signals terminationCAD Note:Place near RJ-45 connector pins

CAD Note: Overlap pads on each resistor pair

ENET_CONFIG4

ENET_LED_RX

ENET_CONFIG5

ENET_LED_TX

ENET_LED_LINK100

ENET_LED_LINK1000

ENET_MDC

ENET_LED_TX

ENET_INTn

MDI_P1MDI_N1MDI_P2MDI_N2

ENET_RESETn

MDI_P3

ENET_LED_RX

ENET_LED_LINK1000ENET_LED_LINK100ENET_LED_LINK10

MDI_N3

MDI_N0

ENET_RSET

ENET_MDIO

MDI_P0

MDI_P1MDI_N1MDI_P2MDI_N2MDI_P3MDI_N3

MDI_N0MDI_P0

ENET_LED_RX

ENET_XTAL_25MHZ

ENET_LED_LINK10

ENET_LED_DUPLEX

ENET_LED_DUPLEX

ENET_LED_LINK1000

ENET_LED_LINK10

ENET_CONFIG4

ENET_CONFIG5

ENET_GTX_CLK

ENET_TX_EN

ENET_TX_D0ENET_TX_D1ENET_TX_D2ENET_TX_D3

ENET_RX_CLKENET_RX_DV

ENET_RX_D0ENET_RX_D1ENET_RX_D2ENET_RX_D3

2.5V

ENET_DVDD2.5V

2.5V

2.5V

2.5V

ENET_DVDD

2.5V

2.5V2.5V

2.5V

ENET_RESETn 8

ENET_INTn8

ENET_MDC8

ENET_RX_P 8ENET_RX_N 8

ENET_TX_N 8

ENET_TX_P 8

ENET_MDIO8

ENET_RX_D[3:0]8

ENET_TX_D[3:0]8

ENET_GTX_CLK8

ENET_TX_EN8

ENET_RX_CLK13

ENET_RX_DV 8

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




C193 0.01uF

D33

Green_LED

D4

Green_LED

C194 0.01uF

R125 4.7k

C202

0.1uF

V25

R304 220

C199

0.1uF

R127 49.9

R122 4.7k

R134

4.99K

1%

R137 220

R305 0

R132 49.9

C205

0.1uF

D3

Green_LED

R124 4.7k

C200

0.1uF

R306 DNI

J19

7499111001A

TD0_P1

TD0_N2

TD1_P3

TD1_N6

TD2_P4

TD2_N5

TD3_P7

TD3_N8

VCC9

GND10

GN

D_

TA

B1

1G

ND

_T

AB

12

R128 49.9

R286 10K

R138 220

U20B

Ethernet PHY, 88E1111

NC113

VSS97

DVDD1

DVDD6

DVDD10

DVDD15

DVDD57

DVDD62

DVDD67

DVDD71

DVDD85

AVDD32

AVDD36

AVDD35

AVDD40

AVDD45

AVDD78

VD

DO

X2

6

VD

DO

X4

8

VD

DO

5

VD

DO

21

VD

DO

88

VD

DO

96

VD

DO

H7

2

VD

DO

H6

6

VD

DO

H5

2

NC251

R133 49.9

R123 4.7k

D2

Green_LED

C203

0.1uF

R307 DNI

C207

0.1uF

C208

0.1uF

X5

25.00MHz

VCC4

GND2

OUT3

EN1

R139 220

R129 49.9

C209

0.1uF

R308 0

C210

0.1uF

C206

0.1uF

C196 0.01uF

GMII/MII/TBI INTERFACE

TEST

SGMII INTERFACE

JTAG

MDI INTERFACE

MGMT

U20A

Ethernet PHY, 88E1111

COMA27

RESET_N28

CONFIG658 CONFIG559 CONFIG460 CONFIG361 CONFIG263 CONFIG164 CONFIG065

125CLK22

XTAL155

XTAL254

VSSC53

RSET30

SEL_FREQ56

MDI3_P42

MDI3_N43

MDI2_P39

MDI2_N41

MDI1_P33

MDI1_N34

MDI0_P29

MDI0_N31

MDIO24

MDC25

INT_N23

HSDAC_P37

HSDAC_N38

GTX_CLK8

TX_CLK4

TX_EN9

RXCLK2

RX_DV94

CRS84

COL83

S_CLK_P79

S_CLK_N80

S_IN_P82

S_IN_N81

S_OUT_P77

S_OUT_N75

LED_TX68

LED_RX69

LED_DUPLEX70

LED_LINK100073

LED_LINK10074

LED_LINK1076

RXD095

RXD192

RXD293

RXD391

RXD490

RXD589

RXD687

RXD786

RX_ER3

TXD011

TXD112

TXD214

TXD316

TXD417

TXD518

TXD619

TXD720

TX_ER7

TMS46 TDO50 TDI44 TCK49 TRST_N47

C211

0.1uF

C201

0.1uF

C4330.01uF

R130 49.9

R136 220

C195 0.01uF

D5

Green_LED

C204

0.1uF

R135

4.7k

V24

R126 49.9

R131 49.9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

USB Blaster II Arria V USB Interface

MAX V USB INTERFACE

JTAG INTERFACE

PLACE NEAR MAX II EPM570

PLACE NEAR CY7C68013A

Design Note:GND isolation

CAD Note:Place R141, C214, C438 inside pennisula area underneath USB connector

SC_RX

SC_TX

JTAG_TX

JTAG_RX

FX2_PB0

FX2_RESETn

FX2_SDAFX2_SCL

FX2_WAKEUP

FX2_FLAGCFX2_FLAGBFX2_FLAGA

FX2_PB3FX2_PB2FX2_PB1

FX2_PB5FX2_PB4

FX2_PB6

FX2_PD0

FX2_PD2FX2_PD1

FX2_PD5FX2_PD4FX2_PD3

FX2_SLWRnFX2_SLRDn

FX2_PD7FX2_PD6

FX2_PB7

FX2_PA1

FX2_PA5FX2_PA4FX2_PA3FX2_PA2

FX2_PA7FX2_PA6

USB_CLK

24M_XTALOUT24M_XTALIN

FX2_RESETn

VBUS_5V

FX2_D_PFX2_D_N FX2_SLWRn

USB_DATA6USB_DATA5USB_DATA7

USB_ADDR0

USB_ADDR1

USB_SCL

USB_EMPTYUSB_FULL

USB_CFG1USB_CFG0

USB_SDA

USB_CFG3

USB_CFG2

USB_CFG11

USB_CFG9

USB_CFG8

USB_DATA3

USB_CFG10EXTRA_SIG2

USB_DATA1USB_DATA2

USB_DATA4

USB_CFG4EXTRA_SIG1

JTAG_RX

USB_CFG6

FACTORY_STATUS

USB_OEn

JTAG_TX

SC_RX

USB_CFG5USB_RESETn

USB_DATA0

USB_RDnUSB_WRn

SC_TX

FX2_PA2

FX2_PA7FX2_FLAGC

FX2_PA4FX2_PA3FX2_FLAGA

FX2_PB2FX2_PA6FX2_PB4

FX2_PB0FX2_FLAGB

USB_DISABLEnFX2_PB5FX2_PA1

USB_CFG7

FX2_RESETn

FX2_PB7USB_CLK

C_USB_MAX_TCKC_USB_MAX_TDI

MAX_SDA

FX2_PD2FX2_PD0

C_USB_MAX_TDOC_USB_MAX_TMSFX2_PD1

FX2_PD3

FX2_WAKEUPVBUS_5V

FX2_SDA MAX_SDA

USB_SCLUSB_SDAUSB_FULLUSB_EMPTY

C_JTAG_TDIC_JTAG_TMSC_JTAG_TDOC_JTAG_TCK

JTAG_BLASTER_TDIJTAG_TMSJTAG_BLASTER_TDOJTAG_TCK

M570_PCIE_JTAG_EN

M570_CLOCK

FX2_PB6

FX2_PB1

FX2_PD6FX2_SCLFX2_PB3

FX2_PD4JTAG_FPGA_TDO

FX2_SLRDnFX2_PD7FX2_PD5FX2_PA5C_JTAG_TDO

C_JTAG_TDIC_JTAG_TMS

C_JTAG_TCKJTAG_FPGA_TDO_RETIMER

FACTORY_REQUESTEXTRA_SIG0

JTAG_BLASTER_TDI

FACTORY_REQUEST

C_USB_MAX_TDOC_USB_MAX_TMS

C_USB_MAX_TCK

C_USB_MAX_TDI

3.3V3.3V

3.3V

1.8V

3.3V

3.3V

3.3V

2.5V 3.3V2.5V3.3V

2.5V

1.8V

2.5V

3.3V

USB_DATA[7:0]8

USB_FULL 8USB_EMPTY 8

USB_SDA 13

USB_RESETn 13USB_OEn 8USB_RDn 7USB_WRn 7

USB_ADDR[1:0]8

USB_SCL 7

USB_CLK 8,19

M570_PCIE_JTAG_EN19

JTAG_FPGA_TDO_RETIMER15,22

USB_DISABLEn 15

FACTORY_STATUS 19

M570_CLOCK 19

FACTORY_REQUEST 19

USB_CFG[11:0]19

EXTRA_SIG[2:0]19

JTAG_BLASTER_TDO12,15

JTAG_TMS12,15

JTAG_TCK12,15,19,22

JTAG_BLASTER_TDI15

JTAG_FPGA_TDO12

FX2_RESETn 8

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




R166 56.2

C2144.7nF

C225

0.1uF

R152 1k

C227

0.1uF

R153 1k

R157 1k

V2

C215

0.1uF

C216

12pF

J15

DNI

11

33

55

77

22

44

66

99 8

8

1010

R154 1k

R167 56.2

C217

12pF

R151 0

C221

0.1uF

R147 0

R156 0

C438

0.1uF

D6Green_LED

C212

0.1uF

J14USB Type B

1234

5

6

R148 0

C228

0.1uF

R155 1k

R158 0

MAX II

BANK 2

U21C

EPM570GF100

IO_B2_A1A1

IO_B2_A10A10

IO_B2_A2A2

IO_B2_A3A3

IO_B2_A4A4

IO_B2_A5A5

IO_B2_A6A6

IO_B2_A7A7

IO_B2_A8A8

IO_B2_A9A9

IO_B2_B10B10

IO_B2_B2B2

IO_B2_B3B3

IO_B2_B4B4

IO_B2_B5B5

IO_B2_B6B6

IO_B2_B7B7

IO_B2_B8B8

IO_B2_B9B9

IO_B2_C10C10

IO_B2_C3C3

IO_B2_C4C4

IO_B2_C7C7

IO_B2_C8C8

IO_B2_C9C9

IO_B2_D10D10

IO_B2_D8D8

IO_B2_D9D9

IO_B2_E8E8

IO_B2_E9E9

IO_B2_F10F10IO_B2_F9F9

IO_B2_G10G10

IO_B2_G8G8

IO_B2_G9G9

IO_B2_H10H10IO_B2_H9H9

IO_B2_J10J10

U24

TPD2EUSB30

D-2D+1

GND3

D7Green_LED

R149 0

R146 0

V3

R159 0

C229

0.1uF

C222

0.1uF

R150 0

R160 0

R145 2.0K

R165 1k

C223

0.1uF

D8Green_LED

R164 1k

R144 2.0K

C230

0.1uF

MAX II

BANK 1

U21B

EPM570GF100

IO_B1_B1B1

IO_B1_C1C1

IO_B1_C2C2

IO_B1_D1D1

IO_B1_D2D2

IO_B1_D3D3

IO_B1_E3E3

IO_B1_F1F1

IO_B1_F2F2

IO_B1_F3F3

IO_B1_G1G1

IO_B1_G2G2

IO_B1_G3G3

IO_B1_H1H1

IO_B1_H4H4

IO_B1_H7H7

IO_B1_H8H8

IO_B1_J3J3

IO_B1_J4J4

IO_B1_J5J5

IO_B1_J6J6

IO_B1_J8J8

IO_B1_J9J9

IO_B1_K1K1

IO_B1_K10K10

IO_B1_K2K2

IO_B1_K3K3

IO_B1_K4K4

IO_B1_K5K5

IO_B1_K6K6

IO_B1_K7K7

IO_B1_K8K8

C224

0.1uF

MAX II

POWER

U21A

EPM570GF100

GNDINTC5

GNDINTF5 GNDINTE6

GNDIOD5

GNDIOG7

GNDIOD7

GNDIOG5 GNDIOF6 GNDIOE5

GNDINTH5

VCCINTC6

VCCINTE7

VCCINTH6VCCINTF4

VCCIO2F7VCCIO2D6VCCIO2D4

VCCIO1E4

VCCIO1G4

VCCIO1G6

R140

10.0K

R1411M

C218

0.1uF

C231

0.1uF

U23

USB Microcontroller, CY7C68013A

RDY0A1

RDY1B1

XTALINC1

AVCCD1

DMINUSE1

AGNDF1

VCCG1

GNDH1

PD7A2

CLKOUTB2

XTALOUTC2

AVCCD2

DPLUSE2

AGNDF2

IFCLKG2

RESERVEDH2

PD5A3PD4B3

PD6C3

SCLF3

SDAG3

PB0H3

GNDA4

GNDB4

GNDC4

PB1F4

PB3G4PB2H4

VCCA5

VCCB5

PB6F5PB5G5PB4H5

PD3A6PD2B6

PA7C6

PA4F6

PA1G6

PB7H6

PD1A7

WAKEUPB7

PA6C7

GNDD7

VCCE7

PA3F7

CTL1G7CTL0H7

PD0A8

RESETB8

PA5C8

GNDD8

VCCE8

PA2F8

PA0G8

CTL2H8

VCCC5

V1

R162 56.2

D9Green_LED

U22

RESET, MAX811

GND1

RESET2

VCC4

MR3

R142 20K

C219

0.1uF

R163 56.2

Y3

24MHz

1 3

24

R161 DNI

MAX II

CONFIGURATION

U21D

EPM570GF100

IO2/GCLK2pF8

IO2/GCLK3pE10

IO1/DEV_CLRnK9

IO1/DEV_OEJ7

IO1/GCLK0pE2

IO1/GCLK1pE1

TCKH3 TDIH2

TMSJ1

TDOJ2

R143

100K

C226

0.1uF

C220

0.1uF

C213

0.1uF

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

PUSH BUTTON INTERFACE

LED INTERFACE

DIP SWITCH INTERFACE

2x16 LCD DISPLAY INTERFACE

2 x 7 Display Connector

User IO & Connector

USER DIPSWITCH

ON = 0OFF = 1

BOARD SETTINGS DIPSWITCH

Design Note:PCIe GEN2 link indication

Design Note:For debug connection toLTC DC1613 USB to I2C/SMBus/PMBusController

PMBus Interface

Push Button Switches

MAX_ERROR

MAX_CONF_DONEn RES_CONF_DONEn

RESn_HSMA_RX_LEDHSMA_RX_LED

HSMA_TX_LED RESn_HSMA_TX_LED



HSMA_PRSNTn

PCIE_LED_X4

PCIE_LED_X1

PCIE_LED_X8

PCIE_LED_G2

LCD_DATA1

USER_LED1

CLK_ENABLE

USER_LED2

FACTORY_LOAD

USER_LED3

LCD_DATA2

RESn_LED0USER_LED0

MAX_LOAD RES_MAX_LOAD

LCD_DATA3

LCD_D_Cn

LCD_DATA4

RESn_LED1

LCD_DATA5

RESn_LED2

RESn_LED3

LCD_DATA6

CLK_SEL

SECURITY_MODE

LCD_DATA7

RES_MAX_ERROR

MAX_RESETn

CPU_RESETn

RESn_PGM_LED1

RESn_PGM_LED2

PGM_LED1

PGM_LED2

PGM_LED0 RESn_PGM_LED0

PGM_SEL

PGM_CONFIG

LCD_CSnLCD_WEnLCD_DATA0

USER_PB0

USER_PB2

USER_PB1

5.0V

2.5V

2.5V

3.3V

2.5V

2.5V

2.5V

2.5V

2.5V

USER_DIPSW[3:0]9

CPU_RESETn 12,19

HSMA_RX_LED 9HSMA_TX_LED 9

LCD_WEn 10

LCD_CSn 10LCD_D_Cn 10

MAX_ERROR19

MAX_LOAD 19

USER_PB[2:0]9

MAX_CONF_DONEn19

PCIE_LED_X1 13

PCIE_LED_X8 9

PCIE_LED_X4 9

PCIE_LED_G2 13

HSMA_PRSNTn 9,19,22

LCD_DATA[7:0]10

USER_LED[3:0]9

PGM_SEL 19PGM_CONFIG 19

MAX_RESETn 19

PGM_LED[2:0]19

CLK_SEL14,19

CLK_ENABLE19

FACTORY_LOAD 19SECURITY_MODE 19

LTC3880_SDA_2.5V19,27

LTC3880_SCL_2.5V 19,27

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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25 35Wednesday, October 17, 2012



Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




R186 10KR185 56.2

D23 Green_LED

D21 Green_LED

S51 32 4

D22 Green_LED

D20 Green_LED

D10 RED_LED

R184 10K

R183 10K

S61 32 4

S31 2

R173 56.2

R182 10K

R190 10K

R181 56.2

R174 10K

R196 56.2

D16 Yellow_LED

J16

HDR 2X7, VT, THM, TSW-107-07

11

33

55

77

99

1111

1313

22

44

66

88

1010

1212

1414

D19 Yellow_LEDOPEN

SW4


1234 5

678

R412

DNI

R168 100

R195 56.2

S11 2

B2

2X16 LCD

R411

DNI

S71 32 4

D15 Green_LED

S21 2

R199 56.2

OPEN

SW3


1234 5

678

R193 56.2

D17 Yellow_LED

D24 Green_LED

R179 10K

D26 Green_LED

D25 Green_LED

R171 56.2

R188 56.2

R172 10K

R192 10K

R177 10K

R176 10K

D11 Green_LED

R189 56.2

R194 10K

R178 56.2

R169 10K

D12 Green_LED

R198 56.2

R187 56.2

D13 Green_LED

R170 10K

R197 56.2

S41 2

D14 Green_LED

B1

2X7 LCD SOCKET STRIP, THM

R180 56.2

R175 56.2

R191 10K

D18 Yellow_LED

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

14V - 20VDC Input

POWER LED

Power 1 - DC Input & 12V, 3.3V Output

Cad Note:Place cap across MOSFET drain and source pins

Cad Note:Place cap across MOSFETdrain and source pins

Cad Note:Route traces DIFFP/N differentially from load back to regulator pins 10 & 11

Cad Note:Place output caps near inductor


Cad Note:Place caps near regulator

CAD Note:Overlap resistor pad on 1 of the pins

CAD Note:Overlap resistor pad on 1 of the pins

Cad Note:Place Q15 near Q5

Cad Note:Use copper pour

Design Note:Reverse inputprotection

LTC4357_DUAL_DIODE

LTC3855_TG2

LTC3855_BG2

LTC3855_S2P

LTC3855_BOOST2

LTC3855_S2N

PGOOD_12V

LTC3855_VFB2

LTC3855_INTVCC

LTC3855_INTVCC

LTC3855_ITH2

LTC3855_SW1

LTC3855_SS1

LTC3855_SS2

LTC3855_BOOST1

LTC3855_S1N

LTC3855_INTVCC

LTC3855_VFB1LTC3855_ITH1

3.3V_SHDNn

DIFFOUT

12V_SHDNn

DIFFOUT

LTC3855_S1P

3.3V_MUXVCCP

3.3V_MUXVCC

LTC3855_TG1

LTC3855_BG1

LTC3855_SW2

LTC3855_FREQ

PGOOD_3.3V

PGOOD_3.3V

LTC3855_ILIM1

LTC3855_ILIM2

LTC3855_INTVCC

3.3V_SHDNn12V_SHDNn

DC_INPUT

3.3V

3.3V_PCIE

12V_PCIE

12V

5.0V3.3V_MUX

DC_IN

12V_MUX

3.3V_MUX

3.3V_MUX

3.3V_MUX

12V_MUX

DC_IN

DC_IN DC_IN

DC_IN

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




R204

1.62K

1%

V7

SENSE_PAD RS

NS

1S

NS

2

Q6

FDMC8878

5678

1 2 3

4

R221 100K

drain-tabQ15

RJK0301DPB

4

5

31 2R215

174K

1%

C252

0.1uF

R216

124K

1%

C253

0.1UF

C241

1000pF C232

47uF

35V

C246

39pF

C238

330uF6.3V

Q7

FDMC8878

5678

1 2 3

4

R219

3.24K

1%

R209

2.55K

1%

C23522uF25V

1210

C240

1000pF

D29

CMDSH-3

C236

0.1UF

D30

BLUE LED

C43922uF25V

1210

R21811.3K

1%

V6

SENSE_PAD

RSNS1

SNS2

SW5

SW SLIDE-4P2T

1

239

8

7

4

56

10

1211

R208 DNI

R211

DNI

U26

LTC4357

OUT1

GND4VDD6

NC5

GATE3

IN2

EP_GND7

V5

SENSE_PAD

RSNS1

SNS2

R223100K

U30LTC4352CDD

VIN1

CPO10

SOURCE12 GATE11 OUT

8

UV

3

OV

4S

TA

TU

S5

FA

UL

T6

VCC2

REV7EP13GND9

CH2

CH1

Q4

SI4816BDY

5

8

2

43

71

6

C237100UF6.3V

R202 DNI

U25

LTC4357

OUT1

GND4VDD6

NC5

GATE3

IN2

EP_GND7

C239

0.1uF

C248

100UF

25V

C44022uF25V

1210

gnd-pad

U27

LTC3855EUH-1

TK/SS11 ITH12

VFB13

SGND14

VFB25

ITH26

TK/SS27

SENSE2+8

SENSE2-9

PGOOD217

NC18

PGOOD116

TG220

BOOST221

PGND222

BG223

EXTVCC24 INTVCC25

PGND128

SW219

DIFFP10

DIFFN11

DIFFOUT12

RUN213

ILIM114

ILIM215

VIN26

BG127

BOOST129

TG130

SW131

CLKOUT32 PHSASMD33 MODE/PLLIN34 FREQ35

ITEMP236

ITEMP137 RUN138

SENSE1+39

SENSE1-40

SGND241

Q2

FDMC8878

5678

123

4

D27

MMBD1205

31

2

R213

DNI

Q1

FDMC8878

5678

123

4

C234

4.7UF

R225100K

U29 LTC4352CDD

VIN1

CPO10

SOURCE12

GATE11

OUT8

UV

3

OV

4S

TA

TU

S5

FA

UL

T6

VCC2

REV7

EP13

GND9

C1114

0.1UF

50V

R206

DNI

C244

10pF

C243

0.1UF

C233

47uF

35V

C24222uF25V

1210

L7

2.2uH

Isat = 13A

1 2

C1115

0.1UF

50V

R226

20K

C249

100UF

25V

Q3

FDMC8878

5678

123

4

R203

3.32K 1%

L6

3.3uH

Isat = 13.5A

1 2

R217 4.64K 1%

R222

1k

C250

220uF

16V

R220

100K

R214

215.0K

1%

R227

20K

U28

LTC4357

OUT1

GND4VDD6

NC5

GATE3

IN2

EP_GND7

C251

10pF

C247

33pF

drain-tab

Q5

RJK0305DPB4

5

31 2

C245

0.1UF

V4

SENSE_PAD

RS

NS

1S

NS

2

D28

CMDSH-3

J17

CONN JACK PWR

3

21

R207 11.5K

1%

R224

DNI

R210

169K

1%

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CAD Note:Place VCC on power plane furthest away from FPGA in stakcup Place VCCP on power plane closest to FPGA in stackup

CAD Note:Place C1092 & C1102 across regulator controller pin 33 & 34

CAD Note:Regulator input capsPlace across MOSFETdrain tab & source pins

CAD Note:Place near regulator controller pins

CAD Note:PGND and GND_PADshould be connectedat 1 point only

CAD Note:Place PNP BJT near inductor of individual pwr rail respectively

Design Note:External termperaturesensing diodes


Isat = 40A

Isat = 18A

Design Note:To system controller

Design Note:L15 DCR = 8m ohms

Design Note:2.1A Irms/100uF

Design Note:To increase the Vout to 1.15V,stuff R337 with 20K 1% andstuff R338 with 17.8K 1% parts

CAD Note:Route Vsense0 & Vsense1pseudo-differentially and tapoutput voltage near FPGAfor remote sensing

06031/10W

Design Note:Place 2.2 - 10 ohms for channel isolation

CAD Note:Regulator input capsPlace across MOSFETdrain tab & source pins

MAX V Interface

LTC3880_BOOST0

LTC3880_ASEL

LTC3880_1.1V_RUN

LTC3880_IS0PLTC3880_IS0N

LTC3880_R_IS0N

LTC3880_TG1

LTC3880_BG1

LTC3880_IS1NLTC3880_IS1P

LTC3880_SW1LTC3880_BOOST1

2.5V_TSNS11.1V_TSNS0

LTC3880_GPIO0_N

LTC3880_R_IS1N

LTC3880_ALERT_N

LTC3880_SDA

LTC3880_SHARE_CLK

LTC3880_SYNC

LTC3880_SCL

LTC3880_R_IS0P

LTC3880_VTRIM0_CFG

LTC3880_R_IS1PLTC3880_VOUT1_CFGLTC3880_VOUT0_CFG

LTC3880_FREQ_CFG

LTC3880_VTRIM1_CFG

LTC3880_2.5V_RUN

LTC3880_GPIO1_N

LTC3880_GPIO0_N

LTC3880_SDALTC3880_SCL

LTC3880_ALERT_N

PMBUS_LVL_SHIFTER_EN

LTC3880_BG0

LTC3880_TG0

LTC3880_SW0

1.1V_VCCP

1.1V 1.1V_VCC

12V12V

VDD25_LTC3880

VDD33_LTC3880

5.0V_LTC3880

5.0V_LTC3880

1.1V_VCC

12V

2.5V_FPGA

VDD33_LTC3880

VDD25_LTC3880

VDD25_LTC3880

2.5V_FPGA

VDD25_LTC3880

VDD33_LTC3880

VDD25_LTC3880

VDD25_LTC3880

VDD25_LTC3880

VDD33_LTC3880

3.3V 2.5V

2.5V_FPGA_FILTER


VCCAUX_VCCA_FPLL

VCCA_GXB

2.5V_FPGA

LTC3880_SDA_2.5V 19,25

LTC3880_SCL_2.5V 19,25

LTC3880_GPIO0_N_2.5V 19

LTC3880_ALERT_N_2.5V 19

LTC3880_1.1V_RUN 31

LTC3880_2.5V_RUN31

Title


Date: Sheet of

150-0320806-A1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-A1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-A1 (6XX-44099R) C1.1


B




C456

10UF

C465

0.1uF

25V

R335 15K

1%

R342 2.0K

R328 10K

R337 DNI1%

R424 8061%

C443

100UF25V

C454

330uF

C466

0.1UF

C446

1.0UF C449

0.1uF

C459 560pF

C1108

0.1uF

U43


VLB2

IO_VL4C1IO_VL3C2IO_VL2C3IO_VL1C4

GNDB4

VCCB1

IO_VCC1A4

IO_VCC2A3

IO_VCC3A2

IO_VCC4A1

ENB3

R329 10K

C1111

100UF6.3V

C458

0.1uF

C457

0.01uF

R341 DNI

1%

R330 10K

C448

4.7uF

drain-tab Q14RJK0301DPB4

5

31 2

C463 1uF

C4730.1uF

V29

SENSE_PAD

RS

NS

1S

NS

2

R331 10K

R323 8061%

R339 DNI1%

C445

100UF

25V L18

1.2uH

12

C470 1uF

R228 0.001

R325 10K

R408 10K

C467

100UF6.3V

L13

4A, 33 Ohm FB

C462 560pF

R410 10K

R343 24.9K1%

C460

0.01uF

L16

0.22uH

12

V26

SENSE_PAD

RSNS1

SNS2

R2470.003

C447

0.1UF

R336 2.0K

R409 10K

V27

SENSE_PAD

RS

NS

1S

NS

2

R2480.003

D35

CMDSH-3

R322 11.5K1%

Q11MMBT3906

32

1

U42

LTC3880

VSENSE0+1

VSENSE0-2

ISENSE1+3

ISENSE1-4

ITH05

ISENSE0+6

ISENSE0-7

SYNC8

SCL9 SDA

10

ALERT11

GPIO012

GPIO113

RUN014

RUN115

ASEL16

FREQ_CFG17

VOUT0_CFG18

VOUT1_CFG19

VTRIM0_CFG20

VTRIM1_CFG21

VDD2522

WP23 SHARE_CLK24

VDD3325

ITH126

VSENSE127

TSNS128

SW129

TG130

BOOST131

BG132

INTVCC33

PGND34

VIN35

BG036

BOOST037

TG038

SW039

TSNS040

GND_PAD41

R340

DNI

Q12MMBT3906

32

1

drain-tab

Q13

RJK0305DPB4

5

31 2

R2490.003

R344 4.32K

1%

C44222uF25V

1210

C461 82pF

C469

0.1uF

R345 10.0K1%

C452

100UF6.3V

C455

330uF

R327 4.99K

L15

4A, 33 Ohm FB

R326

10K

C468

100UF6.3V

R333 4.32K

1%

drain-tab

Q9RJK0305DPB

4

5

31 2

R334 20K1%

V28

SENSE_PAD

RSNS1

SNS2

R332 24.9K1%

C474 0.1uF

C450

1.0UF

R319 10K

drain-tab

Q10

RJK0301DPB4

5

31 2

R346 23.2K

1%

C1211

100UF6.3V

R338 DNI

1%

C453

100UF6.3VR318 10K

R324 19.1K1%

R421 10

D34

CMDSH-3

C464 27pF

R321

DNI

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Cad Note:Place near INTVCC pin

Design Note:Soft-start, tss = 430000 ohm x CssCss = 2.2nF, ramp rate ~ 1ms

CAD Note:Regulator input capsPlace near regulator controller


Cad Note:Place output caps near inductor Cad Note:

Place output caps near inductor

Design Note:DCR = 40m ohms

Design Note:0.001 ohm sense resistorminimized IR drop @ 3A

LTC3633_V2P5

LT

C3

63

3_

INT

VC

C

LT

C3

63

3_

INT

VC

C

LTC3633_BOOST2

LT

C3

63

3_

SS

1

LT

C3

63

3_

SS

2

PG

OO

D_

1.5

V

LTC3633_FB1

LTC3633_INTVCC

LTC3633_SW1 LTC3633_SW2

LTC3633_BOOST1

LTC3633_ITH1 LTC3633_ITH2

LTC3633_FB2

1.15V 1.5V

3.3V 3.3V

12V 12V

12V

VCCT_GXB

1.5V_VCCIO

1.15V VCCL_VCCR_GXB

PGOOD_1.15V_XCVR31

RUN_1.15V_XVCR31

RUN_1.5V30,31

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




L9

3A, 30 Ohm FB

C2570.1uF

R237

16.5K

1%

C263

22pF

C260

DNI

C267

47pF

C259

0.1uF

25V

C262

22uF R236

15K

1%

C261

22uF

C27022uF25V

1210

R230

100K

C258

0.1uF

25V

R240

9.76K

1%

C27322uF25V

1210

C266

47pF

R2340.003

C254 2.2uF

C256

2200pF

C264

22uF

C269

2200pF

R241

357K

1%

C255

2200pF

R239

6.81K

1%

R229 0.001

L10

1.2uH

Isat = 11A

C265

22uF

C27122uF25V

1210

R235

15K

1%

L11

1.2uH

Isat = 11A

C268

8200pF

R231

100K

R238

10.0K

1%U31LTC3633UFD

VON125

BOOST120

INT

Vcc

19

BOOST217

GN

D7

VON212

FB29

TR

AC

K/S

S2

10

ITH211

PG

OO

D2

8

SW2A13SW2B14

PV

IN2

15

PV

IN2

16

RUN26

RT

5

MO

DE

/SY

NC

4

RUN13

PV

IN1

21

PV

IN1

22

SW1A23

SW1B24

PG

OO

D1

1

TR

AC

K/S

S1

27

FB128

PG

ND

29

ITH126

PHMODE2

V2P518

C27222uF25V

1210

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Power 3 - 2.5V Main


CAD Note:Regulator input capsPlace near regulator controller

Design Note:Prefer 0603 size cap25V rated voltage is sufficient

Design Note:Ith is tied to INTVCC forinternal compensation

CAD Note:Overlap R289 & R290pads at 1 of the pinsPlace resistor & capnear pin 6

3.3V

Design Note:Added extra 1uF at INTVCC due tosourcing Vbias pin of LTC3025-1

Design Note:tss = Css x 0.6V/2uARamp rate ~990us

2.5V @ 2.9A

PG

OO

D_

2.5

V

LTC3605_BOOST

LTC3605_SW

LTC3605_RT

LTC3605_FB

LTC3605_FB

LTC3605_SS

LTC3605_SVIN

LTC3605_INTVCC

LTC3605_SVIN

LTC3605_ITHLTC3605_INTVCC

2.5V

3.3V

12V

Title


Date: Sheet of

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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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C437 DNI

C292 3300pFC288

22uF

C286

0.1UF

50V

C436 DNI

C291

22uFEXPOSED PAD

LTC3605EUFU33

RT1

PHMODE2

MODE3

FB4

TRACK/SS5

ITH6

RU

N7

PG

OO

D8

VO

N9

PG

ND

10

SW

11

SW

12

SW13

SW14

SW15

SW16

PVIN17

PVIN18

SV

IN1

9

BO

OS

T2

0

INT

VC

C2

1

SG

ND

22

CL

KO

UT

23

CL

KIN

24

PG

ND

25

R252

15K

1%

R255 100K

C28422uF25V

1210

C290

22uFR251

47.5K

1%

C287

22uFC289

39pF

C283

0.1uF

25V

L14

1.2uH

Isat = 11A

C282 2.2uF

D32

CMDSH-3

R290 DNI 1%

C28522uF25V

1210

R250

178K

1%

R289 0

R246 10

C281 1.0UF

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Power 4 - Linear Regulators

1.0V @ 250mA

1.5V @ 242mA

Design Note:Vout = 0.4V (1 + R2/R1)R2 connects to VoutR1 connects to GNDR1 < 50k OhmSource: LTC3025-1 datasheet

CAD Note:Place resistors near ADJ pin

Design Note:Connect BIAS pin to VDD33_LTC3880to minimize 1.5V_FPGA from risingbefore 2.5V_FPGA is stableVDD33_LTC3880 = 3.3V

VCCH_GXB, VCCD_FPLL & VCCBAT

1.8V @ 200mA

Flash VCC/VPP & MAXV/MAXII VCCINT

Ethernet PHY DVDD/VDDO

Design Note:Vout = 600mV x (1 + R2/R1) - (Iadj x R2)R2 connects to VoutR1 connect to GNDVadj = 600mVIadj = 0.3nA @ 25CSource: LT3009 datasheet

5.37V @ 0.3mA

Power Monitor VIN

5V @ 8.8mA

VTT LDO, LCD Character, SPI Level Shifter

0.75V VTT (3A Sink/Src)

DDR3 VTT

CAD Note:Place caps & resnear regulator

CAD Note:Place caps & resnear regulator

CAD Note:Place caps & res near regulatorPlace U38 at the same side asDDR3 addr/ctrl/cmd termination resistor packs and capacitor arraysPour copper on outer layer to coverthese components



ENET_DVDD_ADJ

1.5V_FPGA_ADJ

1.8V_ADJ

5.37V_MONITOR_ADJ

5.0V_ADJ

TPS51100_S5TPS51100_S3

5.0V

2.5V

ENET_DVDD

2.5V_FPGA

5.0V

2.5V

1.5V_FPGA

1.8V

5.37V_MONITOR12V

5.0V12V

0.75V_VTT

1.5V

VREF_DDR3

VCCH_GXB

VCCD_FPLL_VCCBAT

5.0V

VDD33_LTC3880

RUN_1.5V28,31

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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U34

LTC3025-1

BIAS1

GND2

ADJ5

OUT4

SHDN6

EP_GND7

IN3

U39

LTC3025-1

BIAS1

GND2

ADJ5

OUT4

SHDN6

EP_GND7

IN3

R263 4.02K

1%

C3121.0UF

C301

2.2UF

R260

1.15K

1%

C308

10uF

R267 10K

C293

0.1uF

R257 3.16K

1%

C300

2.2uF

25V

C310

1.0UF

C307

10uF

R265

15K

1%

R262 110K

1%

R2560.003

C302

2.2uF

C303

1.0UF

C306

0.1uF

C297

1.0UF

TPS51100DGQU38

VIN10

S37

S59

VTTREF6

VLDOIN2

VDDQSNS1

VTT3

VTTSNS5

PG

ND

4

GN

D8

GN

D1

1

R2580.003

U37

LTC3025-1

BIAS1

GND2

ADJ5

OUT4

SHDN6

EP_GND7

IN3

C311

1.0UF

TA

B

LT3009xDC

U35

IN4

OUTPUT3

GN

D7

GN

D6

OUTPUT2

ADJ/NC1SHDN

5

R269

10.0K

1%

R261

11.5K

1%

C298

2.2UF

R259 90.9K

1%

R266 10K

C305

10uF

C295

1.0UF

C299

0.1uF

C309

2.2uF

C294

2.2uF

25V

C304

1.0UF

C296

2.2uF

R264

1.15K

1%

R268 15K

1%

TA

B

LT3009xDC

U36

IN4

OUTPUT3

GN

D7

GN

D6

OUTPUT2

ADJ/NC1SHDN

5

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Power 5 - Power Monitor

Fan Header

1.1V Voltage Supervisor

Design Note:1.1V power good generation

Design Note:R2 = R1 (2*Vnom - 1) whereR2 is resistor connected to GNDR1 is resistor connected to powerrail being monitoredVnom is nominal voltage of powerrail being monitored

CAD Note:Overlap pads between cap and resistor

2.5V Voltage Supervisor

Design Note:2.5V power good generation

CAD Note:Overlap pads between cap and resistor

Design Note:Set TOL threshold outsidepower supply tolerance band

Design Note:Set TOL threshold outsidepower supply tolerance band

Design Note:DNI for ES device

Cad Note:Overlap pad on 1 pin

Design Note:DNI for ES device

Cad Note:Overlap pad on 1 pin

To/from system controller

1.1V & 1.15 Switching Regulator Interface

TSENSE_FAN_CNTL

SENSE5_SCK

SENSE5_SCK

LTC2418_REF-

LTC2418_REF+

SENSE5_CS0nSENSE5_SDO

SENSE5_SDO

SENSE5_CS0n

A5_VCCINT_PA5_VCCINT_N

A5_VCCL_VCCR_VCCT_GXB_NA5_VCCL_VCCR_VCCT_GXB_P

A5_VCCIO_1.5V_NA5_VCCIO_1.5V_P

A5_VCCIO_VCCPD_VCCPGM_NA5_VCCIO_VCCPD_VCCPGM_P

A5_VCCAUX_VCCA_FPLL_NA5_VCCAUX_VCCA_FPLL_P

A5_VCCA_GXB_NA5_VCCA_GXB_P

A5_VCCH_GXB_NA5_VCCH_GXB_P

A5_VCCD_FPLL_VCCBAT_NA5_VCCD_FPLL_VCCBAT_P

SENSE5_SDI

SENSE5_SDI

A5_VCCAUX_VCCA_FPLL_N

A5_VCCAUX_VCCA_FPLL_P

A5_VCCIO_1.5V_N

A5_VCCIO_1.5V_P

A5_VCCIO_VCCPD_VCCPGM_N

A5_VCCIO_VCCPD_VCCPGM_P

A5_VCCD_FPLL_VCCBAT_N

A5_VCCD_FPLL_VCCBAT_P

A5_VCCINT_N

A5_VCCINT_P

A5_VCCL_VCCR_VCCT_GXB_N

A5_VCCL_VCCR_VCCT_GXB_P

A5_VCCH_GXB_N

A5_VCCH_GXB_P

A5_VCCA_GXB_N

A5_VCCA_GXB_P

OVERTEMP_R

LTC3880_1.1V_RUN

PGOOD_1.1V_VCC

LTC2915_TOL_1.1VLTC2915_RT_1.1V

LTC2915_VM_0P5V

PGOOD_1.15V_XCVR

PGOOD_1.1V_VCC

LTC2915_TOL_2.5VLTC2915_RT_2.5V

LTC3880_1.1V_RUN

PGOOD_2.5V_FPGA

LTC2915_RT_2.5V

LTC2915_RT_1.1V

12V

5.0V

5.37V_MONITOR

5.0V

2.5V

2.5V

1.5V_VCCIO

2.5V_FPGA


2.5V_FPGA_FILTER

1.1V

1.1V_VCC

1.5V_FPGA

VCCL_VCCR_GXB

VCCA_GXB

1.5V

VCCH_GXB

1.15V

VCCD_FPLL_VCCBAT

1.5V_FPGA

2.5V_FPGA_FILTER

VCCAUX_VCCA_FPLL

3.3V

3.3V3.3V

3.3V

1.1V_VCC

3.3V

3.3V

3.3V

3.3V

3.3V


SENSE_SDO 19

SENSE_SCK 19

SENSE_SDI 19

SENSE_CS0n 19

OVERTEMP19

OVERTEMP_FPGA 9

LTC3880_2.5V_RUN27

RUN_1.15V_XVCR28

LTC3880_1.1V_RUN27

PGOOD_1.15V_XCVR28

RUN_1.5V28,30

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




R381 12.4K

V11

SENSE_PAD

RSNS1

SNS2

C1106

0.1uF

U45

LTC2915

GND1

TOL/MR2

SEL13

VM4

VCC5

SEL26

RT7

RST8

EPAD9

R275

DNI

R270

0

R279 4.7k

V20

SENSE_PAD

RSNS1

SNS2

R2

72

10

K

C1020

0.1uF

C1210 1.0UF

R415 DNI

U44

LTC2915

GND1

TOL/MR2

SEL13

VM4

VCC5

SEL26

RT7

RST8

EPAD9

R278 DNI

R277 10K

R396 0

V21

SENSE_PAD

RSNS1

SNS2

V17

SENSE_PAD

RSNS1

SNS2

R416 DNI

C1107 DNI

R386 DNI

C1105 DNI

V16

SENSE_PAD

RSNS1

SNS2

R232 DNI

V18

SENSE_PAD

RSNS1

SNS2

J18

22_23_2021

12

U40

ADC, LTC2418 16-Ch

CH021

CH122

CH223

CH324

CH425

CH526

CH627

CH728

CH81

CH92

CH103

CH114

CH125

CH136

CH147

CH158

COM10

GND15

VCC9

REF+11

REF-12

F019

CSn16SCK18SDI20SDO17

NC113

NC214

R2

73

10

K

V12

SENSE_PAD

RSNS1

SNS2

R401 DNI

V19

SENSE_PAD

RSNS1

SNS2

R406 DNI

V9

SENSE_PAD

RSNS1

SNS2

V22

SENSE_PAD

RSNS1

SNS2

C313

0.1uF

R276

0

V8

SENSE_PAD

RSNS1

SNS2

R407 0

V23

SENSE_PAD

RSNS1

SNS2

R233 0

R400 0

V14

SENSE_PAD

RSNS1

SNS2

C314

10uF

C1209 0.1uF

R2

74

10

K

R420 10K

U41


VL1

IO VL12

IO VL23

IO VL34

IO VL45

NC16

GND7

VCC14

IO VCC113

IO VCC212

IO VCC311

IO VCC410

NC29

/TS8

V15

SENSE_PAD

RSNS1

SNS2

R399 10K

C1208 0.1uF

V10

SENSE_PAD

RSNS1

SNS2

V13

SENSE_PAD

RSNS1

SNS2

R2

71

10

K

Q8FDV305N

R382 15K

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Power 6 - Arria V GX Power

1.5V

VCCL_VCCR_GXB

VCCT_GXB1.5V_VCCIO

VREF_DDR3

2.5V_VCCIO_VCCPD_VCCPGM2.5V_VCCIO_VCCPD_VCCPGM

VREF_2.5V_VCCIOVREF_2.5V_VCCIO

VCCAUX_VCCA_FPLL

VCCA_GXB

VCCH_GXB

VCCD_FPLL_VCCBAT



VCCD_FPLL_VCCBAT

VREF_2.5V_VCCIO2.5V_VCCIO_VCCPD_VCCPGM

1.1V_VCC

1.1V_VCCP

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Arria V GX IO Bank Power

Version 2.0 Pin Out

5AGXFB3H4F35

U1J

VCCIO3AAD30

VCCIO3AAF27

VCCIO3AAH30

VCCIO3AAJ27

VCCIO3AAK30

VCCIO3AAM27

VREFB3AN0AE27

VCCIO3BAF24

VCCIO3BAJ24

VCCIO3BAM24

VCCIO3BAP24

VREFB3BN0Y23

VCCIO3CAF21

VCCIO3CAJ21

VCCIO3CAM21

VCCIO3CAP21

VREFB3CN0AC20

VCCIO3DAF18

VCCIO3DAJ18

VCCIO3DAM18

VCCIO3DAP18

VREFB3DN0AB18

VCCIO4AAD5

VCCIO4AAF5

VCCIO4AAH5

VCCIO4AAK5

VREFB4AN0AK6

VCCIO4BAF9

VCCIO4BAJ9

VCCIO4BAM9

VCCIO4BAP9

VREFB4BN0AE8

VCCIO4CAF12

VCCIO4CAJ12

VCCIO4CAM12

VCCIO4CAP12

VREFB4CN0AK11

VCCIO4DAF15

VCCIO4DAJ15

VCCIO4DAM15

VCCIO4DAP15

VREFB4DN0AJ14

VCCIO7AC5

VCCIO7AF2

VCCIO7AF5

VCCIO7AL7

VREFB7AN0M7

VCCIO7BA9

VCCIO7BC9

VCCIO7BF9

VCCIO7BJ9

VREFB7BN0P11

VCCIO7CA12

VCCIO7CC12

VCCIO7CF12

VCCIO7CJ12

VREFB7CN0M13

VCCIO7DA15

VCCIO7DC15

VCCIO7DF15

VCCIO7DJ15

VREFB7DN0N14

VCCIO8AC27

VCCIO8AC30

VCCIO8AF27

VCCIO8AF30

VCCIO8AJ29

VCCIO8AM26

VREFB8AN0M27

VCCIO8BA24

VCCIO8BC24

VCCIO8BF24

VCCIO8BJ24

VREFB8BN0N24

VCCIO8CA21

VCCIO8CC21

VCCIO8CF21

VCCIO8CJ21

VREFB8CN0N20

VCCIO8DA18

VCCIO8DC18

VCCIO8DF18

VCCIO8DJ18

VREFB8DN0N18

Arria V GX Core Power

VCC Core Pwr1.1V

Configuration Pin Pwr1.8/2.5/3.0/3.3V

Battery Backup Pwr1.2V - 3.0V

Auxiliary Pwr2.5V

PLL AnalogPwr 2.5V

PLL Digital Pwr 1.5V

I/O Pre-driver Pwr2.5/3.0/3.3V

Version 2.0 Pin Out

VCC Periphery Pwr 1.1V

5AGXFB3H4F35

U1I

VCCPP18

VCCPR13

VCCPR21

VCCPT10

VCCPU25

VCCPV10

VCCPW25

VCCPY12

VCCPY19

VCCPY22

VCCR14

VCCR15

VCCR19

VCCR23

VCCR25

VCCT12

VCCT14

VCCT16

VCCT18

VCCT20

VCCT22

VCCT24

VCCU11

VCCU12

VCCU13

VCCU15

VCCU17

VCCU19

VCCU20

VCCU21

VCCU22

VCCU23

VCCV12

VCCV14

VCCV16

VCCV20

VCCV22

VCCV24

VCCW13

VCCW15

VCCW17

VCCW19

VCCW21

VCCW23

VCCY13

VCCY20

VCCV18

VCCBATM28

VCCPGMM9

VCCPGMAC26

VCC_AUXP12

VCC_AUXP24

VCC_AUXW11

VCC_AUXY24

VCCA_FPLLY18

VCCA_FPLLR17

VCCA_FPLLV26

VCCA_FPLLV9

VCCA_FPLLT26

VCCA_FPLLT9

VCCD_FPLLY17

VCCD_FPLLR16

VCCD_FPLLY26

VCCD_FPLLY9

VCCD_FPLLP26

VCCD_FPLLP9

VCCPD3AB26

VCCPD3AC27

VCCPD3Y21

VCCPD3Y25

VCCPD4AAB6

VCCPD4AAB9

VCCPD4BCDY10

VCCPD4BCDY14

VCCPD4BCDY16

VCCPD7AN8

VCCPD7AN9

VCCPD7BCDP14

VCCPD7BCDP16

VCCPD7BCDR11

VCCPD8N26

VCCPD8N27

VCCPD8P20

VCCPD8P22

R280 10.0K

1%

Arria V GX Transceiver Power

Analog PwrTX/RX High Pwr2.5V

Analog PwrTX Output Buffer Pwr1.5V

Analog PwrTX Pwr1.1V

Analog PwrCLK Network Pwr1.1V

Analog PwrRX Pwr1.1V


U1K

VCCA_GXBL0Y28

VCCA_GXBL1T28

VCCA_GXBR0Y7

VCCA_GXBR1T7

VCCH_GXBL0V28

VCCH_GXBL1P28

VCCH_GXBR0V7

VCCH_GXBR1P7

VCCT_GXBL0W29

VCCT_GXBL0Y30

VCCT_GXBL1R29

VCCT_GXBL1T30

VCCT_GXBR0W6

VCCT_GXBR0Y5

VCCT_GXBR1R6

VCCT_GXBR1T5

VCCL_GXBL0V29

VCCL_GXBL0V30

VCCL_GXBL1P29

VCCL_GXBL1P30

VCCL_GXBR0V5

VCCL_GXBR0V6

VCCL_GXBR1P5

VCCL_GXBR1P6

VCCR_GXBLAA29

VCCR_GXBLAA30

VCCR_GXBLN30

VCCR_GXBLU29

VCCR_GXBLU30

VCCR_GXBRAA5

VCCR_GXBRAA6

VCCR_GXBRN5

VCCR_GXBRU5

VCCR_GXBRU6

R281

10.0K

1%

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Power 7 - Arria V GX Ground

Design Note:For debug onlyR291 is 1k resistorInstall R291 and DNIR292 to bypass POR

CAD Note:Overlap pad at 1 of theR291 & R292 pins

TESTPOR


Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


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Arria V GX GND

Version 2.0 Pin Out

5AGXFB3H4F35

U1N

GNDAK28

GNDAK7

GNDAN10

GNDAN13

GNDAN16

GNDAN19

GNDAN22

GNDAN25

GNDAN28

GNDAN31

GNDAN4

GNDAN7

GNDB1

GNDB10

GNDB13

GNDB16

GNDB19

GNDB22

GNDB25

GNDB28

GNDB31

GNDB4

GNDB7

GNDD2

GNDD4

GNDE10

GNDE13

GNDE16

GNDE19

GNDE22

GNDE25

GNDE28

GNDE31

GNDE7

GNDH10

GNDH13

GNDH16

GNDH19

GNDH22

GNDH25

GNDH28

GNDH7

GNDL10

GNDL13

GNDL16

GNDL19

GNDL22

GNDL25

GNDL28

GNDL8

GNDM6

GNDN7

GNDP10

GNDP13

GNDP15

GNDP17

GNDP19

GNDP21

GNDP23

GNDP25

GNDR10

GNDR12

GNDR18

GNDR20

GNDR22

GNDR24

GNDT11

GNDT13

GNDT15

GNDT17

GNDT19

GNDT21

GNDT23

GNDT25

GNDU10

GNDU14

GNDU16

GNDU24

GNDV11

GNDV13

GNDV15

GNDV17

GNDV19

GNDV21

GNDV23

GNDV25

GNDW10

GNDW12

GNDW14

GNDW16

GNDW18

GNDW20

GNDW22

GNDW24

GNDU18

Arria V GX GND

Version 2.0 Pin Out

5AGXFB3H4F35

U1M

GNDAE1

GNDAE2

GNDAE5

GNDAF3

GNDAF4

GNDAG1

GNDAG2

GNDAG5

GNDAH3

GNDAH4

GNDAJ1

GNDAJ2

GNDAJ5

GNDAK3

GNDAK4

GNDAL1

GNDAL2

GNDAL3

GNDAN1

GNDF3

GNDF4

GNDG1

GNDG2

GNDG5

GNDH3

GNDH4

GNDJ1

GNDJ2

GNDJ5

GNDK3

GNDK4

GNDL1

GNDL2

GNDL5

GNDM3

GNDM4

GNDM5

GNDN1

GNDN2

GNDN6

GNDP3

GNDP4

GNDP8

GNDR1

GNDR2

GNDR5

GNDR7

GNDT3

GNDT4

GNDT6

GNDT8

GNDU1

GNDU2

GNDU7

GNDV3

GNDV4

GNDV8

GNDW1

GNDW2

GNDW5

GNDW7

GNDY3

GNDY4

GNDY6

GNDY8

GNDAA11

GNDAA13

GNDAA16

GNDAA19

GNDAA22

GNDAA24

GNDAD10

GNDAD13

GNDAD16

GNDAD19

GNDAD22

GNDAD25

GNDAD28

GNDAD7

GNDAG10

GNDAG13

GNDAG16

GNDAG19

GNDAG22

GNDAG25

GNDAG28

GNDAG7

GNDAK10

GNDAK13

GNDAK16

GNDAK19

GNDAK22

GNDAK25

Arria V GX GND

Version 2.0 Pin Out

5AGXFB3H4F35

U1L

GNDH5

GNDB33

GNDAA26

GNDAA33

GNDAA34

GNDAB27

GNDAB28

GNDAB29

GNDAB30

GNDAB31

GNDAB32

GNDAC30

GNDAC33

GNDAC34

GNDAD31

GNDAD32

GNDAE30

GNDAE33

GNDAE34

GNDAF31

GNDAF32

GNDAG30

GNDAG33

GNDAG34

GNDAH31

GNDAH32

GNDAJ30

GNDAJ33

GNDAJ34

GNDAK31

GNDAK32

GNDAL33

GNDAL34

GNDE34

GNDF31

GNDF32

GNDG30

GNDG33

GNDG34

GNDH31

GNDH32

GNDJ30

GNDJ33

GNDJ34

GNDK31

GNDK32

GNDL30

GNDL33

GNDL34

GNDM31

GNDM32

GNDN28

GNDN29

GNDN33

GNDN34

GNDP27

GNDP31

GNDP32

GNDR28

GNDR30

GNDR33

GNDR34

GNDT27

GNDT29

GNDT31

GNDT32

GNDU28

GNDU33

GNDU34

GNDV27

GNDV31

GNDV32

GNDW28

GNDW30

GNDW33

GNDW34

GNDY27

GNDY29

GNDY31

GNDY32

GNDAA1

GNDAA2

GNDAA9

GNDAB3

GNDAB4

GNDAB5

GNDAB7

GNDAB8

GNDAC1

GNDAC2

GNDAC5

GNDAD3

GNDAD4

R291 DNI

R292

0

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A


1.15V

1.15V CAD Note:Place near VCCR_GXBR pins(sch pg 33)

CAD Note:Place near VCCR_GXBL pins(sch pg 33)

CAD Note:Place near VCCL_GXBR0 pins (sch pg 33)

CAD Note:Place near VCCL_GXBR1pins (sch pg 33)

CAD Note:Place near VCCL_GXBL0 pins (sch pg 33)

CAD Note:Place near VCCL_GXBL1 pins (sch pg 33)

CAD Note:Place near VCCT_GXBR0pins (sch pg 33)

CAD Note:Place near VCCT_GXBR1pins (sch pg 33)

CAD Note:Place near VCCT_GXBL0pins (sch pg 33)

CAD Note:Place near VCCT_GXBL1pins (sch pg 33)

1.5V

1.5V 2.5V

2.5V

CAD Note:Place each cap on each VCCH_GXB pin (sch pg 33)

1.1V_VCC 1.1V_VCCP

VCCT_GXB

VCCL_VCCR_GXB

VCCH_GXB

VCCD_FPLL_VCCBAT VCCA_GXB

VCCAUX_VCCA_FPLL

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




C328

47nF

C332

22nF

C1117100UF

C1147

22nF

SCREW5

C1197

1uF

C432

2.2uF

C1124

22nF

C318

0.47uF

C1193

47nF

C1157

47nF

C1196

1uF

C1152

47nFC384

22nF

SCREW6

C1140

0.22uF

C1127

22uF

C1134

22nF

C373

22nF

C375

22nF

C1141

0.1uF

C1125

22nF

SPACER1

C319

0.22uF

C1120100UF

C1153

47nF

C1118

10uF

C1159

47nF

C1128

22uF

C1135

22nF

C420

47nF

C1206

22nF

C1142

0.1uF

C1132

0.47uF

SPACER2

C1203

22nF

C322

0.1uF

C1121100UF

C1119

10uF

C1194

0.1uF

C1156

22nF

C372

47nF

C1129

22uF

C1136

22nF

C1160

47nF

STANDOFF1

C1207

22nF

C426

10uF

C1143

0.1uF

C1133

0.47uF

C1204

22nF

C329

22nF

C431

2.2uF

STANDOFF2C1122100UF

C1131

22nF

C316

10uF

C425

47nF

C1164

47nF

C1202

22nF C321

0.22uF

C325

1uF

C1200

4.7UF

C1195

1uF

C1137

22nF

C386

10uF

C345

4.7UF

STANDOFF3

C323

2.2uF

C1148

47nF

C1144

0.1uF

C423

0.1uF

C1161

47nF

C1123

0.22uF

C341

4.7UF

C344

4.7UF

STANDOFF4

C1201

22nF

C1138

22nF

C407

2.2uF

C315100UF

C1145

0.1uF

C1149

47nF

C343

4.7UF

SCREW1

C385

1uF

C342

4.7UF

C371

10uF

C1162

47nF

C346

4.7UF

C1192

0.22uF

C326

47nF

C330

22nF

C1139

22nF

SCREW3

C320

10uF

C1191

100UF

C1130

10uF

C1150

47nF

C324

0.1uF

C1165

47nF

C408

2.2uF

C387

22nF

C1168

22nF

C1155

22nF

C1154

47nF

C1116100UF

C327

47nF

SCREW2

C331

22nF

C1190

100UF

C1163

47nF

C1146

22nFC424

47nF

C317

1uF

C441

4.7UF

C1158

47nF

C1166

47nF

C1151

47nF

C1198

4.7UF

SCREW4

C1167

22nF

C1126

22uF

C374

47nF

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A


1.5V_VCCIO

2.5V_VCCIO_VCCPD_VCCPGMVREF_2.5V_VCCIO

VREF_DDR3

Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




Title


Date: Sheet of

150-0320806-C1 (6XX-44099R) C1.1


B




C337

0.1uF

C362

22nF

C338

0.1uF

C389

0.1uF

C357

10uF

C390

0.1uF

C364

22nF

C391

0.1uF

C359

0.1uF

C392

0.1uF

C335

1uF

C409

0.1uFC358

0.47uF

C361

47nF

C411

0.1uF

C333

10uF

C334

22nF

C363

22nF

C410

0.1uF

C412

0.1uF

C339

22nF

C340

22nF

Date post:	26-Jul-2020
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Arria V GX Starter Kit Board - Analog Devices€¦ · Power 3 - 1.15V & 1.5V FPGA SDI TX/RX Cable...

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