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AT89C2051 Traffic Light Controller

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MICROCONTROLLER BASED TRAFFIC CONTROL CHAPTER 1 INTRODUCTION AT89C2051 8-bit Microcontroller with 2K Bytes Flash Features • Compatible with MCS-51™ Products • 2K Bytes of Reprogrammable Flash Memory – Endurance: 1,000 Write/Erase Cycles • 2.7V to 6V Operating Range • Fully Static Operation: 0 Hz to 24 MHz • Two-level Program Memory Lock • 128 x 8-bit Internal RAM • 15 Programmable I/O Lines • Two 16-bit Timer/Counters • Six Interrupt Sources • Programmable Serial UART Channel • Direct LED Drive Outputs • On-chip Analog Comparator • Low-power Idle and Power-down Modes Description The AT89C2051 is a low-voltage, high-performance CMOS 8-bit microcomputer with 2K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS- 51 instruction set. By combining a versatile 8-bit CPU with 1 BVCOE, NEW DELHI
Transcript
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CHAPTER 1

INTRODUCTION

AT89C20518-bit Microcontroller with 2K Bytes Flash

Features

• Compatible with MCS-51™ Products• 2K Bytes of Reprogrammable Flash Memory – Endurance: 1,000 Write/Erase Cycles• 2.7V to 6V Operating Range• Fully Static Operation: 0 Hz to 24 MHz• Two-level Program Memory Lock• 128 x 8-bit Internal RAM• 15 Programmable I/O Lines• Two 16-bit Timer/Counters• Six Interrupt Sources• Programmable Serial UART Channel• Direct LED Drive Outputs• On-chip Analog Comparator• Low-power Idle and Power-down Modes

Description

The AT89C2051 is a low-voltage, high-performance CMOS 8-bit microcomputer with 2K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C2051 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.

The AT89C2051 provides the following standard features: 2K bytes of Flash, 128 bytes of RAM, 15 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, a precision analog comparator, on-chip oscillator and clock circuitry. In addition, the AT89C2051 is

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designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.

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Traffic Light Controller (AT89C2051)

Four way Traffic light controller which Has Red, Yellow and Green LEDS.

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Apart from this traffic light system, in case of emergency, ambulance or police PCR will get path out of way in special case. The green signal for the selected lane will get activated for that time whenever the ambulance or police vehicle passes from this traffic light zone. This uses an RF transmitter and receiver to be interfaced with this circuit. This is an optional attachment to be added further.

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CHAPTER 2

CONFIGURATION

Pin Description

VCCSupply voltage.

GNDGround.

Port 1

Port 1 is an 8-bit bidirectional I/O port. Port pins P1.2 to P1.7 provide internal pull ups. P1.0 and P1.1 require external pull ups. P1.0 and P1.1 also serve as the positive input (AIN0) and the negative input (AIN1), respectively, of the on-chip precision analog comparator. The Port 1 output buffers can sink 20 mA and can drive LED displays directly.

When 1s are written to Port 1 pins, they can be used as inputs. When pins P1.2 to P1.7 are used as inputs and are externally pulled low, they will source current (IIL) because of the internal pull ups. Port 1 also receives code data during Flash programming and verification.

Port 3

Port 3 pins P3.0 to P3.5, P3.7 are seven bi-directional I/O pins with internal pull ups. P3.6 is hard-wired as an input to the output of the on-chip comparator and is not accessible as a general purpose I/O pin. The Port 3 output buffers can sink 20 mA. When 1s are written to Port 3 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 3 pins that are externally beingPulled low will source current (IIL) because of the pull ups.

Port 3 also serves the functions of various special features of the AT89C2051 as listed below:

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Port 3 also receives some control signals for Flash programming and verification.

RST

Reset input. All I/O pins are reset to 1s as soon as RST goes high. Holding the RST pin high for two machine cycles while the oscillator is running resets the device.

Each machine cycle takes 12 oscillator or clock cycles.

XTAL1

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2

Output from the inverting oscillator amplifier.

Oscillator Characteristics

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.

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Special Function Registers

A map of the on-chip memory area called the Special Function Register (SFR) space is shown in the table below. Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip. Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate effect.

User software should not write 1s to these unlisted locations, since they may be used in future products to invoke new features. In that case, the reset or inactive values of the new bits will always be 0.

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Restrictions on Certain Instructions

The AT89C2051 and is an economical and cost-effective member of Atmel’s growing family of microcontrollers. It contains 2K bytes of flash program memory. It is fully compatible with the MCS-51 architecture, and can be programmed using the MCS-51 instruction set. However, there are a few considerations one must keep in mindWhen utilizing certain instructions to program this device. All the instructions related to jumping or branching should be restricted such that the destination address falls within the physical program memory space of the device, which is 2K for the AT89C2051. This should be the responsibility of the software programmer. For example, LJMP 7E0H would be a valid instruction for the AT89C2051 (with 2K of memory), whereas LJMP 900H would not.

1. Branching instructions:

LCALL, LJMP, ACALL, AJMP, SJMP, JMP @A+DPTR These unconditional branching instructions will execute correctly as long as the programmer keeps in mind that the destination branching address must fall within the physical boundaries of the program memory size (locations 00H to 7FFH for the 89C2051). Violating the physical space limits may cause unknown program behavior.

CJNE [...], DJNZ [...], JB, JNB, JC, JNC, JBC, JZ, JNZ With these conditional branching instructions the same rule above applies. Again, violating the memory boundaries may cause erratic execution.

For applications involving interrupts the normal interrupt service routine address locations of the 80C51 family architecture have been preserved.

2. MOVX-related instructions, Data Memory:

The AT89C2051 contains 128 bytes of internal data memory. Thus, in the AT89C2051 the stack depth is limited to 128 bytes, the amount of available RAM. External DATA memory access is not supported in this device, nor is external PROGRAM memory execution. Therefore, no MOVX [...] instructions should be included in the program.

A typical 80C51 assembler will still assemble instructions, even if they are written in violation of the restrictions mentioned above. It is the responsibility of the controller user to know the physical features and limitations of the device being used and adjust the INS t ructions used correspondingly.

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Program Memory Lock Bits

On the chip are two lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below:

Idle Mode

In idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.

P1.0 and P1.1 should be set to “0” if no external pull-ups are used, or set to “1” if external pull-ups are used.

It should be noted that when idle is terminated by a hardware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.

Power-down Mode

In the power down mode the oscillator is stopped, and the instruction that invokes power down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power down mode is terminated. The only exit from power down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.

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P1.0 and P1.1 should be set to “0” if no external pull-ups are used, or set to “1” if external pull-ups are used.

Programming the Flash

The AT89C2051 is shipped with the 2K bytes of on-chip PEROM code memory array in the erased state (i.e., contents = FFH) and ready to be programmed. The code memory array is programmed one byte at a time. Once the array is programmed, to re-program any non-blank byte, the entire memory array needs to be erased electrically.

Internal Address Counter: The AT89C2051 contains an internal PEROM address counter which is always reset to 000H on the rising edge of RST and is advanced by applying a positive going pulse to pin XTAL1.

Programming Algorithm: To program the AT89C2051, the following sequence is recommended.

1. Power-up sequence: Apply power between VCC and GND pins Set RST and XTAL1 to GND

2. Set pin RST to “H” Set pin P3.2 to “H”

3. Apply the appropriate combination of “H” or “L” logic levels to pins P3.3, P3.4, P3.5, P3.7 to select one of the programming operations Shown in the PEROM Programming Modes table. To Program and Verify the Array:

4. Apply data for Code byte at location 000H to P1.0 to P1.7.

5. Raise RST to 12V to enable programming.

6. Pulse P3.2 once to program a byte in the PEROM array or the lock Bits. The byte-write cycle is self-timed and typically takes 1.2 ms.

7. To verify the programmed data, lower RST from 12V to logic “H” Level and set pins P3.3 to P3.7 to the appropriate levels. Output Data can be read at the port P1 pins.

8. To program a byte at the next address location, pulse XTAL1 pin Once to advance the internal address counter. Apply new data to The port P1 pins.

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9. Repeat steps 5 through 8, changing data and advancing the Address counter for the entire 2K bytes array or until the end of the Object file is reached.

10. Power-off sequence: set XTAL1 to “L” Set RST to “L” Turn VCC power off

Data Polling: The AT89C2051 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written data on P1.7. Once the write cycle has been completed, true data is valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.

Ready/Busy: The Progress of byte programming can also be monitored by the RDY/BSY output signal. Pin P3.1 is pulled low after P3.2 goes high during programming to indicate BUSY. P3.1 is pulled High again when programming is done to indicate READY.

Program Verify: If lock bits LB1 and LB2 have not been programmed code data can be read back via the data lines for verification:

1. Reset the internal address counter to 000H by bringing RST from “L” to “H”.

2. Apply the appropriate control signals for Read Code data and read the output data at the port P1 pins.

3. Pulse pin XTAL1 once to advance the internal address counter.

4. Read the next code data byte at the port P1 pins.

5. Repeat steps 3 and 4 until the entire array is read. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.

Chip Erase: The entire PEROM array (2K bytes) and the two Lock Bits are erased electrically by using the proper combination of control signals and by holding P3.2 low for 10 ms. The code array is written with all “1”s in the Chip Erase operation and must be executed before any nonblank memory byte can be re-programmed.

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Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 000H, 001H, and 002H, except that P3.5 and P3.7 must be pulled to a logic low. The values returned are as follows.(000H) = 1EH indicates manufactured by Atmel(001H) = 21H indicates 89C2051

Programming Interface

Every code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is self timed and once initiated, will automatically time itself to completion.

All major programming vendors offer worldwide support for the Atmel microcontroller series. Please contact your local programming vendor for the appropriate software revision.

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CHAPTER 3 CRYSTAL OSCILLATORS

What are crystal oscillators?Crystal oscillators are oscillators where the primary frequency determining element is a quartz crystal. Because of the inherent characteristics of the quartz crystal the crystal oscillator may be held to extreme accuracy of frequency stability. Temperature compensation may be applied to crystal oscillators to improve thermal stability of the crystal oscillator. Crystal oscillators are usually, fixed frequency oscillators where stability and accuracy are the primary considerations. For example it is almost impossible to design a stable and accurate LC oscillator for the upper HF and higher frequencies without resorting to some sort of crystal control. Hence the reason for crystal oscillators. The frequency of older FT-243 crystals can be moved upward by crystal grinding. I won't be discussing frequency synthesizers and direct digital synthesis (DDS) here. They are particularly interesting topics to be covered later.

A practical example of a Crystal OscillatorThis is a typical example of the type of crystal oscillators which may be used for say converters. Some points of interest on crystal oscillators in relation to figure 1.

Figure 1 - schematic of a crystal oscillator

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The transistor could be a general purpose type with a Ft of at least 150 MHz for HF use. A typical example would be a 2N2222A. The turn’s ratio on the tuned circuit depicts an anticipated nominal load of 50 ohms. This allows theoretical 2K5 ohms on the collector. If it is followed by a buffer amplifier (highly recommended) I would simply maintain the typical 7:1 turn’s ratio. I have included a formula for determining L and C in the tuned circuits of crystal oscillators in case you have forgotten earlier tutorials. Personally I would make L a reactance of around 250 ohms. In this case I'd make C a smaller trimmer in parallel with a standard fixed value.

CHAPTER 4

MAKING PRINTED CIRCUIT BOARD (P.C.B.)

INTRODUCTION--

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Making a Printed Circuit Board is the first step towards building electronic equipment by any electronic industry. A number of methods are available for making P.C.B., the simplest method is of drawing pattern on a copper clad board with acid resistant (etchants) ink or paint or simple nail polish on a copper clad board and do the etching process for dissolving the rest of copper pattern in acid liquid.

MATERIAL REQUIRED

The apparatus needs for making a P.C.B. is:-

* Copper Clad Sheet

* Nail Polish or Paint

* Ferric Chloride Powder. (Fecl)

* Plastic Tray

* Tap Water etc.

PROCEDURE

The first and foremost in the process is to clean all dirt from copper sheet with say spirit or trichloro ethylene to remove traces grease or oil etc. and then wash the board under running tap water. Dry the surface with forced warm air or just leave the board to dry naturally for some time.

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Making of the P.C.B. drawing involves some preliminary consideration such as thickness of lines/ holes according to the components. Now draw the sketch of P.C.B. design (tracks, rows, square) as per circuit diagram with the help of nail polish or enamel paint or any other acid resistant liquid. Dry the point surface in open air, when it is completely dried, the marked holes in P.C.B. may be drilled using 1Mm drill bits. In case there is any shorting of lines due to spilling of paint, these may be removed by scraping with a blade or a knife, after the paint has dried.

After drying, 22-30 grams of ferric chloride in 75 ml of water may be heated to about 60 degree and poured over the P.C.B.; placed with its copper side upwards in a plastic tray of about 15*20 cm. stirring the solution helps speedy etching. The dissolution of unwanted copper would take about 45 minutes. If etching takes longer, the solution may be heated again and the process repeated. The paint on the pattern can be removed P.C.B. may then be washed and dried. Put a coat of varnish to retain the shine. Your P.C.B. is ready.

REACTION

Fecl3 + Cu ----- CuCl3 + Fe

Fecl3 + 3H2O --------- Fe (OH)3 + 3HCL

PRECAUTION

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1. Add Ferric Chloride (Fecl3) carefully, without any splashing. Fecl3 is

irritating to the skin and will stain the clothes.

2. Place the board in solution with copper side up.

3. Try not to breathe the vapours. Stir the solution by giving see-saw motion to the dish and solution in it.

4. Occasionally warm if the solution over a heater-not to boiling. After some time the unshaded parts change their colour continue to etch.

Gradually the base material will become visible. Etch for two minutes more to get a neat pattern.

5. Don't throw away the remaining Fecl3 solution. It can be used again for

next Printed Circuit Board P.C.B.

USES-Printed Circuit Board is used for housing components to make a circuit for compactness, simplicity of servicing and case of interconnection. Thus we can define the P.C.B. as : Prinked Circuit Boards is actually a sheet of Bakelite (an insulating material) on the one side of which copper patterns are made with holes and from another side, leads of electronic components are inserted in the proper holes and soldered to the copper points on the back. Thus leads of electronic components terminals are joined to make electronic circuit.

In the boards copper cladding is done by pasting thin copper foil on the boards during curing. The copper on the board is about 2 mm thick and weights an ounce per square foot.

The process of making a Printed Circuit for any application has the following steps (opted professionally):

* Preparing the layout of the track.

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* Transferring this layout photographically M the copper.

* Removing the copper in places which are not needed, by the process of etching (chemical process)

* Drilling holes for components mounting.

PRINTED CIRCUIT BOARD

Printed circuit boards are used for housing components to make a circuit, for comactness, simplicity of servicing and ease of interconnection. Single sided, double sided and double sided with plated-through-hold (PYH) types of p.c boards are common today.

Boards are of two types of material (1) phenolic paper based material (2) Glass epoxy material. Both materials are available as laminate sheets with copper cladding.

Printed circuit boards have a copper cladding on one or both sides. In both boards, pasting thin copper foil on the board during curing does this. Boards are prepared in sizes of 1 to 5 metre wide and up to 2 meters long. The thickness of the boards is 1.42 to 1.8mm. The copper on the boards is about 0.2 thick and weighs and ounce per square foot.

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CHAPTER 5

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RESISTANCE

Resistance is the opposition of a material to the current. It is measured in Ohms (). All conductors represent a certain amount of resistance, since no conductor is 100% efficient. To control the electron flow (current) in a predictable manner, we use resistors. Electronic circuits use calibrated lumped resistance to control the flow of current. Broadly speaking, resistor can be divided into two groups viz. fixed & adjustable (variable) resistors. In fixed resistors, the value is fixed & cannot be varied. In variable resistors, the resistance value can be varied by an adjuster knob. It can be divided into (a) Carbon composition (b) Wire wound (c) Special type. The most common type of resistors used in our projects is carbon type. The resistance value is normally indicated by color bands. Each resistance has four colors, one of the band on either side will be gold or silver, this is called fourth band and indicates the tolerance, others three band will give the value of resistance (see table). For example if a resistor has the following marking on it say red, violet, gold. Comparing these colored rings with the color code, its value is 27000 ohms or 27 kilo ohms and its tolerance is ±5%. Resistor comes in various sizes (Power rating). The bigger, the size, the more power rating of 1/4 watts. The four color rings on its body tells us the value of resistor value as given below.

COLOURS CODE

Black------------------------------------------------0Brown-----------------------------------------------1Red--------------------------------------------------2Orange---------------------------------------------3Yellow-----------------------------------------------4

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Green-----------------------------------------------5Blue-------------------------------------------------6Violet-----------------------------------------------7Grey-------------------------------------------------8White-----------------------------------------------9

The first rings give the first digit. The second ring gives the

second digit. The third ring indicates the number of zeroes to be placed after the digits. The fourth ring gives tolerance (gold ±5%, silver ± 10%, No color ± 20%).

In variable resistors, we have the dial type of resistance boxes. There is a knob with a metal pointer. This presses over brass pieces placed along a circle with some space b/w each of them.

Resistance coils of different values are connected b/w the gaps. When the knob is rotated, the pointer also moves over the brass pieces. If a gap is skipped over, its resistance is included in the circuit. If two gaps are skipped over, the resistances of both together are included in the circuit and so on.

A dial type of resistance box contains many dials depending upon the range, which it has to cover. If a resistance box has to read up to 10,000, it will have three dials each having ten gaps i.e. ten resistance coils each of resistance 10. The third dial will have ten resistances each of 100.

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The dial type of resistance boxes is better because the contact resistance in this case is small & constant.

CHAPTER 6 VOLTAGE REGULATOR

THE ADAPTING 3-TERMINAL VOLTAGE REGULATORS FOR CONSTANT HIGH VOLTAGE POWER SUPPLIES

One can get a constant high-voltage power supply using inexpensive 3-terminal voltage regulators through some simple techniques described below. Depending upon the current requirement, a reasonable load regulation can be achieved. Line regulation in all cases is equal to that of the voltage regulator used.

Though high voltage can be obtained with suitable voltage boost circuitry using ICs like LM 723, some advantages of the circuits presented below are: simplicity, low cost, and practically reasonable regulation characteristics. For currents of the order of 1A or less, only one zener and some resistors and capacitors are needed. For higher currents, one pass transistor such as ECP055 is needed.

Before developing the final circuits, let us first understand the 3-terminal type constant voltage regulators. Let us see the schematic in Fig. where 78XX is a 3-terminal voltage regulator.

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Schematic for obtaining low-voltage regulated output using 3-terminal voltage regulators.

Rectified and filtered unregulated voltage is applied at VIN and a constant voltage appears between pins 2 and 2 of the voltage regulator. *The distribution of two currents in the circuit (IBIAS and ILOAD) is as shown.

* It is highly recommended to use the two capacitors as shown. Electrically regulator will be at a distance from the rectifier supply. Thus, a tantalum grade capacitor of 5mf and rated voltage is good. Electrolytic capacitor is not suitable for it is poor in response to load transients, which have high frequency components. At the output side a 0.22mf disc ceramic capacitor is useful to eliminate spurious oscillations, which the regulator might break into because of its internal high gain circuitry.

These voltage regulators have a typical bias current of 5 mA, which is reasonably constant. By inserting a small resistor Rx between pin 2 and ground, the output voltage in many cases. By this method voltage increment of 5 to 10 per cent is practically feasible. However, if a high-value resistance is used to obtain a higher output voltage, a slight variation in bias current will result in wide variation of the output voltage.

Now let us see that what can be done to get a higher but constant output voltage. If to the circuit of Fig. resistor RY and zener Vz are added as shown in Fig., the output voltage is now given by

VOUT=VR+VZ + IBIAS RX

A constant current flows through RY** because VOUT is constant, and small variations in IBIAS do not change practically the operating point of Vz. This situation is like constant current biasing of zener, which results in a very accurate setting of the zener voltage.

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** As long a sVIN>VOUT+2 volts, VOZ is constant from the reasoning of Fig, and thus current through RY is constant.

VOZ=VR + IBIAS Rx

Here the pin 2 of the regulator is raised above ground by Vz + IBIAS Rx. Thus, any combination of zener with a proper selection of RY can be used.

For example, Let VR=+15 V for 7815

IBIAS=5mA

VZ=39V (standard from ECIL)

For a standard 400mW zener of ECIL make, IZ MAX=10 mA. Thus, if we let pass 5mA through RY to make a 55-volt supply

55 - 39 RY = ---------------=3.2k»3.3k

5 x 10-3

55 - 39 - 15 1 RX = ---------------------= ---------- = 200 ohm

IBIAS 5 x 10-3

Schematic for constant high-voltage power supplies

It should be noted here that the maximum input voltage allowed for 78XX regulators is 35V between pins 1 and 2. We see that the actual voltage betweens pin 1 and 2 of the regulator in this circuit is

VIN - VZ - IBIAS RX

It is therefore necessary that VIN be so chosen that voltage between pins 1 and 2 of the IC does not exceed the maximum rating.

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Also, a high input-output differential voltage VIN-VOUT means more power dissipation in the series-pass element, the regulator. Thus, with proper selection of the input transformer voltage and capacitor, this should be minimized.

For example, if 7805 is used, VR equals + 5V and VZ is 40V, so VOUT=45 volts. For 7805, the maximum input voltage is 35 V and the minimum 7V. Therefore,

VIN MAX = 45 + 35 - 5 = 75 VOLTSVIN MIN = 45 + 7 - 5 = 47 VOLTS

Thus, from no-load to full-load condition, the unregulated input voltage-including peak ripple-should be within these limits. This gives a margin of 75-47, i.e. 28 volt. Hence, the designer can work out the maximum transformer voltage from the no-load input voltage chosen on the upper side.

The capacitor's value can be determined from the full load unregulated voltage chosen. Roughly, per 100mA current, 100mf capacitor gives 1-volt peak-to-peak ripple. Hence, capacitor's value can be determined for the desired current.

This circuit will have an excellent load and line regulation. For shot-circuit protection, it is recommended to use a fast-blow fuse of suitable value. Although the regulator has inherent short-circuit protection, the maximum current differs from device to device. Adequate heat sink should be used with the regulator.

Schematic for constant high-voltage power supplies providing currents in excess of one ampere

Now if currents in excess of 1A are needed, the circuit shown in fig. is useful. This circuit is similar to that in Fig. except that a pass transistor ECP055 is added besides a 0.5-ohm or more resistors. This transistor bypasses the excessive current. By selecting proper Rz the ratio of two currents passing through the regulator and transistor can be altered.

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This circuit will show load and live regulation within 1% and will function properly for VIN-VOUT as low as 4 volt. For short-circuit protection, a fast blow fuse is recommended as this circuit does not have inherent short-circuit protection. Adequate heat sink is to be used for the pass transistors.For negative voltages, use 79XX series regulators and ECN055 as the pass transistor. Some advantages of the circuits described above are: the lowest cost among comparable performance circuits, ability to work at low input-output differential, and flexibility in design for various applications.

So audio enthusiasts, if you are troubled by hum emanating from your power amplifier, try this inexpensive alternative for power supply.

CHAPTER 7PROGRAM CODINGORG 0HMOV SP,#40HCLR P1CLR P3

NR EQU P3.5NY EQU P3.4NG EQU P3.3

SR EQU P1.2SY EQU P1.3SG EQU P1.4

ER EQU P1.5EY EQU P1.6EG EQU P1.7

WR EQU P3.7

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WY EQU P1.0WG EQU P1.1

AGAIN:

SETB NR SETB SR SETB ER SETB WG ACALL DELAY_MAINCLR WGSETB WYACALL Y_DELAYCLR WYSETB WRCLR NR SETB NGACALL DELAY_MAINCLR NGSETB NYACALL Y_DELAYCLR NYSETB NYCLR SRSETB SGACALL DELAY_MAINCLR SGSETB SYACALL Y_DELAYCLR SYSETB SRCLR ERSETB EGACALL DELAY_MAINCLR EGSETB EYACALL Y_DELAYCLR WY

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SETB ERSETB WRSETB WGACALL DELAY_MAINAJMP AGAIN

; DELAY CALL SUBROUTINE 1(12 SECOND)

DELAY_MAIN: MOV R1,#61REP1: MOV R3,#255NEXT: MOV R2,#255REP2: NOPDJNZ R2,REP2DJNZ R3,NEXTDJNZ R1,REP1RET

; DELAY CALL SUBROUTINE 2 (5 SECOND)

Y_DELAY: MOV R1,#25REP3: MOV R3,#255NEXT1: MOV R2,#255REP4: NOPDJNZ R2,REP4DJNZ R3,NEXT1DJNZ R1,REP3RET

END

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REFERENCES:-

1. www. atmel .com

2. www.engineersgarage.com

3. THE 8051 MC AND EMBEDDED SYSTEM BY MAZIDI

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39BVCOE, NEW DELHI


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