Lecture 14
AUTOMATIC CONTROLAUTOMATIC CONTROLSYSTEMSSYSTEMSAli Karimpour
Associate ProfessorFerdowsi University of Mashhad
Ali Karimpour Apr 2013
Chapter 4
Lecture 4
The AVR Microcontroller
Ali Karimpour Apr 2013
Chapter 4
Introduction to AVR CISC (Complex Instruction Set Computer)
Put as many instruction as you can into the CPURISC (Reduced Instruction Set Computer)
Reduce the number of instructions, and use your facilities in a more proper way.
RISC processors have a fixed instruction size. In AVR the instructions are 2 or 4 bytes. Reduce the number of instructions so higher speed. More than 95% of instructions are executed in 1
machine cycle. Use of high level language for programming.
Ali Karimpour Apr 2013
Chapter 4
AVR structure
4
CPUPC
ALU
registers
R1R0
R15
R2
…
R16R17
…
R30R31
Instruction Register
Instruction decoder
SREG: I T H S V N CZ
Ali Karimpour Apr 2013
Chapter 4
AVR’s CPU
5
AVR’s CPU ALU 32 General Purpose
registers (R0 to R31) PC register Instruction decoder
CPUPC
ALU
registers
R1R0
R15
R2
…
R16R17
…
R30R31
Instruction Register
Instruction decoder
SREG: I T H S V N CZ
Ali Karimpour Apr 2013
Chapter 4
Some simple instructions
There are some instructions for loading values, doing arithmetic and logic operations; such as:
LDI (Load Immediate), ADD, SUB, INC, DEC, AND, etc. LDI Rd, k % In high level language Rd = k ADD Rd,Rs % Rd = Rd + Rs SUB Rd,Rs % Rd = Rd – Rs IVC Rd % Rd=Rd+1 DEC Rd %Rd=Rd-1Write a program that calculates 19 + 95 CPU
PC
ALU
registers
R1R0
R15
R2
…
R16R17
…
R30R31
Instruction Register
Instruction decoder
SREG: I T H S V N CZ
LDI R16, 19 ;R16 = 19
LDI R20, 95 ;R20 = 95
ADD R16, R20 ;R16 = R16 + R20
Ali Karimpour Apr 2013
Chapter 4
R0 through R15 Only registers in the range R16 to R31 can be loadedimmediate. We cannot load a constant into the registers R0 to R15 directly. It would have to be loaded intoa valid register first then copied.To load the value of 10 into register zero (R0): LDI R16,10 ;R16=10
MOV R0,R16Copy contents of R16 to R0
CPUPC
ALU
registers
R1R0
R15
R2
…
R16R17
…
R30R31
Instruction Register
Instruction decoder
SREG: I T H S V N CZ
Ali Karimpour Apr 2013
Chapter 4
Status Register (SREG)
CPUPC
ALU
registers
R1R0
R15
R2
…
R16R17
…
R30R31
Instruction Register
Instruction decoder
SREG: I T H S V N CZ
SREG:
CarryZero
NegativeoVerflow
SignN+VHalf carry
Temporary
Interrupt
H S V N CZTI•The Status Register contains information about the result of the most recently executed arithmetic instruction. •This information can be used for altering program flow in order to perform conditional operations. •This will in many cases remove the need for using the dedicated compare instructions, resulting in faster and more compact code.
Ali Karimpour Apr 2013
Chapter 4
Status Register (SREG)
CPUPC
ALU
registers
R1R0
R15
R2
…
R16R17
…
R30R31
Instruction Register
Instruction decoder
SREG: I T H S V N CZ
SREG:
CarryZero
NegativeoVerflow
SignN+VHalf carry
Temporary
Interrupt
H S V N CZTI
• Bit 7(I): Global Interrupt Enable
• Bit 6(T): Bit Copy Storage
• Bit 5(H): Half Carry Flag• Bit 4(S): Sign Bit, S = N ⊕V• Bit 3(V): Two’s Complement Overflow Flag
• Bit 2(N): Negative Flag
• Bit 1(Z): Zero Flag
• Bit 0(C): Carry Flag
Ali Karimpour Apr 2013
Chapter 4
Addresses Register (SREG)
CPUPC
ALU
registers
R1R0
R15
R2
…
R16R17
…
R30R31
Instruction Register
Instruction decoder
SREG: I T H S V N CZ
Ali Karimpour Apr 2013
Chapter 4
AVR different groups
Classic AVR e.g. AT90S2313, AT90S4433
Mega e.g. ATmega8, ATmega32, ATmega128
Tiny e.g. ATtiny13, ATtiny25
Special Purpose AVR e.g. AT90PWM216,AT90USB1287
Ali Karimpour Apr 2013
Chapter 4
ATMEGA32 Features
12
High-performance, Low-power Atmel®AVR® 8-bit Microcontroller
131 Powerful Instructions – Most Single-clock Cycle Execution
32 × 8 General Purpose Working Registers 32Kbytes of In-System Self-programmable Flash
program memory (W/E: 10,000 times) 1024Bytes EEPROM (W/E: 100,000 times) Data retention: 20 years at 85°C/100 years at 25°C Programming of Flash, EEPROM, Fuses, and
Lock Bits through the JTAG Interface
Ali Karimpour Apr 2013
Chapter 4
13
Operating Voltages – 2.7V - 5.5V for ATmega32L – 4.5V - 5.5V for ATmega32
Speed Grades 0 - 8MHz for ATmega32L 0 - 16MHz for ATmega32
Power Consumption at 1MHz, 3V, 25°C Active: 1.1mA Idle Mode: 0.35mA Power-down Mode: < 1μA
ATMEGA32 Features
Ali Karimpour Apr 2013
Chapter 4
ATMEGA32 Pin Configurations
14
Ali Karimpour Apr 2013
Chapter 4
ATMEGA32 Peripheral Features
15
Two 8-bit Timer/Counters and one 16-bit Four PWM Channels 8-channel, 10-bit ADC Programmable Serial USART Programmable Watchdog Timer with Separate On-
chip Oscillator On-chip Analog Comparator Internal Calibrated RC Oscillator External and Internal Interrupt Sources Six Sleep Modes: Idle, ADC Noise Reduction, Power-
save, Power-down, Standby and Extended Standby
Ali Karimpour Apr 2013
Chapter 4
ATMEGA32 Pin Descriptions
16
GND Ground.
VCC Digital supply voltage.
Port B (PB7..PB0) Port B is an 8-bit bi-directional I/O port.
Port A (PA7..PA0) Port A is an 8-bit bi-directional I/O port.
Port C (PC7..PC0) Port C is an 8-bit bi-directional I/O port.Port D (PD7..PD0) Port D is an 8-bit bi-directional I/O port.
Ali Karimpour Apr 2013
Chapter 4
ATMEGA32 Pin Descriptions
17
XTAL1 Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
RESET Reset Input.
AVCC AVCC is the supply voltage pin for Port A and the A/D Converter.
XTAL2 Output from the inverting Oscillator amplifier.
AREF AREF is the analog reference pin for the A/D Converter.
Ali Karimpour Apr 2013
Chapter 4 ATMEGA32 Pin Descriptions
18
ADC0-7
Port A serves as the analog inputs to the A/D Converter.
Port A Pins Alternate Functions
Ali Karimpour Apr 2013
Chapter 4 ATMEGA32 Pin Descriptions
19
XCK/T0T0 (Timer/Counter0 External Counter Input)XCK (USART External Clock Input/Output)
Port B Pins Alternate Functions
T1T1 (Timer/Counter1 External Counter Input) INT2/AINOAIN0 (Analog Comparator Positive Input)INT2 (External Interrupt 2 Input)
Ali Karimpour Apr 2013
Chapter 4 ATMEGA32 Pin Descriptions
20
PD2INT0 (External Interrupt 0 Input)
Port D Pins Alternate Functions
PD3INT1 (External Interrupt 1 Input)