AXEL-X MB8AA3020 On-Chip Code API - FujitsuFunctional Description AXEL-X MB8AA3020 On-Chip Code API...

AXEL-X MB8AA3020 On-Chip Code API

Preliminary

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AXEL-X MB8AA3020 On-Chip Code API

Revision 1.5

February 28, 2007

FLA Confidential

Fujitsu Laboratories of America, Inc.Advanced Interconnect Technology Department

Revision 1.5 – February 28, 2007 Page ii Fujitsu Laboratories of America, Inc

AXEL-X MB8AA3020 On-Chip Code APIF

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Copyright © 2005, 2006, 2007 Fujitsu Laboratories of America, Inc. All rights reserved.

This document contains confidential information and trade secrets of Fujitsu Laboratoriesof America, Inc. which shall not be reproduced or transferred to other documents or dis-closed to others or used for manufacturing or any other purpose without prior written per-mission of Fujitsu Laboratories of America, Inc. Use of copyright notice is precautionaryand does not imply publication or intent thereof.

All information contained in this document is subject to change without notice. While theinformation contained herein is believed to be accurate, such information is preliminary,and should not be relied upon for accuracy or completeness.

Revision 1.5 – February 28, 2007 Page iii Fujitsu Laboratories of America, Inc


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Revision History

Revision Date Description

0.1 1/12/2006 Initial draft.

1.0 3/31/2006 Reflected internal review.

1.1 5/31/2006 Made Split transaction explicit.

Added Valid bit in VLAN Table Access messages.

Added Memory Bit in VLAN Read and VLAN Search.

Updated Length for Statistics Get.

Added re-transmission protocol.

Replaced MDIO Register Get/Set/Set w Bit Enable with MDIO Op.

Added Memory Get / Set.

Replaced High Speed IO Control Get / Set with Configure 10G Port.

1.2 6/30/2006 Updated note on Sync message.

Updated examples of re-transmission protocol.

Updated encoding of flag field in AXEL-X API packet format.

Added default protocol type for AXEL-X API packet.

Corrected typo in MAC Table Learn / Flush.

Corrected typo in VLAN Table Search / Read.

Changed Length of Statistics Get, Firmware Upload and Applet Upload.

Added an error code, Restart Notification.

Made Firmware messages for debug purpose only.

Added note on Packet Send message.

Added ME Halt Trap message.

Added descriptions on Handling of Interrupts.

Changed Identifier for On-Chip Code initiated messages.

Made Configure 10G Port message as a basic configuration.

Added Restart message.

Added a list of AXEL-X Registers for Statistics Get message.

Updated MAC Table Get, Read, Write messages.

Updated Memory Set message.

1.3 8/31/2006 Added Packet Receive sFlow message.

Updated I2C messages.

Added note on MAC Table Learn message.

Added note on MAC Table Flush message.

Updated Configure 10G Port message.

1.3.1 9/6/2006 Removed Firmware and Configuration messages.

Removed Packet Receive sFlow message.

Updated note on MAC Table Get message.

Revision 1.5 – February 28, 2007 Page iv Fujitsu Laboratories of America, Inc


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1.4 12/31/2006 Updated Flag Encoding.

Specified Reply Queue Length.

Added Configure 10G Port message.

1.5 2/28/2007 Added Packet Receive Traffic Monitoring.

Added Traffic Monitoring Get / Set.

Added Congestion Notification Get / Set.

Revision Date Description

Revision 1.5 – February 28, 2007 Page 1 Fujitsu Laboratories of America, Inc

TABLE OF CONTENTS AXEL-X MB8AA3020 On-Chip Code APIF

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TABLE OF CONTENTS

CHAPTER 1: INTRODUCTION 3

1.1 General Description 3

CHAPTER 2: FUNCTIONAL DESCRIPTION 5

2.1 Packet Format 5

CHAPTER 3: MESSAGE DESCRIPTION 11

3.1 Message List 113.2 Message 16

CHAPTER 4: APPENDIX 84

4.1 RAW Ethernet 84


TABLE OF CONTENTS AXEL-X MB8AA3020 On-Chip Code APIF

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Introduction AXEL-X MB8AA3020 On-Chip Code API


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CHAPTER 1: INTRODUCTION

1.1 General Description

This specification describes On-Chip Code API for the next generation Fujitsu 10Gbps Ethernet switch chip, AXEL-X MB8AA3020. The On-Chip code communicates with AXEL-X Driver for initialization, handling management protocols, transferring frames, performing MAC address Table, VLAN Table updates and support network management functions.

The management packets to be processed by Management are as follows:

• BPDU for the spanning tree protocol• GVRP for the virtual LAN• ICMP for the switch control such as ping• SNMP for the network management such as statistics monitoring and switch reset• IGMP / MLD Snooping• sFLOW• BCN (Backward Congestion Notification)

Figure 1-1. An Example of Software Configuration

NIC Driver

On-Chip Code API

AXEL-X

AXEL-X On-Chip Code

AXEL-X Driver

API

Layer 2 Software

OS

for Management


Introduction AXEL-X MB8AA3020 On-Chip Code APIF

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On-Chip Code messages are categorized into followings:

• Register Get / Set AXEL-X Core Register, PCS Register, MDIO, I2C

• Memory Get / Set AXEL-X On-Chip Firmware Memory

• Table Search / Learn / Delete / Flush / Get VLAN Table, MAC Address Table

• Statistics Get / Clear Port, Priority, Flow Control, VLAN

• Packet Send / Receive• Trap

Link Up/Down, Error

• Protocol Ping, Sync, Restart

Functional Description AXEL-X MB8AA3020 On-Chip Code API


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CHAPTER 2: FUNCTIONAL DESCRIPTION

2.1 Packet Format

AXEL-X driver on a remote host communicates with On-Chip Code through Ethernet. The packet format is defined as follows:

• Type: Protocol Type for AXEL-X Packet (default value is 88B5h)• Code: Massage code, even number for Request, odd number for Reply• Length: The length of the message in bytes (optional data length)• Flag / Status: Protocol Flag for Request and Status for the Reply, 0 for success,

others for fail (Status is filed in Reply)• Identifier: Identifier (Process Id of the sending process)• Sequence number: Sequence number of the message• Optional Data: Optional data which depends on the message code

Figure 2-1. Packet Format

2.1.1 Status Encoding

Table 2-1 shows encoding of the Status field in Reply packets.

Table 2-1. Encoding of Status Field

Encoding Message Name Notes

0 Success

-1 Busy

-2 Sequence Error

-3 Deferred For Split transaction

-4 Unexpected Message

-5 Illegal Message Undefined Message Code

-6 Not Supported Not supported in the on-chip code

-7 Restart Notification On-chip code re-started

others reserved

DA SA Type Code Length IdentifierSequenceNumber

OptionalData /Padding

FCS

6 6 2 2 2 2 2 4

Flag /

2

Status


Functional Description AXEL-X MB8AA3020 On-Chip Code APIF

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2.1.2 Flag Encoding

Table 2-1 shows encoding of the Flag field in Request packets. This field is valid only in the messages which allow Split transactions. The messages include I2C Register Get / Set / Set with Bit Enable, MDIO Op, and MAC Table Flush.

An Example of Split transaction is shown below.

In the following example, the first I2C Register get initiates read operation on I2C bus. The sec-ond I2C Register Get checks completions of the read operation. In this case, the operation is still ongoing and Deferred status is returned. In the third I2C Register Get, the read operation on I2C bus have been completed and the read data is returned. Here a1, a2 are addresses, d1 and d2 are data, N1, N2,,, are sequence numbers.

Table 2-2. Encoding of Flag Field

Encoding Description Notes

0 No Split Transaction

1 Split Transaction Start

2 Split Transaction End

Host AXEL-X On-Chip CodeI2C Register Get (Start, a1, N1) I2C Register Get (Success, xx, N1)

Register Get (Success, d2, N2)

I2C Register Get (Deferred, xx, N3)

I2C Register Get (End, a1, N4) I2C Register Get (Success, d1, N4)

Register Get (a2, N2)

I2C Register Get (End, a1, N3)



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2.1.3 Re-transmission Protocol

A packet drop could happen in Request or Reply. When a time-out occurred or a sequence error is detected, packet(s) will be re-transmitted.

AXEL-X driver on a host and On-Chip Code have following variables:

• send_next: next sequence number to send (sender)

• send_una: sequence number unacknowledged (sender)

• recv_next: next sequence number to receive (receiver)

Examples of the re-transmission are shown below.

Case 1) Request is lostHost Link AXEL-X On-Chip Codesend_next send_una status status recv_next 1 1 1 2 Req(1) x(lost) time-out Req(send_una) Req(1) Reply(1) Reply(1) 2Case 2) Reply is lostHost Link AXEL-X On-Chip Codesend_next send_una status status recv_next 1 1 1 2 Req(1) Req(1) Reply(1) 2 x(lost) time-out Req(send_una) Req(1) Reply lost Reply(1) 2 Reply(1) 2



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AXEL-X driver can send multiple Requests to On-Chip Code before Replies are coming back. However the number of outstanding Requests is limited by the Reply queue length RepQlen (=1) at On-Chip Code.

This is because the Reply message needs to be re-transmitted from the Reply queue when a message is not reversible. For example, Register Get on a register with RC (Read Clear) attributes clears the register and not reversible.

Therefore a following guideline needs to be followed:

Guideline) If a message is not reversible and it is the problem, limit outstanding Requests to RepQlen.

• Register Get on RC/RW1C are not reversible.

• Register Set are not reversible.

• Statistics Collection is not the problem even it reads registers with RC attributes.

• Register Set followed by Register Get to the same address is not the problem.

The Reply queue is reset when SYNC message is received. The PING message is not kept in the Reply queue.



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2.1.4 Handling of Interrupts

On-Chip Code is handling a hardware interrupt and generates a Trap report to Host. There are three category in the interrupts. Handlings of the interrupt is different depend-ing on the type.

Category 1) No error or non-fatal error interrupts which does not require service by Host

Most of the Trap reports on no error or non-fatal error interrupts belong to this category. When an interrupt occurs, On-Chip Code masks or disable the corresponding interrupt, clear the interrupt and generate a Trap. Upon the reception of a reply from Host, it unmask or enable the interrupt.

Category 2) No error or non-fatal error interrupts which requires service by Host

Port Security, Statistics Carry, Link Failure and Output Queue Status Traps belong to this category. For example, Port Security Trap requires a decision made by Host on an incoming frame for further operation. When an interrupt occurs, On-Chip Code mask or disable the corresponding interrupt and generate a Trap, which we call Service Required Trap. When a reply from Host is returned, it leaves the interrupt masked. Therefore Host is required to do an appropriate analysis and then clear and unmask the interrupt.

Category 3) Fatal error interrupts

When a fatal error interrupt occurs, On-Chip Code logs the error and restarts by resetting chip. After initialization completes, On-Chip Code sends a corresponding trap report to Host.



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Examples of the restart are shown below.

Case 1) Restart by ME HaltHost Link AXEL-X On-Chip Code

Case 2) Restart by ME Halt and Message Crossover

ME Halt is detected

Reset Chip and Restart

ME Halt TrapRestart Complete

Reply

Sync

Reply

Host Link AXEL-X On-Chip Code

ME Halt is detected

Reset Chip and Restart

ME Halt TrapRestart Complete

Reply

Sync

Reply

Register Get

Replyw Restarted

Register Get

time-out

Message Description AXEL-X MB8AA3020 On-Chip Code API


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CHAPTER 3: MESSAGE DESCRIPTION

3.1 Message List

Table 3-1 shows a list of messages for On-Chip Code API.

Table 3-1. List of Messages

Category Message Name Code Initiator Length Notes

Register Access Register Get 10 (Request) 11 (Reply)

Driver 8*n n = # of Reg

Register Set 12 (Request) 13 (Reply)


Register Set with Bit Enable 14 (Request)15 (Reply)


PCS Register Get 20 (Request) 21 (Reply)


PCS Register Set 22 (Request) 23 (Reply)


PCS Register Set with Bit Enable

24 (Request)25 (Reply)


MDIO Op 1 40 (Request) 41 (Reply)

Driver 4*n Use Port 1n = # of Reg

MDIO Op 2 50 (Request) 51 (Reply)


I2C Register Get 1 60 (Request) 61 (Reply)


I2C Register Set 1 62 (Request) 63 (Reply)


I2C Register Set with Bit Enable 1



I2C Register Get 2 70 (Request) 71 (Reply)


I2C Register Set 2 72 (Request) 73 (Reply)


I2C Register Set with Bit Enable 2




Message Description AXEL-X MB8AA3020 On-Chip Code APIF

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Memory Access Memory Get(for debug / customization)

80 (Request) 81 (Reply)

Driver 4*n n = # of Addr

Memory Set(for debug)

82 (Request) 83 (Reply)

Driver 4*n n = # of Addr

Table Access MAC Table Search 1 100 (Request)101 (Reply)

Driver 16 use Reg Set 1

MAC Table Learn 1 102 (Request)103 (Reply)


MAC Table Delete 1 104 (Request)105 (Reply)


MAC Table Flush 1 106 (Request)107 (Reply)


MAC Table Get 1 108 (Request)109 (Reply)

Driver 8+12*n use Reg Set 1n = # of entry

MAC Table Read 1(for debug)



MAC Table Write 1(for debug)



MAC Table Search 2 120 (Request)121 (Reply)


MAC Table Learn 2 122 (Request)123 (Reply)


MAC Table Delete 2 124 (Request)125 (Reply)


MAC Table Flush 2 126 (Request)127 (Reply)


MAC Table Get 2 128 (Request)129 (Reply)


MAC Table Read 2 (for debug)



MAC Table Write 2(for debug)



Table 3-1. List of Messages (Cont’d.)




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VLAN Table Search 140 (Request)141 (Reply)

Driver 24

VLAN Table Learn 142 (Request)143 (Reply)

Driver 24

VLAN Table Read (for debug)


Driver 24

VLAN Table Write (for debug)


Driver 24

Statistics Collec-tion

Statistics Get 200 (Request)201 (Reply)

Driver 8+x*#port+y*#monVLAN+z

Statistics Clear 202 (Request)203 (Reply)

Driver 8

Packet Transfer Packet Send 300 (Request)301 (Reply)

Driver 8+n (Request)8 (Reply)

Packet Receive 302 (Request)303 (Reply)

AXEL-X 8+n (Request)8 (Reply)

Packet Receive Traffic Moni-toring


AXEL-X 8+n (Request)8 (Reply)

Trap CM MBE 500 (Request)501 (Reply)

AXEL-X 8 Reported after Reset

Drop Queue MBE 502 (Request)503 (Reply)


Output Queue MBE 504 (Request)505 (Reply)


Tag MBE 506 (Request)507 (Reply)


ME Halt 510 (Request)511 (Reply)


Statistics Carry 520 (Request)521 (Reply)

AXEL-X 8

MAC Table MBE 522 (Request)523 (Reply)

AXEL-X 8

VLAN Table MBE 524 (Request)525 (Reply)

AXEL-X 8

Drop Queue SBE 526 (Request)527 (Reply)

AXEL-X 8





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SM Tag MBE 528 (Request)529 (Reply)

AXEL-X 8

SM Tag SBE 530 (Request)531 (Reply)

AXEL-X 8

Output Queue SBE 532 (Request)533 (Reply)

AXEL-X 8

Tag SBE 534 (Request)535 (Reply)

AXEL-X 8

IBUF Tag MBE 536 (Request)537 (Reply)

AXEL-X 8

IBUF Tag SBE 538 (Request)539 (Reply)

AXEL-X 8

Port Interrupt 540 (Request)541 (Reply)

AXEL-X 8

Link Failure 542 (Request)543 (Reply)

AXEL-X 8

MST MBE 544 (Request)545 (Reply)

AXEL-X 8

MST SBE 546 (Request)547 (Reply)

AXEL-X 8

MAC Table SBE 548 (Request)549 (Reply)

AXEL-X 8

VLAN Table SBE 550 (Request)551 (Reply)

AXEL-X 8

CM SBE 552 (Request)553 (Reply)

AXEL-X 8

Output Queue Status 570 (Request)571 (Reply)

AXEL-X 8

Configuration Traffic Monitoring Get 800 (Request)801 (Reply)

Driver 16

Traffic Monitoring Set 802 (Request)803 (Reply)

Driver 16

Congestion Notification Get 810 (Request)811 (Reply)

Driver 40

Congestion Notification Set 812 (Request)813 (Reply)

Driver 40

Configure 10G Port 900 (Request)901 (Reply)

Driver 4





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Note:

• “(message name) 2” has the same format with “(message name) 1” other than message code unless specified. Please see “(message name) 1” for the message format.

• For a message which includes multiple entries, entries are executed in order. For example, Memory Get read data from Address 1, then read data from Address 2, and so on.

Protocol Ping 0 (Request)1 (Reply)

Driver 0

Sync 2 (Request)3 (Reply)

Driver 0

Restart 4 (Request) Driver 0





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3.2 Message

Name: Register Get

Code: 10 (Request) / 11 (Reply)

Purpose: Read AXEL-X Core Register value(s).

Field Description:

• Address: Register address

• Data: Register value (filled in Reply)

Figure 3-2. Register Get

Code (10 or 11)

Length (8*n)

Identifier Sequence Number

Address 1 reserved

Data 1

0 15 16 31

...

Address n reserved

Data n

Status

Type



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Name: Register Set


Purpose: Write value(s) into AXEL-X Core Register(s).

Field Description:


• Data: Register value to be written

Figure 3-3. Register Set

Code (12 or 13)

Length (8*n)


Address 1 reserved

Data 1

0 15 16 31

...

Address n reserved

Data n

Type

Status



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Name: Register Set with Bit Enable


Purpose: Write masked value(s) into AXEL-X Core Register(s).

Field Description:



• Bit Enable: Data Bit Enable

Figure 3-4. Register Set with Bit Enable

Note: AXEL-X read a register and write back a masked data into the register.

Code (14 or 15)

Length (12*n)


Address 1 reserved

Data 1

0 15 16 31

...

Address n reserved

Data n

Bit Enable 1

Bit Enable n

Type

Status



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Name: PCS Register Get


Purpose: Read AXEL-X PCS Register value(s).

Field Description:


• Port: 5 bit Port number


Figure 3-5. PCS Register Get

Code (20 or 21)

Length (8*n)


Address 1 reserved

Data 1

0 15 16 31

...

Address n reserved

Data n

Port

Port

reserved

reserved

Type

Status



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Name: PCS Register Set


Purpose: Write value(s) into AXEL-X PCS Register(s).

Field Description:


• Port: 5 bit Port number


Figure 3-6. PCS Register Set

Code (22 or 23)

Length (8*n)


Address 1 reserved

Data 1

0 15 16 31

...

Address n reserved

Data n

Port

Port

reserved

reserved

Type

Status



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Name: PCS Register Set with Bit Enable


Purpose: Write masked value(s) into AXEL-X PCS Register(s).

Field Description:


• Port: 5 bit Port Number



Figure 3-7. PCS Register Set with Bit Enable


Code (24 or 25)

Length (12*n)


Address 1 reserved

Data 1

0 15 16 31

...

Address n reserved

Data n

Bit Enable 1

Bit Enable n

Port

Port

reserved

reserved

reserved

reserved

Type

Status



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Name: MDIO Op 1


Purpose: Perform MIDO operation(s) at an external MIDO bus.

Field Description:

• ST: 00 for 10G MDIO, 01 for GMII/MII MDIO

• OP: 00 Address (10G only), 01 Write, 10 Read (GMII/MII), Post-read-increment address (10G), 11 Read (10G only)

• PRTAD: 5 bit Port Address

• DEVAD: 5 bit Device Address

• TA: should be 10 for both GMII/MII and 10G

• MIDO Address / Data: Register Address / Data (Data is filled in Reply)

Figure 3-8. MDIO Op 1

Note:

Code (40 or 41)

Length (4*n)


DEVAD MDIO Address / Data

0 15 16 31

...

PRTADOP

Type

Flag / Status

TAST

DEVAD MDIO Address / DataPRTADOP TAST


...


1

2

3

n



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Name: I2C Register Get 1


Purpose: Read I2C Register value(s).

Field Description:

• Address: 16 bit Start Address


• BL: 2 bit Byte Length, 0=4 bytes, 1=2bytes, 2=1byte

• P: Packet Error Checking (PEC)


• N: NACK Received (filled in Reply)

• E: CRC Error (filled in Reply)

Figure 3-9. I2C Register Get 1

Note:

Code (60 or 61)

Length (8*n)


Data 1

0 15 16 31

...

Data n

DEVADAddress 1 N BLP 0

Address n

E

DEVADN BLP 0E

Type

Flag / Status



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Name: I2C Register Set 1


Purpose: Write value(s) into AXEL-X I2C Register(s).

Field Description:





• Data: Register value



Figure 3-10. I2C Register Set 1

Code (62 or 63)

Length (8*n)


Data 1

0 15 16 31

...

Data n


Address n

E

DEVADN BLP 0E

Type

Flag / Status



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Name: I2C Register Set with Bit Enable 1


Purpose: Write masked value(s) into AXEL-X I2C Register(s).

Field Description:









Figure 3-11. I2C Register Set with Bit Enable 1


Code (64 or 65)

Length (12*n)


Data 1

0 15 16 31

...

Data n


Address n

E

DEVADN BLP 0E

Type

Flag / Status

Bit Enable 1

Bit Enable n



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Name: I2C Register Get 2


Purpose: Read I2C Register value(s).

Field Description:





• AL: Address Length, 0=1 byte, 1=2bytes




Figure 3-12. I2C Register Get 2

Note:

Code (70 or 71)

Length (8*n)


Data 1

0 15 16 31

...

Data n


Address n

E

DEVADN BLP 0E

Type

Flag / Status

AL

AL



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Name: I2C Register Set 2


Purpose: Write value(s) into AXEL-X I2C Register(s).

Field Description:









Figure 3-13. I2C Register Set 2

Code (72 or 73)

Length (8*n)


Data 1

0 15 16 31

...

Data n


Address n

E

DEVADN BLP 0E

Type

Flag / Status

AL

AL



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Name: I2C Register Set with Bit Enable 2


Purpose: Write masked value(s) into AXEL-X I2C Register(s).

Field Description:










Figure 3-14. I2C Register Set with Bit Enable 2


Code (74 or 75)

Length (12*n)


Data 1

0 15 16 31

...

Data n


Address n

E

DEVADN BLP 0E

Type

Flag / Status

Bit Enable 1

Bit Enable n

AL

AL



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Name: Memory Get


Purpose: Get memory data from the On-Chip Firmware Memory for debug and customization.

Field Description:

• Address: 16 bit Memory address

• Data: 16 bit word addresses by “Address” (filled in Reply)

Figure 3-15. Memory Get

Note: AXEL-X has valid address in [0x0000, 0x3fff]

Code (80 or 81)

Length (4*n)


Address 1

Data 2

0 15 16 31

...

Address n

Address 2

Type

Status

Data 1

Data n



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Name: Memory Set


Purpose: Set memory data in the On-Chip Firmware Memory for debug only.

Field Description:

• Address: 16 bit Memory address

• Data: 16 bit word addresses by “Address”

Figure 3-16. Memory Set

Note: AXEL-X has valid address in [0x0000, 0x3fff]

Code (82 or 83)

Length (4*n)


Address 1

Data 2

0 15 16 31

...

Address n

Address 2

Type

Status

Data 1

Data n



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Name: MAC Table Search 1


Purpose: Search an entry in the MAC Address Table.

Field Description:

• MAC Address: 48 bit MAC Address to be searched

• VLAN ID: 12 bit VLAN ID for the MAC Address

• S: Static (filled in Reply)

• V: Valid (filled in Reply)

• Port Vector: 24 bit Port Vector (filled in Reply)

• MAC Table Information: Bit [0] =1 Success, 0 Fail , Bit [17:31] Entry address (filled in Reply)

Figure 3-17. MAC Table Search 1

Note:

• LS and MS Word, ex. 00:01:02:03:04:05LS Word <= 00_01_02_03, MS Word <= 04_05

Code (100 or 101)

Length (16)


MAC Address LS Word

MAC Address MS Word

0 15 16 31

reserved VLAN IDS

Port Vector

MAC Table Information

reserved

V

Type

Status



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Name: MAC Table Learn 1


Purpose: Learn an entry in the MAC Address Table.

Field Description:



• S: Static

• V: Valid (filled in Reply)

• Port Vector: 24 bit Port Vector

• MAC Table Information: Bit [0] =1 Success, 0 Fail, Bit [17:31] Entry address (filled in Reply)

Figure 3-18. MAC Table Learn 1

Note:

• If the MAC address to learn already exists in the MAC Table, MAC Table Learn fails.

Code (102 or 103)

Length (16)


MAC Address LS Word

MAC Address MS Word

0 15 16 31

reserved VLAN IDS

Port Vector


reserved

V

Type

Status



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Name: MAC Table Delete 1


Purpose: Delete an entry in the MAC Address Table.

Field Description:




Figure 3-19. MAC Table Delete 1

Note:

Code (104 or 105)

Length (16)


MAC Address LS Word

MAC Address MS Word

0 15 16 31

reserved VLAN ID


reserved

Type

Status



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Name: MAC Table Flush 1


Purpose: Flush entries by port vector in the MAC Address Table.

Field Description:

• D: Delete Dynamic entry only

• Port Vector: 24 bit Port Vector to compare


Figure 3-20. MAC Table Flush 1

Note:

• MAC Table Flush cannot flush an entry with pv=0 which can be registered by management for filtering purpose. MAC Table Delete should be used to delete the entry with pv=0.

Code (106 or 107)

Length (16)


reserved

reserved

0 15 16 31

reserved (12bits)D

Port Vector


reserved

Type

Flag / Status



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Name: MAC Table Get 1


Purpose: Get valid entries in the MAC Address Table.

Field Description:

• Entry Address: 15 bit Start Entry address

• Count: 5 bit # of Valid Entry to be read

• Count Return: 5 bit actual # of Valid Entry which were read (filled in Reply)

• Entry Data : MAC Address, VLAN ID, S(Static), V (Valid), Port Vector (filled in Reply)

• MAC Table Information: Bit [0]=1 Success, 0 Fail, Bit[17:31] Last Entry address (filled in Reply)

Figure 3-21. MAC Table Get 1

Note:

Code (108 or 109)

Length (8+12*n)


MAC Address LS Word n

MAC Address MS Word n

0 15 16 31

VLAN ID n

Port Vector n


MAC Address LS Word 1

MAC Address MS Word 1 VLAN ID 1S

Port Vector 1

reservedV

...

Entry Address Count (n)

reserved

S reservedV

reserved

CountReturn

Status

Type

0 000000



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• AXEL-X reads multiple entries until the count is reached, end of table is reached, or an error is encountered. It returns actual number of valid entries found as Count Return.

• MAC Table Information reflects the last entry read. Therefore Fail result may be returned when Count Return is less than Count.

• VLAN ID=0 is returned in SVL (Shared VLAN Learning) mode.



LA C

onfid

entia

l

Name: MAC Table Read 1


Purpose: Read entries in the MAC Address Table for debug only.

Field Description:


• Count: 5 bit # of Entry to be read

• Entry Data : MAC Address, VLAN ID, S(Static), V (Valid), Port Vector, ECC (filled in Reply)


Figure 3-22. MAC Table Read 1

Note: AXEL-X reads multiple entries until the count is reached or an error is encountered.

Code (110 or 111)

Length (8+12*n)




0 15 16 31

VLAN ID n

Port Vector n




Port Vector 1

reservedV

...

Entry Address reserved Count

ECC

S reservedV

ECC

Type

Status

0



LA C

onfid

entia

l

Name: MAC Table Write 1


Purpose: Write entries into the MAC Address Table for debug only.

Field Description:


• Count: 5 bit # of Entry to be written

• Entry Data : MAC Address, VLAN ID, S(Static), V (Valid), Port Vector, ECC


Figure 3-23. MAC Table Write 1

Note: AXEL-X writes multiple entries until the count is reached or an error is encountered.

Code (112 or 113)

Length (8+12*n)




0 15 16 31

VLAN ID n

Port Vector n




Port Vector 1

reservedV

...

Entry Address reserved Count

ECC

S reservedV

ECC

Type

Status

0



LA C

onfid

entia

l

Name: VLAN Table Search


Purpose: Search an entry in the VLAN Table.

Field Description:

• V: Valid Bit (filled in Reply)

• VLAN ID: 12 bit VLAN ID

• USE: USE Bit per Port (filled in Reply)

• TAG: Tagging Bit per Port (filled in Reply)

• M: VLAN Mirroring Bit per entry (filled in Reply)

• Port State: MSTP Port State 2 bits per port (filled in Reply)

• VLAN Table Information: Bit [0] =1 Success, 0 Fail (filled in Reply)

Figure 3-24. VLAN Table Search

Note:

Code (140 or 141)

Length (24)


0 15 16 31

reserved

VLAN ID

M

USE

VLAN Table Information

reserved

TAG

Port State 23 to 16

Port State 15 to 0

reserved

Type

Status

reserved V reserved



LA C

onfid

entia

l

Name: VLAN Table Learn


Purpose: Learn an entry in the VLAN Table.

Field Description:

• V: Valid Bit


• USE: USE Bit per Port

• TAG: Tagging Bit per Port

• M: VLAN Mirroring Bit per entry

• Port State: MSTP Port State 2 bits per port


Figure 3-25. VLAN Table Learn

Note:

Code (142 or 143)

Length (24)


0 15 16 31

reserved

VLAN ID

M

USE


reserved

TAG

Port State 15 to 0

Port State 23 to 16reserved

Type

Status

reserved V reserved



LA C

onfid

entia

l

Name: VLAN Table Read


Purpose: Read an entry in the VLAN Table for debug only.

Field Description:

• V: Valid Bit (filled in Reply)


• R: Memory (RAM) ID Bit

• USE: USE Bit per Port (filled in Reply)

• TAG: Tagging Bit per Port (filled in Reply)

• M: VLAN Mirroring Bit per entry (filled in Reply)

• Port State: MSTP Port State 2 bits per port (filled in Reply)

• ECC: 8 bit ECC (filled in Reply)


Figure 3-26. VLAN Table Read

Note:

Code (144 or 145)

Length (24)


0 15 16 31

reserved

VLAN ID

M

USE


reserved

TAG

Port State 15 to 0


ECC

Type

Status

reserved V reserved R



LA C

onfid

entia

l

Name: VLAN Table Write


Purpose: Write an entry into the VLAN Table for debug only.

Field Description:

• V: Valid Bit


• USE: USE Bit per Port

• TAG: Tagging Bit per Port

• M: VLAN Mirroring Bit per entry

• Port State: MSTP Port State 2 bits per port

• ECC: 8 bit ECC


Figure 3-27. VLAN Table Write

Note:

Code (146 or 147)

Length (24)


0 15 16 31

reserved

VLAN ID

M

USE


reserved

TAG

Port State 15 to 0


ECC

Type

Status

reserved V reserved



LA C

onfid

entia

l

Name: Statistics Get


Purpose: Get Port / Priority / Flow control / VLAN / Host Statistics.

Field Description:

• P: Port Statistics which includes Priority and Flow Control statistics.

• V: VLAN Statistics Packet counts and Byte counts per VLAN (up to 32 VLANs)

• D: Device Statistics which includes Host Monitoring and Learn Drop Statistics.

• PV: Port select for Port Statistics.

• Monitored VLAN: Monitored VLAN vector for VLAN Statistics.

• Port Statistics: Port Statistics, x bytes * # of ports selected in PV (filled in Reply if P=1)

• VLAN Statistics: VLAN Statistics y bytes * # of Monitored VLAN (filled in Reply if V=1)

• Device Statists: Device Statistics z bytes (filled in Reply if D=1)

Figure 3-28. Statistics Get

Note:

Code (200 or 201)

Length(8+x*#port+y*MonVLAN+z)


0 15 16 31

reservedP

Port Statistics (x*#port, x=340 bytes)

Device Statistics (z=16 bytes)

PV

VLAN Statistics (y*#monitored VLAN,y=24bytes)

V D

Monitored VLAN

Type

Status



LA C

onfid

entia

l

• Table 3-2 shows Port, VLAN and Device statistics to be returned in the Reply message.

Table 3-2. Statistics Counters

StatisticsByte

Offset AXEL-X Register NameRegister Address Note

Port 0 Statistics Counter TRC64 base+480h

4 Statistics Counter TRC127 base+484h


12 Statistics Counter TRC511 base+48ch



24 Statistics Counter TRMGVC base+498h

28 Statistics Counter RXBYTC base+49ch

32 Statistics Counter RXPKTC base+4a0h

36 Statistics Counter RXFCSC base+4a4h

40 Statistics Counter RXMCAC base+4a8h

44 Statistics Counter RXBCAC base+4ach

48 Statistics Counter RXCFC base+4b0h

52 Statistics Counter RXPFC base+4b4h

56 Statistics Counter RXUOC base+4b8h

60 Statistics Counter RXALNC base+4bch

64 Statistics Counter RXFLRC base+4c0h

68 Statistics Counter RXCDEC base+4c4h

72 Statistics Counter RXCSEC base+4c8h

76 Statistics Counter RXUNDC base+4cch

80 Statistics Counter RXOVRC base+4d0h

84 Statistics Counter RXFRGC base+4d4h

88 Statistics Counter RXJBRC base+4d8h

92 Statistics Counter RXDRPC base+4dch

96 Statistics Counter TXBYTC base+4e0h

100 Statistics Counter TXPKTC base+4e4h

104 Statistics Counter TXMCAC base+4e8h

108 Statistics Counter TXBCAC base+4ech

112 Statistics Counter TXPFC base+4f0h

116 Statistics Counter TXTOC base+510h

120 Statistics Counter TXDRPC base+514h

124 Statistics Counter TXJBRC base+518h

128 Statistics Counter TXFCSC base+51ch

132 Statistics Counter TXCFC base+520h

136 Statistics Counter TXOVRC base+524h



LA C

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Port (Cont’d)

140 Statistics Counter TXUNDC base+528h

144 Statistics Counter TXFRGC base+52ch

148 Statistics Counter RXPFC_P0 base+540h



160 Statistics Counter RXPFC_P3 base+54ch




176 Statistics Counter RXPFC_P7 base+55ch

180 Statistics Counter TXPFC_P0 base+560h



192 Statistics Counter TXPFC_P3 base+56ch




208 Statistics Counter TXPFC_P7 base+57ch

212 Statistics Counter RXPFC_TR0 base+580h



224 Statistics Counter RXPFC_TR3 base+58ch




240 Statistics Counter RXPFC_TR7 base+59ch

244 Statistics Counter RxPriority0Pkts base+600h

248 Statistics Counter RxPriority0Bytes base+604h


256 Statistics Counter RxPriority1Bytes base+60ch








StatisticsByte




LA C

onfid

entia

l

Port (Cont’d)







308 Statistics Counter FWpkts base+680h

312 Statistics Counter FLDpkts base+684h

316 Statistics Counter VLANDrops base+688h

320 Statistics Counter FULLDrops base+68ch

324 Statistics Counter STMDrops base+690h

328 Statistics Counter EDDrops base+694h

332 Statistics Counter CMDrops base+698h

336 Statistics Counter PortLearnDrops base+69ch

VLAN 0 Statistics Counter VLANunicastPkts 0 0400h ex. Monitor VLAN 0

4 Statistics Counter VLANunicastBytesL 0 0404h

8 Statistics Counter VLANunicastBytesH 0 0408h

12 Statistics Counter VLANMulticastPkts 0 040ch

16 Statistics Counter VLANMulticastBytesL 0 0410h

20 Statistics Counter VLANMulticastBytesH 0 0414h

Device 0 Statistics Counter Hostinpkts 0300h

4 Statistics Counter Hostoutpkts 0304h

8 Statistics Counter HostoutErrors 0308h

12 Learn Drop Count Register 0134h


StatisticsByte




LA C

onfid

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Name: Statistics Clear


Purpose: Clear Port / Priority / Flow control / VLAN / Host Statistics.

Field Description:

• P: Port Statistics which includes Priority and Flow Control statistics.

• V: VLAN Statistics Packet counts and Byte counts per VLAN (up to 32 VLANs)

• D: Device Statistics which includes Host Monitoring and Learn Drop Statistics.

• PV: Port select for Port Statistics.

• Monitored VLAN: Monitored VLAN vector for VLAN Statistics.

Figure 3-29. Statistics Clear

Note:

Code (202 or 203)

Length (8)


0 15 16 31

reservedP PVV D

Monitored VLAN

Status

Type



LA C

onfid

entia

l

Name: Packet Send


Purpose: Send a Packet.

Field Description:

• Inbound Length: Value for Inbound Length Register (Status update in Reply)

• Inbound Destination: Value for Inbound Destination Register (Status update in Reply)

• Packet Data: Form DA to FCS (FCS value will be replaced by AXEL-X)

Figure 3-30. Packet Send

Note:

• Lower 23 bits of Inbound Length Register can be changed with this API.

Code (300 or 301)

Length (8+n for Request,


0 15 16 31

Packet Data (n)

Inbound Length

8 for Reply)

Inbound Destination

Type

Status



LA C

onfid

entia

l

Name: Packet Receive


Purpose: Receive a Packet (other than Traffic Monitoring Packet).

Field Description:

• Outbound Length: Value of Outbound Length Register

• OBUF Frame Information: Value of OBUF Frame Information Register

• Packet Data: Form DA to FCS (AXEL-X checks FCS automatically and shows

the result in Outbound Length Register)

Figure 3-31. Packet Receive

Note:

Code (302 or 303)



0 15 16 31

Packet Data (n)

Outbound Length

8 for Reply)

OBUF Frame Information

Type

Status



LA C

onfid

entia

l

Name: Packet Receive Traffic Monitoring


Purpose: Receive a Traffic Monitoring Packet.

Field Description:

• Outbound Length: Value of Outbound Length Register

• OBUF Frame Information: Value of OBUF Frame Information Register

• Packet Data: Form DA to FCS (AXEL-X checks FCS automatically and shows

the result in Outbound Length Register)

Figure 3-32. Packet Receive Traffic Monitoring

Note:

Code (304 or 305)



0 15 16 31

Packet Data (n)

Outbound Length

8 for Reply)

OBUF Frame Information

Type

Status



LA C

onfid

entia

l

Name: CM MBE


Purpose: Report MBE in CM Buffer.

Field Description:

• CM Buffer Error Log: Value of CM Buffer Error Logging Register

Figure 3-33. CM MBE

Note:

• AXEL-X logs a fatal error and reset chip. This message is sent after initialization.

Code (500 or 501)

Length (8)


0 15 16 31

CM Buffer Error Log

Type

Status

reserved



LA C

onfid

entia

l

Name: Drop Queue MBE


Purpose: Report MBE in Drop Queue.

Field Description:

• Drop Queue Error Log: Value of Request Drop Queue Error Logging Register

Figure 3-34. Drop Queue MBE

Note:


Code (502 or 503)

Length (8)


0 15 16 31

Drop Queue Error Log

Type

Status

reserved



LA C

onfid

entia

l

Name: Output Queue MBE


Purpose: Report MBE in Output Queue.

Field Description:

• Port Number: 5 bit Port number

• Output Queue Error Log: Value of Output Queue Error Logging Register

Figure 3-35. Output Queue MBE

Note:


Code (504 or 505)

Length (8)


0 15 16 31

Output Queue Error Log

Type

Status

reserved Port



LA C

onfid

entia

l

Name: Tag MBE


Purpose: Report MBE in Tag Memory.

Field Description:

• Tag memory Error Log: Value of Tag Memory Error Logging Register

Figure 3-36. Tag Memory MBE

Note:


Code (506 or 507)

Length (8)


0 15 16 31

Tag Memory Error Log

Type

Status

reserved



LA C

onfid

entia

l

Name: ME Halt


Purpose: Report ME Halt by the execution of ME Halt instruction or Watch Dog Timer fault.

Field Description:

• ME Status Register: Value of ME Status Register.

• ME IRQ Wake-up 0 Register: Value of ME IRQ Wake-up 0 Register.

Figure 3-37. ME Halt

Note:


Code (510 or 511)

Length (8)


0 15 16 31

ME IRQ Wake-up 0 Register

Type

Status

ME Status Register



LA C

onfid

entia

l

Name: Statistics Carry


Purpose: Report Carry in Statistics Counters.

Field Description:

• P: Carry in Port Statistics which includes Priority and Flow Control statistics.

• V: Carry in VLAN Statistics

• D: Carry in Device Statistics which includes Host Monitoring, Learn Drop Statistics.

• PV: Port Vector for Port Statistics Carry.

• VLAN: VLAN vector for VLAN Statistics Carry.

Figure 3-38. Statistics Carry

Note:

• VLAN vector Bit n corresponds to Monitor VLAN n.

• This trap is a Service Required Trap.

Code (520 or 521)

Length (8)


0 15 16 31

Type

Status

VLAN

PVreservedP V D



LA C

onfid

entia

l

Name: MAC Table MBE


Purpose: Report MBE in MAC Table.

Field Description:

• MAC Table Error Log: Value of MAC Address Table Error Logging Register

Figure 3-39. MAC Table MBE

Note:

Code (522 or 523)

Length (8)


0 15 16 31

MAC Table Error Log

Type

Status

reserved



LA C

onfid

entia

l

Name: VLAN Table MBE


Purpose: Report MBE in VLAN Table.

Field Description:

• VLAN Table Error Log: Value of VLAN Table Error Logging Register

Figure 3-40. VLAN Table MBE

Note:

Code (524 or 525)

Length (8)


0 15 16 31

VLAN Table Error Log

Type

Status

reserved



LA C

onfid

entia

l

Name: Drop Queue SBE


Purpose: Report SBE in Drop Queue.

Field Description:

• Drop Queue Error Log: Value of Request Drop Queue Error Logging Register

Figure 3-41. Drop Queue SBE

Note:

Code (526 or 527)

Length (8)


0 15 16 31

Drop Queue Error Log

Type

Status

reserved



LA C

onfid

entia

l

Name: SM Tag MBE


Purpose: Report MBE in Stream Memory Tag.

Field Description:

• Stream Memory MBE Status: Value of Stream Memory MBE Status Register

Figure 3-42. SM Tag MBE

Note:

Code (528 or 529)

Length (8)


0 15 16 31

Stream Memory MBE Status

Type

Status

reserved



LA C

onfid

entia

l

Name: SM Tag SBE


Purpose: Report SBE in Stream Memory Tag.

Field Description:

• Stream Memory SBE Status: Value of Stream Memory SBE Status Register

Figure 3-43. SM Tag SBE

Note:

Code (530 or 531)

Length (8)


0 15 16 31

Stream Memory SBE Status

Type

Status

reserved



LA C

onfid

entia

l

Name: Output Queue SBE


Purpose: Report SBE in Output Queue.

Field Description:


• Output Queue Error Log: Value of Output Queue Error Logging Register

Figure 3-44. Output Queue SBE

Note:

Code (532 or 533)

Length (8)


0 15 16 31

Output Queue Error Log

Type

Status

reserved Port



LA C

onfid

entia

l

Name: Tag SBE


Purpose: Report SBE in Tag Memory.

Field Description:

• Tag memory Error Log: Value of Request Tag Memory Error Logging Register

Figure 3-45. Tag SBE

Note:

Code (534 or 535)

Length (8)


0 15 16 31

Tag Memory Error Log

Type

Status

reserved



LA C

onfid

entia

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Name: IBUF Tag MBE


Purpose: Report MBE in IBUF Tag.

Field Description:

• IBUF MBE Log: Value of IBUF MBE Logging Register

Figure 3-46. IBUF Tag MBE

Note:

Code (536 or 537)

Length (8)


0 15 16 31

IBUF MBE Log

Type

Status

reserved



LA C

onfid

entia

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Name: IBUF Tag SBE


Purpose: Report SBE in IBUF Tag.

Field Description:

• IBUF SBE Log: Value of IBUF SBE Logging Register

Figure 3-47. IBUF Tag SBE

Note:

Code (538 or 539)

Length (8)


0 15 16 31

IBUF SBE Log

Type

Status

reserved



LA C

onfid

entia

l

Name: Port Interrupt


Purpose: Report Port Interrupt other than Link Failure.

Field Description:


• Port IRQ Status: Value of Port IRQ Status Register

Figure 3-48. Port Interrupt

Note:

• Port Security Trap and Link Fault Trap are Service Required Traps.

Code (540 or 541)

Length (8)


0 15 16 31

Port IRQ Status

Type

Status

reserved Port



LA C

onfid

entia

l

Name: Link Failure


Purpose: Report Link Failure.

Field Description:


• Port IRQ Status: Value of Port IRQ Status Register

Figure 3-49. Link Failure

Note:

• This is a Service Required Trap.

Code (542 or 543)

Length (8)


0 15 16 31

Port IRQ Status

Type

Status

reserved Port



LA C

onfid

entia

l

Name: MST MBE


Purpose: Report MBE in MST.

Field Description:

• MST Error Log: Value of MST Error Logging Register

Figure 3-50. MST MBE

Note:

Code (544 or 545)

Length (8)


0 15 16 31

MST Error Log

Type

Status

reserved



LA C

onfid

entia

l

Name: MST SBE


Purpose: Report SBE in MST.

Field Description:

• MST Error Log: Value of MST Error Logging Register

Figure 3-51. MST SBE

Note:

Code (546 or 547)

Length (8)


0 15 16 31

MST Error Log

Type

Status

reserved



LA C

onfid

entia

l

Name: MAC Table SBE


Purpose: Report SBE in MAC Table.

Field Description:

• MAC Table Error Log: Value of MAC Address Table Error Logging Register

Figure 3-52. MAC Table SBE

Note:

Code (548 or 549)

Length (8)


0 15 16 31

MAC Table Error Log

Type

Status

reserved



LA C

onfid

entia

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Name: VLAN Table SBE


Purpose: Report SBE in VLAN Table.

Field Description:

• VLAN Table Error Log: Value of VLAN Table Error Logging Register

Figure 3-53. VLAN Table SBE

Note:

Code (550 or 551)

Length (8)


0 15 16 31

VLAN Table Error Log

Type

Status

reserved



LA C

onfid

entia

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Name: CM SBE


Purpose: Report SBE in CM Buffer.

Field Description:

• CM Buffer Error Log: Value of CM Buffer Error Logging Register

Figure 3-54. CM SBE

Note:

Code (552 or 553)

Length (8)


0 15 16 31

CM Buffer Error Log

Type

Status

reserved



LA C

onfid

entia

l

Name: Output Queue Status


Purpose: Report Output Queue Status.

Field Description:

• Output Queue Status: Value of Output Queue Status Register

Figure 3-55. Output Queue Status

Note:

• This is a Service Required Trap.

Code (570 or 571)

Length (8)


0 15 16 31

Output Queue Status

Type

Status

reserved



LA C

onfid

entia

l

Name: Traffic Monitoring Get


Purpose: Get the traffic monitoring configuration.

Field Description:

• Enable Vector: 24 bit Enable Vector, 0 Disable, 1 Enable

• Random Polynomial Function: 32 bit Random Polynomial Function (filled in Reply)

• Random Seed: 32 bit Random Seed (filled in Reply)

• Recovery Timer: 16 bit Recovery Timer (filled in Reply)

Figure 3-56. Traffic Monitoring Get

Note:

• When multiple bit is set in the Enable Vector, the lowest significant bit is used to report the parameters.

Code (800 or 801)

Length (16)


Reserved

0 15 16 31

Type

Status

Enable Vector

Random Polynomial Function

Random Seed

Reserved Recovery Timer



LA C

onfid

entia

l

Name: Traffic Monitoring Set


Purpose: Set the traffic monitoring configuration.

Field Description:


• Random Polynomial Function: 32 bit Random Polynomial Function

• Random Seed: 32 bit Random Seed

• Recovery Timer: 16 bit Recovery Timer

Figure 3-57. Traffic Monitoring Set

Note:

• Multiple ports can be set simultaneously by setting multiple bits in the Enable Vector.

Code (802 or 803)

Length (16)


Reserved

0 15 16 31

Type

Status

Enable Vector

Random Polynomial Function

Random Seed

Reserved Recovery Timer



LA C

onfid

entia

l

Name: Congestion Notification Get


Purpose: Get the congestion notification configuration.

Field Description:


• Output Queue Threshold: 32 bit Output Queue Threshold (filled in Reply)

• BCN Payload Size: 16 bit BCN Payload Size (filled in Reply)

• BCN Interval: 16 bit BCN Interval (filled in Reply)

• BCN Redirection/Mirror Vector: 24 bit BCN Redirection/Mirror Vector (filled in Reply)

• BCN DA[0:3]: 32bit BCN DA[0:3] (filled in Reply)

• BCN DA[4:5]: 16bit BCN DA[4:5] (filled in Reply)

• BCN SA[0:1]: 16bit BCN SA[0:1] (filled in Reply)

• BCN SA[2:5]: 32bit BCN SA[2:5] (filled in Reply)

• BCN Ethertype: 16 bit BCN Ethertype (filled in Reply)

• BCN Version: 16bit BCN Version (filled in Reply)

• BCN Priority: 3 bit BCN Priority (filled in Reply)

• BCN Option: 16 bit BCN Option (filled in Reply)

• BCN Global Chip ID: 8 bit BCN Global Chip ID (filled in Reply)



LA C

onfid

entia

l

Figure 3-58. Congestion Notification Get

Note:

• When multiple bit is set in the Enable Vector, the lowest significant bit is used to report the parameters.

Code (810 or 811)

Length (40)


Enable Vector

0 15 16 31

Type

Status

Output Queue Threshold

BCN Payload Size BCN Interval

BCN Redirection / Mirror Vector

BCN DA[0:3]

BCN DA[4:5] BCN SA[0:1]

BCN GlobalChip ID

Reserved

Reserved

Reserved

BCN SA[2:5]

BCNPriority

BCN Ethertype BCN Version

BCN OptionReserved



LA C

onfid

entia

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Name: Congestion Notification Set


Purpose: Set the congestion notification configuration.

Field Description:


• Output Queue Threshold: 32 bit Output Queue Threshold

• BCN Payload Size: 16 bit BCN Payload Size

• BCN Interval: 16 bit BCN Interval

• BCN Redirection/Mirror Vector: 24 bit BCN Redirection/Mirror Vector

• BCN DA[0:3]: 32bit BCN DA[0:3]

• BCN DA[4:5]: 16bit BCN DA[4:5]

• BCN SA[0:1]: 16bit BCN SA[0:1]

• BCN SA[2:5]: 32bit BCN SA[2:5]

• BCN Ethertype: 16 bit BCN Ethertype

• BCN Version: 16bit BCN Version

• BCN Priority: 3 bit BCN Priority

• BCN Option: 16 bit BCN Option

• BCN Global Chip ID: 8 bit BCN Global Chip ID



LA C

onfid

entia

l

Figure 3-59. Congestion Notification Set

Note:

• Multiple ports can be set simultaneously by setting multiple bits in the Enable Vector.

Code (812 or 813)

Length (40)


Enable Vector

0 15 16 31

Type

Status

Output Queue Threshold

BCN Payload Size BCN Interval

BCN Redirection / Mirror Vector

BCN DA[0:3]

BCN DA[4:5] BCN SA[0:1]

BCN GlobalChip ID

Reserved

Reserved

Reserved

BCN SA[2:5]

BCNPriority

BCN Ethertype BCN Version

BCN OptionReserved



LA C

onfid

entia

l

Name: Configure 10G Port


Purpose: Configure one 10G Port.

Field Description:

• Port Number: 0 to 19 (10G port number)

• Port Operation: 0 Disable 10G Port, 1 Enable 10G Port

Figure 3-60. Configure 10G Port

Note:

Code (900 or 901)

Length (4)


Port Number

0 15 16 31

Type

Status

Port Operation



LA C

onfid

entia

l

Name: Ping


Purpose: Ping.

Field Description:

Figure 3-61. Ping

Note:

• This message is excluded from the sequence check in AXEL-X and the expecting sequence number is not incremented.

• AXEL-X sends Ping back to the source station using Inbound Destination Function.

Code (0 or 1)

Length (0)


0 15 16 31

Type

Status



LA C

onfid

entia

l

Name: Sync


Purpose: Synchronization Protocol.

Field Description:

Figure 3-62. Sync

Note:

• AXEL-X keeps track of sequence to secure protocol. For example, Register Set is not done when the sequence number for the Identifier skips.

• When the sequence error occurs, non zero value is returned in the Status field.

• With the reception of this message, AXEL-X resets the sequence tracking and initialize the expecting sequence number with a value given in the Sequence Number field and increment it. Therefore Host should send a first request message with sequence number 1 when the Sequence Number field of Sync is 0.

• After Sync is received, AXEL-X initialize the sending sequence number for the requests (Trap or Packet Receive). Therefor AXEL-X sends a first request with sequence number 0 when the Sequence Number field of Sync is 0. Host is not required to check the sequence number.

• On-Chip Code uses this Identifier in the Packet Receive and Trap messages.

Code (2 or 3)

Length (0)

Identifier Sequence Number (0)

0 15 16 31

Type

Status



LA C

onfid

entia

l

Name: Restart

Code: 4 (Request)

Purpose: Restart by resetting chip.

Field Description:

• S: Sticky Clear. 0=not clear sticky information. 1=clear sticky information.

Figure 3-63. Restart

Note:

• No Reply message is returned. Therefore Host needs to send Ping message to check the completion of the initialization.

Code (4)

Length (4)


0 15 16 31

Type

Status

Sreserved

Appendix AXEL-X MB8AA3020 On-Chip Code API


FLA

Con

fiden

tial

CHAPTER 4: APPENDIX

4.1 RAW Ethernet

Two Linux hosts can communicates each other on the Ethernet layer using RAW socket (AF_PACKET with SOCK_RAW). From the programmer’s point of view, it is similar to UDP. The differences are:

• The parameters for the function used to create a socket

• Instead of IP addresses, MAC addresses are used

• The data link header needs to be created manually

Figure 4-64. Ethernet Frame (IEEE 802.3)

DestMAC SrcMAC TypeTCP / UDP

User DataData Link Header CRC

FCS

(14 octets) (46 - 1500 octets) (4 octets)

(6 octets) (6 octets) (2 octets) (4 octets)

IP

Ethernet

Physical

Date post:	19-Jun-2020
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AXEL-X MB8AA3020 On-Chip Code API - FujitsuFunctional Description AXEL-X MB8AA3020 On-Chip Code API...

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