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Bandwidth enhancement technique for TIA using ipped voltage follower Shunta Mizuno a) , Fumiya Naito, and Makoto Nakamura Graduate School of Eng., Gifu University, 11 Yanagido, Gifu City, Gifu 5011193, Japan a) shun.zuno@gmail.com Abstract: We present a novel bandwidth enhancement technique for a transimpedance amplier (TIA). The proposed TIA utilizes a common source topology and adopts the current mirror conguration using ipped voltage follower to increase the open-loop gain for the enhanced bandwidth with positive feedback. Circuit simulation results show that the proposed TIA makes it possible to increase the open-loop gain and enlarge the bandwidth by 40% compared with the conventional TIA. Keywords: transimpedance amplier, ipped voltage follower, optical receiver Classication: Integrated circuits References [1] J.-S. Youn, et al.: A bandwidth adjustable integrated optical receiver with an on-chip silicon avalanche photodetector,IEICE Electron. Express 8 (2011) 404 (DOI: 10.1587/elex.8.404). [2] C. Kromer, et al.: A low-power 20-GHz 52-dBΩ transimpedance amplier in 80-nm CMOS,IEEE J. Solid-State Circuits 39 (2004) 885 (DOI: 10.1109/ JSSC.2004.827807). [3] K. Schrödinger, et al.: A fully integrated CMOS receiver front-end for optic Gigabit Ethernet,IEEE J. Solid-State Circuits 37 (2002) 874 (DOI: 10.1109/ JSSC.2002.1015685). [4] B. Huang, et al.: 1-Gb/s zero-pole cancellation CMOS transimpedance amplier for Gigabit Ethernet applications,J. Semicond. 30 (2009) 105005 (DOI: 10.1088/1674-4926/30/10/105005). [5] D. Y. Jung, et al.: Trans-impedance amplier of source follower topology using an active device for bandwidth extension in optical communication systems,J. Korean Phys. Soc. 45 (2004) 761. [6] M. Jalali, et al.: G m -boosted dierential transimpedance amplier architec- ture,IEICE Electron. Express 4 (2007) 498 (DOI: 10.1587/elex.4.498). [7] B. Razavi: A 622 Mb/s 4.5 pA/ ffiffiffiffi H p z CMOS transimpedance amplier [for optical receiver front-end],IEEE International Solid-State Circuits Conference (2000) 162 (DOI: 10.1109/ISSCC.2000.839732). [8] R. G. Carvajal, et al.: The ipped voltage follower: A useful cell for low- voltage low-power circuit design,IEEE Circuits and Systems 52 (2005) 1276 (DOI: 10.1109/TCSI.2005.851387). [9] P. E. Allen and D. R. Holberg: CMOS Analog Circuit Design (Oxford University Press, Oxford, 2002) 2nd ed. 206. © IEICE 2017 DOI: 10.1587/elex.14.20170310 Received March 28, 2017 Accepted April 19, 2017 Publicized May 8, 2017 Copyedited May 25, 2017 1 LETTER IEICE Electronics Express, Vol.14, No.10, 16
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Page 1: Bandwidth enhancement technique for TIA using flipped ...

Bandwidth enhancementtechnique for TIA usingflipped voltage follower

Shunta Mizunoa), Fumiya Naito, and Makoto NakamuraGraduate School of Eng., Gifu University,

1–1 Yanagido, Gifu City, Gifu 501–1193, Japan

a) [email protected]

Abstract: We present a novel bandwidth enhancement technique for a

transimpedance amplifier (TIA). The proposed TIA utilizes a common

source topology and adopts the current mirror configuration using flipped

voltage follower to increase the open-loop gain for the enhanced bandwidth

with positive feedback. Circuit simulation results show that the proposed

TIA makes it possible to increase the open-loop gain and enlarge the

bandwidth by 40% compared with the conventional TIA.

Keywords: transimpedance amplifier, flipped voltage follower, optical

receiver

Classification: Integrated circuits

References

[1] J.-S. Youn, et al.: “A bandwidth adjustable integrated optical receiver with anon-chip silicon avalanche photodetector,” IEICE Electron. Express 8 (2011)404 (DOI: 10.1587/elex.8.404).

[2] C. Kromer, et al.: “A low-power 20-GHz 52-dBΩ transimpedance amplifierin 80-nm CMOS,” IEEE J. Solid-State Circuits 39 (2004) 885 (DOI: 10.1109/JSSC.2004.827807).

[3] K. Schrödinger, et al.: “A fully integrated CMOS receiver front-end for opticGigabit Ethernet,” IEEE J. Solid-State Circuits 37 (2002) 874 (DOI: 10.1109/JSSC.2002.1015685).

[4] B. Huang, et al.: “1-Gb/s zero-pole cancellation CMOS transimpedanceamplifier for Gigabit Ethernet applications,” J. Semicond. 30 (2009) 105005(DOI: 10.1088/1674-4926/30/10/105005).

[5] D. Y. Jung, et al.: “Trans-impedance amplifier of source follower topologyusing an active device for bandwidth extension in optical communicationsystems,” J. Korean Phys. Soc. 45 (2004) 761.

[6] M. Jalali, et al.: “Gm-boosted differential transimpedance amplifier architec-ture,” IEICE Electron. Express 4 (2007) 498 (DOI: 10.1587/elex.4.498).

[7] B. Razavi: “A 622Mb/s 4.5 pA/ffiffiffiffiH

pz CMOS transimpedance amplifier [for

optical receiver front-end],” IEEE International Solid-State Circuits Conference(2000) 162 (DOI: 10.1109/ISSCC.2000.839732).

[8] R. G. Carvajal, et al.: “The flipped voltage follower: A useful cell for low-voltage low-power circuit design,” IEEE Circuits and Systems 52 (2005) 1276(DOI: 10.1109/TCSI.2005.851387).

[9] P. E. Allen and D. R. Holberg: CMOS Analog Circuit Design (OxfordUniversity Press, Oxford, 2002) 2nd ed. 206.

© IEICE 2017DOI: 10.1587/elex.14.20170310Received March 28, 2017Accepted April 19, 2017Publicized May 8, 2017Copyedited May 25, 2017

1

LETTER IEICE Electronics Express, Vol.14, No.10, 1–6

Page 2: Bandwidth enhancement technique for TIA using flipped ...

[10] B. Razavi: Design of Integrated Circuits for Optical Communications(McGraw-Hill, New York, 2003) 103.

1 Introduction

Data traffic on the Internet has increased explosively due to the spread of personal

computers and smartphones. Optical-fiber communication is a most promising

system for handling this increasing amount of information. In such a system, an

optical receiver is an important part, and the front-end transimpedance amplifier

(TIA) is a critical element affecting the performance of the whole system. There-

fore, to achieve high-data-rate communication, it is essential for the TIA to have a

wider bandwidth. Increasing the open-loop gain of the TIA would make it possible

to reduce the input impedance and widen the bandwidth.

In this paper, we propose a novel bandwidth enhancement technique using a

current mirror configuration with FVF. The proposed technique can boost the

bandwidth of a TIA by using a mirror current of the input current from a photo-

diode. We designed the proposed TIAwith FVF using 0.18-µm CMOS technology.

Simulation results show it has a 40% wider bandwidth in comparison with the

conventional TIA. This proposed technique makes broadband operation possible

without increasing the supply voltage.

2 Conventional TIA circuit

There are several TIA circuit topologies such as common-source (CS) [1, 2, 3, 4],

common-drain (CD) [5] and common-gate (CG) [6, 7]. Among these, the TIA

based on CS (CS-TIA) has been widely used due to its low noise characteristic.

Fig. 1 shows the conventional CS-TIA circuit. It comprises a first CS stage, second

CD stage, and feedback resistor Rf. In the CS-TIA, the bandwidth f�3dB and open-

loop gain Av are expressed by the following equations,

f�3dB ¼ 1

2�

jAvjRfCin

; ð1Þ

Av ¼ � gm1R

sRC þ 1; ð2Þ

where Cin is an input capacitance including photodiode junction Cpd and M1 gate

capacitance Cg, gm1 is a transconductance of M1, R is a load resistance, and C is a

Fig. 1. Conventional CS-TIA circuit.

© IEICE 2017DOI: 10.1587/elex.14.20170310Received March 28, 2017Accepted April 19, 2017Publicized May 8, 2017Copyedited May 25, 2017

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IEICE Electronics Express, Vol.14, No.10, 1–6

Page 3: Bandwidth enhancement technique for TIA using flipped ...

parasitic capacitance attributed to R and M1. From these equations, increasing the

load resistance R makes it possible to enlarge the open-loop gain Av and widen the

bandwidth. However, in this circuit, increasing R generates a large voltage drop and

causes the voltage headroom to deteriorate. To overcome this problem, we propose

a novel bandwidth enhancement technique using the FVF.

3 Proposed TIA using FVF

The proposed TIA circuit configuration is depicted in Fig. 2. It employs a common-

source amplifier with a FVF to increase the open-loop gain.

The FVF and transistor M3 comprise the current mirror configuration, which

generates the mirror current Niin of the input current signal iin. Owing to this

current, a new voltage-signal gain is generated through the load resistance R. FVF

also works as a voltage follower, and is frequently used as an output buffer [8].

As a result, the open-loop gain can be boosted without increasing the supply

voltage. Here, the mirror current flow is determined by the gate width ratio

WM3 : WM4 ¼ N : 1 of transistors M3 and M4.

Fig. 3 shows a block diagram of the proposed TIA. The transfer function can be

expressed as Eq. (3).

GðsÞ ¼ voutvin

¼ �

gm þ NRf

� �R

1 � RRf

N

1 þ s RC1� R

RfN

ð3Þ

The open-loop gain Av and the pole sa from Eq. (3) are given by in Eq. (4) and

Eq. (5).

Av ¼ �gm þ N

Rf

� �R

1 � RRf

Nð4Þ

sa ¼ �1 � R

RfN

RCð5Þ

Fig. 2. Proposed CS-TIA circuit using FVF.

© IEICE 2017DOI: 10.1587/elex.14.20170310Received March 28, 2017Accepted April 19, 2017Publicized May 8, 2017Copyedited May 25, 2017

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IEICE Electronics Express, Vol.14, No.10, 1–6

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As shown in Eq. (4), using the mirror current generates an additional gain

through a positive-feedback loop, and the TIA increases the open-loop gain when

1 > ðR=RfÞN as a result. In summary, the proposed TIAwith FVF makes it possible

to boost the open-loop gain and widen the bandwidth without increasing the supply

voltage.

4 Simulation results

To evaluate the performance of the proposed technique, the TIA circuit with FVF

was simulated using 0.18-µm CMOS technology. Fig. 4 shows a practical proposed

circuit for simulations. The proposed TIA is based on the CS cascode amplifier [9]

with current injection I1 [10]. Furthermore, the current source I2 cancels the DC

bias current of the output side of the current mirror, and the bias setting stage

operates M2 in a saturation region.

Fig. 5 shows the simulation results of the frequency characteristics in the

transimpedance gain Zt and open-loop gain Av. The performance of the proposed

TIA was compared with the conventional TIA using the cascode connection and

current injection. The open-loop gain of the proposed TIAwas improved by 1.8 dB

as compared with the conventional one (from 24.7 dB to 26.5 dB). Consequently,

in the transimpedance gain characteristic, we achieved an about 40% wider

bandwidth, from 1.0GHz to 1.4GHz.

Fig. 6 shows the transient responses for the input signal currents of 2 and

20µAp­p. The proposed TIA can generate the waveform with the good eye-opening

Fig. 4. Schematic of proposed TIA.

Fig. 3. Block diagram of proposed TIA.

© IEICE 2017DOI: 10.1587/elex.14.20170310Received March 28, 2017Accepted April 19, 2017Publicized May 8, 2017Copyedited May 25, 2017

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IEICE Electronics Express, Vol.14, No.10, 1–6

Page 5: Bandwidth enhancement technique for TIA using flipped ...

ratio of 100% owing to wide bandwidth. On the other hand, the conventional TIA

with narrow bandwidth has the eye-opening ratio of 84%. In the proposed circuit,

a slight overshoot occurred due to the feedback loop and worsened the jitter from

2.5 ps to 10.5 ps. Although the jitter is degrades, the good eye-opening is more

effective to improve the sensitivity.

Furthermore, we calculated the stability factor K, and obtained good stability

(K > 1) at any frequency as shown in Fig. 7. That is, the circuit operated without

stability problems even though a positive feedback was applied. The proposed

circuit dissipated 8.75mW with a supply voltage of 1.8V. This is comparable to

that of the conventional circuit, and this means the proposed circuit technique

makes it possible to enhance the bandwidth without a large increase in power

consumption. On the other hand, due to enlarging the bandwidth and adding a

transistor to the CS stage, the noise characteristic was degraded.

Table I summarizes the performance of the proposed TIA and compares it with

the conventional TIA.

Fig. 5. Simulated frequency characteristics.

Fig. 6. Simulated transient response characteristics.

© IEICE 2017DOI: 10.1587/elex.14.20170310Received March 28, 2017Accepted April 19, 2017Publicized May 8, 2017Copyedited May 25, 2017

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IEICE Electronics Express, Vol.14, No.10, 1–6

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5 Conclusion

We proposed a novel bandwidth enhancement technique using a current mirror

configuration with FVF. It enables us to increase the open-loop gain and widen the

bandwidth of the TIA. Simulation results confirmed that the frequency bandwidth

of the transimpedance gain improved. The results show that the proposed TIA

achieved a wide frequency bandwidth of 1.4GHz, which is 40% wider than that of

the conventional TIA.

Acknowledgments

A part of this research was supported by Grants-in-Aid for Scientific Research of

the Japan Society for the Promotion of Science.

Fig. 7. Calculated stability factor.

Table I. Performance summary and comparison

Proposed Conventional

Technology 0.18-µm CMOS

Supply voltage (V) 1.8

Photodiode capacitance (fF) 300

Open-loop gain (dB) 26.5 24.7

Bandwidth (GHz) 1.39 0.98

Transimpedance gain (dBΩ) 77.3 77.2

Power dissipation (mW) 8.75 8.49

Input equivalent noise (pA/rHz) 3.59 2.19

© IEICE 2017DOI: 10.1587/elex.14.20170310Received March 28, 2017Accepted April 19, 2017Publicized May 8, 2017Copyedited May 25, 2017

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