b.grandchamp@ommic - Microwave & RF · RF-MEMS development objective for OMMIC : Introduce a...

RF MEMS workshop, Microwave & RF salon, Paris, April 2013

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Fabrication de MMIC Intégrant des MEMS RF

Brice [email protected]

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2April 2013

Plan

�� OMMIC technologies

�� Development of MEMS at OMMIC

�� MEM-4-MMIC European FP7 project

MEMS circuit applications

RF-MEMS switch process

0-Level/1-Level Packaging

RF-MEMS switch circuit performances

Application demonstrator

�� Conclusion

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3April 2013

OMMIC has a wide range of Technologies based aroundGaAs substrates :

� PHEMT - ED02AH Mixed Mode 60 GHz ft� PHEMT - D01PH Power/Low Noise 105 GHz ft� MHEMT - D01MH Low Noise 150 GHz ft� MHEMT - D007IH Low Noise 300 GHz ft� MHEMT - D004IH Low Noise 600 GHz ft� HBT on InP - DH15IB Numeric 200GHz ft� HBT on InP - DH05IB Numeric 300GHz ft� GaN on Si - D01GH Power 90 GHz ft

� Applications are either civil, space and military� Ultra Low Noise Amplifiers for Base Stations� Control Functions for Phase Array Systems� Point to Point Links� Fiber Optic Interfacing� Passive Millimeter wave Imaging (Security etc)

RF-MEMS development objective for OMMIC :Introduce a Commercial RF MEMS technology based around a SPST Device Integrated with standard OMMIC MMIC Processes with modeling and support.

OMMIC Technologies

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4April 2013

RF-MEMS with multi-contact (to reduce contact resistance)

and HF circuit

Standard unitary RF-MEMS

FlexMEMS (SEM view) to optimize activation voltage and to limit double transitions

0.1

1

10

100

0 20 40 60 80

(V)

Rc

(O

hm)

2nd Transition

RF-MEMS concept evolution

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5April 2013

• In the "up" position, the designed height of the ME MS cantilever above the pull down electrode is 4 µm, and the distance between co ntacts is 2 µm.

• In the "down" position, a slight bow of the MEMS ca ntilever may make the height above the pull down pad too small, and the cantilev er is pulled down on the dielectric covering the pull down pad, giving time dependent hysteresis by dielectric charging.

• The stiction is reduced by the introduction of a we dge (extra bar), with the same construction as the contacts.

Swtching characterization

0

200

400

600

800

1000

1200

0 20 40 60 80 100 120

Voltage (V)

Rei

stan

ce (

ohm

s)

MEMS1

MEMS2

MEMS3

MEMS4

MEMS5

MEMS6

MEMS7

MEMS8

MEMS9

MEMS10

MEMS11

MEMS12

M4M20107454

13320033SUPCM7

RF-MEMS concept evolution

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6April 2013

MEMS-4-MMIC(FP7 ICT STREP)

2008-2012

NANOTEC(FP7 ICT IP)

2011-

Companies IMST/Saab Alfa Imaging

Applications Sat.com/radar passive imaging

Frequency 24 GHz / 35 GHz 94 GHz

Power handling Low-power Low-power

Noise figure - NF=2-4 dB (LNA)

Technology 150 nm (D01PH) 70 nm (D007IH)

Substrates 100 µm 200/600 µm

Backside process µStrip CPW

Basckside MEMS protection

Single chip protection All wafer protection

RF-MEMS development partnership

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7April 2013

Ku BSS / FSS satellites

Broadcastservices

Dedicated receiverdesigned for very low S/Nusing dedicated satellite

services

Dedicated antenna with low gain

Small size/Cost effective

Attractive for the automotive industry

Dedicated satelliteservices

based on interference scenarios

• RF MEMS offers several attractive properties (such as low losses and DC power dissipation, high isolation and linearity) that potentially can make it an enabling technology for wide-band (or multi-band) reconfigurable RF systems in future radar and wireless applications

• Reconfigurable RF MEMS based switching, matching, filtering and phase shifting circuits may be used in adaptive front-ends (for space, aerospace, security, defense & wireless communication)

MEMS4MMIC European FP7 Project

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8April 2013

Key areas of work


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9April 2013

Noise-free SAR image. Speckle in the image present due to terrain roughness

SAR image for COTS (3 bit). Practically unusable

SAR image for RF-MEMS (3 bit). Much of the image information retained

Co-polar (HH) Cross-polar (HV)

COTS 3-bit 6.6 dB -2.2 dB

COTS 5-bit 1.6 dB -7.2 dB

RF-MEMS 3-bit 11.6 dB 2.8 dB

RF-MEMS 5-bit 8.6 dB -0.2 dB

Estimated SNR values

SAR image simulation results:Impact of phase shifter performances


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10April 2013

MEMS4MMIC project framework

• IMST (Leader & Antenna) Germany• OMMIC (Process & Reliability) France• FOI (Architecture & Design) Sweden• VTT (LTCC packaging & Design) Finland• SAAB (Design) Sweden• IEMN (Packaging) France• IMT (Antenna) Romania

Site web: www.mems4mmic.com


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11April 2013

Standard MMIC process flow, D01PH process

GaAs Epiwafers

Standard OMMIC Front-end

Foundry Process

Standard OMMIC Back-end

Foundry Process

Wafer Dicing

GaAs Epiwafers


Foundry Process


Foundry Process with substrate vias

Wafer Dicing

• The D01PH process is a power process for applications up to 50 GHz, with very low noise.

• E-beam written mushroom gate with Lg = 135 nm.

• Ft = 100 GHz

• Bgd = 9 V (min) 11V (typ)

• Vds max = 7 V (min) 8 V (typ)

• Imax = 700 mA/mm

• Fmin = 0.5 dB @ 12 GHz

RF-MEMS Process Development

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12April 2013

GaAs Substrate

Metal contactSiN open

Actuation padSiN covered

MEMS features at the end of Standard front-end process

GaAs Substrate

wedge contact

Contact and wedge plots deposition

GaAs SubstrateGaAs Substrate

Deposition of sacrificial layer and pillars definition


Deposition of seed layer and cantilever definition


Deposition of cantilever metals


Photoresist and seed layer removal


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13April 2013


MEMS before back-end process

MEMS liberation

GaAs Substrate 200µm

CPW back-end process

GaAs Substrate 200µm

Specific MEMS protective layer deposition


All-wafer MEMS protection for back-end processing

Type of photoresit, thickness and baking conditions carefully optimized for

cleanness of release


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14April 2013

Integration of MEMS into MMIC process flow

We introduce the MEMS contact switch

This switch must have low contact resistance (high contact force), yet be small enough for mm-wave use (~200 µm) hence high actuation voltage. The actuation voltage must not influence the MMIC circuit, hence no direct contact between actuation circuit and semiconductor material ! This has been achieved in the process integration.

The MEMS must support the backside process, during which the wafer is glued with the frontside to a sapphire carrier wafer. Release of the wafer from the carrier (24 h solvent !) should not release the MEMS � protection step necessary.

Wafers cannot be diced after MEMS release !!

GaAs Epiwafers


Foundry Process

MEMS Foundry Process


Foundry Process

Protection Step

Wafer Dicing

GaAs Epiwafers


Foundry Process



Foundry Process with substrate vias

Protection Step

Wafer Dicing

Wafer DicingMEMS release


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15April 2013

Back-end process development

After the end of the front-end process including FETs, diodes, capacitors, resistors, inductors and interconnects, MEMS switch elements are

added and interconnected

The next step is to protect the front-end of the future dies individually, to protect it during

wafer thinning and backside process

The next step is the backside process including RIE (chloride), metal sputtering and

electrolytic gold deposition

Removal of protective SiN layer and MEMS release

PECVD (SiN) deposition at 100 C for MEMS protection during back-end process

Need to put wafer on 4"carrier wafer before the MEM S release to be able to do the bonding step of the 0-level packaging, due to fragi lity of 100µm wafers


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16April 2013

GaAs Epiwafers


Foundry Process



Foundry Process

MEMS-MMIC Wafers 100 µm with Via-Holes

Protection Step

Attach Wafers with Backside on

Support Wafer

Unprotect Frontside, and release MEMS

Add Hermetic BCB MEMS Cap

Optional Additional

Protection Layer with contact

opening

On Wafer Measurements

Optional Support Wafer Removal

Wafer Dicing

GaAs Epiwafers


Foundry Process



Foundry Process

MEMS-MMIC Wafers 100 µm with Via-Holes

Protection Step

Attach Wafers with Backside on

Support Wafer

Unprotect Frontside, and release MEMS

Add Hermetic BCB MEMS Cap

Optional Additional

Protection Layer with contact

opening

On Wafer Measurements

Optional Support Wafer Removal

Wafer Dicing

Final MEMS MMIC process flow with 0-level packaging

• The final process flow was introduced in OMMIC proc ess and wafer management software• Specific procedures for MEMS realization have been drafted


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17April 2013

0-Level packaging (BCB)

100µm thin wafer with via-holeswith RF MEMS released

Deposition of BCB cap

Additional SiN protection and contact opening

Integration with IEMN 0-Level packaging process

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18April 2013

Improvement of BCB cap process:

- Partial BCB dry etching is used to achieve flat BC B sealing ring, which is very important for a better BCB bonding


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19April 2013

- The BCB cap has been patterned on Si wafer covered with an anti-adhesion layer called “monolayer”

- The Sealing of the cap on the final thinned to 100µ m circuit wafer is realized by thermo-compression

- For the sealing operation, the 100µm thin circuit w afer, which is too fragile, is glued to a thick 4’’ carrier wafer


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20April 2013

Example of 0-Level packaged circuits


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21April 2013

Development of low-temperature soldering process:

- Earlier used AuSn requires >320 C processing temperature

- Hermetic packages with SnBiAg solder (soldering T=175 C)

1-Level packaging (LTCC)

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22April 2013

Individual RF-MEMS (FOI measurements)

Insertion loss @ 40GHz around 1dB

Isolation @ 40GHz close typically to 19dB

Resonance at 34GHz, 62GHz and 96GHz is due to the to close line of

the shunt RF-MEMS below

RF-MEMS Performances

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23April 2013

Individual RF-MEMS (VTT measurements)

Additional measurement realized on a different circuit (without shunt RF-

MEMS) shows similar results without the resonances.

Those additional measurements have been performed on 0-level packaged

devices and demonstrate the absence of negative impact of BCB capping on

RF performances.

RF-MEMS Performances

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24April 2013

Measurement results of 11 SPST switches on VTT7 circuit

The switch performances is relatively good up to 60 GHz :

- isolation > ~30 dB- return loss > ~15 dB

- insertion loss < ~2.5 dB

Agreement between the measured and the Sonnet EM simulation data is rather good at the whole

frequency band till 110 GHz.

High isolation switches

Circuit Measurements: VTT

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25April 2013

Measured RF performances of IMST SP4T circuit of the 3rd run (M4M2011)

IMST SP4T circuit of the 3rd run (M4M2011)

SP4T (Single Pole 4 Throw) circuit design by IMST a llowed to choose from 4 inputs using 2 rows of RF-MEMS to switch the signal.

Insertion loss: (2 serial RF-MEMS switch) below 2dB up to 65GHzReturn loss: below -15dB on the overall bandwidth Isolation: around 35dB at 24GHz and above 20db up to 65GHz.

SP4T

Circuit Measurements: IMST

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26April 2013

GaAs RF-MEMS based active MMICs FOI/IMST co-designed SP4T switched LNA (chip dimensions equal 1.5 mm x 2.0 mm)

Measured s-parameters of a wideband GaAs RF-MEMS ba sed SP4T switch circuit (IMST design): ON/OFF state

transmission (s21) when the switches used in each o f the four branches have been switched on/off, respective ly

(shown to the left and right, respectively)

On-state transmission Off-state isolation

Switched LNA (SP4T)

Circuit Measurements: FOI/IMST

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27April 2013


Measured s-parameters of a wideband GaAs RF-MEMS SP 4T switched LNA circuit with 17-18 dB of maximum gain

and 20-30 dB of switched in-band isolation

Switched LNA (SP4T)


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28April 2013


- Measured noise figure of a GaAs MEMS SP4T switched LNA MMIC is around 3 dB at 15-25 GHz

- NF ≥ 2.7 dB at 20 GHz which is 0.6 dB higher than the s imulated noise figure value of the fixed LNA design

- The relatively small impairment in switched LNA gai n and NF is due to the on-chip wideband MEMS SP4T switch used withi n this design

with a loss of about 0.7 dB at 20 GHz.

Switched LNA (SP4T)


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29April 2013


Steered beams antennas

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30April 2013

Simulated beams at 24GHz Measured beams at 24GHz

Assembled and measured by IMST

Theta ( )

Nor

mal

ized

dire

ctiv

ity (

dBi)

Theta ( )N

orm

aliz

ed d

irect

ivity

(dB

i)


Steered beams antennas

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31April 2013

• Successful integration of cantilever contact switchMEMS into OMMICs standard MMIC processes, with 0.5dB insertion loss @ 30 GHz and 1.5 dB @ 94 GHz.

• Technological solutions have been found to improveswitching performances and yield

• A complete process, including back-end and 0-levelpackaging, is now well defined with the correspondingdesign rules (not transferred from IEMN)

• Functioning circuits with 0-level packaging have beenproduced and tested

Conclusion

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32April 2013

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33April 2013

Wafers for Devices (Ongoing)Mask Batch Purpose

MEMSESA01

6557

MEMS evaluation, and process stabilization

Introduction of FLEXMEMS design

MEMS only circuits

6563658766246742682068216886

M4M2010

7003

Active devices and MEMS all-together circuits

Introduction of back-end process

700470077188721472157231723274547510

M4M2011

7659

Final circuits for demonstrators

Introduction of wedge and

BCB capping IEMN technology

76687670767576977700

3 RUN were made during the MEMS4MMIC project:


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34April 2013


100µm thinned wafer glued on support wafer using th ermo-compression technique


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35April 2013


100µm thinned wafer after back-end processing with substrate vias, and before RF-MEMS release

Problem of yield after the back-end process due to porosity of SiN protection layer (separation from sapphire support to be optimized)

We limited this problem by separating the protective resist layer between the chips with a special lithography step, before putting the SiN protection layer (Otherwise, a single hole destroys the whole wafer !!)


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36April 2013

GaAs RF-MEMS based active MMICsFOI/IMST co-designed wideband Dicke switched LNA

(chip dimensions 1.5 mm x 2.0 mm)

Measured s-parameters of three characterized wideba nd GaAs RF-MEMS based Dicke switch circuits (FOI design): ON state transm ission and OFF-state

isolation (upper left), ON state transmission (uppe r right) and ON state input

matching (lower left)


Switched LNA (Dicke switch)

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37April 2013



Measured s-parameters of five characterized wideban d (16-37 GHz) GaAs RF-MEMS based (Dicke) switched LNA circuits with about 17 dB of maximum gain

and around 20 dB of switched isolation at 5-40 GHz.



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38April 2013



- The measured noise figure of a GaAs MEMS (Dicke) s witched LNA MMIC is around 3 dB at 15-25 GHz.

- The noise is equal to 2.8 dB at 20 GHz (which is 0 .7 dB higher than the simulated noise figure value of the fixed LNA desig n).

- The relatively small impairment in switched LNA ga in and NF is due to the on-chip wideband MEMS (Dicke) switch used within th is design with a loss

of around 0.6 dB at 20 GHz



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39April 2013

failure

© IMST GmbH- All rights reserved-

Activation cycling for uncapped and capped RF-MEMS

Activation cycling for uncapped RF-MEMS:- Erratic activation from time to time- Contact resistance have strong variation during lifetime- RF-MEMS stop activating afterseveral 1.000 of activations

Evolution of contact resistance with the number

of activation cycles

The comparison between 3Hz and 100Hz activation cyc ling indicates a dependence of lifetime with the activat ion frequency

Reliability

Activation cycling for capped RF-MEMS:- Erratic activation from time to time- Contact resistance have very limitedvariation during lifetime- RF-MEMS can still be activated after several 100.000 of cycles

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b.grandchamp@ommic - Microwave & RF · RF-MEMS development objective for OMMIC : Introduce a...

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