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January 2012 Revision: EB68_01.1 MachXO2-1200ZE Breakout Board Evaluation Kit User’s Guide
January 2012Revision: EB68_01.1
MachXO2-1200ZE Breakout Board Evaluation Kit
User’s Guide
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
IntroductionThank you for choosing the Lattice Semiconductor MachXO2™-1200ZE Breakout Board Evaluation Kit!
This user’s guide describes how to start using the MachXO2-1200ZE Breakout Board, an easy-to-use platform for evaluating and designing with the MachXO2-1200ZE PLD. Along with the board and accessories, this kit includes a pre-loaded demonstration design. You may also reprogram the on-board MachXO2-1200ZE device to review your own custom designs.
Note: Static electricity can severely shorten the lifespan of electronic components. See the Storage and Handlingsection of this document for handling and storage tips.
FeaturesThe MachXO2-1200ZE Breakout Board Evaluation Kit includes:
• MachXO2-1200ZE Breakout Board – The board is a 3” x 3” form factor that features the following on-board components and circuits:
– MachXO2-1200ZE PLD (LCMXO2-1200ZE-1TG144C)– USB mini-B connector for power and programming– Eight LEDs– 60-hole prototype area– Four 2x20 expansion header landings for general I/O, JTAG, and external power– 1x8 expansion header landing for JTAG – 3.3V and 1.2V supply rails
• Pre-loaded Demo – The kit includes a pre-loaded counter design that highlights use of the embedded MachXO2-1200ZE oscillator and programmable I/Os configured for LED drive.
• USB Connector Cable – The board is powered from the USB mini-B socket when connected to a host PC. The USB channel also provides a programming interface to the LCMXO2-1200ZE JTAG port.
• Lattice Breakout Board Evaluation Kits Web Page – Visit www.latticesemi.com/breakoutboards for the latest documentation (including this guide) and drivers for the kit.
The content of this user’s guide includes demo operation, programming instructions, top-level functional descrip-tions of the Breakout Board, descriptions of the on-board connectors, and a complete set of schematics.
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Figure 1. MachXO2-1200ZE Breakout Board, Top Side
Two 2x20Header Landings(J3, J5)
Two 2x20Header Landings
(J2, J4)
MachXO2-1200ZEPLD (U3)
FTDI USB to UART/FIFO
IC (U1)
JTAG HeaderLanding (J1)
USB Mini-BSocket (J7)
Power LED(PWR_ON)
Power/GNDTest Points
(TP1, TP2, TP3)
4x15 60-Hole Prototype Array (J6)LED Array (J4)
Storage and HandlingStatic electricity can shorten the lifespan of electronic components. Please observe these tips to prevent damage that could occur from electro-static discharge:
• Use anti-static precautions such as operating on an anti-static mat and wearing an anti-static wrist-band.
• Store the evaluation board in the packaging provided.
• Touch a metal USB housing to equalize voltage potential between you and the board.
Software RequirementsYou should install the following software before you begin developing new designs for the Breakout board:
• Lattice Diamond® design software
• FTDI Chip USB hardware drivers (installed as an option within the Diamond installation program)
MachXO2-1200ZE DeviceThis board features the MachXO2-1200ZE PLD which offers embedded Flash technology for instant-on, non-vola-tile operation in a single chip. Numerous system functions are included, such as a PLL and 64Kbits of embedded RAM plus hardened implementations of I2C, SPI, timer/counter, and user Flash memory. Flexible, high perfor-mance I/Os support numerous single-ended and differential standards including LVDS, and also source synchro-
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
nous interfaces to DDR/DDR2/LPDDR DRAM memory. The 144-pin TQFP package provides 108 user I/Os in a 20mm x 20mm form factor. A complete description of this device can be found in the MachXO2 Family Data Sheet.
Demonstration DesignLattice provides a simple, pre-programmed demo to illustrate basic operation of the MachXO2-1200ZE device. The design integrates an up-counter with the on-chip oscillator.
Note: You may obtain your Breakout Board after it has been reprogrammed. To restore the factory default demo and program it with other Lattice-supplied examples see the Download Demo Designs section of this document.
Run the Demonstration DesignUpon power-up, the preprogrammed demonstration design automatically loads and drives the LED array in an alternating pattern. The program shows a clock generator based on the MachXO2-1200ZE on-chip oscillator. The counter module is clocked at the oscillator default frequency of 2.08MHz to illustrate how low speed timer functions can be implemented with a PLD. The 22-bit up-counter further divides the clock to advance the LED display approximately every 500ms. The resulting light pattern will appear as an alternating pair of lit LEDs per row.
Figure 2. Demonstration Design Block Diagram
1x8 LED Array
MachXO2-1200ZE
22-bitUp-Counter
ClockGenerator 2.08 MHz
c_delay[21:0]
c_delay[20](~2 Hz)
WARNING: Do not connect the Breakout Board to your PC before you follow the driver installation procedure of this section.
Communication with the Breakout Board with a PC via the USB connection cable requires installation of the FTDI chip USB hardware drivers. Loading these drivers enables the computer to recognize and program the Breakout Board. Drivers can be loaded as part of the installation of Lattice Diamond design software or Diamond Program-mer, or as a stand-alone package.
To load the FTDI Chip USB hardware drivers as part of the Lattice Diamond installation:
1. Select Programmer Drivers in the Product Options of Lattice Diamond Setup.
2. Select FTDI Windows USB Driver or All Drivers in the LSC Drivers Install/Uninstall dialog box.
3. Click Finish to install the USB driver.
4. After the driver installation is complete, connect the USB cable from a USB port on your PC to the board’s USB mini-B socket (J2). After the connection is made, a green Power LED (D9) will light indicating the board is pow-ered on.
5. The demonstration design will automatically load and drive the LED array in an alternating pattern.
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
To load the FTDI chip USB hardware drivers via the stand-alone package:
1. Browse to www.latticesemi.com/breakoutboards and download the FTDI Chip USB Hardware Drivers package.
2. Extract the FTDI chip USB Hardware driver package to your PC hard drive.
3. Connect the USB cable from a USB port on your PC to the board’s USB mini-B socket (J7). After the connec-tion is made, a green Power LED (D9) will light indicating the board is powered on.
4. If you are prompted, “Windows may connect to Windows Update” select No, not this time from available options and click Next to proceed with the installation. Choose the Install from specific location (Advanced) option and click Next.
5. Search for the best driver in these locations and click the Browse button to browse to the Windows driver folder created in the Download Windows USB Hardware Drivers section. Select the CDM 2.04.06 WHQL Certified folder and click OK.
6. Click Next. A screen will display as Windows copies the required driver files. Windows will display a message indicating that the installation was successful.
7. Click Finish to install the USB driver.
8. The demonstration design will automatically load and drive the LED array in an alternating pattern.
See the Troubleshooting section of this guide if the board does not function as expected.
Download Demo DesignsThe counter demo is preprogrammed into the Breakout Board, however over time it is likely your board will be mod-ified. Lattice distributes source and programming files for demonstration designs compatible with the Breakout Board.
To download demo designs:
1. Browse to the Lattice Breakout Board Evaluation Kits web page (www.latticesemi.com/breakoutboards) of the Lattice web site. Select MachXO2 Breakout Board Demo Source and save the file.
2. Extract the contents of MachXO2_1200ZE_BB_Eval_Kit_v01.0.zip to an accessible location on your hard drive.
The demo design directory Demo_LED is unpacked with all design files needed for the demo, including the JEDEC programming data file.
Continue to Programming a Demo Design with Lattice Diamond Design Software.
Programming a Demo Design with the Lattice Diamond ProgrammerThe demonstration design is pre-programmed into the MachXO2-1200ZE Breakout Board by Lattice. If you have changed the design but now want to restore the Breakout Board to factory settings, use the procedure described below.
To program the MachXO2-1200ZE device:
1. Install, license and run Lattice Diamond software. See www.latticesemi.com/latticediamond for download and licensing information.
2. Connect the USB cable to the host PC and the MachXO2-1200ZE Breakout Board.
3. From Diamond, open the Demo_LED_OSC.ldf project file.
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
4. Click the Programmer icon.
5. Click Detect Cable. The Programmer will detect the cable (Cable: USB2, Port: FTUSB-0).
6. Click the Program icon. When complete, PASS is displayed in the Status column.
MachXO2-1200ZE Breakout BoardThis section describes the features of the MachXO2-1200ZE Breakout Board in detail.
OverviewThe Breakout Board is a complete development platform for the MachXO2-1200ZE PLD. The board includes a pro-totyping area, a USB program/power port, an LED array, and header landings with electrical connections to most of the PLD’s programmable I/O, power, and JTAG pins. The board is powered by the PC’s USB port or optionally with external power. You may create or modify the program files and reprogram the board using Lattice Diamond soft-ware.
Figure 3. MachXO2-1200ZE Breakout Board Block Diagram
LCMXO2-1200ZE-1TG144C
2x20 Header Landing (J5)
LEDArray
GPIO
8
2x20 Header Landing (J2)
GPIO 2x20 Header Landing (J3)
Bank 1
Bank 2
Bank 0
2x20 Header Landing (J4)
Bank 3
GPIO
GPIO
USB Controller
USB Mini B Socket
1x8 HeaderLanding (J1, Optional JTAGInterface)
A/Mini-B USB CableJTAG
Programming
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Table 1 describes the components on the board and the interfaces it supports.
Table 1. Breakout Board Components and Interfaces
Component/Interface TypeSchematic Reference Description
Circuits
USB Controller Circuit U2: FT2232H USB-to-JTAG interface and dual USB UART/FIFO IC
USB Mini-B Socket I/O J7:USB_MINI_B Programming and debug interface
Components
LCMXO2-1200ZE PLD U3: LCMXO2-1200ZE-1TG144C 1200-LUT device packaged in a 20 x 20mm, 144-pin TQFP
Interfaces
LED Array Output D8-D1 Red LEDs
Four 2x20 Header Landings I/O
J2: header_2x20J3: header_2x20J4: header_2x20J5: header_2x20
User-definable I/O
1x8 Header Landing I/O J1: header_1x8 Optional JTAG interface
4x15 60-Hole Prototype Area Prototype area 100mil centered holes.
Test points PowerTP1: +3.3VTP2: +1.2VTP3: GND
Power and ground reference points
SubsystemsThis section describes the principle sub systems for the Breakout Board in alphabetical order.
Clock SourcesAll clocks for the counter demonstration designs originate from the MachXO2-1200ZE PLD on-chip oscillator. You may use an expansion header landing to drive a PLD input with an external clock source.
Expansion Header LandingsThe expansion header landings provide access to user GPIOs, primary inputs, clocks, and VCCO pins of the MachXO2-1200ZE. The remaining pins serve as power supplies for external connections. Each landing is config-ured as one 2x20 100 mil.
Table 2. Expansion Connector Reference
Item Description
Reference Designators J2, J3, J4, J5
Part Number header_2x20
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Table 3. Expansion Header Pin Information (J2)
Pin Number Function MachXO2-1200ZE Pin
1 NC N/A
2 VCCIO0 118, 123, 135
3 PT17D/DONE 109
4 PT17C/INITn 110
5 PT17B 111
6 PT17A 112
7 GND N/A
8 GND N/A
9 PT16D 113
10 PT16C 114
11 PT16B 115
12 PT16A 117
13 PT15D/PROGn 119
14 PT15C/JTAGen 120
15 GND N/A
16 GND N/A
17 PT15B 121
18 PT15A 122
19 PT12D/SDA/PCLKC0_0 125
20 PT12C/SCL/PCLKT0_0 126
21 PT12B/PCLKC0_1 127
22 PT12A/PCLKT0_1 128
23 GND N/A
24 GND N/A
25 PT11D/TMS 130
26 PT11C/TCK/TEST_CLK 131
27 PT11B 132
28 PT11A 133
29 PT10D/TDI 136
30 PT10C/TDO 137
31 GND N/A
32 GND N/A
33 PT10B 138
34 PT10A 139
35 PT9D 140
36 PT9C 141
37 PT9B 142
38 PT9A 143
39 GND N/A
40 GND N/A
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Table 4. Expansion Header Pin Information (J3)
Pin Number Function MachXO2-1200ZE Pin
1 VCC_1.2V 36, 72, 108, 144
2 VCCIO1 79, 88, 102
3 VCC_1.2V 36, 72, 108, 144
4 NC N/A
5 PR10C 74
6 PR10D 73
7 PR10A 76
8 PR10B 75
9 GND N/A
10 GND N/A
11 PR9C 78
12 PR9D 77
13 PR9A 82
14 PR9B 81
15 GND N/A
16 GND N/A
17 PR8C 84
18 PR8D 83
19 PR8A 86
20 PR8B 85
21 GND N/A
22 GND N/A
23 PCLKT1_0/PR5C 92
24 PCLKC1_0/PR5D 91
25 PR5A 94
26 PR5B 93
27 GND N/A
28 GND N/A
29 PR4C 96
30 PR4D 95
31 PR4A 98
32 PR4B 97
33 GND N/A
34 GND N/A
35 PR3A 100
36 PR3B 99
37 PR2C 105
38 PR2D 104
39 PR2A 107
40 PR2B 106
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Table 5. Expansion Header Pin Information (J4)
Pin Number Function MachXO2-1200ZE Pin
1 VCC_3.3V N/A
2 VCCIO3 7, 16, 30
3 VCC_3.3V N/A
4 NC N/A
5 PL2A/L_GPLLT_FB 1
6 PL2B/L_GPPLC_FB 2
7 PL2C/L_GPLLT_IN 3
8 PL2D/L_GPLLC_IN 4
9 PL3A/PCLKT3_2 5
10 PL3B/PCLKC3_2 6
11 PL3C 9
12 PL3D 10
13 GND N/A
14 GND N/A
15 PL4A 11
16 PL4B 12
17 PL4C 13
18 PL4D 14
19 GND N/A
20 GND N/A
21 PL5A/PCLKT3_1 19
22 PL5B/PCLKC3_1 20
23 PL5C 21
24 PL5D 22
25 GND N/A
26 GND N/A
27 PL8A 23
28 PL8B 24
29 PL8C 25
30 PL8D 26
31 GND N/A
32 GND N/A
33 PL9A/PCLKT3_0 27
34 PL9B/PCLKC3_0 28
35 GND N/A
36 GND N/A
37 PL10A 32
38 PL10B 33
39 PL10C 34
40 PL10D 35
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Table 6. Expansion Header Pin Information (J5)
Pin Number Function MachXO2-1200ZE Pin
1 NC N/A
2 VCCIO2 37, 51, 66
3 SI/SISPI/PB20D 71
4 PB20B 69
5 SN/PB20C 70
6 PB20A 68
7 PB18D 67
8 PB18B 62
9 PB18C 65
10 PB18A 61
11 GND N/A
12 GND N/A
13 PB15D 60
14 PB15B 58
15 PB15C 59
16 PB15A 57
17 GND N/A
18 GND N/A
19 PCLKC2_1/PB11B 56
20 PB11D 54
21 PCLKT2_1/PB11A 55
22 PB11C 52
23 GND N/A
24 GND N/A
25 PCLKC2_0/PB9B 50
26 PB9D 48
27 PCLKT2_0/PB9A 49
28 PB9C 47
29 GND N/A
30 GND N/A
31 S0/SPISO/PB6D 45
32 PB6B 43
33 MCLK/CLK/PB6C 44
34 PB6A 42
35 GND N/A
36 GND N/A
37 PB4D 41
38 PB4B 39
39 CSSPIN/PB4C 40
40 PB4A 38
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Figure 4. J2/J4 Header Landing Callout
NC IO0109 110111 112
GND GND113 114115 117119 120
GND GND121 122125 126127 128GND GND130 131132 133136 137GND GND138 139140 141142 143GND GND
1 2
J2
3.3 IO33.3 NC1 23 45 69 10
GND GND11 1213 14
GND GND19 2021 22
GND GND23 2425 26
GND GND27 28
GND GND32 3334 35
1 2
J4
Top Side
J2 J4
Figure 5. J3/J5 Header Landing Callout
1.2 IO11.2 NC74 7376 75
GND GND78 7782 81
GND GND84 8386 85
GND GND92 9194 93
GND GND96 9598 97
GND GND100 99105 104107 106
1 2
J3
NC IO271 6970 6867 6265 61
GND GND60 5859 57
GND GND56 5455 52
GND GND50 4849 47
GND GND45 4344 42
GND GND41 3940 38
1 2
J5
J3 J5Top Side
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Figure 6. J1 Header Landing and LED Array Callout
D8 LED7D7 LED6D6 LED5D5 LED4D4 LED3D3 LED2D2 LED1D1 LED0
107
LED Function
LED Array
MachXO2-1200ZE
Pin
106105104100999897
Top Side
D8
D1
J13.3
TDOTDINCNC
TMSGNDTCK
1
8
J1
MachXO2-1200ZE PLDThe MachXO2-1200ZE-1TG144C is a 144-pin TQFP package PLD device which provides 108 I/Os in a 20 x 20mm package.
Table 7. MachXO PLD Interface Reference
Item Description
Reference Designators U3
Part Number LCMXO2-1200ZE-1TG144C
Manufacturer Lattice Semiconductor
Web Site www.latticesemi.com
JTAG Interface CircuitsFor power and programming an FTDI USB UART/FIFO IC converter provides a communication interface between a PC host and the JTAG programming chain of the Breakout Board. The USB 5V supply is also used as a source for the 3.3V supply rail. A USB mini-B socket is provided for the USB connector cable.
Table 8. JTAG Interface Reference
Item Description
Reference Designators U1
Part Number FT2232HL
Manufacturer Future Technology Devices International (FTDI)
Web Site www.ftdichip.com
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Table 9. JTAG Programming Pin Information
Description MachXO2-1200ZE Pin
Test Data Output 137:TDO
Test Data Input 136:TDI
Test Mode Select 130:TMS
Test Clock 131:TCK
LEDsA green LED (D9) is used to indicate USB 5V power. Eight red LEDs are driven by I/O pins of the MachXO2-1200ZE device.
Table 10. Power and User LEDs Reference
Item Description
Reference Designators D1, D2, D3, D4, D5, D6, D7, D8, D9
Part Number LTST-C190KRKT (D1-D8) LTST-C190KGKT (D9)
Manufacturer Lite-On It Corporation
Web Site www.liteonit.com
Power Supply3.3V and 1.2V power supply rails are converted from the USB 5V interface when the board is connected to a host PC.
Test PointsIn order to check the various voltage levels used, test points are provided:
• TP1: +3.3V
• TP2: +1.2V
• TP3: GND
USB Programming and Debug Interface The USB mini-B socket of the Breakout Board serves as the programming and debug interface.
JTAG Programming: For JTAG programming, a preprogrammed USB PHY peripheral controller is provided on the Breakout Board to serve as the programming interface to the MachXO2-1200ZE PLD.
Programming requires the Lattice Diamond or ispVM System software.
Table 11. USB Interface Reference
Item Description
Reference Designators U1
Part Number FT2232HL
Manufacturer Future Technology Devices International (FTDI)
Web Site www.ftdichip.com
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Board ModificationsThis section describes modifications to the board to change or add functionality.
Bypassing the USB Programming InterfaceThe USB programming interface circuit (USB Programming and Debug Interface section) may be optionally bypassed by removing the 0 ohm resistors: R5, R6, R7, R8 (See Appendix A. Schematics, Sheet 2 of 5). Header landing J1 provides JTAG signal access for jumper wires or a 1x8 pin header.
Applying External PowerThe Breakout Board is powered by the circuit of Schematic Sheet 5 of 5 based on the 5V USB power source. You may disconnect this power source by removing the 0 ohm resistors: R42 (VCC_1.2V) and R44 (VCC_3.3V). Power connections are available from the expansion header landings, J3 (+1.2V, pins 1 and 3, schematic sheet 3 of 5) and J4 (+3.3V, pins 1 and 3, schematic sheet 4 of 5).
Measuring Bank and Core PowerIn addition to the expansion headers, test points (TP1, TP2) provide access to power supplies of the MachXO2-1200ZE PLD. Inline 1 ohm resistors: R24 (VCCIO0, +3.3V, Bank 0), R25 (VCCIO1, +3.3V, Bank 1), R26 (VCCIO2, +3.3V, Bank 2), R27 (VCCIO3, +3.3V, Bank 3), R56 (VCC core, +1.2V) can be used to measure current for the power supplies.
Mechanical SpecificationsDimensions: 3 in. [L] x 3 in. [W] x 1/2 in. [H]
Environmental RequirementsThe evaluation board must be stored between -40° C and 100° C. The recommended operating temperature is between 0° C and 90° C.
The board can be damaged without proper anti-static handling.
GlossaryPLD: Programmable Logic Device
DIP: Dual in-line package
LED: Light Emitting Diode.
LUT: Look Up Table
PCB: Printed Circuit Board
RoHS: Restriction of Hazardous Substances Directive
USB: Universal Serial Bus
WDT: Watchdog Timer
TroubleshootingUse the tips in this section to diagnose problems with the Breakout Board.
LEDs Do Not Flash
If power is applied but the board does not flash according to the preprogrammed counter demonstration then it is likely the board has been reprogrammed with a new design. Follow the directions in the Demonstration Design sec-tion to restore the factory default.
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
USB Cable Not Detected
If Lattice Diamond Programmer or ispVM System does not recognize the USB cable after installing the Lattice USB port drivers and rebooting, the incorrect USB driver may have been installed. This usually occurs if you attach the board to your PC prior to installing the Lattice-supplied USB driver.
To access the Troubleshooting the USB Driver Installation Guide:
For Diamond software and standalone Diamond Programmer:
1. Start Diamond or Diamond Programmer and choose Help.
2. Search for USB driver or Troubleshooting, then select the Troubleshooting the USB Driver topic.
3. Follow the directions to install the Lattice USB driver.
For ispVM:
1. Start ispVM System and choose Options > Cable and I/O Port Setup.The Cable and I/O Port Setup Dialog appears.
2. Click the Troubleshooting the USB Driver Installation Guide link.The Troubleshooting the USB Driver Installation Guide document appears in your system’s PDF file reader.
3. Follow the directions to install the Lattice USB driver.
Determine the Source of a Pre-Programmed Device
If the Breakout Board has been reprogrammed, the original demo design can be restored. To restore the board to the factory default, see the Download Demo Designs section for details on downloading and reprogramming the device.
Ordering Information
Description Ordering Part NumberChina RoHS Environment-Friendly
Use Period (EFUP)
MachXO2-1200ZE Breakout Board Evaluation Kit LCMXO2-1200ZE-B-EVN
Technical Support AssistanceHotline: 1-800-LATTICE (North America)
+1-503-268-8001 (Outside North America)e-mail: [email protected]: www.latticesemi.com
Revision HistoryDate Version Change Summary
December 2011 01.0 Initial release.
January 2012 01.1 Figure “MachXO2-1200ZE Breakout Board, Top Side” updated with revi-sion B board photo.
© 2012 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Appendix A. SchematicsFigure 7. Block Diagram
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
FPGA
Power from USB 5V
BANK 3
BANK 1
BANK 0
BANK 2
LCMXO2-1200ZE-1TG144C
HEADER
HEADER
HEADER
I/Os + SPI
I/Os
I/Os
HEADER
I/Os + I2C
JTAG
RS232
USB
CONNECTOR
USB to
JTAG / RS232
LEDS(1-8)
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MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Figure 8. USB Interface to JTAG
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
FOR FUTURE RS232 FUNCTION
FT
_EE
CS
FT
_EE
CLK
FT
_EE
DA
TA
TM
S
TD
I
TD
O
TC
K
TD
OT
DI
TM
S
TC
K
+3.
3V
VC
C1_
8FT
VC
C1_
8FT
+3.
3V
+3.
3V
+3.
3V
+3.
3V
+3.
3V
+3.
3V
+3.
3V
+3.
3V
TC
K3
TD
I3
TD
O3
TM
S3
DM
5D
P5
RS
232_
Rx_
TT
L3
RS
232_
Tx_
TT
L3
RT
Sn
3
DT
Rn
3C
TS
n3
DS
Rn
3D
CD
n3
Titl
e
Siz
eD
ocum
ent N
umbe
rR
ev
Dat
e:S
heet
of
AX
EL
SY
S
LCM
XO
2-12
00Z
E-B
-EV
NA
Latti
ce M
achX
O2
1200
ZE
Bre
akou
t Boa
rd -
US
B to
JT
AG
B
25
Thu
rsda
y, A
pril
21, 2
011
Titl
e
Siz
eD
ocum
ent N
umbe
rR
ev
Dat
e:S
heet
of
AX
EL
SY
S
LCM
XO
2-12
00Z
E-B
-EV
NA
Latti
ce M
achX
O2
1200
ZE
Bre
akou
t Boa
rd -
US
B to
JT
AG
B
25
Thu
rsda
y, A
pril
21, 2
011
Titl
e
Siz
eD
ocum
ent N
umbe
rR
ev
Dat
e:S
heet
of
AX
EL
SY
S
LCM
XO
2-12
00Z
E-B
-EV
NA
Latti
ce M
achX
O2
1200
ZE
Bre
akou
t Boa
rd -
US
B to
JT
AG
B
25
Thu
rsda
y, A
pril
21, 2
011
R17
0D
NI
L1
600o
hm 5
00m
A12
R13
10k
C14
18pF
R3
5k1
R18
0D
NI
R9
2k2
C8
0.1u
F
C10
10uF
R7
0
R14
0D
NI
R19
2k2
R20
0D
NI
FTD
I Hig
h-S
peed
US
B
F
T223
2H
FT22
32H
L
U1
VR
EG
IN50
VR
EG
OU
T49
DM
7
DP
8
RE
F6
RE
SE
T#
14
EE
CS
63
EE
CLK
62
EE
DA
TA
61
OS
CI
2
OS
CO
3
TE
ST
13
AD
BU
S0
16
AD
BU
S1
17
AD
BU
S2
18
AD
BU
S3
19
VPHY4
VPLL9
VCORE12
VCORE37
VCORE64
VCCIO20
VCCIO31
VCCIO42
VCCIO56
AGND10
GND1
GND5
GND11
GND15
GND25
GND35
GND47
GND51P
WR
EN
#60
SU
SP
EN
D#
36
AD
BU
S4
21
AD
BU
S5
22
AD
BU
S6
23
AD
BU
S7
24
AC
BU
S0
26
AC
BU
S1
27
AC
BU
S2
28
AC
BU
S3
29
AC
BU
S4
30
AC
BU
S5
32
AC
BU
S6
33
AC
BU
S7
34
BD
BU
S0
38
BD
BU
S1
39
BD
BU
S2
40
BD
BU
S3
41
BD
BU
S4
43
BD
BU
S5
44
BD
BU
S6
45
BD
BU
S7
46
BC
BU
S0
48
BC
BU
S1
52
BC
BU
S2
53
BC
BU
S3
54
BC
BU
S4
55
BC
BU
S5
57
BC
BU
S6
58
BC
BU
S7
59
R1
5k1
X1
12M
HZ
11
33
G1
2G
24
R10
12k
1%
C6
0.1u
F
R2
5k1
R21
0D
NI
C13
18pF
C11
0.1u
F
93LC
56-S
O8
U2
CS
1
CLK
2
DI
3
DO
4V
SS
5O
RG
6N
U7
VC
C8
C1
4u7
1 2
C3
4u7
1 2
R6
0
R15
0D
NI
C4
0.1u
F
C9
0.1u
F
R4
2k2
R5
0
R11
10k
L2
600o
hm 5
00m
A12
C2
0.1u
F
R16
0D
NIR8
0
C5
0.1u
F
R12
10k
J1
head
er_1
x8D
NI
11
22
33
44
55
66
77
88
C12
0.1u
F
C7
0.1u
F
19
MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Figure 9. FPGA
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
MAKE PWR TRACES
CAPABLE OF 1A
MAKE PWR TRACES
CAPABLE OF 1A
PR
10D
PR
10C
PR
10B
PR
10A
PR
9DP
R9C
PR
9BP
R9A
PR
8DP
R8C
PR
8BP
R8A
PC
LKC
1_P
R5D
PR
5BP
CLK
T1_
PR
5C
PR
5A
PR
4D
PR
4BP
R4C
PR
4A
PT
17D
_DO
NE
PT
17C
_IN
ITn
PT
17B
PT
17A
PT
16D
PT
16C
PT
15D
_PR
OG
nP
T15
C_J
TA
Gen
PT
15B
PT
15A
PT
12D
_SD
A_P
CLK
C0_
0
PT
12B
_PC
LKC
0_1
PT
12C
_SC
L_P
CLT
0_0
PT
12A
_PC
LKT
0_1
PT
11D
_TM
S
PT
11B
PT
11C
_TC
K_T
ES
TC
LK
PT
11A
PT
10D
_TD
IP
T10
C_T
DO
PT
10B
PT
10A
PT
9DP
T9C
PT
9BP
T9A
PR
10D
PR
10B
PR
10C
PR
10A
PR
9DP
R9B
PR
9CP
R9A
PR
8DP
R8B
PR
8CP
R8A
PC
LKC
1_P
R5D
PR
5BP
CLK
T1_
PR
5CP
R5A
PR
4DP
R4C
PR
4BP
R4A
PR
3BP
R2D
PR
2B
PR
3AP
R2C
PR
2A
PT
16B
PT
16A
PR
2BP
R2A
PR
2DP
R2C
PR
3BP
R3A
PT
17B
PT
17A
PT
16B
PT
16A
PT
15A
PT
15B
PT
12B
_PC
LKC
0_1
PT
12A
_PC
LKT
0_1
PT
11B
PT
11A
PT
10B
PT
10A
PT
9BP
T9A
PT
12C
_SC
L_P
CLT
0_0
PT
12D
_SD
A_P
CLK
C0_
0
PT
17C
_IN
ITn
PT
17D
_DO
NE
PT
16C
PT
15D
_PR
OG
nP
T15
C_J
TA
Gen
PT
11D
_TM
SP
T11
C_T
CK
_TE
ST
CLK
PT
9DP
T9C
PT
10D
_TD
IP
T10
C_T
DO
PT
16D
VC
CIO
0V
CC
IO1
VC
C_1
.2V
VC
CIO
0
VC
CIO
1
+3.
3V
VC
CIO
0+
3.3V
VC
CIO
1+
3.3V
TD
O2
TD
I2
TM
S2
TC
K2
LED
05
LED
15
LED
25
LED
35
LED
45
LED
55
LED
65
LED
75
RS
232_
Rx_
TT
L2
RS
232_
Tx_
TT
L2
RT
Sn
2
DT
Rn
2
CT
Sn
2
DS
Rn
2D
CD
n2
Titl
e
Siz
eD
ocum
ent N
umbe
rR
ev
Dat
e:S
heet
of
AX
EL
SY
S
LCM
XO
2-12
00Z
E-B
-EV
NA
Latti
ce M
achX
O2
1200
ZE
Bre
akou
t Boa
rd -
FP
GA
B
35
Thu
rsda
y, A
pril
21, 2
011
Titl
e
Siz
eD
ocum
ent N
umbe
rR
ev
Dat
e:S
heet
of
AX
EL
SY
S
LCM
XO
2-12
00Z
E-B
-EV
NA
Latti
ce M
achX
O2
1200
ZE
Bre
akou
t Boa
rd -
FP
GA
B
35
Thu
rsda
y, A
pril
21, 2
011
Titl
e
Siz
eD
ocum
ent N
umbe
rR
ev
Dat
e:S
heet
of
AX
EL
SY
S
LCM
XO
2-12
00Z
E-B
-EV
NA
Latti
ce M
achX
O2
1200
ZE
Bre
akou
t Boa
rd -
FP
GA
B
35
Thu
rsda
y, A
pril
21, 2
011
J2 Hea
der2
x20
DN
I
2 4 6 8 10 12 14 16 18 20 2422 26 28 30 32 34 36 38 4039373533312927252321191715131197531
C23
0.1u
F
C15
0.1u
F
C21
0.01
uF
J3 Hea
der2
x20
DN
I
2 4 6 8 10 12 14 16 18 20 2422 26 28 30 32 34 36 38 4039373533312927252321191715131197531
C18
0.1u
F
C20
0.1u
F
BANK 0
BANK 1
LCM
XO2-
1200
ZE-1
TG14
4C
U3-
2
PT
17D
/DO
NE
109
PT
17C
/INIT
n11
0
PT
17B
111
PT
17A
112
PT
16D
113
PT
16C
114
PT
16B
115
PT
16A
117
VC
CIO
011
8
PT
15D
/PR
OG
RA
Mn
119
PT
15C
/JT
AG
EN
B12
0
PT
15B
121
PT
15A
122
VC
CIO
012
3
VC
CIO
013
5
PT
12D
/SD
A/P
CLK
C0_
012
5
PT
12C
/SC
L/P
CLK
T0_
012
6
PT
12B
/PC
LKC
0_1
127
PT
12A
/PC
LKT
0_1
128
PT
11D
/TM
S13
0
PT
11C
/TC
K/T
ES
T_C
LK13
1
PT
11B
132
PT
11A
133
PT
10D
/TD
I13
6
PT
10C
/TD
O13
7
PT
10B
138
PT
10A
139
PT
9D14
0
PT
9C14
1
PT
9B14
2
PT
9A14
3
PR
10D
73
PR
10C
74
PR
10B
75
PR
10A
76
VC
CIO
179
VC
CIO
188
VC
CIO
110
2
PR
9D77
PR
9C78
PR
9B81
PR
9A82
PR
8D83
PR
8C84
PR
8B85
PR
8A86
NC
487
NC
589
PC
LKC
1_0/
PR
5D91
PC
LKT
1_0/
PR
5C92
PR
5B93
PR
5A94
PR
4D95
PR
4C96
PR
4B97
PR
4A98
PR
3B99
PR
3A10
0
NC
610
3
PR
2D10
4
PR
2C10
5
PR
2B10
6
PR
2A10
7
C22
0.1u
F
C16
0.1u
F
R24
1
R23
2k2
C17
0.01
uF
C19
0.1u
F
R22
2k2
R25
1
C24
0.1u
F
20
MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Figure 10. FPGA
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
NOTE
PLACE ALL 100 OHM
DIFF TERM RESISTORS
ON BOTTOM OF BOARD
MAKE PWR TRACES
CAPABLE OF 1A
MAKE PWR TRACES
CAPABLE OF 1A
50MHz OSC
This is optional
to enable or
disable the
crystal.
PB
4AP
B4B
CS
SP
IN_P
B4C
PB
4D
PB
6AP
B6B
MC
LK_C
CLK
_PB
6CS
0_S
PIS
O_P
B6D
PB
9CP
B9D
PC
LKT
2_0_
PB
9AP
CLK
C2_
0_P
B9B
PB
11C
PC
LKT
2_P
B11
AP
B11
D
PC
LKC
2_P
B11
B
PB
15A
PB
15C
PB
15B
PB
15D
PB
18A
PB
18B
PB
18C
PB
18D
PB
20A
PB
20B
SI_
SIS
PI_
PB
20D
SN
_PB
20C
PL2
A_L
_GP
LLT
_FB
PL2
B_L
_GP
PLC
_FB
PL2
C_L
_GP
LLT
_IN
PL2
D_L
_GP
LLC
_IN
PL3
A_P
CLK
T3_
2P
L3B
_PC
LKC
3_2
PL3
CP
L3D
PL4
AP
L4B
PL4
CP
L4D
PL5
A_P
CLK
T3_
1P
L5B
_PC
LKC
3_1
PL5
CP
L5D
PL8
AP
L8B
PL8
CP
L8D
PL1
0AP
L10B
PL1
0CP
L10D
PL9
A_P
CLK
T3_
0P
L9B
_PC
LKC
3_0
PL3
CP
L3D
PL4
AP
L4B
PL4
CP
L4D
PL5
A_P
CLK
T3_
1P
L5B
_PC
LKC
3_1
PL5
CP
L5D
PL8
AP
L8B
PL8
CP
L8D
PL9
A_P
CLK
T3_
0P
L9B
_PC
LKC
3_0
PL1
0BP
L10D
PL1
0AP
L10C
PL2
A_L
_GP
LLT
_FB
PL2
B_L
_GP
PLC
_FB
PB
4AP
B4B
CS
SP
IN_P
B4C
PB
4D
PB
6AM
CLK
_CC
LK_P
B6C
PB
6B
PB
9CP
B9D
PC
LKC
2_0_
PB
9B
PB
11C
PC
LKT
2_P
B11
AP
B11
DP
CLK
C2_
PB
11B
PB
15A
PB
15C
PB
15B
PB
15D
PL2
C_L
_GP
LLT
_IN
PL2
D_L
_GP
LLC
_IN
PB
4AP
B4B
CS
SP
IN_P
B4C
PB
4D
PB
6AP
B6B
MC
LK_C
CLK
_PB
6CS
0_S
PIS
O_P
B6D
PB
9CP
B9D
PC
LKT
2_0_
PB
9AP
CLK
C2_
0_P
B9B
PB
11C
PB
11D
PC
LKT
2_P
B11
AP
CLK
C2_
PB
11B
PB
15A
PB
15C
PB
15B
PB
15D
PB
18A
PB
18B
S0_
SP
ISO
_PB
6D
PC
LKT
2_0_
PB
9A
PB
18C
PB
18D
PB
20A
PB
20B
SN
_PB
20C
SI_
SIS
PI_
PB
20D
PB
18A
PB
18B
PB
18C
SN
_PB
20C
PB
18D
PB
20A
PB
20B
SI_
SIS
PI_
PB
20D
PL3
A_P
CLK
T3_
2P
L3B
_PC
LKC
3_2
PL1
0A
PL9
A_P
CLK
T3_
0
VC
CIO
3V
CC
IO2
VC
C_3
.3V
VC
CIO
3V
CC
IO2
+3.
3VV
CC
IO3
VC
CIO
2+
3.3V
+3.
3V
Titl
e
Siz
eD
ocum
ent N
umbe
rR
ev
Dat
e:S
heet
of
AX
EL
SY
S
LCM
XO
2-12
00Z
E-B
-EV
NA
Latti
ce M
achX
O2
1200
ZE
Bre
akou
t Boa
rd -
FP
GA
B
45
Thu
rsda
y, A
pril
21, 2
011
Titl
e
Siz
eD
ocum
ent N
umbe
rR
ev
Dat
e:S
heet
of
AX
EL
SY
S
LCM
XO
2-12
00Z
E-B
-EV
NA
Latti
ce M
achX
O2
1200
ZE
Bre
akou
t Boa
rd -
FP
GA
B
45
Thu
rsda
y, A
pril
21, 2
011
Titl
e
Siz
eD
ocum
ent N
umbe
rR
ev
Dat
e:S
heet
of
AX
EL
SY
S
LCM
XO
2-12
00Z
E-B
-EV
NA
Latti
ce M
achX
O2
1200
ZE
Bre
akou
t Boa
rd -
FP
GA
B
45
Thu
rsda
y, A
pril
21, 2
011
R31
100
DN
I
R35
100
DN
I
C53
0.1u
F
R41
100
DN
I
R38
100
DN
I
R32
100
DN
I
R37
100
DN
I
J5 Hea
der2
x20
DN
I
2 4 6 8 10 12 14 16 18 20 2422 26 28 30 32 34 36 38 4039373533312927252321191715131197531
C28
0.1u
F
R28
100
DN
I
X2
CB
3LV
-3C
-50M
0000
DN
I
EN
1
GN
D2
Out
put
3
Vcc
4
R30
100
DN
I
2
KN
AB
3
KNAB
LCM
XO2-
1200
ZE-1
TG14
4C
U3-
3
PL2
A/L
_GP
LLT
_FB
1
PL2
B/L
_GP
PLC
_FB
2
PL2
C/L
_GP
LLT
_IN
3
PL2
D/L
_GP
LLC
_IN
4
VC
CIO
37
VC
CIO
316
PL3
A/P
CLK
T3_
25
PL3
B/P
CLK
C3_
26
PL3
C9
PL3
D10
PL4
A11
PL4
B12
PL4
C13
PL4
D14
NC
015
NC
117
PL5
A/P
CLK
T3_
119
PL5
B/P
CLK
C3_
120
PL5
C21
PL5
D22
PL8
A23
PL8
B24
PL8
C25
PL8
D26
VC
CIO
330
PL9
A/P
CLK
T3_
027
PL9
B/P
CLK
C3_
028
PL1
0D35
PL1
0C34
PL1
0B33
PL1
0A32
NC
231
VC
CIO
237
VC
CIO
251
VC
CIO
266
PB
4A38
PB
4B39
CS
SP
IN/P
B4C
40
PB
4D41
PB
6A42
PB
6B43
MC
LK/C
CLK
/PB
6C44
SO
/SP
ISO
/PB
6D45
PB
9C47
PB
9D48
PC
LKT
2_0/
PB
9A49
PC
LKC
2_0/
PB
9B50
PB
11D
54
PC
LKT
2_1/
PB
11A
55
PC
LKC
2_1/
PB
11B
56
PB
11C
52
PB
15A
57
PB
15B
58
PB
15C
59
PB
15D
60
PB
18A
61
PB
18B
62
PB
18C
65
PB
18D
67
PB
20A
68
PB
20B
69
SN
/PB
20C
70
SI/S
ISP
I/PB
20D
71
NC
363
R39
100
DN
I
C27
0.01
uF
J4 Hea
der2
x20
DN
I
2 4 6 8 10 12 14 16 18 20 2422 26 28 30 32 34 36 38 4039373533312927252321191715131197531
C32
0.1u
F
C25
0.1u
F
C30
0.1u
F
R33
100
DN
I
R34
100
DN
I
C29
0.1u
F
R36
100
DN
I
R29
100
DN
I
R54
0
R26
1R
271
C34
0.1u
F
C31
0.01
uF
C33
0.1u
F
R40
100
DN
I
C26
0.1u
F
21
MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Figure 11. Power LEDs
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
LEDs
4X15 PROTOTYPE AREA
LAYOUT LEDs IN A SINGLE ROW
STATUS_LED4
STATUS_LED3
STATUS_LED2
STATUS_LED0
STATUS_LED1
STATUS_LED6
STATUS_LED7
STATUS_LED5
+3.
3V
VB
US
_5V
VB
US
_5V
VB
US
_5V
+1.
2V
+1.
2V
+3.
3V
+3.
3V
+3.
3V+
1.2V
VC
C_1
.2V
VC
C_3
.3V
+1.
2V
DM
2D
P2
LED
03
LED
13
LED
23
LED
33
LED
43
LED
53
LED
63
LED
73
Titl
e
Siz
eD
ocum
ent N
umbe
rR
ev
Dat
e:S
heet
of
AX
EL
SY
S
LCM
XO
2-12
00Z
E-B
-EV
NA
Latti
ce M
achX
O2
1200
ZE
Bre
akou
t Boa
rd -
Pow
er, L
ED
s
B
55
Thu
rsda
y, A
pril
21, 2
011
Titl
e
Siz
eD
ocum
ent N
umbe
rR
ev
Dat
e:S
heet
of
AX
EL
SY
S
LCM
XO
2-12
00Z
E-B
-EV
NA
Latti
ce M
achX
O2
1200
ZE
Bre
akou
t Boa
rd -
Pow
er, L
ED
s
B
55
Thu
rsda
y, A
pril
21, 2
011
Titl
e
Siz
eD
ocum
ent N
umbe
rR
ev
Dat
e:S
heet
of
AX
EL
SY
S
LCM
XO
2-12
00Z
E-B
-EV
NA
Latti
ce M
achX
O2
1200
ZE
Bre
akou
t Boa
rd -
Pow
er, L
ED
s
B
55
Thu
rsda
y, A
pril
21, 2
011
D3
Red
1 2
R47
1K
C39
0.1u
F
J6
Pro
to T
ype
Are
a, H
oles
on
0.1
inch
Cen
ters
Pro
to T
ype
Are
a1
D5
Red
1 2
R42
0
TP
2
DN
I 1
C44
0.1u
F
C48
10uF
LCM
XO2-
1200
ZE-1
TG14
4C
U3-
1
VC
C36
VC
C72
VC
CP
129
VC
C10
8
VC
C14
4
GN
D8
GN
D18
GN
D29
GN
D46
GN
D53
GN
D64
GN
D80
GN
D90
GN
D10
1
GN
D11
6
GN
D12
4
GN
D13
4
D7
Red
1 2
C37
0.1u
F
R45
1K
R52
1K
C36
1uF
L3
600o
hm 5
00m
A12
C46
10uF
R49
1K
C35
10uF
C51
0.1u
F
C41
0.01
uF
C40
0.1u
F
TP
3
DN
I 1
D2
Red
1 2
D9
Gre
en
1 2
C42
10uF
U5
NC
P11
17
GN
D
1
IN3
OU
T2
TA
B4
U4
FA
N11
12
GND1
Out
put
2In
put
3
Tab
4
TP
1
DN
I 1
D4
Red
1 2
R53
0
C50
0.1u
F
D6
Red
1 2
C38
0.1u
F
R46
1K
L4
600o
hm 5
00m
A12
R51
1K
R55
100
R48
1K
C49
22uF
D8
Red
1 2
R43
1K
R44
0
J7
SK
T_M
INIU
SB
_B_R
A
VC
C1
D-
2
D+
3
ID4
GN
D5
L5 600o
hm 5
00m
A
1 2
C52
0.1u
F
D1
Red
1 2
C45
0.01
uF
R56
1
C47
22uF
R50
1K
C43
1uF
22
MachXO2-1200ZE Breakout BoardLattice Semiconductor Evaluation Kit User’s Guide
Appendix B. Bill of MaterialsTable 12. MachXO2-1200ZE Breakout Board Bill of Materials
Item Quantity Reference Manufacturer Part Number
1 2 C1, C3 Panasonic ECJ-1VB0J475K
2 34 C2, C4, C5, C6, C7, C8, C9, C11, C12, C15, C16, C18, C19, C20, C22, C23, C24, C25, C26, C28, C29, C30, C32, C33, C34, C37, C38, C39, C40, C44, C50, C51, C52, C53
Kemet C0402C104K4RACTU
3 5 C10, C35, C42, C46, C48 Taiyo Yuden LMK107BJ106MALTD
4 2 C13, C14 Kemet C0402C180K3GACTU
5 6 C17, C21, C27, C31, C41, C45 Kemet C0402C103J4RACTU
6 2 C36, C43 Kemet C0402C105K9PACTU
7 2 C47, C49 Taiyo Yuden LMK212BJ226MG-T
8 8 D1, D2, D3, D4, D5, D6, D7, D8 LITE-On, Inc. LTST-C190KRKT
9 1 D9 LITE-On, Inc. LTST-C190KGKT
10 1 J1 Molex 22-28-4081
11 4 J2, J3, J4, J5 Samtec
12 1 J6
13 1 J7 Neltron 5075BMR-05-SM-CR
14 5 L1, L2, L3, L4, L5 Murata BLM18AG601SN1D
15 3 R1, R2, R3 Yageo RC0402FR-075K1L
16 5 R4, R9, R19, R22, R23 Yageo RC0402FR-072K2L
17 8 R5, R6, R7, R8, R42, R44, R53, R54 Yageo RC0603JR-070RL
18 1 R10 Yageo RC0402FR-0712KL
19 3 R11, R12, R13 Yageo RC0402FR-0710KL
20 7 R14, R15, R16, R17, R18, R20, R21 Yageo RC0603JR-070RL
21 5 R24, R25, R26, R27, R56 Vishay/Dale CRCW06031R00JNEAHP
22 14 R28, R29, R30, R31, R32, R33, R34, R35, R36, R37, R38, R39, R40, R41
Yageo RC0603FR-07100RL
23 9 R43, R45, R46, R47, R48, R49, R50, R51, R52 Yageo RC0402FR-071KL
24 1 R55 Yageo RC0603FR-07100RL
25 3 TP1, TP2, TP3
26 1 U1 FTDI FT2232HL
27 1 U2 Microchip 93LC56C-I/SN
28 1 U3 Lattice LCMXO2-1200ZE-1TG144C
29 1 U4 Fairchild Semi FAN1112SX
30 1 U5 On Semi NCP1117ST33T3G
31 1 X1 TXC 7M-12.000MAAJ-T
32 1 X2 CTS CB3LV-3C-50M0000
