Brief Introduction of Sigurd Brief Introduction of Sigurd

IC package Assembly IC package Assembly

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ContentContent

� Package Development Trend

� Product Brief

� Sawing type QFN

� Representative MEMS Product

� LGA

� Light Sensor

� Proximity Sensor

� High Yield Capability

� Low Cost Solution

� Rapid Product Design / Phase-in

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Sigurd AssembliesSigurd Assemblies

LargeLarge SmallSmall

ThinThin

ThickThick

DIP DIP SOPSOP

PLCCPLCC

CIS/CCMCIS/CCM

SOT/TSOTSOT/TSOT

QFN/DFNQFN/DFN

TSOPTSOP

QFPQFP MEMS MEMS

LGALGA

SSOPSSOP

Today

Proximity Proximity

sensorsensor

WLCSPWLCSP

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Assembly Product RoadmapAssembly Product Roadmap

Development Photo type Production

Jan. 2010 Jan. 2011 Jan. 2012 Jan. 2013

MEMS SIP assembly

LGA

MEMS G-sensor technology

Integrate LED & Receiver

Solar cell module

RF 3G technology

Glass Wafer sawing

Embedded component

Light Sensor

Direction: small size, multi-chip, more component.

Single receiver

300mm WLCSP Technology

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Package Structure Package Structure –– Sawing type / QFNSawing type / QFN

Gold Wire Molding Compound Chip

DA EpoxyLead Frame (PPF/ Spot Ag)

Exposed

Die pad

Marking

OOOOO

OOOOO

Bottom view Top view

Chip

Mold Compound

0.55, 0.75 & 0.9

mm

Cross section

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Package Type Package Type –– QFN/ DFNQFN/ DFN

Remark:Remark:

●●●●●●●● : L/F is ready.: L/F is ready.

●●●●●●●● : L/F need to be created.: L/F need to be created.

Package thickness: 0.55, 0.75, and 0.90 mmPackage thickness: 0.55, 0.75, and 0.90 mm

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Representative MEMS ProductRepresentative MEMS Product

� MEMS Telecom Switch (production)

� High-volume application

� Stacked Die for small footprint and low impedance interconnect

� CMOS Controller for switch drive and digital interface

Leadframe

MEMS DieCMOS ControllerLid (LCP) Au Bond-wire

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� Design and develop MEMS with driver in one package – System in Package technology.

� Multi-layer bonding – 4-layer wire loop capability.

� Package thermal expansion control solution.

� Package type: Injection molded type & Air cavity type.

� Turn key solution.

MEMS Stacking Die TechnologyMEMS Stacking Die Technology

� Pictures of stacking die with wire bonding

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Thin Package Solution Thin Package Solution -- SOT / TSOTSOT / TSOT

Features:Features:

•• 2.9x1.6mm package size2.9x1.6mm package size

•• 1.9mm lead pitch1.9mm lead pitch

•• SOT thickness 1.1mmSOT thickness 1.1mm

•• TSOT thickness 0.75mmTSOT thickness 0.75mm

•• Green productGreen product

Application:Application:

•• Power managementPower management

•• Power switchPower switch

•• RFIDRFID

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LGA (land grid array)LGA (land grid array)Features:Features:

•• 3x3mm to 10x7mm package size3x3mm to 10x7mm package size

•• 77 to 29 pin countsto 29 pin counts

•• 0.0.44mm lead pitch mm lead pitch

•• Green finish available Green finish available

•• Excellent electrical and thermal performance Excellent electrical and thermal performance

•• Full in house design abilityFull in house design ability

Application:Application:

•• RF moduleRF module

•• LLogic ogic

•• MMemory emory

SubstrateSubstrateEpoxyEpoxy Passive Passive

componentcomponent

Passive componentPassive component

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Light SensorLight SensorFeatures:Features:

�� 1.6x1.6mm to 3x3mm package size1.6x1.6mm to 3x3mm package size

�� 4 to 12 pin counts4 to 12 pin counts

�� 0.5mm lead pitch 0.5mm lead pitch

�� Green finish available Green finish available

�� Excellent electrical and Excellent electrical and lightlight performance performance

�� Full in house design abilityFull in house design ability

Application:Application:

•• Cell phoneCell phone

•• NotebookNotebook

•• Touch control panelTouch control panel

ChipClear Compound

Silver Epoxy PPF Lead Frame

``

Gold Wire

Chip

Clear Compound

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Proximity SensorProximity SensorFeatures:Features:

�� Customized packageCustomized package

�� 4 to 12 pin counts4 to 12 pin counts

�� Integrate LED and Receiver Integrate LED and Receiver

in one package in one package

�� Green finish available Green finish available

�� Excellent electrical and Excellent electrical and lightlight performance performance

�� Full in house design abilityFull in house design ability

Application:Application:

•• Cell phoneCell phone

•• NotebookNotebook

•• Touch control panelTouch control panel

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WLCSP

Features:• Die size: 0.3mm x 0.3mm till 15mm x 15mm

• Bump size: 90 ~ 250um

• Carrier/Cover tape: 8/12/16/24/32 mm tape

width capability

• waffle pack: 2” x 2” ~ 4” x 4”

Chip

Carrier

Cover

Bump

Chip

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High yield capabilityHigh yield capability

Remark: average yield above 99.95%.Remark: average yield above 99.95%.

AssAss’’y Yield trend:y Yield trend:

Assembly Yield

99

99.5

100

Month

Yie

ld

Total

Power

QFN

LGA

Total 99.96 99.96 99.94 99.95 99.93 99.94 99.95 99.95 99.95 99.93 99.94 99.95 99.94 99.94 99.95 99.95 99.95 99.95

Power 99.96 99.94 99.95 99.95 99.93 99.95 99.95 99.95 99.95 99.94 99.95 99.96 99.95 99.95 99.95 99.95 99.96 99.94

QFN 99.95 99.96 99.94 99.95 99.94 99.94 99.94 99.94 99.93 99.90 99.92 99.94 99.94 99.94 99.94 99.95 99.94 99.95

LGA 99.93 99.95 99.93 99.95 99.95 99.96 99.96 99.95 99.92 99.93 99.93 99.94 99.96 99.93 99.95 99.94 99.95 99.95

Jan' 10 Feb' 10Mar'

10Apr' 10

May'

10

Jun '

10

July '

10

Aug

'10Sep '10 Oct '10

Nov

'10Dec '10 Jan '11 Feb '11

Mar.

'11Apr '11

May

'11

Jun.

'11

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Process Vendor Remark

Grinding Okamoto Accuracy: +/- 5um

Saw Disco/TSC

Die Bond ESEC / ASM / Panasonic Accuracy: +/- 25um

Wire Bond ASM / KNS / Panasonic Accuracy: +/- 3um

Sealing RJR / GPM

Molding Towa / Ki-Giant Offset: +/- 20um

Marking GPM / E&R

Singulation saw Disco / KnS

Trim/Form GPM / Ki-Giant

Printer Hitchchi

Mounter Suzuki

Re-flow NRY540SCC7Z Yamato

Equipment List For Assembly

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Die BonderDie Bonder

Wire BonderWire Bonder

GrindingGrinding

Die SawerDie Sawer

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Mold SystemMold System PMC OvensPMC Ovens

Singulation SawSingulation SawSMT LineSMT Line

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MicroscopeMicroscope 3D Optic System3D Optic System

Die Shear SystemDie Shear System Wire Pull TesterWire Pull Tester

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Assembly capability(bond wire size (Au/Cu), bonding capability for single row/ dual

row and offset pads, grinding capability, and so on)

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Process Capability

Process Item Process Capability

Wafer Size 6'' / 8''

Minimum final thickness 4mils

Parallelism TTV < 5um

Thickness Variation between wafers <=10μμμμm

Wafer Size 4~8 inch

Cutting Method through Cut/ Step Cut

Minimum chip size cutting 0.2mm square

DI water Resistivity >=10MΩΩΩΩ

Chipping width <=10μμμμ m

Cutting street >50μμμμ m

Wafer Size 4 ~ 8''

Acceptable die size >0.2mm square

Pick Type wafer mapping/ Ink Dot

Bonding Type Epoxy type

Epoxy Bleeding <10mils

Epoxy thickness 5~40um

Epoxy Voids within 5% in die area

Die Placement Accuracy Theta :±0.5º ;X/Y:± 2 mils

Wafer Grinding

Wafer Sawing

Die Bonding

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Process Capability

Process Item Process Capability

Fine Pitch Capability 45um

wire size 0.7 ~2.0 mils

Loop height control ±25um

Bonding Frequency 138K HZ

Bond placement repeatability 3um

Bond pad pitch (single/ dual row) 45um

Bond pad openning 40um

Staggered bond 30um

Wire Span ~8mm

Fine Pitch Capability 60um

wire size 0.9~1.2 mils

Loop height control ±25um

Bonding Frequency 138K HZ

Bond placement repeatability 3um

Bond pad pitch (single/ dual row) 60um

Bond pad openning 50um

Staggered bond 40um

Wire Span ~10mm

Wire Bonding

(Cu wire)

Wire Bonding

(Au wire)

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Process Capability

Process Item Process Capability

Die Coating Viscosity 500 ~ 50000 cps

Sealing Accuracy 4mils

Molding thickness 0.55/0.75/0.90mm

Lead frame handling thickness 0.15mm

Molding Wire sweep <5%

Body offset/ off center <1 mil

Marking Symbol Laser/ Ink

Plating Plating composition Pb/Sn(85/15%)

(Apply to lead frmae type) Lead free capability Pure Tin (100%), Sn/Bi(98/2%), Sn/Cu(99/1%)

Trim \ Forming Coplanarity <4mils

Solder Thickness ≦≦≦≦ 0.12 ± 0.06 mm

Component size Min. 0201

Mount for SMD ≦≦≦≦ ± 2.0 mils

SMT

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Low Cost SolutionLow Cost Solution

� Material evaluationex.

• To study low cost materials with high quality

Au wire � Cu wire

• To co-work with customer to reduce the gold wire dimension

� Package design

ex.

• Smaller package design to increase product value

QFP � QFN

SOT � TSOT

� To integrate more chips and components in one package

(SIP design)

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Rapid Product Design/PhaseRapid Product Design/Phase--inin

1. Capability:

� Stack die

� SIP design

� MEMS product design/production

� Product design

2. Sample making timeline:

� Available package: 1 week for sample making.

� New type lead frame/substrate: 4~6 weeks for prototype.

� New package/product: around 3 months (based on product

requirement)