Broadband 0.25-µm Gallium Nitride (GaN) Power Amplifier ... · ARL-TR-8091 AUG 2017 . US Army...

ARL-TR-8091 ● AUG 2017

US Army Research Laboratory

Broadband 0.25-µm Gallium Nitride (GaN) Power Amplifier Designs by John E Penn Approved for public release; distribution is unlimited.

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ARL-TR-8091 ● AUG 2017

US Army Research Laboratory

Broadband 0.25-µm Gallium Nitride (GaN) Power Amplifier Designs by John E Penn Sensors and Electron Devices Directorate, ARL Approved for public release; distribution is unlimited.

ii

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1. REPORT DATE (DD-MM-YYYY)

August 2017 2. REPORT TYPE

Technical Report 3. DATES COVERED (From - To)

9 Feb 2017–28 Jun 2017 4. TITLE AND SUBTITLE

Broadband 0.25-µm Gallium Nitride (GaN) Power Amplifier Designs 5a. CONTRACT NUMBER

5b. GRANT NUMBER

5c. PROGRAM ELEMENT NUMBER

6. AUTHOR(S)

John E Penn 5d. PROJECT NUMBER

5e. TASK NUMBER

5f. WORK UNIT NUMBER

7. PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES)

US Army Research Laboratory ATTN: RDRL-SER-E Aberdeen Proving Ground, MD 21005-5066

8. PERFORMING ORGANIZATION REPORT NUMBER

ARL-TR-8091

9. SPONSORING/MONITORING AGENCY NAME(S) AND ADDRESS(ES)

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12. DISTRIBUTION/AVAILABILITY STATEMENT

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13. SUPPLEMENTARY NOTES

14. ABSTRACT

The US Army Research Laboratory is exploring devices and circuits for RF communications, networking, and sensor systems of interest to Department of Defense applications, particularly for next-generation radar systems. Broadband, efficient, high-power monolithic microwave integrated circuit amplifiers are extremely important in any communication system that must operate reliably and efficiently in continually crowded spectrums, with multiple purposes for communications, networking, and radar. This report describes the design of a broadband class A/B power amplifier using Qorvo’s 0.25-µm high-power efficient gallium nitride on a 4-mil silicon carbide process. This design was one of several submitted to a US Air Force Research Laboratory–sponsored wafer fabrication.

15. SUBJECT TERMS

MMIC, amplifier, GaN, RF, microwave

16. SECURITY CLASSIFICATION OF: 17. LIMITATION OF ABSTRACT

UU

18. NUMBER OF PAGES

52

19a. NAME OF RESPONSIBLE PERSON

John E Penn a. REPORT

Unclassified b. ABSTRACT

Unclassified

c. THIS PAGE

Unclassified

19b. TELEPHONE NUMBER (Include area code)

301-394-0423 Standard Form 298 (Rev. 8/98)

Prescribed by ANSI Std. Z39.18

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Contents

List of Figures iv

List of Tables vi

Acknowledgments vii

1. Introduction 1

2. Broadband Power Amplifier 1

3. Axiem Electromagnetic Simulations of Broadband Power Amplifier Layout 11

4. A 2-Stage Broadband Power Amplifier Design 13

5. New Models (PDK) and Translation from Gen1 to Gen2 17

6. Final Gen2 Performance Simulations ADS and MWO with Axiem and Momentum 20

7. Preliminary Ideal Design for 2 Parallel 1.75-mm HEMT Power Combiner 30

8. Gen2 HEMT Re-Simulations 35

9. Compact Broadband Feedback Amplifier 38

10. Conclusion 40

List of Symbols, Abbreviations, and Acronyms 41

Distribution List 42

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List of Figures

Fig. 1 Microwave Office (MWO) schematic for ideal power load and match (10- × 175-µm HEMT, 28 V, 100 mA/mm) ......................................... 2

Fig. 2 MWO simulation of ideal power load and match (10- × 175-µm HEMT, 2 to 9 GHz) .............................................................................. 2

Fig. 3 Schematic and MMIC layout of broadband matching circuit (10- × 175-µm HEMT) .................................................................................... 3

Fig. 4 MWO simulation of ideal (magenta) and MMIC output match (blue) . 3

Fig. 5 Broadband impedance of output match ideal (solid) vs. MMIC (dotted) (50 Ω || –0.54 pF) ................................................................................... 4

Fig. 6 1.75-mm HEMT load pull simulation 4 GHz, 28 V, 29.5 dBm input max pout 40.5 dBm: (41 Ω || –0.48pF); max PAE 66%: (64 Ω || –0.70 pF) ......................................................................................................... 5

Fig. 7 1.75-mm HEMT load pull simulation 4 GHz, 35 V, 29.5 dBm input max pout 41.2 dBm: (50 Ω || –0.54 pF); max PAE 68%: (100 Ω || –0.66 pF) ............................................................................................... 5

Fig. 8 MWO S-parameter simulation of 10- × 175-µm (1.2-mm) GaN HEMT (28 V and 180 mA) ............................................................................... 6

Fig. 9 Stabilizing resistors added to 10- × 175-µm GaN HEMT (28 V) plus broadband output match ........................................................................ 6

Fig. 10 Ideal input match for 3- to 7-GHz, 1.75-mm GaN HEMT (28 V) power amplifier ................................................................................................ 7

Fig. 11 Broadband MMIC input match for 3- to 7-GHz, 1.75-mm GaN HEMT power amplifier ..................................................................................... 7

Fig. 12 Preliminary layout of 8- to 10-W broadband (3–7 GHz) 1.75-mm GaN HEMT power amplifier......................................................................... 8

Fig. 13 Small signal simulation of 8- to 10-W broadband (3–7 GHz) 1.75-mm GaN HEMT power amplifier ................................................................ 8

Fig. 14 AWR MWO dynamic load line simulation of 1.75-mm HEMT power amplifier (4 GHz, 28 V/180 mA) .......................................................... 9

Fig. 15 MWO performance simulation of ideal (3–5 GHz, 28 V/180 mA) 1.75-mm HEMT power amplifier ....................................................... 10

Fig. 16 MWO performance simulations of MMIC (3–6 GHz, 28 V/180 mA) 1.75-mm HEMT power amplifier ....................................................... 10

Fig. 17 Schematic of broadband amplifier with Axiem EM matching circuit simulations (ideal DC bias) ................................................................. 12

Fig. 18 Axiem 3-D EM node mesh of input (left) and output (right) matching circuits ................................................................................................. 12

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Fig. 19 Axiem (EM) performance simulations of MMIC (3–6 GHz, 28 V/180 mA) 1.75-mm HEMT power amplifier ............................................... 13

Fig. 20 Simple schematic of broadband driver amplifier with output low-pass circuit .................................................................................................. 14

Fig. 21 Initial simulations of 2-stage amplifier (solid) vs. 1-stage power amplifier (dotted) ................................................................................ 15

Fig. 22 Ideal feedback driver amplifier (4 × 110 µm, 600 Ω, L = 2.2 nH, C = 0.35 pf) 2-stage performance (3–6 GHz, 28 V) 1.75-mm HEMT power amplifier .............................................................................................. 15

Fig. 23 Feedback driver amplifier (4 × 110 µm, 525 Ω) single-stage performance (3–6 GHz, 28 V/44 mA) ................................................ 16

Fig. 24 Initial layout of 8- to 10-W 2-stage (3–7 GHz) 1.75-mm GaN HEMT power amplifier ................................................................................... 17

Fig. 25 Final layout of 8- to 10-W Gen2 1-stage (3–7 GHz) 1.75-mm GaN HEMT power amplifier (1.6 × 0.8 mm) ............................................ 18

Fig. 26 Final layout of 8- to 10-W Gen2 2-stage (3–7 GHz) 1.75-mm GaN HEMT power amplifier (2.0 × 0.9 mm) ............................................. 19

Fig. 27 Broadband impedance of output match ideal (solid) vs. MMIC (dotted) and Axiem EM of final Gen2 layout (dot/dash) (50 Ω || –0.54 pF) ....................................................................................................... 19

Fig. 28 Admittance of output match ideal (blue solid) vs. Axiem (solid magenta) and momentum (solid brown) (50 Ω || –0.54 pF)................ 20

Fig. 29 MWO schematic of broadband amplifier with Momentum EM matching circuit simulations ............................................................... 21

Fig. 30 Axiem (EM) Gen2 final performance simulations (3–6 GHz, 28 V/180 mA) 1.75-mm HEMT power amplifier ............................................... 22

Fig. 31 Momentum (EM) Gen2 final performance simulations (3–6 GHz, 28 V) 1.75-mm HEMT power amplifier ............................................. 22

Fig. 32 Small signal EM Gen2 final performance simulations (28 V) 1.75-mm HEMT power amplifier....................................................................... 23

Fig. 33 ADS schematic of broadband amplifier with Momentum EM matching circuit simulations ............................................................................... 23

Fig. 34 ADS Gen2 final performance simulations with Axiem (EM) (4.5 GHz, 28 V) 1.75-mm HEMT power amplifier ............................................. 24

Fig. 35 ADS Gen2 final performance simulations with Axiem (EM) (3–6 GHz, 28 V) 1.75-mm HEMT power amplifier ................................... 25

Fig. 36 ADS Gen2 final performance simulations with Momentum (4.5 GHz, 28 V) 1.75-mm HEMT power amplifier ............................................. 26

Fig. 37 ADS Gen2 final performance simulations with Momentum (3–6 GHz, 28 V) 1.75-mm HEMT power amplifier ............................................. 27

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Fig. 38 ADS schematic of 2-stage amplifier with Axiem EM matching circuit simulations .......................................................................................... 28

Fig. 39 ADS Gen2 final 2-stage performance simulations with Axiem (4.5 GHz, 28 V) 1.75-mm HEMT....................................................... 28

Fig. 40 ADS Gen2 final 2-stage performance simulations with Axiem (3–6 GHz, 28 V) 1.75-mm HEMT...................................................... 29

Fig. 41 ADS Gen2 final 2-stage small signal simulations with Axiem (28 V) 1.75-mm HEMT .................................................................................. 30

Fig. 42 MWO partial schematic for ideal parallel 2-way combiner circuit (10 × 1.75-µm HEMT)........................................................................ 31

Fig. 43 MWO schematic for ideal parallel 2-way combiner circuit (2-1.75 mm HEMTs) .............................................................................................. 31

Fig. 44 Double-tuned ideal load match for parallel 2-way combiner circuit vs. single HEMT ....................................................................................... 32

Fig. 45 MWO performance simulation of ideal 2-way combined (3–5 GHz, 28 V/ 360 mA) 3.5-mm HEMT power amplifier ............................... 33

Fig. 46 1.75-mm HEMT load pull re-simulation 4-GHz, 28-V 25-dBm input max pout 39.6 dBm: (38.4 Ω || –0.57 pF); max PAE 69%: (106 Ω || –0.62 pF) ............................................................................................. 36

Fig. 47 1.75-mm HEMT ideal Gen2 (load pull) re-simulation 4 GHz, 28 V .. 37

Fig. 48 1.75-mm HEMT Gen2 DC IV curves and dynamic load line 4 GHz, 28 V ..................................................................................................... 37

Fig. 49 Layout plot of stand-alone broadband feedback amplifier (0.6 × 0.6 mm) ..................................................................................................... 38

Fig. 50 MWO broadband feedback amplifier S-parameter simulation (0–20 GHz, 28 V) 0.44-mm HEMT................................................... 39

Fig. 51 MWO broadband feedback amplifier performance simulations (2–18 GHz, 28 V) 0.44-mm HEMT................................................... 39

List of Tables

Table 1 MWO Gen1 performance simulations of original MMIC, ideal 1.75 mm, and ideal 2-way, 3.5-mm broadband HEMT power amplifiers .. 34

Table 2 MWO with Axiem EM and Gen2 performance simulations of new layout MMIC (Gen1 + Axiem), original MMIC (Gen2 + Original MWO), and new layout MMIC (Gen2 + Axiem) HEMT power amplifiers ............................................................................................ 34

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Acknowledgments

I would like to acknowledge and thank the Air Force Research Laboratory team, especially Tony Quach, Vipul Patel, and Aji Mattamana, for the design support, computer-aided design support, technical expertise, and fabrication of these gallium nitride circuits for emerging Department of Defense systems and applications.

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INTENTIONALLY LEFT BLANK.

Approved for public release; distribution is unlimited. 1

1. Introduction

The US Army Research Laboratory (ARL) has been evaluating and designing efficient broadband linear high-power amplifiers for future adaptive multimode radar systems. Qorvo has a high-performance 0.25-µm gallium nitride (GaN) fabrication process and a process design kit (PDK) that researchers at ARL used to design broadband amplifiers, power amplifiers, and other circuits for future radar, communications, and sensor systems. These ARL designs are to be submitted for fabrication as part of a US Air Force Research Laboratory–led effort. These designs will demonstrate the performance, bandwidth, and capability of GaN processes for broadband power amplifiers.

2. Broadband Power Amplifier

A broadband power amplifier class A/B for C-band was designed using Qorvo’s 0.25-µm GaN fabrication process. To keep the initial design simple, a single 1.75-mm high-electron-mobility transistor (HEMT) was used for a preliminary ideal design of the broadband power amplifier, operating nominally at 28 V. These devices can withstand higher voltages, which could produce higher output powers but with the additional need to dissipate higher power densities at the higher DC supplies. The optimal matching circuit designs will be a tradeoff of output power, efficiency, and bandwidth, optimized to a given DC input, or DC input range up to 40 V. These initial broadband power amplifiers are based on a 10- × 175-µm HEMT at a bias of 28 V and 180 mA. This size HEMT had an optimal match of about 50 Ω in parallel with –0.54 pF in capacitance at 28 V. Since a negative reactance can only be matched over a limited band, an initial design was performed of an ideal double-tuned Q bandpass match for broadband operation centered around 4 GHz, with a goal of achieving at least an octave of bandwidth (2-way). A schematic of the ideal load as a resistor in parallel with a capacitor and the ideal double-tuned output matching circuit is shown in Fig. 1. The simulation from 2 to 9 GHz of the ideal load (blue S11 trace) and ideal bandpass match (magenta S11 trace) is shown in the Smith Chart plot (Fig. 2).


Fig. 1 Microwave Office (MWO) schematic for ideal power load and match (10- × 175-µm HEMT, 28 V, 100 mA/mm)

Fig. 2 MWO simulation of ideal power load and match (10- × 175-µm HEMT, 2 to 9 GHz)

After an ideal lumped element output match was designed, the capacitors and inductors were replaced with monolithic microwave integrated circuit (MMIC) elements from the Qorvo GaN25 design library and returned to achieve a broadband match. Then microstrip bends, tees, and decoupling elements for the DC bias were added to complete a layout of the MMIC output match (Fig. 3). A simulation of the output match (Fig. 4) shows better than 20-dB return loss from 2.7 GHz to above 6.6 GHz (blue trace) versus the ideal lumped element double-tuned match with slightly less bandwidth (magenta trace) but excellent match mid-band. Note the relatively high insertion loss (1.0 dB) at 2.7 GHz versus 0.54 dB of insertion loss at 4.7 GHz for the lossy MMIC output match.

CAPID=C1C=CP pF

RESID=R1R=RP Ohm

PORTP=1Z=50 Ohm

RP=87.5ohm/mm

CP=-0.31pF/mm

For 1.75mm, RP=50ohms, CP=0.54pf

CP = 0.31 * sizesize=1.75

RP = 87.5 / size

CAPID=C1C=CP1 pF

RESID=R1R=RP Ohm

INDID=L1L=LP1 nH

CAPID=C2C=Cser2 pF

INDID=L2L=Lser2 nH

INDID=L3L=LP1 nH

CAPID=C3C=CP1 pF

PORTP=1Z=50 Ohm

PORTP=2Z=50 Ohm

size=1.75

RP = 87.5 / sizeCP = 0.31 * size

At 4.0 GHz, BB Match

LP1=2.9CP1=0.54

Lser2=2.7Cser2=0.59

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OMN 1Swp Max

9GHz

Swp Min2GHz

9 GHzg 1b 1.53388

2 GHzg 1b 0.340863

6.9 GHzg 0.404332b 0.0783436

2.3 GHzg 0.397434b -0.0988397

S(1,1)RP_CPS(1,1)OMN_1_75mm_Idl


Fig. 3 Schematic and MMIC layout of broadband matching circuit (10- × 175-µm HEMT)

Fig. 4 MWO simulation of ideal (magenta) and MMIC output match (blue)

Comparing the impedance match of the ideal lumped element output match (solid lines) to the lossy MMIC output match (dotted lines) over frequency to the ideal 50- Ω impedance (left axis) and –0.54-pf capacitance (right axis) shows reasonable

CAPID=C1C=CP1 pF

RESID=R1R=RP Ohm

INDID=L1L=LP1 nH

CAPID=C2C=Cser2 pF

INDID=L2L=Lser2 nH

INDID=L3L=LP1 nH

CAPID=C3C=CP1 pF

TFCID=V2W=30 umL=30 umT=0.2 umER=6.78RHO=0TAND=0


MLINID=TL5W=w50 umL=250 umMSUB=SUB_4m

1 2

3

MTEEID=TL7W1=w50 umW2=10 umW3=10 umMSUB=SUB_4m


MRINDSB3ID=MSP4NS=17L1=230 umL2=215 umL3=215 umLN=25 umAB=180W=10 umS=9 umWB=10 umHB=2 umLB=0 umEPSB=1TDB=0TB=1 umRhoB=1MSUB=SUB_4m



1 2

3

MTEEID=TL1W1=w50 umW2=w50 umW3=10 umMSUB=SUB_4m

1 2

3

MTEEID=TL2W1=54 umW2=w50 umW3=30 umMSUB=SUB_4m

MLINID=TL3W=10 umL=20 umMSUB=SUB_4m

MLINID=TL4W=w50 umL=10 umMSUB=SUB_4m




1

SUBCKTID=S2NET="Svia1"

1

SUBCKTID=S1NET="BondPad1"

1


1


PORTP=1Z=50 Ohm

size=1.2

RP = 60 / sizeCP = 0.25 * size


LP1=4.2CP1=0.3

Lser2=1.5Cser2=0.832

Zout = 42.35 - j * 18

w50=92

2 3 4 5 6 7 8 9Frequency (GHz)

OMN_idl_MMIC

-40

-30

-20

-10

0

-4

-3

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-1

0

4.7 GHz-0.5383 dB

6.6 GHz-0.6886 dB

2.7 GHz-1.015 dB

5.56 GHz-20 dB

2.82 GHz-20 dB

6.6 GHz-20 dB2.7 GHz

-20 dB DB(|S(1,1)|) (L)OMN_1_75mm_IdlDB(|S(2,1)|) (L)OMN_1_75mm_IdlDB(|S(1,1)|) (L)OMN_1_75mm_lay2DB(|S(2,1)|) (R)OMN_1_75mm_lay2

dB


broadband performance (Fig. 5). The ideal output match is close to the ideal 50-Ω load line of a 1.2-mm HEMT from 3.2 to 4.8 GHz, while the MMIC output match under-shoots the real part of the impedance and stays close to 43 Ω over a broader range of 3.1 to 5.7 GHz. The compromise of a lower load line impedance to achieve broader band gain will likely skew the output power and efficiency to lower voltages than 28 V, while the original ideal match had good performance from 28 to 35 V. Since an ideal reactance equivalent to a –0.54-pF capacitance can only be maintained over a finite bandwidth, the output matching circuits can be seen as matching well over the band, diverging at the low and high end of the frequency range (3 and 6 GHz). Resistances (left axis) in the plot are represented by shades of red and magenta, while capacitances (right axis) are represented by shades of blue.

Fig. 5 Broadband impedance of output match ideal (solid) vs. MMIC (dotted) (50 Ω || –0.54 pF)

Further determination of the optimal output impedance was performed using the nonlinear HEMT model biased at 28 and 35 V, with a load pull simulation to generate power and power-added efficiency (PAE) contours at 4 GHz (Figs. 6 and 7). At 35-V DC bias, an ideal output match equivalent to 50 Ω in parallel with –0.54 pF simulates as more than 13 W (41.2 dBm) with better than 63% PAE. Even at 28 V, better than 11 W (40.5 dBm) with 66% PAE is shown by a simulation of an ideal output match equivalent to 41 Ω in parallel with –0.48 pF. A compromise of a conjugate match of 50 Ω in parallel with 0.54 pF of capacitance was chosen as the optimal load for 28- to 35-V operation at C-band (4-GHz center).

1 2 3 4 5 6 7 8 9Frequency (GHz)

OMN_RES_CAP 1

35

40

45

50

55

-0.8

-0.6

-0.4

-0.2

0

4 GHz-0.5503 pF

4 GHz43.22 Ohm

3 GHz-0.5723 pF

6 GHz-0.5356 pF

3 GHz47.21 Ohm 6 GHz

48.3 Ohm

4 GHz50.01 Ohm

R_PRC(1) (L, Ohm)OMN_1_75mm_IdlC_PRC(1) (R, pF)OMN_1_75mm_IdlR_PRC(1) (L, Ohm)OMN_1_75mm_lay2C_PRC(1) (R, pF)OMN_1_75mm_lay2

Ω

pF


Fig. 6 1.75-mm HEMT load pull simulation 4 GHz, 28 V, 29.5 dBm input max pout 40.5 dBm: (41 Ω || –0.48pF); max PAE 66%: (64 Ω || –0.70 pF)

Fig. 7 1.75-mm HEMT load pull simulation 4 GHz, 35 V, 29.5 dBm input max pout 41.2 dBm: (50 Ω || –0.54 pF); max PAE 68%: (100 Ω || –0.66 pF)

Once the output match for the broadband power amplifier is designed, the s-parameters of the 10- × 175-µm (1.75-mm) HEMT are generated at the nominal bias of 30 V and 180 mA (100 mA/mm). Small signal stability was analyzed and achieved with a series resistor (2 Ω) on the gate of the HEMT (Fig. 8). Figure 9 shows that the source stability circles are all outside the Smith Chart, indicating unconditional stability. After stabilizing the 1.75-mm HEMT, the input impedance at mid-band (4 GHz) was simulated, resulting in a higher Q matching impedance

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LP_Pout_28V_4GSwp Max

150

Swp Min0

p12p11

p10p9

p8p7 p6 p5

p4

p3

p2

p1

40.48g 1.19085b -0.593012

Pcomp_PORT_2_1_M_DB

Pcomp_PORT_2_1_M_DB Max

Converged Points

p1: Pcomp_PORT_2_1_M_DB = 29.78p2: Pcomp_PORT_2_1_M_DB = 30.85p3: Pcomp_PORT_2_1_M_DB = 31.92p4: Pcomp_PORT_2_1_M_DB = 32.99p5: Pcomp_PORT_2_1_M_DB = 34.06p6: Pcomp_PORT_2_1_M_DB = 35.13p7: Pcomp_PORT_2_1_M_DB = 36.2p8: Pcomp_PORT_2_1_M_DB = 37.27p9: Pcomp_PORT_2_1_M_DB = 38.34p10: Pcomp_PORT_2_1_M_DB = 39.41p11: Pcomp_PORT_2_1_M_DB = 40.48p12: Pcomp_PORT_2_1_M_DB = 40.517

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LP_PAE_28V_4GSwp Max

150

Swp Min0

p12p11

p10p9p8 p7 p6 p5

p4

p3

p2

p1

66.144g 0.778436b -0.882362

PAE_PORT_1_PORT_2 PAE_PORT_1_PORT_2 Max Converged Points

p1: PAE_PORT_1_PORT_2 = 1.33p2: PAE_PORT_1_PORT_2 = 7.77p3: PAE_PORT_1_PORT_2 = 14.21p4: PAE_PORT_1_PORT_2 = 20.65p5: PAE_PORT_1_PORT_2 = 27.09p6: PAE_PORT_1_PORT_2 = 33.53p7: PAE_PORT_1_PORT_2 = 39.97p8: PAE_PORT_1_PORT_2 = 46.41p9: PAE_PORT_1_PORT_2 = 52.85p10: PAE_PORT_1_PORT_2 = 59.29p11: PAE_PORT_1_PORT_2 = 65.73p12: PAE_PORT_1_PORT_2 = 66.144

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-0.2

0.4

0.4

-0.4

0.6

0.6

-0.6

0.8

0.8

-0.8

LP_Pout_35V_4GSwp Max

150

Swp Min0

p10

p9p8p7p6p5p4

p3

p2

p1

41.2g 0.992229b -0.672845

Pcomp_PORT_2_1_M_DB Pcomp_PORT_2_1_M_DB Max Converged Points

p1: Pcomp_PORT_2_1_M_DB = 26.53p2: Pcomp_PORT_2_1_M_DB = 28.16p3: Pcomp_PORT_2_1_M_DB = 29.79p4: Pcomp_PORT_2_1_M_DB = 31.42p5: Pcomp_PORT_2_1_M_DB = 33.05p6: Pcomp_PORT_2_1_M_DB = 34.68p7: Pcomp_PORT_2_1_M_DB = 36.31p8: Pcomp_PORT_2_1_M_DB = 37.94p9: Pcomp_PORT_2_1_M_DB = 39.57p10: Pcomp_PORT_2_1_M_DB = 41.2

01.0-1.0

1.0

10.0

-10.0

10.0

5.0

-5.0

5.0

2.0

-2.02.0

3.0

-3.0

3.0

4.0

-4.0

4.0

0.2

-0.2

0.2

0.4

-0.4

0.4

0.6

-0.60.6

0.8

-0.80.8

0 1.0

1.0

-1.0

10.0

10.0

-10.0

5.0

5.0

-5.0

2.0

2.0

-2.0

3.0

3.0

-3.0

4.0

4.0

-4.0

0.2

0.2

-0.2

0.4

0.4

-0.4

0.6

0.6

-0.6

0.8

0.8

-0.8

LP_PAE_35V_4GSwp Max

150

Swp Min-4.4

p12p11p10p9p8 p7p6p5p4p3

p2

p168.177g 0.501315b -0.831394

PAE_PORT_1_PORT_2 PAE_PORT_1_PORT_2 Max Converged Points

p1: PAE_PORT_1_PORT_2 = -4.4p2: PAE_PORT_1_PORT_2 = 2.37p3: PAE_PORT_1_PORT_2 = 9.14p4: PAE_PORT_1_PORT_2 = 15.91p5: PAE_PORT_1_PORT_2 = 22.68p6: PAE_PORT_1_PORT_2 = 29.45p7: PAE_PORT_1_PORT_2 = 36.22p8: PAE_PORT_1_PORT_2 = 42.99p9: PAE_PORT_1_PORT_2 = 49.76p10: PAE_PORT_1_PORT_2 = 56.53p11: PAE_PORT_1_PORT_2 = 63.3p12: PAE_PORT_1_PORT_2 = 68.177


(Q = 2) than the output, making it more difficult to broadband match the power amplifier input. An initial ideal input match provided better than 10-dB return loss from 3 to 7 GHz. A preliminary ideal lumped element input matching circuit provided good amplifier performance from 3 to 7 GHz (Fig. 10).

Fig. 8 MWO S-parameter simulation of 10- × 175-µm (1.2-mm) GaN HEMT (28 V and 180 mA)

Fig. 9 Stabilizing resistors added to 10- × 175-µm GaN HEMT (28 V) plus broadband output match

PORTP=2Z=50 Ohm

PORTP=1Z=50 Ohm

RESID=R2R=Rser Ohm

1

2

3MI25GaN_FET2R2ID=5050_10x150_1VDS=30VIDS=100 mA/mmWu=175 umN=10VIA=No Share

0 2 4 6 8 10 12 14 16 18 20Frequency (GHz)

HEMT_S2P

-20

-10

0

10

20

30

0

1

2

3

4

5

3 GHz0.9867

4 GHz20.55 dB

4 GHz13.83 dB

DB(|S(1,1)|) (L)HEMT_Stable



MU2() (R)HEMT_Stable

DB(MSG()) (L)HEMT_Stable

DB(GMax()) (L)HEMT_Stable

01.0-1.0

1.0

10.0

-10.0

10.0

5.0

-5.0

5.0

2.0

-2.02.0

3.0

-3.0

3.0

4.0

-4.0

4.0

0.2

-0.2

0.2

0.4

-0.4

0.4

0.6

-0.60.6

0.8

-0.80.8

IMN 1Swp Max

20GHz

Swp Min0.1GHz

p37p36p35p34p33p32p31p30p29p28p27p26p25p24p23p22p21p20p19p18p17 p6p5

p4

4 GHzr 0.115084x -0.221945

S(1,1)PA_1_75mm_LinS(1,1)HEMT_StableS(1,1)HEMT_Stable_GaN25S(1,1)IMN_1_2mm_tlt_Idl2SCIR1()PA_1_75mm_Lin

p1: Freq = 0.1 GHzStability = 1









p10: Freq = 1 GHzStability = 1



























































































0 2 4 6 8 10 12Frequency (GHz)

amp_PA_1_75mm

-20

-15

-10

-5

0

5

10

15

20

0

0.25

0.5

0.75

1

1.25

1.5

1.75

2DB(|S(1,1)|) (L)PA_1_75mm_LinDB(|S(2,1)|) (L)PA_1_75mm_LinDB(|S(2,2)|) (L)PA_1_75mm_Lin

MU1() (R)PA_1_75mm_LinMU2() (R)PA_1_75mm_LinDB(GA()) (L)PA_1_75mm_Lin

dB


Fig. 10 Ideal input match for 3- to 7-GHz, 1.75-mm GaN HEMT (28 V) power amplifier

A preliminary input match including DC bias input for the gate is shown in Fig. 11. A pseudo layout of the full one-stage 4- to 5-W, 2- to 8-GHz power amplifier is shown in Fig. 12. The resulting single-stage amplifier performance is shown in Fig. 13, with a good gain of 19.1 dB at 3 GHz, dropping to 12.2 dB at 7 GHz.

Fig. 11 Broadband MMIC input match for 3- to 7-GHz, 1.75-mm GaN HEMT power amplifier

PORTP=1Z=50 Ohm

INDID=L7L=0.24 nHCAP

ID=C4C=1.6 pF

INDID=L2L=0.195 nH

INDID=L3L=0.47 nH

INDID=L1L=1.85 nH

CAPID=C1C=1.4 pF


amp_PA_1_75mm

-20

-15

-10

-5

0

5

10

15

20

0

0.25

0.5

0.75

1

1.25

1.5

1.75

2

7 GHz-19 dB

7 GHz12.4 dB

3 GHz19.2 dB DB(|S(1,1)|) (L)

PA_1_75mm_LinDB(|S(2,1)|) (L)PA_1_75mm_LinDB(|S(2,2)|) (L)PA_1_75mm_Lin


CAPID=C1C=1.4 pF

CAPID=C3C=1.6 pF

INDID=L3L=1.85 nH

INDID=L4L=0.195 nH

INDID=L5L=0.68 nH

INDID=L7L=0.24 nH

3MI25GaN_TFRID=TaN_1W=5 umL=50 umR=548.2 OhmMSUB=LT7_M0_M1_M2Imax=4.5 mA

1

2

TQTX_3MI25GaN_COVID=COV_1200_1W=120 umL=120 umC=16.69 pFWIN=20 umWOUT=20 umMSUB=LT7_M0_M1_M2 1 2

3MI25GaN_Pad_RFID=TQ_BP_1W=100 umL=100 umWIN=20 umTD=BPMSUB=LT7_M0_M1_M2

MLINID=TL19W=10 umL=275 umMSUB=LT7_M0_M1_M2



3MI25GaN_CAP_HFID=CAP_1200_1W=40 umL=36 umC=1.728 pFWIN=95 umWOUT=10 umMSUB=LT7_M0_M1_M2



3MI25GaN_VIA100LID=TQ_Via_1WIN=25 umLIN=0 umMSUB=LT7_M0_M1_M2


MRINDSB3ID=MSP3NS=13L1=200 umL2=155 umL3=195 umLN=25 umAB=180W=10 umS=10 umWB=10 umHB=2 umLB=0 umEPSB=1TDB=0TB=1 umRhoB=1MSUB=LT7_M0_M1_M2

1 2

3

MTEEID=TL4W1=94 umW2=40 umW3=10 umMSUB=LT7_M0_M1_M2 12

3

MTEEID=TL5W1=10 umW2=40 umW3=40 umMSUB=LT7_M0_M1_M2


3MI25GaN_VIA100LID=TQ_Via_2WIN=25 umLIN=0 umMSUB=LT7_M0_M1_M2



12

3

MTEEID=TL7W1=10 umW2=10 umW3=10 umMSUB=LT7_M0_M1_M2




MTRACE2ID=X1W=10 umL=358.5 umBType=2M=1MSUB=LT7_M0_M1_M2


PORTP=1Z=50 Ohm

PORTP=2Z=Zin Ohm

Zin = 5.75 - j * 11.1

Zin = 5.75 - j * (1/(3.14159* 2 * 3.58e-12 * _FREQ))

dB


Fig. 12 Preliminary layout of 8- to 10-W broadband (3–7 GHz) 1.75-mm GaN HEMT power amplifier

Fig. 13 Small signal simulation of 8- to 10-W broadband (3–7 GHz) 1.75-mm GaN HEMT power amplifier


amp_PA_1_75mm

-20

-15

-10

-5

0

5

10

15

20

0

0.25

0.5

0.75

1

1.25

1.5

1.75

2

2.4 GHz-15.7 dB

2.5 GHz-16.3 dB

7 GHz-13.6 dB7 GHz

12.2 dB

3 GHz19.1 dB DB(|S(1,1)|) (L)

PA_1_75mm_LinDB(|S(2,1)|) (L)PA_1_75mm_LinDB(|S(2,2)|) (L)PA_1_75mm_Lin


dB


With a layout and MWO simulations for a stable broadband power amplifier from 3 to 7 GHz based on a 1.75-mm GaN HEMT, the next step was to perform nonlinear simulations. A dynamic load line simulation at the center frequency of 4 GHz for the one-stage power amplifier at nominal DC bias (28 V) is shown in Fig. 14. Performance simulations for PAE and output power for the ideal matching circuits over the frequency range of 3 to 5 GHz are shown in Fig. 15, with plots in Fig. 16 showing simulations with lossy MMIC matching circuits over the broader frequency range of 3 to 6 GHz.

Fig. 14 AWR MWO dynamic load line simulation of 1.75-mm HEMT power amplifier (4 GHz, 28 V/180 mA)

0 10 20 30 40 50 60Voltage (V)

DCIV_HEMT 1

0100200300400500600700800900

1000110012001300

p44p43p42p41p35p34p33p32p31p30p29p28p27p26p25p24p23p22p21p20p19p18p17

p15p14p13p12p11p10p9p8p7p6p5p4p3p2p1

35 V210.8 mA

28 V211 mA

1.722 V1200 mA

IVCurve() (mA)DCIV_HEMT.AP_DC

IVDLL(TQTX_3MI25GaN_FET2B_NL.5050_10x150_2P1@2,TQTX_3MI25GaN_FET2B_NL.5050_10x150_2P1@2)[3,*] (mA)PA_POUT_lay_4G.AP_HB

IVDLL(TQTX_3MI25GaN_FET2B_NL.5050_10x150_2P1@2,TQTX_3MI25GaN_FET2B_NL.5050_10x150_2P1@2)[*] (mA)GaN10x175_LP.AP_HB

p1: Vstep = -3 V p2: Vstep = -2.75 V p3: Vstep = -2.5 V p4: Vstep = -2.25 V



p13: Vstep = 0 V p14: Vstep = 0.25 V p15: Vstep = 0.5 V p16: Freq = 4 GHz

p17: Freq = 4 GHzPwr = 0 dBm
































Fig. 15 MWO performance simulation of ideal (3–5 GHz, 28 V/180 mA) 1.75-mm HEMT power amplifier

Fig. 16 MWO performance simulations of MMIC (3–6 GHz, 28 V/180 mA) 1.75-mm HEMT power amplifier

0 1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930Power (dBm)

Pcomp_Idl 1

05

101520253035404550556065 p11

p10p9p8p7p6

p5p4p3p2p1

25 dBm62.37

27 dBm64.87

25 dBm14.51 dB

25 dBm39.51 dBm

28 dBm12.36 dB

0 dBm19.36 dBm

28 dBm40.36 dBm

DB(|Pcomp(PORT_2,1)|)[*,X] (dBm)PA_POUT_Idl_4G.AP_HB

PAE(PORT_1,PORT_2)[*,X]PA_POUT_Idl_4G.AP_HB

DB(PGain(PORT_1,PORT_2))[*,X]PA_POUT_Idl_4G.AP_HB

p1: Freq = 3 GHz p2: Freq = 3.5 GHz p3: Freq = 4 GHz

p4: Freq = 4.5 GHz p5: Freq = 5 GHz p6: Freq = 3 GHz

p7: Freq = 3.5 GHz p8: Freq = 4 GHz p9: Freq = 4.5 GHz

p10: Freq = 5 GHz p11: Freq = 3 GHz p12: Freq = 3.5 GHz


0 1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930Power (dBm)

Pcomp_lay1

05

1015202530354045505560

p21p20p19p18p17p16p15

p14p13p12p11p10p9p8

p7p6p5p4p3p2p1

28.96 dBm55.11

0 dBm19.15 dB

28 dBm39.47 dBm

28 dBm11.47 dB

28 dBm52.51DB(|Pcomp(PORT_2,1)|)[*,X] (dBm)

PA_POUT_lay_4G.AP_HBPAE(PORT_1,PORT_2)[*,X]PA_POUT_lay_4G.AP_HBDB(PGain(PORT_1,PORT_2))[*,X]PA_POUT_lay_4G.AP_HB

p1: Freq = 3 GHz p2: Freq = 3.5 GHzp3: Freq = 4 GHz p4: Freq = 4.5 GHzp5: Freq = 5 GHz p6: Freq = 5.5 GHzp7: Freq = 6 GHz p8: Freq = 3 GHzp9: Freq = 3.5 GHz p10: Freq = 4 GHzp11: Freq = 4.5 GHz p12: Freq = 5 GHzp13: Freq = 5.5 GHz p14: Freq = 6 GHzp15: Freq = 3 GHz p16: Freq = 3.5 GHzp17: Freq = 4 GHz p18: Freq = 4.5 GHzp19: Freq = 5 GHz p20: Freq = 5.5 GHzp21: Freq = 6 GHz


3. Axiem Electromagnetic Simulations of Broadband Power Amplifier Layout

Analytical models for MMIC elements were used here for the initial design; however, another time-consuming but very useful simulation and verification of the physical layout uses an electromagnetic (EM) simulator such as AWR’s Axiem EM simulator. Descriptions of the process layers, metal thicknesses, dielectric constant, losses, and so on, are included in the Qorvo PDK for the GaN process. Once design rule checks are complete, the layouts of the input and output matching circuits are imported into an Axiem simulation. The EM simulation can model unexpected coupling in the physical layout that was not included in the analytical simulations, and it models the true physical connectivity of the 3-D interconnect potentially locating unintended short or open circuits. The EM simulation provides both a DC and RF verification of the layout. Layout versus schematic checking can often verify DC connectivity but may only identify inductors as a DC connection, possibly missing errors such as a shorted metal overpass and underpass in a spiral inductor. EM simulations are essential at higher frequencies, and even at these lower C-band frequencies the impact on performance indicated by the Axiem EM simulations of the layouts was apparent. While Axiem can simulate DC (zero frequency) to verify proper RF and bias decoupling, an initial schematic (Fig. 17) for simulating the power amplifier used ideal elements for the DC supplies, combined with s-parameters results from the Axiem EM simulations of the input and the output matching circuits (Fig. 18). Performance simulations for PAE and output power using Axiem EM simulations of the matching circuits in place of the original analytical MMIC simulations are shown in Fig. 19 over the frequency range of 3 to 6 GHz. Output power, efficiency (PAE), and gain are slightly less in comparison to the original performance simulation of the layout from Fig. 16.


Fig. 17 Schematic of broadband amplifier with Axiem EM matching circuit simulations (ideal DC bias)

Fig. 18 Axiem 3-D EM node mesh of input (left) and output (right) matching circuits

CAPID=C2C=1000 pF

CAPID=C6C=1000 pF

DCVSID=V1V=-2.5 V

DCVSID=V4V=28 V

INDID=L1L=1000 nH

INDID=L2L=1000 nH

RESID=R2R=Rser Ohm

V_PROBEID=VDD1

V_PROBEID=VGG1

1

2

QORVO_QGAN25_E_FET2_NL_1EID=5050_10x150_2P1Wu=175 umN=10Temp=_TEMP DegKQORVO_QGAN25_E_FET_NL_1E_MB=5050_8x150_MB

1 2

3

SUBCKTID=S1NET="EM_PA_1_75mm_IMN"

1 2

3

SUBCKTID=S2NET="EM_PA_1_75mm_OMN"

PORT_PS1P=1Z=50 OhmPStart=0 dBmPStop=30 dBmPStep=1 dB

PORTP=2Z=50 Ohm

Rser=2

Rshnt=400


Fig. 19 Axiem (EM) performance simulations of MMIC (3–6 GHz, 28 V/180 mA) 1.75-mm HEMT power amplifier

4. A 2-Stage Broadband Power Amplifier Design

A driver stage for a 2-stage amplifier was needed to increase the overall gain and to flatten the gain slope, which has the typical roll-off of III/V HEMTs. The simplest, quickest design was a feedback amplifier with additional interstage matching elements to flatten the gain slope without sacrificing power and efficiency due to modifying the previously optimized final stage output match. Trying to flatten the gain by modifying the output match to the 1.75-mm HEMT would sacrifice power performance. Given more time, designing a driver stage using an approach similar to the output stage design but with additional margin to ensure that the output stage compresses well before the driver stage may have yielded better efficiency. However, the feedback amplifier was a compact layout and would only increase the overall size of the 2-stage amplifier by a moderate amount. A simple shunt inductor/ series capacitor between the feedback amplifier and the original 1-stage power amplifier provided a simple low-pass filter to flatten the overall 2-stage amplifier gain. Since the feedback amplifier was small, it should easily fit on the reticle as a stand-alone test circuit. If there is sufficient room on the reticle, it would be nice to have the 1-stage power amplifier as a stand-alone circuit, but likely there is only room for the 2-stage amplifier.

0 1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930Power (dBm)

Pcomp_lay1_Ax

05

1015202530354045505560

p15p14

p13

p12

p11

p10

p2

p9p8p7p6p5p4

p1

p21p20p19p18p17p16

p3

0 dBm18.14 dBFreq = 4 GHz

25 dBm12.54 dBFreq = 5.5 GHz

25 dBm37.72 dBmFreq = 5 GHz

25 dBm43.84Freq = 5.5 GHz

DB(|Pcomp(PORT_2,1)|)[*,X] (dBm)PA_Pout_Lay_G2_Axiem.AP_HBPAE(PORT_1,PORT_2)[*,X]PA_Pout_Lay_G2_Axiem.AP_HBDB(PGain(PORT_1,PORT_2))[*,X]PA_Pout_Lay_G2_Axiem.AP_HB









The simple driver amplifier and 2-element low-pass matching circuit (Fig. 20) provided additional gain while also flattening the gain slope without having to modify the output match, which would compromise power and efficiency. After tuning the feedback amplifier and low-pass output match, the 2-stage amplifier gain is above 23 dB from 3 to 7 GHz, and the gain variation from 4 to 7 GHz is less than 1 dB (Fig. 21). Next, nonlinear simulations were performed to ensure that the driver stage was sufficiently capable of providing enough input power to the output stage to maintain good overall efficiency. Initially, an ideal 4- × 125-µm (0.5-mm) HEMT driver amplifier with a 600-Ω feedback resistor provided good performance for the 2-stage amplifier. Simulations of the feedback resistor and driver-stage amplifier over a range of 4- × 75-µm HEMT up to 4 × 125 µm was performed to try and optimize the overall gain, output power, and efficiency (PAE) of the 2-stage power amplifier. Best efficiencies were achieved with a 4- × 110-µm HEMT feedback amplifier (R = 600 Ω, L = 2.2 nH, C = 0.35 pf) with a saturated power up to 10 W at 28 V Vdd (Fig. 22).

Fig. 20 Simple schematic of broadband driver amplifier with output low-pass circuit

WF=125Rfdb=500

PORTP=1Z=50 Ohm

CAPID=C2C=0.3 pF

CAPID=C5C=4 pF

INDID=L4L=3 nH

RESID=R2R=Rfdb Ohm

1

2

3MI25GaN_FET2R2ID=4040_4x75_1VDS=15VIDS=100 mA/mmWu=WF umN=4VIA=No Share


Fig. 21 Initial simulations of 2-stage amplifier (solid) vs. 1-stage power amplifier (dotted)

Fig. 22 Ideal feedback driver amplifier (4 × 110 µm, 600 Ω, L = 2.2 nH, C = 0.35 pf) 2-stage performance (3–6 GHz, 28 V) 1.75-mm HEMT power amplifier


amp_PA_1_75mm

-20

-15

-10

-5

0

5

10

15

20

25

30

0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

24 GHz24.4 dB 6 GHz

23.6 dB

3 GHz18.3 dB

6 GHz13.4 dB

DB(|S(1,1)|) (L)PA_1_75mm_Lin_2stgDB(|S(2,1)|) (L)PA_1_75mm_Lin_2stgDB(|S(2,2)|) (L)PA_1_75mm_Lin_2stgMU1() (R)PA_1_75mm_LinMU1() (R)PA_1_75mm_Lin_2stg

DB(|S(2,1)|) (L)PA_1_75mm_LinDB(|S(2,1)|) (L)PA_1_75mm_AxDB(|S(1,1)|) (L)PA_1_75mm_AxDB(|S(2,2)|) (L)PA_1_75mm_Ax

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20Power (dBm)

Pcomp_lay1_2stg

0

5

10

15

20

25

30

35

40

45

50p21p20p19p18p17p16

p15

p14p13p12p11p10p9p8

p7p6p5p4p3p2p1

18.91 dBm47.76

19 dBm21.14 dB

19 dBm40.14 dBmDB(|Pcomp(PORT_2,1)|)[*,X] (dBm)

PA_POUT_lay_4G_2stg.AP_HBPAE(PORT_1,PORT_2)[*,X]PA_POUT_lay_4G_2stg.AP_HBDB(PGain(PORT_1,PORT_2))[*,X]PA_POUT_lay_4G_2stg.AP_HB



Initially, an attempt was made to absorb the shunt inductor/series capacitor at the output of the driver stage into the shunt inductor/series capacitor at the input match of the 1.75-mm output stage, but there was insufficient impedance transformation ratio without the additional 2 matching elements. Fortunately, these 2 elements added to the new interstage match did not take up much area, and they provided DC access to the drain of the first-stage HEMT.

As a 1-stage amplifier, nonlinear performance simulations verified that a 4- × 110-µm HEMT should be able to provide sufficient input drive to the output stage without premature compression (Fig. 23). Efficiencies are less than half the output stage, but the 0.44-mm HEMT first-stage driver amplifier is compact, simple, and has an overall efficiency dominated by the larger 1.75-mm second-stage HEMT. The driver stage adds about 25% to the width of the 2-stage layout (Fig. 24) compared to the single-stage layout of Fig. 12.

Fig. 23 Feedback driver amplifier (4 × 110 µm, 525 Ω) single-stage performance (3–6 GHz, 28 V/44 mA)

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24Power (dBm)

Pcomp_lay1_1stg

0

5

10

15

20

25

30

35

p21p20p19p18p17p16

p15

p14p13p12p11p10p9p8

p7p6p5p4p3p2p1

19 dBm15.42

19 dBm28.4 dBm

19 dBm8.743 dB

23 dBm7.483 dB

23 dBm30.48 dBm

23 dBm19.01

DB(|Pcomp(PORT_2,1)|)[*,X] (dBm)PA_POUT_lay_BBfdbk_1stg.AP_HBPAE(PORT_1,PORT_2)[*,X]PA_POUT_lay_BBfdbk_1stg.AP_HBDB(PGain(PORT_1,PORT_2))[*,X]PA_POUT_lay_BBfdbk_1stg.AP_HB



Fig. 24 Initial layout of 8- to 10-W 2-stage (3–7 GHz) 1.75-mm GaN HEMT power amplifier

5. New Models (PDK) and Translation from Gen1 to Gen2

Just as the designs were finalized to pass Gen1 design rule check (DRC), it was decided to switch to the newer Qorvo GaN Gen2 process from the traditional Gen1. It was anticipated that the changes to the device models and layouts would be minor, but translation of the Gen1 designs to Gen2 required more effort than expected. At first, only an Advanced Design System PDK was available for the Gen2 process, while these designs had all been created using MWO. Soon after, a Gen2 PDK was made available for MWO as well, but it required updating to the latest V13 MWO software followed by an additional translation process that was not entirely straightforward. Most, if not all, of the element names and descriptions changed from the Gen1 PDK to Gen2 PDK such that it was no longer as easy to copy schematics from previous MWO design files. While not insurmountable, the layout changes to convert Gen1 layouts to Gen2 were significant. An early hurdle was not having access to the Gen2 DRC checks. Once that hurdle was solved by Qorvo, progress on translating Gen1 layouts to Gen2 accelerated dramatically.

In addition to verifying the DRC rules from the translation, it was equally important to repeat Axiem EM simulations of the new Gen2 layouts to ensure that vertical 3-D circuit connections were not broken in the translation step. A combination of an extended deadline, partly to allow the Gen1 to Gen2 translation, and additional simulations with Axiem and Gen2 HEMT models led to improvements in the power amplifier matching circuits to restore some of the performance losses between the original simulations and the more accurate Axiem EM and Gen2 HEMT model simulations. The biggest change in restoring performance was in adjusting the


lumped elements of the output matching circuit to match the original MWO analytical simulations. The large shunt inductor that provides DC bias to the output HEMT needed to have wide metal traces to reliably handle the DC current. Originally, the space between this inductor and other elements was about twice the width of the traces in the spiral inductor, which was expected to have minimal coupling, but a large improvement toward restoring the desired output match was made by increasing the space to 3 times the trace width. As seen in the final DRC correct Gen2 layout of the 1-stage power amplifier (Fig. 25) and the same matching circuit in the Gen2 2-stage power amplifier layout (Fig. 26), the design is slightly increased in height and stretched about 100 µm in overall length. The rest of the elements in the matching circuits were stretched up or down in size after EM simulations to match the original analytical models of these elements, both individually and as integrated into final matching circuit layouts. As shown in Fig. 27, the impedance of the Axiem EM simulation of the final Gen2 layout versus the original ideal match and versus the original analytical output match is similar but with a slight undershoot of the impedance and a little more capacitance compensation in the final Axiem EM prediction. More time and effort could allow additional explorations to re-optimize the design to a different tradeoff of output power, bandwidth, efficiency, and gain.

Fig. 25 Final layout of 8- to 10-W Gen2 1-stage (3–7 GHz) 1.75-mm GaN HEMT power amplifier (1.6 × 0.8 mm)


Fig. 26 Final layout of 8- to 10-W Gen2 2-stage (3–7 GHz) 1.75-mm GaN HEMT power amplifier (2.0 × 0.9 mm)

Fig. 27 Broadband impedance of output match ideal (solid) vs. MMIC (dotted) and Axiem EM of final Gen2 layout (dot/dash) (50 Ω || –0.54 pF)

An additional verification using ADS Momentum to EM-simulate the Gen2 layouts with the new PDKs gave extremely similar results to the Axiem EM simulations. Figure 28 shows a comparison of the real and imaginary parts of the admittance for the final Gen2 output match, with the blue solid lines showing the original ideal match (50 Ω || 0.54 pF) versus Axiem (solid magenta) and Momentum (solid brown). Both EM simulations show the output impedance as broader band but lower in impedance (higher conductance) compared to the original ideal lumped element matching circuit.

1 2 3 4 5 6 7 8 9Frequency (GHz)

OMN_RES_CAP 1

30

35

40

45

50

55

-0.8

-0.6

-0.4

-0.2

0

0.2

5 GHz41.56 Ohm

5 GHz43.09 Ohm

4 GHz39.99 Ohm

4 GHz-0.55 pF

4 GHz43.22 Ohm

3 GHz-0.572 pF

6 GHz-0.536 pF

3 GHz47.21 Ohm 6 GHz

48.3 Ohm

4 GHz50.01 Ohm

R_PRC(1) (L, Ohm)OMN_1_75mm_IdlC_PRC(1) (R, pF)OMN_1_75mm_IdlR_PRC(1) (L, Ohm)OMN_1_75mm_lay2C_PRC(1) (R, pF)OMN_1_75mm_lay2R_PRC(1) (L, Ohm)EM_OMN_1_75mm_G2B_EMC_PRC(1) (R, pF)EM_OMN_1_75mm_G2B_EM


Fig. 28 Admittance of output match ideal (blue solid) vs. Axiem (solid magenta) and momentum (solid brown) (50 Ω || –0.54 pF)

6. Final Gen2 Performance Simulations ADS and MWO with Axiem and Momentum

While the design evolved from an ideal MWO design using a Gen1 0.25-µm GaN process to a DRC correct Gen2 layout with full layout EM simulations using both Axiem and Momentum, the performance was reduced from a 10-W ideal single 1.75-mm HEMT power amplifier biased from 28 to 35 V to about an 8-W MMIC power amplifier with broadband performance at 28 V. Load pull simulations of the 1.75-mm HEMT device showed the potential for 10 W over less than 3- to 6-GHz bandwidth at 35 V, while the additional inherent loss of the physical MMIC layout elements and design tradeoffs resulted in something closer to 7–8 W but over a broader 3- to 7-GHz band from a 28-V supply. Following are simulations from 3 to 6 GHz of the performance prediction using the Gen2 HEMT models in MWO V13 and Gen2 HEMT models using ADS2016.

There were some odd “kinks” in the nonlinear Gen2 simulations under certain conditions. It is not currently clear whether this is a realistic physical effect or just an anomaly. Measurements of the fabricated power amplifiers will show the accuracy of these predictions. There does not appear to be a large difference between Gen1 and Gen2 HEMT models, nor between the presumably more accurate EM simulations of the actual layouts using AWR’s Axiem versus Keysight’s Momentum. Figure 29 shows an MWO Schematic that uses simulations of the matching circuits imported from Keysight’s Momentum. Performance simulations using the Gen2 HEMT models with Axiem EM simulations of the matching circuits are shown in Fig. 30 at 28-V bias from 3 to 6 GHz. For comparison, a similar MWO performance using Momentum EM simulations of the matching circuits is shown in Fig. 31. Small signal performance of the final single-stage power amplifier is shown in Fig. 32, predicting about 19-dB gain at 2.6 GHz, dropping to about 15 dB at 7 GHz (28 V,

2 3 4 5 6 7 8 9

Frequency (GHz)

OMN_real_Ax_Mom

0

0.01

0.02

0.03

0.04

4 GHz0.02 S

4.5 GHz0.0245 S

Re(YIN(1)) (S)OMN_1_75mm_Idl

Re(YIN(1)) (S)EM_OMN_1_75mm_G2B_EM

Re(YIN(1)) (S)OMN_1_75MM_LAY2_G2B_EM_Mom

Re(YIN(1)) (S)EM_OMN_1_75mm_1

Re(YIN(1)) (S)OMN_1_75MM_LAY2_G2A_Mom


OMN_imag_Ax_Mom

-0.03

-0.025

-0.02

-0.015

-0.01

-0.005

0

4.5 GHz-0.01615 S

Im(YIN(1)) (S)OMN_1_75mm_IdlIm(YIN(1)) (S)EM_OMN_1_75mm_G2B_EMIm(YIN(1)) (S)OMN_1_75MM_LAY2_G2B_EM_MomIm(YIN(1)) (S)EM_OMN_1_75mm_1Im(YIN(1)) (S)OMN_1_75MM_LAY2_G2A_Mom


180-mA bias). The ADS GAN25_E PDK was used to simulate performance using Gen2 HEMT models and both Axiem and Momentum EM simulations of the final matching circuit layouts. A simple ADS schematic is shown in Fig. 33, which is used to generate the performance simulations with either Axiem EM or Momentum EM simulations of the final circuit layouts. Results using ADS Gen2 HEMT models with Axiem EM at 4.5 GHz (28 V) for the single-stage power amplifier predict 38.5 dBm (7.1 W) and 52% PAE at an input power of 26 dBm as shown in Fig. 34. Results of the nonlinear performance from 3 to 6 GHz of the single-stage power amplifier using ADS Gen2 and Axiem EM are shown in Fig. 35, which is comparable to the MWO Gen2 and Axiem EM performance simulations shown previously in Fig. 30. Similar ADS Gen2 HEMT simulations at 4.5 GHz and over the band 3 to 6 GHz, but with Momentum EM simulations, are shown in Figs. 36 and 37, respectively. The differences between the Axiem and Momentum EM simulations, and between ADS versus MWO with the Gen2 HEMT models, are slight.

Fig. 29 MWO schematic of broadband amplifier with Momentum EM matching circuit simulations

CAPID=C2C=1000 pF

CAPID=C6C=1000 pF

DCVSID=V1V=-2.5 V

DCVSID=V4V=28 V

INDID=L1L=1000 nH

INDID=L2L=1000 nH

RESID=R2R=Rser Ohm

V_PROBEID=VDD1

V_PROBEID=VGG1

1

2

QORVO_QGAN25_E_FET2_NL_1EID=5050_10x150_2P1Wu=175 umN=10Temp=_TEMP DegKQORVO_QGAN25_E_FET_NL_1E_MB=5050_8x150_MB

1 2

3

SUBCKTID=S1NET="IMN_1_75MM_LAY2_G2B_Mom"

1 2

3

SUBCKTID=S2NET="OMN_1_75MM_LAY2_G2B_EM_Mom"

1 2

SUBCKTID=S3NET="R2_W100_Mom"

PORT_PS1P=1Z=50 OhmPStart=0 dBmPStop=30 dBmPStep=1 dB

PORTP=2Z=50 Ohm

Rser=2

Rshnt=400


Fig. 30 Axiem (EM) Gen2 final performance simulations (3–6 GHz, 28 V/180 mA) 1.75-mm HEMT power amplifier

Fig. 31 Momentum (EM) Gen2 final performance simulations (3–6 GHz, 28 V) 1.75-mm HEMT power amplifier

0 1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930Power (dBm)

Pcomp_lay1_Ax

05

1015202530354045505560

p20p16

p15

p11

p8p5p2

p19p14

p13p10

p7

p4p1

p21p18

p17p12

p9p6p3




25 dBm49.91Freq = 5.5 GHzDB(|Pcomp(PORT_2,1)|)[*,X] (dBm)

PA_Pout_Lay_G2_Axiem.AP_HBPAE(PORT_1,PORT_2)[*,X]PA_Pout_Lay_G2_Axiem.AP_HBDB(PGain(PORT_1,PORT_2))[*,X]PA_Pout_Lay_G2_Axiem.AP_HB








0 1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930Power (dBm)

Pcomp_lay1_G2B_mom

05

1015202530354045505560

p15 p14

p13

p12

p11p10

p2

p9 p8p7p6p5p4

p1

p21

p20p19p18p17p16

p3



26 dBm52.64Freq = 6 GHz

DB(|Pcomp(PORT_2,1)|)[*,X] (dBm)PA_Pout_Lay_G2B_Mom.AP_HB

PAE(PORT_1,PORT_2)[*,X]PA_Pout_Lay_G2B_Mom.AP_HB

DB(PGain(PORT_1,PORT_2))[*,X]PA_Pout_Lay_G2B_Mom.AP_HB









Fig. 32 Small signal EM Gen2 final performance simulations (28 V) 1.75-mm HEMT power amplifier

Fig. 33 ADS schematic of broadband amplifier with Momentum EM matching circuit simulations

0 2 4 6 8 10Frequency (GHz)

amp_PA_1_75mm_Mom

-20

-15

-10

-5

0

5

10

15

20

0

0.25

0.5

0.75

1

1.25

1.5

1.75

22.6 GHz19 dB 7 GHz

14.9 dB

DB(|S(1,1)|) (L)PA_Pout_Lay_G2B_Mom_S2P



MU1(1,1) (R)PA_Pout_Lay_G2B_Mom_S2P

MU1(1,1) (R)PA_Pout_Lay_G2_S2P

DB(|S(2,1)|) (L)PA_Pout_Lay_G2_Axiem_S2P

DB(|S(2,1)|) (L)PA_Pout_Lay_G2_S2P



HARMONIC BALANCE

MSub

PAE

OPTIONS

PARAMETER SWEEP

One Tone Harmonic Balance Simulation at one input

frequency and power.

Set these values:

1

21

1

21

43

21

43

21

3

21

2

12

1

1 1 1

112

12

1

1 2 2 1

2121 Vout

MASC_glob_vars_GaN

I_Probe

I_Probe

fb_qgan25_e_5050_10x150_av

ParamSweep

Options

PAE

I_Probe

MSUB

L

V_DC

L

S2P S3PS3P

V_DC

DisplayTemplate

P_1Tone

Term

VARHarmonicBalance

MV

I_InI_Out

GANF1

I_Ids

Sweep1

Options1

PAE1

MSUB_DEFAULT

L2

SRC2

L1

SRC1

SNP3 SNP2SNP1

disptemp1

PORT1

Term1

VAR1HB1

Step=500 MHzStop=6000 MHzStart=3000 MHzSimInstanceName[6]=

VER=v100

UNIT_GW=175 um

SweepVar="RFfreq"

MaxWarnings=25GiveAllWarnings=yesI_RelTol=1e-6V_RelTol=1e-6TopologyCheck=yes

Tnom=25Temp=temp_nom

PAE1=pae(Vout,0,Vin,0,28,0,I_Out.i,I_In.i,I_Ids.i,{1},{1})

SimInstanceName[1]="HB1"SimInstanceName[2]=SimInstanceName[3]=SimInstanceName[4]=SimInstanceName[5]=

Dpeaks=Bbase=Rough=0 um

TanD=gan_tandT=gan_cond_tHu=1.0e+36 umCond=gan_condMur=1

Er=gan_erH=sub_h

R=L=1000 nH

Vdc=28 V

R=L=1000 nH

Vdc=-2.5 V

File="R2_W100_Mom.s2p" File="EM_OMN_1_75mm_G2B_EM.s3p"File="EM_IMN_1_75mm_EM.s3p"

"HB1Tone"

Freq=RFfreqP=dbmtow(RFpower)Z=50 OhmNum=1

Z=ZloadNum=2

Zload=50RFpower=10 _dBmRFfreq=4000 MHz

EquationName[3]="Zload"EquationName[2]="RFpower"

EquationName[1]="RFfreq"UseKrylov=autoOrder[1]=5Freq[1]=RFfreq

VdsVin

Vout


Fig. 34 ADS Gen2 final performance simulations with Axiem (EM) (4.5 GHz, 28 V) 1.75-mm HEMT power amplifier

5 10 15 20 250 30

5

10

15

20

25

30

35

40

45

50

55

0

60

RFpower

(dBm

(Vou

t[::,1

])-R

Fpow

er)

m1

PAE1

m2

dBm

(Vou

t[::,1

])

m3

m1indep(m1)=

plot_vs((dBm(Vout[::,1])-RFpower), RFpower)=12.47326.000

m2indep(m2)=

plot_vs(PAE1, RFpower)=51.94826.000

m3indep(m3)=

plot_vs(dBm(Vout[::,1]), RFpower)=38.47326.000


Fig. 35 ADS Gen2 final performance simulations with Axiem (EM) (3–6 GHz, 28 V) 1.75-mm HEMT power amplifier

5 10 15 20 250 30

5

10

15

20

25

30

35

40

45

50

55

0

60

RFpower

(dB

m(V

out[:

:,1])-

RFp

ower

)

m1

PA

E1

m2

dBm

(Vou

t[::,1

])

m3

m1indep(m1)=

plot_vs((dBm(Vout[::,1])-RFpower), RFpower)=11.737RFfreq=3.000E9

26.000

m2indep(m2)=

plot_vs(PAE1, RFpower)=50.081RFfreq=3.000E9

26.000m3

indep(m3)=plot_vs(dBm(Vout[::,1]), RFpower)=37.737

RFfreq=5.500E9

26.000


Fig. 36 ADS Gen2 final performance simulations with Momentum (4.5 GHz, 28 V) 1.75-mm HEMT power amplifier

5 10 15 20 250 30

5

10

15

20

25

30

35

40

45

50

55

0

60

RFpower

(dBm

(Vou

t[::,1

])-R

Fpow

er)

m2

PAE1

m3

dBm

(Vou

t[::,1

])

m4

m2indep(m2)=


m3indep(m3)=


m4indep(m4)=



Fig. 37 ADS Gen2 final performance simulations with Momentum (3–6 GHz, 28 V) 1.75-mm HEMT power amplifier

An ADS schematic of the 2-stage amplifier with a feedback driver stage is shown in Fig. 38. Performance simulations of the 2-stage amplifier at 4.5 GHz and over the band 3–6 GHz are shown in Figs. 39 and 40. The output power is comparable to the single-stage amplifier but with less input power required (17 dBm) because of the additional gain of the driver stage. Efficiency is less than the single-stage amplifier because of the DC power consumption of the less efficient compact driver stage but is a very good 45% at 4.5 GHz with 38.85-dBm (7.7-W) output power at 17-dBm input drive (28 V, 225 mA). Small signal gain for the 2-stage amplifier using ADS with Axiem EM shows good flat gain with less than 1 dB slope from 4 to 6 GHz (Fig. 41).

5 10 15 20 250 30

5

10

15

20

25

30

35

40

45

50

55

0

60

RFpower

(dB

m(V

out[:

:,1])-

RFp

ower

)

m2

PA

E1

m3

dBm

(Vou

t[::,1

])

m4

m2indep(m2)=


26.000

m3indep(m3)=


26.000m4


RFfreq=3.000E9

26.000


Fig. 38 ADS schematic of 2-stage amplifier with Axiem EM matching circuit simulations

Fig. 39 ADS Gen2 final 2-stage performance simulations with Axiem (4.5 GHz, 28 V) 1.75-mm HEMT

HARMONIC BALANCE

MSub

PAE

OPTIONS

PARAMETER SWEEP

One Tone Harmonic Balance Simulation at one input

frequency and power.

Set these values:

1

21

1

21

43

21

3

21

2

1

2

1

1 1 1

1

12

1

2

1

1 2 2 1

21

21

5

4

3

2121

6

1

2

5

34

1

2

1

2

1

21

Vout

MASC_glob_vars_GaN

I_Probe

I_Probe

fb_qgan25_e_5050_10x150_av

ParamSweep

Options

PAE

I_Probe

MSUB

L

V_DC

L

S2P S3P

V_DC

DisplayTemplate

P_1Tone Term

VARHarmonicBalance

S4Pf_qgan25_e_4040_4x50_avS5P

LL

I_Probe

MV

I_In

I_Out

GANF1

I_Ids

Sweep1

Options1

PAE1

MSUB_DEFAULT

L2

SRC2

L1

SRC1

SNP3 SNP2

disptemp1

PORT1 Term1

VAR1HB1

SNP4GANF2SNP5

L3L4

I_Ids2

Step=500 MHzStop=6000 MHzStart=3000 MHzSimInstanceName[6]=

VER=v100

UNIT_GW=175 um

SweepVar="RFfreq"

MaxWarnings=25GiveAllWarnings=yesI_RelTol=1e-6V_RelTol=1e-6TopologyCheck=yes

Tnom=25Temp=temp_nom

PAE1=pae(Vout,0,Vin,0,28,0,I_Out.i,I_In.i,I_Ids2.i,{1},{1})

SimInstanceName[1]="HB1"SimInstanceName[2]=SimInstanceName[3]=SimInstanceName[4]=SimInstanceName[5]=

Dpeaks=Bbase=Rough=0 um

TanD=gan_tandT=gan_cond_tHu=1.0e+36 umCond=gan_condMur=1

Er=gan_erH=sub_h

R=L=1000 nH

Vdc=28 V

R=L=1000 nH

Vdc=-2.5 V

File="R2_W100_Mom.s2p" File="EM_OMN_1_75mm_G2B_EM.s3p"

"HB1Tone"

Freq=RFfreqP=dbmtow(RFpower)Z=50 OhmNum=1

Z=ZloadNum=2

Zload=50RFpower=10 _dBmRFfreq=4500 MHz

EquationName[3]="Zload"EquationName[2]="RFpower"

EquationName[1]="RFfreq"UseKrylov=autoOrder[1]=5Freq[1]=RFfreq

File="EM_INT_1_75mm.s4p"UNIT_GW=110 umFile="EM_DRV_Amp_0_44mm.s5p"

L=1000 nHR=

L=1000 nHR=

VdsVin

Vout57 nV

28 V

2.54 uV57 nV

28 V

27.9 V

27.9 V

27.9 V-2.5 V 27.9 V2.54 uV

-2.5 V

-2.5 V

-2.5 V-2.5 V

28 V

28 V

28 V

-5.38 uA 212 mA12.7 nA 63.4 mA

212 mA

275 mA

-50.9 nA

1.14 nA-63.4 mA

-212 mA99 nA

5.49 uA

50.9 nA -212 mA -1.14 nA

212 mA616 nA

-5.38 uA 5.38 uA

44.9 pA

-63.4 mA 5.38 uA

-5.49 uA

63.4 mA

-1.02 uA

-50.9 nA

63.4 mA

-99 nA-12.7 nA

-63.4 mA

-891 nA

5.59 uA

-275 mA

1.14 nA

2 4 6 8 10 12 14 16 180 20

5

10

15

20

25

30

35

40

45

0

50

RFpower

(dB

m(V

out[:

:,1])-

RFp

ower

)

m1

PA

E1

m2

dBm

(Vou

t[::,1

])

m3

m1indep(m1)=


m2indep(m2)=


m3indep(m3)=



Fig. 40 ADS Gen2 final 2-stage performance simulations with Axiem (3–6 GHz, 28 V) 1.75-mm HEMT

2 4 6 8 10 12 14 16 180 20

5

10

15

20

25

30

35

40

45

0

50

RFpower

(dB

m(V

out[:

:,1])-

RFp

ower

)

m1

PA

E1

m2

dBm

(Vou

t[::,1

])

m3

m1indep(m1)=


17.000

m2indep(m2)=


17.000m3


RFfreq=3.000E9

17.000


Fig. 41 ADS Gen2 final 2-stage small signal simulations with Axiem (28 V) 1.75-mm HEMT

7. Preliminary Ideal Design for 2 Parallel 1.75-mm HEMT Power Combiner

In addition to the 1.75-mm broadband power amplifier, a 3.5-mm power amplifier was implemented using 2 parallel combined 1.75-mm HEMTs. First, the ideal output match for a single 1.75-mm HEMT was transformed from a 50-Ω output match to 100 Ω so that 2 devices could be easily paralleled into a 50-Ω load. Figure 42 shows the ideal broadband output match from a single 1.75-mm HEMT transformed to a 100-Ω output match, as well as the composite schematic of the 2-way combined output match (Fig. 43). This simple lossless combiner circuit would need to be modified to supply DC bias, which should be relatively easy. The 2-way combiner output matching circuit has the same broadband return loss, with better than 20-dB return loss match to the ideal load from 2.8 to 5.6 GHz (Fig. 44).

1 2 3 4 5 6 7 8 90 10

-15

-10

-5

0

5

10

15

20

25

-20

30

freq, GHz

dB(S

(2,1

))

m1 m2

dB(S

(1,1

))dB

(S(2

,2))

Forward Transmission, dBm1freq=

dB(S(2,1))=26.1724.000GHz

m2freq=

dB(S(2,1))=25.3396.000GHz


Fig. 42 MWO partial schematic for ideal parallel 2-way combiner circuit (10 × 1.75-µm HEMT)

Fig. 43 MWO schematic for ideal parallel 2-way combiner circuit (2–1.75 mm HEMTs)

CAPID=C1C=CP2x pF

RESID=R1R=RP Ohm

CAPID=C2C=Cser2 pF

CAPID=C3C=CP1 pF

INDID=L2L=3.82 nHIND

ID=L3L=LP1 nH

INDID=L1L=10.45 nH

INDID=L4L=9.22 nH

PORTP=1Z=50 Ohm

PORTP=2Z=100 Ohm

size = 1.75

RP = 87.5 / sizeCP = 0.31 * size


LP1=2.9CP1=0.54

Lser2=2.7Cser2=0.59

CP2x=0.27

CAPID=C1C=CP1 pF

CAPID=C2C=Cser2 pF

CAPID=C3C=CP1 pF


ID=L3L=LP1 nH

INDID=L1L=5.225 nH

INDID=L4L=9.22 nH

CAPID=C4C=Cser2 pF

CAPID=C5C=CP1 pF


ID=L6L=LP1 nH

INDID=L7L=9.22 nH

PORTP=1Z=50 Ohm

PORTP=3Z=50 Ohm

PORTP=2Z=50 Ohm

size = 1.75

RP = 87.5 / sizeCP = 0.31 * size


LP1=2.9CP1=0.54

Lser2=2.7Cser2=0.59

CP2x=0.27


CP = 0.31 * sizeRP = 87.5 / size


Fig. 44 Double-tuned ideal load match for parallel 2-way combiner circuit vs. single HEMT

MWO was used to simulate the performance of the broadband power amplifier as a 2-way combined (3.5-mm) HEMT power amplifier using the ideal output matching circuit from Fig. 43. The input of the 2-way combined amplifier was simulated as 2 of the coupled line ideal input matching circuits into a 25-Ω source. An input matching circuit into a 50-Ω source would require a redesign but should not change the gain or bandwidth of the 3.5-mm power amplifier. Output power would be expected to double (+3 dB), with similar efficiency and bandwidth compared with the single 1.75-mm HEMT power amplifier. Figure 45 shows the performance simulation from 3 to 5 GHz of a lossless matched broadband 3.5-mm HEMT single-stage power amplifier.


OMN_2X_idl

-40

-30

-20

-10

0

-4

-3

-2

-1

0

5.56 GHz-20 dB2.82 GHz

-20 dB DB(|S(1,1)|) (L)OMN_1_75mm_Idl

DB(|S(2,1)|) (L)OMN_1_75mm_Idl

DB(|S(2,1)|) (R)OMN_1_75mm_Idl_2X

DB(|S(1,1)|) (L)OMN_1_75mm_Idl_2X

dB


Fig. 45 MWO performance simulation of ideal 2-way combined (3–5 GHz, 28 V/ 360 mA) 3.5-mm HEMT power amplifier

A summary showing performance for the ideal lossless and lossy MMIC 1-stage 1.75-mm HEMT power amplifier at various frequencies, as well as an ideal lossless 2 parallel combined (3.5-mm) HEMT power amplifier, is shown in Table 1. Losses for the MMIC output match were calculated to be about 0.6 dB at mid-band, increasing up to 1 dB loss at the low end of the band (2.7 GHz). Additional losses on the MMIC input match would similarly affect small signal gain and power-added efficiency. Because of the reduced gain with frequency, the input power level at 3 GHz was 24 dBm, at 4 GHz it was 25 dBm, and at 5 GHz it was 27 dBm for the single-stage power amplifiers. This would represent approximately 3- to 4-dB compression for the Class A/B biased power amplifier. For the ideal 3.5-mm power amplifier combining two 1.75-mm HEMTs, the input power level is 3 dB higher, corresponding to 3-dB-higher output power, with the same large signal gain and ideal efficiencies (PAE) as the ideal 1.75-mm power amplifier. Nominal performance for the MMIC 1.75-mm HEMT amplifier is 8.1 W with 54% PAE at 4 GHz with 25 dBm input power. In comparison, the ideal version of the 1.75-mm power amplifier is 8.7 W and 65% PAE with the same 25-dBm input power. As expected, the 2-way combined ideal amplifier has double the output power with similar bandwidth and efficiency, showing 17.4 W and 65% PAE at a comparable 28-dBm input drive level.

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33Power (dBm)

Pcomp_Idl_2X

05

101520253035404550556065 p11

p10p9p8p7p6

p5p4p3p2p1

28 dBm64.55

30 dBm43.19 dBm

30 dBm13.19 dB

DB(|Pcomp(PORT_2,1)|)[*,X] (dBm)PA_POUT_Idl_4G_2X.AP_HB

PAE(PORT_1,PORT_2)[*,X]PA_POUT_Idl_4G_2X.AP_HB

DB(PGain(PORT_1,PORT_2))[*,X]PA_POUT_Idl_4G_2X.AP_HB







Table 1 MWO Gen1 performance simulations of original MMIC, ideal 1.75 mm, and ideal 2-way, 3.5-mm broadband HEMT power amplifiers

Frequency 3 GHz 4 GHz 5 GHz 6 GHz MMIC MWO

Pout PAE 38.3 dBm 39.1 dBm 8.1 W 38.9 dBm 38.2 dBm

50.5% 54% 54.7% 53.9% Ideal PA 1.75-mm

Pout PAE 38.7 dBm 39.4 dBm 8.7 W 39.2 dBm …

60.6% 64.6% 66.7% … Ideal 2-way, 3.5-mm

Pout PAE 41.7 dBm 42.4 dBm 17.4 W 42.2 dBm …

60.6% 64.6% 66.7% …

Later, Axiem EM and Momentum EM simulations were completed on the original amplifier matching circuits, which predicted a drop in the performance. Adjustments were made to the matching circuit layouts, especially the output matching circuit, which dominates the power performance of the amplifier, and a new layout was created to yield similar performance using Axiem and Momentum EM that were comparable to the original analytical MMIC element simulations. Next, the 0.25-µm GaN library was changed from the earlier Gen1 to a newer Gen2 process. Most of the changes in the new Gen2 process involved the design rules, particularly affecting the passive MMIC elements, but there were also small changes to the HEMT nonlinear models. Performance simulations with the newer Gen2 HEMT models were completed with MWO V13 using the latest GAN25_E V1.0.0.1 PDK. Some additional simulations were performed with similar results using ADS2016 with the latest GAN25_E V1.1 PDK. A summary table showing updated performance using Axiem EM simulations of the matching circuits with the updated Gen2 layouts, as well as the updated Gen2 HEMT models, is shown in Table 2. In Table 1, the original GAN25 Gen1 HEMT models using MWO PDK GAN25 V1.0.10.4 were used for simulations. For comparison, Table 2 contains updated performance predictions using the Axiem EM simulations of the updated (Gen2) layout but uses Gen1 nonlinear HEMT models, followed by performance predictions using the newer Gen2 nonlinear HEMT models with the Axiem EM simulations of the original Gen1 layout, and with the updated final Gen2 layout.

Table 2 MWO with Axiem EM and Gen2 performance simulations of new layout MMIC (Gen1 + Axiem), original MMIC (Gen2 + Original MWO), and new layout MMIC (Gen2 + Axiem) HEMT power amplifiers

Frequency 3 GHz 4 GHz 5 GHz 6 GHz Updated MMIC Pout PAE (Gen1/Axiem)

37.9 dBm 38.9 dBm 7.8 W 38.9 dBm 38.1 dBm 47.8% 53.9% 56.6% 57.1%

Original MMIC Pout PAE (Gen2/MWO)

37.7 dBm 38.3 dBm 6.8 W 38.2 dBm 38.4 dBm 46.5% 46.7% 49.3% 53.7%

Updated MMIC Pout PAE (Gen2/Axiem)

37.5 dBm 38.0 dBm 5.8 W 38.2 dBm 38.2 dBm 44.7% 44% 48% 52.6%


Again, to create Table 2, because of the reduced gain with frequency, the input power level for 3 and 4 GHz was 23 dBm, at 5 GHz it was 25 dBm, and at 6 GHz it was 26 dBm for the single-stage power amplifiers (Gen2). This would represent approximately 3- to 4-dB compression for the Class A/B–biased power amplifier. For the updated Gen2 layout, but using the Gen1 nonlinear HEMT model, the single-stage 1.75-mm power amplifier is predicted to have a nominal performance of 7.8 W with 54% PAE at 4 GHz with 26-dBm input power, which is close to the original design performance simulations. Performance using the Gen2 nonlinear model is moderately less, particularly at 4 GHz, but was not much different at 3 and 6 GHz at the band edges compared to the Gen1 HEMT model. It is not clear if the performance change is due to a slight shift in HEMT model parasitics with the Gen2 process or if it is due to a more realistic fit of the nonlinear HEMT model. Using the Gen2 HEMT model with the original analytical MWO models for the matching circuits results in less output power and efficiency at the center frequency of 4 GHz, predicting 6.8 W and 46.7% PAE at an input power of 23 dBm. Adding the Axiem EM simulation of the final updated (Gen2) layout predicts a small loss in performance of 0.3 dB and 3% less PAE at 4 GHz while predicting nearly similar performance between the Axiem EM versus the original analytical MMIC models at 3, 5, and 6 GHz.

8. Gen2 HEMT Re-Simulations

While the original power amplifier designs were based on Gen1 models, the final layouts were to be fabricated in the Gen2 0.25-µm GAN_E process. Some final design re-simulations were performed to evaluate the performance differences with the Gen2 HEMT models. Given additional time, the power amplifier performance could be re-optimized. It appears that, at these frequencies and for this power amplifier design, the differences between the Gen1 and Gen2 simulations are insignificant, probably similar to nominal wafer-to-wafer process variations. Some early ideal simulations indicated powers closer to 10 W, but looking back at the load pull simulations from Figs. 6 and 7, the input power level of 29.5 dBm was probably too high, and the HEMTs were driven well into compression. Also, the initial design was intended as a compromise for a DC bias of 28 to 35 V, where 10 W was possible, ideally at 35 V, but 7.5 W was more realistic for a 28-V dB bias. Load pull simulations were performed with the original Gen1 models using 25 dBm of input power at 4 GHz and 28 V for a more realistic output power of 39.6 dBm (Fig. 46).


Fig. 46 1.75-mm HEMT load pull re-simulation 4-GHz, 28-V 25-dBm input max pout 39.6 dBm: (38.4 Ω || –0.57 pF); max PAE 69%: (106 Ω || –0.62 pF)

Note the final Axiem EM simulation of the final output match overlaid on the load pull simulation is fairly close to the optimal impedance, and this simulation is in close agreement to the 39.1-dBm value in Table 1 when you factor in about 0.6 dB of loss in the MMIC output matching circuit. A more realistic input drive level with a 3- to 4-dB gain compression in a re-simulation of the power amplifier using the newer design kit with Gen2 HEMT models predicts 38.6 dBm output power for an ideally lossless matching circuit at an input power of 23 dBm (Fig. 47). Note the greater than 10-W output power (40.1 dBm) with 29.5 dBm input power, which is overly gain compressed. This 38.6-dBm output power compares well to the 38.0-dBm value in Table 2 when you factor in the 0.6 dB of matching circuit loss. Looking back at the impedance of the final output matching circuit, the real part of the impedance was lower than the ideal case to increase gain bandwidth. This would likely improve performance at a DC bias of 28 V and lower but would not perform as well at 35 V, which should yield higher output power if the output matching circuit real part (resistance) were increased. A dynamic load line simulation (Fig. 48) showing the DC IV curves of the 1.75-mm Gen2 HEMT overlaid with an ideal design and the final simulations of the MMIC at 28 V and 23 dBm of input power at 4 GHz shows a reasonable output match. A dotted, purely resistive load line of 46 Ω, as shown on Fig. 48, is close to the 50-Ω original target for this design and represents a little less than 6 W (37.6 dBm) of RF power at the HEMT at a 28-V DC bias.

0 1.0

1.0

-1.0

10.0

10.0

-10.0

5.0

5.0

-5.0

2.0

2.0

-2.0

3.0

3.0

-3.0

4.0

4.0

-4.0

0.2

0.2

-0.2

0.4

0.4

-0.4

0.6

0.6

-0.6

0.8

0.8

-0.8

LP_Pout_28V_4G_25dbmInSwp Max1.2e+010

Swp Min0

p11p10

p9p8

p7p6 p5

p4

p3

p2

p1

4e+009g 1.25044b -0.758775

39.59g 1.30273b -0.719297

Pcomp_PORT_2_1_M_DB

Pcomp_PORT_2_1_M_DB Max

Converged Points

S(1,1)EM_OMN_1_75mm_G2B_EM

p1: Pcomp_PORT_2_1_M_DB = 30.23p2: Pcomp_PORT_2_1_M_DB = 31.27p3: Pcomp_PORT_2_1_M_DB = 32.31p4: Pcomp_PORT_2_1_M_DB = 33.35p5: Pcomp_PORT_2_1_M_DB = 34.39p6: Pcomp_PORT_2_1_M_DB = 35.43p7: Pcomp_PORT_2_1_M_DB = 36.47p8: Pcomp_PORT_2_1_M_DB = 37.51p9: Pcomp_PORT_2_1_M_DB = 38.55p10: Pcomp_PORT_2_1_M_DB = 39.59p11: Pcomp_PORT_2_1_M_DB = 39.611

0 1.0

1.0

-1.0

10.0

10.0

-10.0

5.0

5.0

-5.0

2.0

2.0

-2.0

3.0

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4.0

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-0.2

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0.6

-0.6

0.8

0.8

-0.8

LP_PAE_28V_4G_25dbmInSwp Max1.2e+010

Swp Min0

p12p11

p10p9p8p7p6p5

p4

p3

p2

p1

4e+009g 1.25044b -0.758775

69.291g 0.470952b -0.784549

PAE_PORT_1_PORT_2 PAE_PORT_1_PORT_2 Max Converged Points S(1,1)EM_OMN_1_75mm_G2B_EM

p1: PAE_PORT_1_PORT_2 = 4.4p2: PAE_PORT_1_PORT_2 = 10.82p3: PAE_PORT_1_PORT_2 = 17.24p4: PAE_PORT_1_PORT_2 = 23.66p5: PAE_PORT_1_PORT_2 = 30.08p6: PAE_PORT_1_PORT_2 = 36.5p7: PAE_PORT_1_PORT_2 = 42.92p8: PAE_PORT_1_PORT_2 = 49.34p9: PAE_PORT_1_PORT_2 = 55.76p10: PAE_PORT_1_PORT_2 = 62.18p11: PAE_PORT_1_PORT_2 = 68.6p12: PAE_PORT_1_PORT_2 = 69.291


Fig. 47 1.75-mm HEMT ideal Gen2 (load pull) re-simulation 4 GHz, 28 V

Fig. 48 1.75-mm HEMT Gen2 DC IV curves and dynamic load line 4 GHz, 28 V

0 1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930Power (dBm)

Pcomp_Idl_LP

05

101520253035404550556065

p2

p1p3

29.5 dBm40.12 dBm

23 dBm61.38

23 dBm38.62 dBm

23 dBm15.62 dB

0 dBm18.91 dB

DB(|Pcomp(PORT_2,1)|)[*,X] (dBm)GaN10x175_LP.AP_HBPAE(PORT_1,PORT_2)[*,X]GaN10x175_LP.AP_HBDB(PGain(PORT_1,PORT_2))[*,X]GaN10x175_LP.AP_HB

p3: Freq = 4 GHz p1: Freq = 4 GHz

p2: Freq = 4 GHz

0 10 20 30 40 50 60Voltage (V)

DCIV_HEMT 1

0100200300400500600700800900

1000110012001300

p18

p15

p14

p13

p12

p11

p10

p9

p8

p7

p6

p5p4

p3p2

p1

35 V210.8 mAVstep = -2.5 V

28 V211 mAVstep = -2.5 V

IVCurve() (mA)DCIV_HEMT.AP_DC

IVDLL(QORVO_QGAN25_E_FET2_NL_1E.5050_10x150_2P1@2,QORVO_QGAN25_E_FET2_NL_1E.5050_10x150_2P1@2)[*,24] (mA)PA_Pout_Lay_G2_Axiem.AP_HB

IVDLL(QORVO_QGAN25_E_FET2_NL_1C.NL_5050_10x150_2P1@2,QORVO_QGAN25_E_FET2_NL_1C.NL_5050_10x150_2P1@2)[*,*] (mA)GaN10x175_LP.AP_HB

IVDLL(QORVO_QGAN25_E_FET2_NL_1E.5050_10x150_2P1@2,QORVO_QGAN25_E_FET2_NL_1E.5050_10x150_2P1@2)[*,24] (mA)PA_Pout_Lay2_G2.AP_HB

p1: Vstep = -3 V p2: Vstep = -2.75 V p3: Vstep = -2.5 V p4: Vstep = -2.25 V p5: Vstep = -2 V

p6: Vstep = -1.75 V p7: Vstep = -1.5 V p8: Vstep = -1.25 V p9: Vstep = -1 V p10: Vstep = -0.75 V

p11: Vstep = -0.5 V p12: Vstep = -0.25 V p13: Vstep = 0 V p14: Vstep = 0.25 V p15: Vstep = 0.5 V

p16: Freq = 4 GHz p18: Freq = 6 GHzPwr = 23 dBm



9. Compact Broadband Feedback Amplifier

The first-stage driver amplifier of the 2-stage power amplifier was also submitted as a stand-alone probe-testable circuit (Fig. 49). This small circuit does not include the additional gain flattening matching elements on the output, nor the DC drain bias feed. Nominal gate DC bias can be applied to the probe pad shown in the upper left of the layout plot, while the drain DC supply can be fed through the G-S-G probe pads on the right through an external bias tee. Small signal s-parameters for the stand-alone amplifier are shown in Fig. 50 at 28-V, 44-mA bias. Note the noise figure of the feedback amplifier is as low as 2 dB below 3 GHz, so while not intended as a low-noise amplifier, this could be measured for comparison to the model. Large signal performance simulation from 2 to 18 GHz for the feedback amplifier is shown in Fig. 51. This is not the same as the conditions for the driver stage with interstage matching elements that were previously shown in Fig. 23. The input and output impedance are assumed to be 50 Ω for the stand-alone feedback amplifier, yet this does show that it can supply more than enough output power to drive the 1.75-mm output stage of the power amplifier. It is also a much wider band as a stand-alone amplifier than the 1.75-mm power amplifier. It is expected that the compact layout can be added to the tile for later test and analysis of this broadband driver amplifier.

Fig. 49 Layout plot of stand-alone broadband feedback amplifier (0.6 × 0.6 mm)


Fig. 50 MWO broadband feedback amplifier S-parameter simulation (0–20 GHz, 28 V) 0.44-mm HEMT

Fig. 51 MWO broadband feedback amplifier performance simulations (2–18 GHz, 28 V) 0.44-mm HEMT

0 2 4 6 8 10 12 14 16 18 20Frequency (GHz)

FDBK_AMP_lay

-20

-10

0

10

20

0

1

2

3

4

7 GHz2.435 dB

7 GHz10.01 dB

3 GHz13.01 dB

3 GHz2.058 dB

DB(|S(1,1)|) (L)PA_lay_BBfdbk_1stgDB(|S(2,1)|) (L)PA_lay_BBfdbk_1stgDB(|S(2,2)|) (L)PA_lay_BBfdbk_1stgMU2() (R)PA_lay_BBfdbk_1stgDB(NF()) (R)PA_lay_BBfdbk_1stg

DB(|S(2,1)|) (L)HEMT_DRV_AMP_AxDB(|S(1,1)|) (L)HEMT_DRV_AMP_AxDB(|S(2,2)|) (L)HEMT_DRV_AMP_AxMU2() (R)HEMT_DRV_AMP_AxDB(NF()) (R)HEMT_DRV_AMP_Ax

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24Power (dBm)

Pcomp_lay1_1stg

0

5

10

15

20

25

30

35

p20

p17

p14

p11p8

p5

p2

p19

p16

p13

p10

p7

p4

p1

p21 p18 p15

p12 p9 p6p3


19 dBm26.62Freq = 3 GHz


DB(|Pcomp(PORT_2,1)|)[*,X] (dBm)PA_POUT_lay_BBfdbk_1stg.AP_HBPAE(PORT_1,PORT_2)[*,X]PA_POUT_lay_BBfdbk_1stg.AP_HBDB(PGain(PORT_1,PORT_2))[*,X]PA_POUT_lay_BBfdbk_1stg.AP_HB



10. Conclusion

A preliminary design of a broadband 8-W (28-V) 1.75-mm HEMT power amplifier was performed. The intent was to explore the bandwidth and performance of a class A/B–biased 1.75-mm HEMT power amplifier designed to maximize bandwidth, output power, and efficiency over the 3- to 7-GHz band. Trying to increase the bandwidth would certainly require more matching losses to extend the bandwidth. A similar 2-way combined 3.5-mm HEMT power amplifier should achieve comparable performance based on a preliminary design using ideal lossless matching elements. For the 1-stage 1.75-mm HEMT design, a preliminary layout was implemented, including EM simulations of the input and output matching circuit layouts. A simple ideal matching circuit design to combine two 1.75-mm HEMTs in parallel was shown. An alternative method to achieve more power is to parallel combine the matched amplifiers with passive couplers such as Wilkinson or Lange couplers. Using external couplers to increase output power can impact size and may increase losses over doing a combiner within the MMIC layout. Additional design work would be needed to complete a 2-way combined 3.5-mm single-stage amplifier with similar performance and bandwidth to the 1.75-mm single-stage amplifier shown.

To achieve a flatter broadband gain, and higher gain, a simple feedback amplifier was added to the power amplifier design to create a 2-stage design with over 20-dB gain in compression (3 to 4 dB) over the desired 3- to 6-GHz band. Hopefully the single-stage feedback amplifier can be squeezed into the tile for fabrication as an additional design to measure and verify. Improvements are expected with the change to Gen2 using the new GAN25_E process from Qorvo. The initial impact to the schedule and rush to get designs translated to the newer PDK should yield a better transition path moving forward and more reliable designs.

These designs are optimized for 28-V DC supplies, which, for a 7-W output on the 1.75-mm single-stage amplifier, corresponds to 4 W/mm, which seems like a reasonable number for this 0.25-µm GAN process. Higher output power densities can be achieved at higher DC biases, such as 35 V, but this would require a redesign for optimal performance at the higher voltages and power densities. Thermal dissipation would be more challenging at the higher DC biases. All of these performance simulations assume that the HEMT junction temperatures are maintained at normal levels. Applications that require continuous wave operation of these designs would be more thermally challenging to cool than duty cycled or pulsed operation of the power amplifiers. This is typical of the higher power levels achievable, but also higher power densities, of GaN HEMTs.


List of Symbols, Abbreviations, and Acronyms

3-D 3-dimensional

ADS Advanced Design System (CAD tool)

AFRL Air Force Research Laboratory

ARL US Army Research Laboratory

DC direct current

DRC design rule check

EM electromagnetic

GaN gallium nitride

HEMT high-electron-mobility transistor

MMIC monolithic microwave integrated circuit

MWO Microwave Office (CAD tool)

PAE power-added efficiency

PDK process design kit

Pout power output

RF radio frequency


1 DEFENSE TECHNICAL (PDF) INFORMATION CTR DTIC OCA 2 DIRECTOR (PDF) US ARMY RESEARCH LAB RDRL CIO L IMAL HRA MAIL & RECORDS MGMT 1 GOVT PRINTG OFC (PDF) A MALHOTRA 10 DIR USARL (8 PDF, RDRL SER 2 HC) P AMIRTHARAJ RDRL SER E R DEL ROSARIO (1 HC) A DARWISH A HUNG T IVANOV P GADFORT K MCKNIGHT J PENN (1 HC) E VIVEIROS J WILSON

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Broadband 0.25-µm Gallium Nitride (GaN) Power Amplifier ... · ARL-TR-8091 AUG 2017 . US Army...

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