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C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

Date post: 15-Jan-2016
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C-Card and MMFE using the BNL Peak Finding ASIC (VMM1). Ken Johns, Joel Steinberg, Jason Veatch, Venkat Kaushik (U. Arizona). AZ C-Card. ADC & DAC for Board # 1. ADC & DAC for Board # 2. To MM TPC Board # 1. To MM TPC Board # 2. FEC Power Connector. FEC A-Card Connector. - PowerPoint PPT Presentation
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C-Card and MMFE using the BNL Peak Finding ASIC (VMM1) Ken Johns, Joel Steinberg, Jason Veatch, Venkat Kaushik (U. Arizona)
Transcript
Page 1: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

C-Card and MMFE using the BNL Peak Finding ASIC

(VMM1)

Ken Johns, Joel Steinberg, Jason Veatch, Venkat Kaushik

(U. Arizona)

Page 2: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

AZ C-Card

2

To MM TPC Board #1

To MM TPC Board #2

ADC & DAC for Board #1

ADC & DAC for Board #2

FEC Power

Connector

FEC B-Card

Connector

FEC A-Card Connector

DDR2Flash

Ethernet Interfac

e

USB

Page 3: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

3

Ramp Signal

Board #2

Time InputBoard #2

Calibrate Signal

Board #2

Initialize

Peak InputBoard #2

External

Trigger

Time Input

Board #1

Ramp SignalBoard #1

Peak InputBoard #1

Calibrate Signal

Board #1

Page 4: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

MM TPC Card (BNL) using 2x LEGS TPC ASIC’s

4

Page 5: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

Testing With FEC

5

Page 6: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

Features

Connections to two BNL front-end cards via 2x80 pin ribbon cables 8 LVDS inputs to C-Card 16 LVDS I/O ports

Connection to FEC card via card edge connectors 4 LVDS inputs to C-Card 21 LVDS outputs 3 LVDS clocks to C-Card 2 3.125 Gbps transceivers

6

Page 7: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

Features

10/100 Ethernet and USB connections

4 12 bit ADC’s4 16 bit DAC’s2 calibration pulse generators2 ramp generators2 FPGA clock regions from on-

board oscillators or FEC

7

Page 8: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

C-Card StatusA C-Card has been developed for use

with the LEGS TPC and VMM1 versions of the BNL peak-finding ASIC

Readout of the C-Card through the FEC Card and MAMMA DAQ program has been successfully tested

Communication with BNL MM TPC card (carrying 2 x LEGS TPC ASIC’s) has been established along with calibration signal and ramp

8

Page 9: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

C-Card Work ListStill longer than desired

Commission ADC section Verify (by local readout) calibration is

working Compare C-Card ramp and MM TPC

ramp Add monitoring and data storage to

MAMMA DAQ (with help from Marcin)

9

Page 10: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

MMFE CardInitially, design front-end card for

full size MM using BNL VMM1 ASICNow, re-trench and design for

fastest to market productNeed to specify by yesterday

Connector type (which MM?) Motherboard/daughter card (Mini)

versus integrated card (Melded) Input protection (NUP4114?) Still lacking some specification of VMM1

10

Page 11: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

Full-size MMFE

4 x 2 x 64 channels –on hold

11

Page 12: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

AIC (Analog Interface Card) Schematic started – on hold

12

Page 13: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

AIC (Analog Interface Card)

Schematic started – on hold

13

Page 14: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

AIC (Analog Interface Card)

Layout started – on hold

14

Page 15: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

Going ForwardMMFE – mini

Pro - take advantage of AIC work Con - two cards slows pace

15

Page 16: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

Going ForwardMMFE – melded

Pro - one card Con - other groups could use AIC if

desired

16

Page 17: C-Card and MMFE using the BNL Peak Finding ASIC (VMM1)

Conclusions

Good progress on commissioning C-Card but additional work remains before go-to-market

Desire to converge on reduced scope MMFE card so design and layout can proceed

17


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