constant layer clopings. The chrurge capacity is found )to increase Lin. early with surface layer implant dos,e for lower level implant and saturate at higher level implant.

Distance ( urn)

Fig. 3. Distribution of temperature along the n-layer when tempel ature at p-n junction is equal to 600 K; solid lines, Vo = 250 V: bxlken lines, VO = 270 V.

thermal conduction cannot be ignored if the delay ti~.rle is longer than 10 p s in the practical transistors.) So far, the trig- gering energy is thought to be constant in the same dwice under the adiabatic condition, in spite of changing Vo anc. R L . But the distribution of the temperature along the n-layer lwies with Vo and R L when TSB is introduced, as shown in Fig. 3. This means the higher the source voltage Vo and the lowel: the external resistor R L , the earlier the temperature at the pside of the n-layer reaches 600 K. So the total stored energy, or triggering energy, becomes smaller when Vo is higher or .YL is smaller, and TSB occurs more readily.

It is concluded that the value of the external resisto:, also gives the boundary condition between CSB and TSB and changes the delay time, triggering energy and temperature dis- tribution along the n-layer.

REFERENCES H. B. Grutchfield and T. 3. Moutoux, “Current mode sxond breakdown in epitaxial planar transistors,” IEEE Trans. Ekctron Devices, vol. ED-13, pp. 743-748, Nov. 1966. K. Koyanagi, K. Hane, and T. Suzuki, “Boundary conditions be- tween current mode and thermal mode second breakdown in epitaxial planar transistors,” ZEEE Trans, Electron Devices, vol. ED-24, pp. 672-678, June 1977. A. Caruso, P. Spirito, and G. Vitale, “Negative resistance induced by avalanche injection in bulk semiconductors,” ZEEE Trans Elec- tron Devices, vol. ED-21, pp. 578-586, Sept. 1974. W . B. Smith, D. H. Potius, and P. P. Budenstein, “Second break-

Devices, vol. ED-20, pp. 731-744, Aug. 1973. down and damage in junction devices,” IEEE Trans. E l m r o n

Calculation of Charge-Handling Capacity in Twin-La) ( x

Peristaltic Charge-Coupled Devices

WEN N. LIN AND YUM T. CHAN

Abstract-Charge-handling capacity is an important parameta in de- termining the dynamic range of a charge-coupled device (CCD). Based on depletion approximation, a onedimensional charge storage cilpacity calculation is given for an n-channel twin-layer peristaltic CC [I1 with

Manuscript received March 10, 1978; revised August 7, 1971.L This

tract DAAB07-76-C-1382. work was supported by U.S. Army Electronics Command undw Con-

W. N. Lin is with Electronics Research Center, Rockwell Imterna- tional, Anaheim, CA 92803. Y. T. Chan was with Electronics Research Center, Rockwel. Inter-

national, Anaheim, CA 92803. He is now with Advanced Technical Services, Inc. (ATS), Sunnyvale, CA 94086.

I. IN’rRODUCTlON The study of profiled peristaltic charge-coupled device

(PCCD) [ 11, [ 2 ] is of great interest because of its p’ossession of three desired properties of a CCD; namely, high charge- handling capacity, high transfer efficiency, and high speed of operation.

The charge-handling capacity is an important paralmeter in determining the dynamic range of a CCD. In this corriespon- dence, a one-dimensional [ 31, [ 41 calculation of charge- handling capacity in a twin-1.ayer [ 51 n-channel PCCD is pre- sented. For simplicity, thle analysis is given for devices with constant layer dopings based on the depletion layer approxi- mation [6 ] . The validity of this approximation ‘has; been discussed [ 71.

11. EQUATIONS FO’R CHARGE-HANDLING CAPACITY CALCULATION

Fig. l(a) shows the cross section of the basic structu:re of a twin-layer n-channel PCCD in the direction of charge propaga- tion. The channel region is; formed by ion implanting phos- phorus or arsenic ions with a relatively high concentration N1 in the top of a low-doped and relatively thick n-type epi-layer with doping concentration AT2 formed on a low-doped p-type substrate with doping density N p . Fig. l(b) shows the po- tential profiles of the n-channel PCCD, where the distance x is measured from the Si-SiOz interface in the direction perpen- dicular to the surface.

Under normal operating conditions, N 1 and N 2 layers are re- verse biased and in the absence of any signal charge, both these two layers and part of the p-substrate are fully depleted. As can be seen from Fig. 1 (b), a potential maximum (potential energy minimum) will be created in either N 1 or N2 layer which is capable of storing electrons delivered to it from an adjacent region during the transfer phase of operation. The two solid curves show the potential distribution without the presence of signal charge, where the maximum potentials Vpl and Vpz result from the application of a low gate voltage Vgl and a high gate voltage Vg2, respectively. When signal charge is injected into the channel, it will reside within the re- gion x~ < x < xg (dashed curve in Fig. l(b)). Under deple- tion approximation, the signal charge is assumed to distribute itself in such a way as to completely neutralize the space charge of the dopant ions. This results from the neglect of diffusion.

The potentials and fields in the various regions can be found from Poisson’s equation. We shall assume there is no space charge in the gate oxide layer and neglect the p-n junction built-in voltage. When signal charge Q, is introduced into the channel under the application of gate voltage Vg2, the po- tential profile assumes the shape depicted by the dashed curve in Fig. l(b). Depending on the magnitudes of Q,, Vgz, and other device parameters, three different cases may occur. The Poisson’s equation for the three different cases are shown in the following.

Case I : x < X A , x g < x2 (charge stored in N z layer only)

d2 V dx -= 0, for -xo d x < 0 (1)

f o r x l < x < x ~

0015-9383/79/0200-0158$00.75 0 1979 IEEE

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-26, NO. 2, FEBRUARY 1979 159

vg ,METAL GATE

P-TYPE SUBSTRATE

(a)

2

4 X

(b)

Fig. 1. (a) Cross section of basic structure of n-channel PCCD in the direction of charge propagation. (b) Potential profiles along the direction of X perpendicular to the surface.

d2V N2q dx 6 -=- - , for XB < X < x 2

d2 V dx % -= NPq + -, for x2 < x < x p s

where X A , X B are boundaries of charge storage region, x 0 is oxide thickness, x1 and x 2 are Nl and N2 layer thickness, re- spectively, x p s . the depletion depth in p-substrate, q electronic ckiarge, e, semlconductor permittivity. Note the net doping in Nl layer is Nl + N2 since this layer is usually obtained by ion implantation on top of N2 layer where Nl is the implanted ion concentration assumed to be uniformly distributed.

Case 2: 0 < X A < x l , x1 < XB < x 2 (charge stored in both Nl andN2 layers)

Equations( l), (4), (5), and (6) are valid for regions -xo < x < 0, X A < X < X B , XB < x < x 2 , and x 2 < x < x p s , respectively.

Case 3: 0 < X A , X B < x1 (charge stored in Nl layer only). Equations (l), (7), (4), and (6) can still be used for regions

- x O < X < O , O < X < X A , X A < X < X ~ , ~ ~ ~ X ~ < X < X ~ , , respectively. Poisson's equation for other regions are ex-

pressed as:

for x1 < x< x 2 .

The potential and electric field in various regions for the three different cases are obtained by solving the described equations and subject to the requirements that the potential and electric displacement be continuous at the interface of the different regions. The other specific boundary conditions are

dV/dx = 0 for X A < x < X B , where vfb is flat-bandvoltage, Vps is potential in charge storage region. Note when Qs = 0, we have X A = X B = xm2 and V = Vp2 where x m 2 is the po- sition of the maximum potentiayVp2 m an empty channel.

The maximum charge storage capacity Qsm is limited by the requirement that interface trapping be avoided, i.e., to assure buried-channel operation. To fulfill this condition, it is re- quired that the surface potential barrier AVs = Vps -. v,, be larger than several kT/q, where V,, is surface potentlal, k is Boltzmann constant, and Tis absolute temperature. The mag- nitude of gate voltage swing also limits the maximum charge capacity obtainable. I t is necessary that Vps > Vp1 where Vpl is lower bound of the peak empty channel potenti.al re- sulting from the application of Vgl. calculation of Qsm is given in the Appendix.

V = 0 , d V / d X = O a t X = X p s ; V = V g 2 - VfbatX=-Xo;V= Vps;

3 60, IEEE TRANSIICTIONS ON ELECTRON DEVICES, VOL. ED-26, NO. 2 , FEBRUARY 1979

111. SOME RESULTS AND DISCUSSION The dosage and depth of N1 implant greatly affect the maxi-

mum charge capacity e,,, Therefore, it is of great inters t to study Qsm as a function of implant dosage (implanted cz Triers per unit area) with other parameters XO, x l , x2, Nz, and A'p as independently varying parameters. For simplicity, we shall assume a uniform distribution of implanted ions in Nl layer.

As mentioned before, the channel potential VPs under rnaxi- mum charge storage conditions has to satisfy the cond.I:ions VPs - V,, = AV, > 0 and Vp, - VPl = AV, > 0. By chcosing AV,, AVp 2 0.2 V, the effects of N1 implant on Qsm has lbeen studied for various combinations of device parameters. The ranges over which these parameters vary are x. = 0.1 - 0.:1 pm, x1 = 0.1 - 0.5 pm, x 2 = 1 - 6 pm, N2 = 2 X lCL4 - 2 X 1016cm-3, and Np = 2 X 1014 - 1 X 101scm-3.

Fig. 2 shows Qsm as a function of Nl layer implant :loses (i.e., the product NIX,) with amplitude of gate voltage wing AVg as a parameter for the device with parameters x . = 0.15 pm, x 1 =0 .2pm, x 2 = 4 p m , N2 = 5 X 1014cm-3, and .'Vp = 1 X 1015 ~ m - ~ . The Qsm curves in Fig. 2 have been optia-lized with respect to the dc gate bias voltages varying between - 17 - +35 V with substrate held at 0 V. In general, the dc gate bias at which the optimum Qsm is obtained increases to more positive value at higher implant doses. For exampll:, for the case in Fig. 2, the dc gate biases V for optimum Q,, are: Vg=-7VforNlx1=2.5X 1011-8.7fX 1011cm-2,Vg=-9V for N l x l = 8.75 X 10" - 1.62 X 1012cm-2, Vg = - 3 *i for NIX1 = 1.62 x 10l2 - 1.87 x 10l2cm-*, Vg = 5 V forNa. r l = 2 X 1012cm-2, Vg = 13 V for N l x l = 2.12 X 1012cm-2, V = 25 V for Nlx l = 2.25 x 1012cm-2, and Vg = 35 V forN1 x:> 2.37 X 1012cm-z.

The maximum charge capacity can never exceed [ 81 ~ [9] the sum of the total carrier density in the Nl implantec and Nz epi-layers. At lower level N 1 implant with relatively ;mall N2, the depth of the channel potential well available for staring charges is small and is predominantly determined by the chan- nel implant dose when AV is fixed. In this case, Qs, w:ll in- crease almost linearly wita Nl implant as the depth 0:' po- tential well increases with the implant. At higher chznnel implant levels, the potential well depth is determined b:' the magnitude of gate voltage swing A Vg. When A Vg is fixed, the potential well depth, and consequently Q,,, will bemme saturated when the implant dose exceeds certain levels a$, can be seen from Fig. 2.

For the cases studied, it has been found that the effect of the substrate doping NP on Q,, is not too significant. This means p-type substrate with relatively high doping can be (.:on- sidered in the design and fabrication of high-speed PC::!D's [ 101 which would help in reducing the leakage current dnlt: to smaller substrate depletion region obtainable at the revme- biased, epi-substrate junction. However, higher doping o E the substrate would decrease the breakdown voltage. There lore, compromise should be made.

With other parameters fixed, Q,, is insensitive to epi-l;b.yer doping N2 at higher implant levels, but is somewhat Inore sensitive at lower implant levels as can be seen from F.g. 3 which shows Q,, as a function of implant dose with N2 as a parameter for the device with parameters x0 = 0.15 !Am, x 1 = 0.4 pm, xz = 2 pm, Np = 1 X 1 0 " ~ m - ~ , and AVg = 10 V. At higher doses, the charge capacity is primarily determined by Nl implant and Q,, is insensitive to the variation of Iepi- layer doping Nz. In the region of lower level implant, charge density in Nz epi-layer is more significant in comparison with Nl implanted layer and Qsm is thus more Nz dependent. it is also obvious from Fig. 3 that at lower implant levels QsnL in- creases with implant doses faster for the device with lowet Nz than that with higher Nz.

To conclude, we have performed a one-dimensional chuge capacity calculation for an n-channel PCCD. Based on Poissm's

equation, a brief derivation of the equations for the calcula- tion of charge capacity has been given. Although a more time- consuming, two-dimensional calculation is often needed in the later design stages of the devices, the simpler one-dimensional model could give useful insight into device behavior.

APPENDIX CALCULATION OF Q,,

TO calculate the Q,,, X A and X B have to be found. By solving the Poisson's equation, the solutions for X A and xB for the three different cases are expressed in the following.

Case 1: x 1 G X A , X B < x2

VPs can be expressed in terms of Vgz and X A as

+ N ~ X ~ ) + - X O ( N ~ X ~ e, t N z x A ) e0 1

(A3) where E , is oxide permittivity.

Case2: O < X A < x l , x I d x g < x 2

Equation (1 1) can be used to calculate X B in this case. Case3: o < x A , x B < x 1 . Equations (1 3) and ( 14) are still valid for the calculation of

X A and Vp,, respectively, in this case. However X B is given by

where

C=NZx$ + Nix1 (2x2 - XI) +- (NIX1 + NZX~)' 1

NP

-- 2Es Vps 4

To calculate Q,,, one starts with the choice of a proper value of AV, = Vpps - V,, based on the criteria mentioned previ- ously. X A , VP,, and X B are then calculated using equations appropriate for the case which occurs. After X A and XB are found, Q,, is calculated by

Qsm = N Z ( X B - X A ) , for Case 1 ' N ~ ( X B - X A ) +N1 (X1 - X A ) , for Case 2

= (N1 + N z ) ( X B - X A ), for Case 3. (A7) As mentioned earlier, the value of VPl is needed to de-

termine the proper choice of VpPs, Le., a potential barrier VPs - VPl = AV, > 0 should be mamtained. To obtain V P l ,

JEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-26, NO. 2, FEBRUARY 1979 161

t DEVICE PARAMETERS X. = 0.15p x1 = 0 ~ 2 p /

X I

E

/

I I I I I I I I 0.25 0.75 1.25 1.75 2.25

N1 IMP1 ANTATION DOSES (X 1 0 1 2 C M " ~

Fig. 2. Charge capacity Qsm as a function of N1 layer implant doses for different gate voltage swing A Vg.

I I I I I I I I I

1.0 - -

-

-

-

-

- DEVICE PARAMETERS

AVg = 10 V - X. = 0 . 1 5 ~

X1 = 0 4 p - x 2 = 2p

Np = 1 x cni3 -

-

0.25 0.75 1.25 1.75 2.25

N1 IMPLANTATION DOSES (x 10" ~ m - ~ )

Fig. 3. Charge capacity Qsm as a function of N1 layer implant doses for different epi-layer dopings N2.

I. 62 IEEE TRIh.N?.,U2TIONS OW ELECTRON DEVICES, VOL. ED-26, NO. 2 , FEBRUARY 1979

one starts with the calculation of depletion depth xi>’ 1,nder the application of gate voltage Vgl. xpl is given by

XPl = { ( z x o +x2)2 +; klXl (x1 +$xo)

+ N z x z (x2 + 2 x0) + v~’]}’’~ - (x2 4- :: X.).

((A81 Depending on the empty channel location xml, two powible

cases may occur; namely, 0 < x m l < x 1 or x 1 < xnll *::: x2. After the calculation of xpl, the depletion theory of p-n jlunc- tion at x = x2 may be used to determine which case is prt::pent under consideration. For 0 < x m l < xl, we have

Forxl < xml < x2, we have

[ 3 I W. H. Kent, “Charge distribution in buriedchannel charge coupled devices,” Bell Syst. Tech. J., vol. 52, pp. 1009-1024, July-Aug. 1973.

[4j 1%. El-Sissi and R. S . C. Cobbold, “Onedimensional study of buried-channel charge coupled devices,” IEEE Trans. Electron Devices, vol. ED-21, pp. 437-447, 1974.

[ 5 ] €1. L. Peek, “Twin-layer PCCD performance for different doping levels of the surface layer,” IEEE Trans. Electron Devices, vol. ED-23, pp. 235-238, Feb. 1976.

[6] A. W. Lee and W. D. Ryan, “A simple model of a buried channel charge-coupled device,” Solid-state Electron., vol. 17, pp. 1163- 1169,1974.

[7] B. Dale, “The validity of the depletion approximation applied to a bulk channel charge-coupled device.”IEEE Trans. Electron De- vices, vol. ED-23, p& 275-i82, Feb. i976.

[8 ] J. S . T. Huang, “On the design of ion implanted BCCD’s,” Solid- State Electron., vol. 20, pp. 665-669, 1977.

[9] -, “Charge handling capacity in charge-coupled devices,”ZEEE Trans. Electron Devices. vol. ED-24. DV. 1234-1238, Oct. 1977.

[ l o ] Y. T. Chan, “A sub-nkosecond CCD,” in Roc. Con$ on CCD Technology and Applications (Washington, DC, 1976), pp. 89-94.

~ 1 - 1

Replacing Vggl by Vg2, (17), (18), or (1 9) give va1uc:i; of

ACKNOWLEDGMENT The authors would like to thank Dr. B. T. French for his

xp2, vp2.

helpful discussions and comments on the manuscript.

REFERENCES [ 1 ] L. J. M. Esser, in Proc. Charge-Coupled Device Applicatiom Ckwzf. ,

p. 269, Sept. 1973. [2] M. G. Collet and A. C. Veiegenthart, “Calculation of potcrltial

and charge distributions in the peristaltic charge coupled delice,” Philips Res. Rep., vol. 29, pp. 25-44, 1974.

Correction to “Determination of Nonuniform Diffusion Length and Electric Field in Semiconductors”

CHENMING HU

In the above paper,’ (1 8 ) and ( 1 9 ) should be replaced by

I” z; 10 Io

L 3 = 0 - - [ In (z0& - z,,,I;) 1 (18)

= (ZLI6’ - I;I;)/(zoz; - I&). (19)

Manuscript received September 18, 1978. The author is with the Department of Electrical Engineering and

Computer Sciences and the Electronics Research Laboratory, Univer- sity of California, Berkeley, CA 94720.

825, July 1978. IC. Hu, IEEE Trans. Electron Devices, vol. ED-25, no. 7, pp. 822-