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Sol id St a t e So l id St a t e
Eng ineer ing Eng ineer ing Chapter 1
Introduction
NCHU EE, Professor F. H. Wang,e-mail :[email protected]
2011/9/16 NCHU, EE, Prof. F. H. Wang 2
Many Processes used inMicroelectronics Technology
In This Book:
Unit I: Hot (or energetic) Processes
Unit II: Pattern Transfer (Lithography)
Unit III: Thin Films Deposition
Unit IV: Process Integration
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2011/9/16 NCHU, EE, Prof. F. H. Wang 3
Contents (I)
Unit I: Hot (or energetic) Processes
Diffusion
Thermal Oxidation
Ion Implantation
Rapid Thermal Processing
2011/9/16 NCHU, EE, Prof. F. H. Wang 4
Contents (II)
Unit II: Pattern Transfer
Optical Lithography
Photoresists
Etching
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2011/9/16 NCHU, EE, Prof. F. H. Wang 5
Contents (III)
Unit III: Thin Films
Physical Deposition: Evaporation and
Sputtering (chapter 12)
Chemical Vapor Deposition (chapter 13)
2011/9/16 NCHU, EE, Prof. F. H. Wang 6
Contents (VI)
Unit IV: Process Integration
Device Isolation, Contacts, and
Metallization
CMOS Technologies
IC manufacturing
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2011/9/16 NCHU, EE, Prof. F. H. Wang 7
Goal of this Course
The goal of this course is to
teach the fundamentals of
Microelectronic Technology
Emphasis will be placed on
multidisciplinary
understanding
Desired Outcome:
Provide the student with
enough basic information
2011/9/16 NCHU, EE, Prof. F. H. Wang 8
Disciplines
51
2
3
4
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2011/9/16 NCHU, EE, Prof. F. H. Wang 9
Introduction to Semiconductor
Manufacturing Technology
Chapter 1, Introduction
2011/9/16 NCHU, EE, Prof. F. H. Wang 10
Objective
After taking this course, you will able to
Use common semiconductor terminology
Describe a basic IC fabrication sequence
Briefly explain each process step
Relate your job or products to
semiconductor manufacturing process
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2011/9/16 NCHU, EE, Prof. F. H. Wang 11
IC
2011/9/16 NCHU, EE, Prof. F. H. Wang 12
Introduction
First Transistor, AT&T Bell Labs, 1947
First Single Crystal Germanium, 1952 First Single Crystal Silicon, 1954
First IC device, TI, 1958
First IC product, Fairchild Camera, 1961
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2011/9/16 NCHU, EE, Prof. F. H. Wang 13
First Transistor, Bell Lab, 1947
Photo courtesy:
AT&T Archive
2011/9/16 NCHU, EE, Prof. F. H. Wang 14
John Bardeen, William Shockley and Walter Brattain
Photo courtesy: Lucent Technologies Inc.
First Transistor and ItsInventors
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First IC Device Made by Jack
Kilby of Texas Instrument in 1958
Photo courtesy: Texas Instruments
2011/9/16 NCHU, EE, Prof. F. H. Wang 16
First Silicon IC Chip Made by RobertNoyce of Fairchild Camera in 1961
Photo courtesy: Fairchild Semiconductor International
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2011/9/16 NCHU, EE, Prof. F. H. Wang 17
2011/9/16 NCHU, EE, Prof. F. H. Wang 18
2005 Top 10 SemiconductorCompany
Company 2005(f) 2005Intel 351.36 15%
Samsung 178.5 7.6%
TI 104.5 4.4%
Toshiba 93.06 4.0%
ST() 88.25 3.8%Renesas() 88.01 3.7%Infineon 82.77 3.5%
NEC 57.93 2.5%Hynix 57.3 2.4%
AMD 56.87 2.4%
Source:Gartner, 2005/12
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2011/9/16 NCHU, EE, Prof. F. H. Wang 19
2005(1)Applied Materials623400(2)Tokyo Electron
44
5500(3)ASML Holding316 000
(4)KLA-Tencor20500(5)Advantest196000(6)Nikon156600(7)Lam Research138200
(8)Novellus Systems13200(9)Hitachi High-Technologies127700(10)Canon124700
2011/9/16 NCHU, EE, Prof. F. H. Wang 20
Silicon () and germanium () Compound semiconductors () SiGe, SiC
GaAs, InP, etc.
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2011/9/16 NCHU, EE, Prof. F. H. Wang 21
Classifications of Electronic
Materials () Electrical/Computer engineers like to classify
materials based on electrical behavior(insulatorsand conductors).
Chemists or Materials Engineers/Scientists
classify materials based on bond type(covalent,
ionic, metallic, or van der Waals), orstructure
(crystalline, polycrystalline, amorphous, etc...).
2011/9/16 NCHU, EE, Prof. F. H. Wang 22
Classifications of ElectronicMaterials (Chemistry)
Materials Classified based on bond strength
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2011/9/16 NCHU, EE, Prof. F. H. Wang 23
Classifications of Electronic
Materials (EE)
metals.
insulators.
semiconductors.
2011/9/16 NCHU, EE, Prof. F. H. Wang 24
Material Classifications based onBonding Method
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2011/9/16 NCHU, EE, Prof. F. H. Wang 25
Material Classifications based on
Bonding Method
2011/9/16 NCHU, EE, Prof. F. H. Wang 26
Type of Crystalline Solids
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2011/9/16 NCHU, EE, Prof. F. H. Wang 27
P-typeDopant
N-type Dopants Types of Semiconductors:
Elemental: Silicon or Germanium (Si or Ge) Compound: Gallium Arsenide (GaAs), Indium Phosphide (InP),
Silicon Carbide (SiC), CdS and many others
Note that the sum of the valence adds to 8, a complete outer shell.
I.E. 4+4,3+5, 2+6, etc...
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Silicon
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2011/9/16 NCHU, EE, Prof. F. H. Wang 29
Group 4 Elements
*Only has a measurable bandgap near 0K
**Different bonding/Crystal Structure due to unfilled higher orbital states
2011/9/16 NCHU, EE, Prof. F. H. Wang 30
N()
-
Si Si Si
Si
SiSi
Si
Si
As
Valence band, Ev
Eg = 1.1 eV
Conducting band, Ec
Ed~ 0.05 eV
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2011/9/16 NCHU, EE, Prof. F. H. Wang 31
P()
Valence band, Ev
Eg = 1.1 eV
Conducting band,Ec
Ea ~ 0.05 eV
Electron
-
Si Si Si
Si
SiSi
Si
Si
B
Hole
2011/9/16 NCHU, EE, Prof. F. H. Wang 32
Classifications of ElectronicMaterials Compound Semiconductors(): Offer high
performance (optical characteristics, higher frequency,
higher power) than elemental semiconductors.
Binary: GaAs, SiC, etc...
Ternary: AlxGa1-xAs, InxGa1-xN where 0
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2011/9/16 NCHU, EE, Prof. F. H. Wang 33
Classifications of Electronic
Materials
Material Classifications based on Crystal Structure
2011/9/16 NCHU, EE, Prof. F. H. Wang 34
Classifications of CrystallineElectronic Materials
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2011/9/16 NCHU, EE, Prof. F. H. Wang 35
Dopant concentration ()
Resistivity
()P-type, Boron ()
N-type,
Phosphorus()
2011/9/16 NCHU, EE, Prof. F. H. Wang 36
(electrons) (holes)
NP
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2011/9/16 NCHU, EE, Prof. F. H. Wang 37
IC
2011/9/16 NCHU, EE, Prof. F. H. Wang 38
Resistor () Capacitor () Diode () Bipolar Transistor () MOS Transistor () Memory Device DRAM , SRAM , Non-volatile memory
Optoelectronic Device TFTLCD, LED
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2011/9/16 NCHU, EE, Prof. F. H. Wang 39
Resistor ()l h
w
wh
lR
:
2011/9/16 NCHU, EE, Prof. F. H. Wang 40
Capacitor ()
d
hlC h
l
d: Dielectric Constant()
ex. DRAM () High-k
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2011/9/16 NCHU, EE, Prof. F. H. Wang 41
Capacitor ()
Si
Poly SiOxide
Poly 1
Poly 2
Dielectric Layer
()
(flat) (stack) (trench)
Poly
Si Si
2011/9/16 NCHU, EE, Prof. F. H. Wang 42
Parasitic Capacitor ()I
Metal, Dielectric,
d
w
l
(parasitic capacitor)
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2011/9/16 NCHU, EE, Prof. F. H. Wang 43
Diode () P-N Junction
(forward bias)V1 V2
P2P1
V1 > V2 , P1 > P2,current current
V1 < V2 , no current P1 < P2, no current
2011/9/16 NCHU, EE, Prof. F. H. Wang 44
-(I-V curve)
V
I
-I0
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2011/9/16 NCHU, EE, Prof. F. H. Wang 45
Bipolar Transistor () PNP or NPN
Switch () Amplifier () Analog circuit () Fast high power device
()
2011/9/16 NCHU, EE, Prof. F. H. Wang 46
NPN and PNP
C
E
B N NP
EB
C
E
C
B
P PN
EB
C
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2011/9/16 NCHU, EE, Prof. F. H. Wang 47
NPN
Np n+
P-substrate
Electron flow
n+
n+ p+p+
SiO2
AlCuSi
2011/9/16 NCHU, EE, Prof. F. H. Wang 48
NPN
P-substrate
n+ Buried Layer
n Epi
p p
Field
oxideField
oxide
CVD
oxide
CVD
oxide
n+
CVD
oxide
Poly
CollectorEmitterBase
Metal
n+
Field
oxide
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2011/9/16 NCHU, EE, Prof. F. H. Wang 49
MOS Transistor () Metal-oxide-semiconductor () Also called MOSFET (MOS Field Effect
Transistor) ()
2011/9/16 NCHU, EE, Prof. F. H. Wang 50
NMOS
+
Metal Gate
SiO2
SourceDrain
p-Sin+
VD > 0VG > VT> 0
+ + + + + + +
Electron flow
Positive charges
Negative chargesNo current
n+SiO2
Source Drainp-Sin+
VDVG = 0
n
Metal Gate
VG
VDGround
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2011/9/16 NCHU, EE, Prof. F. H. Wang 51
PMOS
+
Metal Gate
SiO2
Source Drainn-Sip
+
VD > 0VG < VT< 0
+ + + + + + +
Hole flow
Positive charges
Negative charges
No current
p+SiO2
Source Drainn-Si
p+
VDVG = 0
p
VG
VDGround
2011/9/16 NCHU, EE, Prof. F. H. Wang 52
Devices with Different Substrates
Bipolar
MOSFET
BiCMOS
SiliconSilicon
GaAs: up to 20 GHz device Light emission diode (LED)CompoundCompound
Bipolar: high speed devicesSiliconSilicon--
GermaniumGermanium
Dominate IC
industry
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2011/9/16 NCHU, EE, Prof. F. H. Wang 53
Market of Semiconductor Products
MOSFET
100%
50%
1980 1990 2000
Compound
Bipolar
88%
8%4%
2011/9/16 NCHU, EE, Prof. F. H. Wang 54
Bipolar IC () Earliest IC chip
1961, four bipolar transistors, $150.00 TV VCR Cellular phone, etc.
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2011/9/16 NCHU, EE, Prof. F. H. Wang 55
PMOS and NMOS
PMOS
First MOS field effect transistor, 1960 Used for digital logic devices in the 1960s
Replaced by NMOS after the mid-1970s
NMOS
Faster than PMOS
Used for digital logic devices in 1970s and 1980s
Replaced by CMOS after the 1980s
2011/9/16 NCHU, EE, Prof. F. H. Wang 56
CMOS (Complement MOSFET)
80IC
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2011/9/16 NCHU, EE, Prof. F. H. Wang 57
CMOS Inverter ()
V in Vout
Vdd
Vss
PMOS
NMOSGate
Gate
Drain
Drain
Source
Source
2011/9/16 NCHU, EE, Prof. F. H. Wang 58
BiCMOS (Bipolar + CMOS)
CMOS Mainly in 1990s
CMOS as logic circuit Bipolar for input/output Faster than CMOS
1
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2011/9/16 NCHU, EE, Prof. F. H. Wang 59
IC Chips
Memory () Microprocessor () Application specific IC (ASIC)
()
2011/9/16 NCHU, EE, Prof. F. H. Wang 60
Memory Chips
Volatile memory () Dynamic random access memory (DRAM)
Static random access memory (SRAM)
Non-volatile memory
Erasable programmable read only memory
(EPROM) () EEPROM
FLASH Memory
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2011/9/16 NCHU, EE, Prof. F. H. Wang 61
DRAM
Word line ()
Bit line () GNDNMOS
Capacitor
DRAM,EDO DRAMSDRAMDDR DRAMDirect RDAM
DDR2 IC One transistorone capacitor
2011/9/16 NCHU, EE, Prof. F. H. Wang 62
DRAM DRAM
NMOS(word line)NMOS /(bit line)
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2011/9/16 NCHU, EE, Prof. F. H. Wang 63
DRAM
2011/9/16 NCHU, EE, Prof. F. H. Wang 64
SRAM
SRAM(Cache Memory)
DRAM
Vcc
select
Bit Bit
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2011/9/16 NCHU, EE, Prof. F. H. Wang 65
EPROM () Non-volatile memory
(Memory ) 10 bios Floating gate () UV
2011/9/16 NCHU, EE, Prof. F. H. Wang 66
EPROM
n+Gate
OxideSource Drain
p-Sin+
VD
VG
Poly 1
Poly 2Inter-poly
Dielectric
Passivation Dielectric
()
Floating Gate
Control Gate
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2011/9/16 NCHU, EE, Prof. F. H. Wang 67
EPROM Programming
n+GateOxideSource Drain
p-Sin+
Poly 2Inter-poly
Dielectric
Passivation
Dielectric VD > 0VG>VT>0
e- e- e- e- e- e-
e-
Electron
Tunneling()
Floating Gate
Control Gate
2011/9/16 NCHU, EE, Prof. F. H. Wang 68
EPROM Erasing Process
n+Gate
Oxide Source Drainp-Si
n+Floating Gate
Poly 2 Control GateInter-poly
Dielectric
Passivation
Dielectric
e- e-
UV light
Electron
Tunneling
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2011/9/16 NCHU, EE, Prof. F. H. Wang 69
Flash Memory
(NVRAM )
10 (EEPROM )EEPROM (bite ) (Data) (DigitalCamera )EEPROM
2011/9/16 NCHU, EE, Prof. F. H. Wang 70
TFT-LCD
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2011/9/16 NCHU, EE, Prof. F. H. Wang 71
Equivalent Circuits in TFT-LCD
Display area
CstClc
Scan line (n)
Scan line (n-1)
Vcom
Dataline
TFT
1 dot equivalent circuit
LCD Monitor
1024x768x3 dots
LC layer
storagecapacitor
1 dot cross sectional view
2011/9/16 NCHU, EE, Prof. F. H. Wang 72
Amorphous-Si TFT
Comparison of two-type a-Si TFT
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2011/9/16 NCHU, EE, Prof. F. H. Wang 73
Poly-Si TFT
N channel P channel Pixel
Glass
Buffer SiO2
Gate
Al
ITO
N+ P+
1stinterlayer
2nd interlayer
N+ P+ N+ N+
Gate Gate
2011/9/16 NCHU, EE, Prof. F. H. Wang 74
LED
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2011/9/16 NCHU, EE, Prof. F. H. Wang 75
IC
2011/9/16 NCHU, EE, Prof. F. H. Wang 76
Development History
First Transistor(), AT&T Bell Labs,1947
First Single Crystal Germanium(), 1952 First Single Crystal Silicon(), 1954 First IC device, TI, 1958
First IC product, Fairchild Camera, 1961
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2011/9/16 NCHU, EE, Prof. F. H. Wang 77
Pioneers of Transistor
The 1st Transistor, Bell Lab, 1947
2011/9/16 NCHU, EE, Prof. F. H. Wang 78
Grown Junction Technology
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2011/9/16 NCHU, EE, Prof. F. H. Wang 79
Alloy Junction Technology
2011/9/16 NCHU, EE, Prof. F. H. Wang 80
Double Diffused Mesa Transistor
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2011/9/16 NCHU, EE, Prof. F. H. Wang 81
Planar Process
2011/9/16 NCHU, EE, Prof. F. H. Wang 82
State-of-the-Art ICs1960 vs. 1990
Photo courtesy: Fairchild Semiconductor International
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2011/9/16 NCHU, EE, Prof. F. H. Wang 83
Wafer vs. Chip
From Howe, Sodini: Microelectronics:An Integrated Approach,
Prentice Hall
2011/9/16 NCHU, EE, Prof. F. H. Wang 84
IC Scales
Integration level Abbreviation Number of devices on a chip
Small Scale Integration SSI 2 to 50
Medium Scale Integration MSI 50 to 5,000
Large Scale Integration LSI 5,000 to 100,000
Very Large Scale Integration VLSI 100,000 to 10,000,000
Ultra Large Scale Integration ULSI 10,000,000 to 1,000,000,000
Super Large Scale Integration SLSI over 1,000,000,000
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2011/9/16 NCHU, EE, Prof. F. H. Wang 85
(Chip)
2011/9/16 NCHU, EE, Prof. F. H. Wang 86
Modern Electronics
0.13 um
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2011/9/16 NCHU, EE, Prof. F. H. Wang 87
Comparison : IC vs. Hair
Modern devices
have lateraldimensions that
are only fractions
of a micron (~0.1
m) and vertical
dimensions that
may be only a fewatoms tall.
2011/9/16 NCHU, EE, Prof. F. H. Wang 88
Moores LawGorden Moore1964121980182010
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2011/9/16 NCHU, EE, Prof. F. H. Wang 89
Advantages of Technology
Scaling
2011/9/16 NCHU, EE, Prof. F. H. Wang 90
IC Technology Scaling
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2011/9/16 NCHU, EE, Prof. F. H. Wang 91
Channel Length Scaling
2011/9/16 NCHU, EE, Prof. F. H. Wang 92
SIA Roadmap
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2011/9/16 NCHU, EE, Prof. F. H. Wang 93
DRAM
DRAM
2011/9/16 NCHU, EE, Prof. F. H. Wang 94
Minimum Feature Size
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2011/9/16 NCHU, EE, Prof. F. H. Wang 95
Y= 28/32 = 87.5% Y= 2/6 = 33.3%
Killer Defects()
2011/9/16 NCHU, EE, Prof. F. H. Wang 96
Power Density
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2011/9/16 NCHU, EE, Prof. F. H. Wang 97
Process Flow: Key Issues
Number and kinds of processes and how they
are integrated together.
Important Metrics: thermal budget, layout
density, process cost (masks and steps)
Leverage Points: self-aligned techniques,
trench isolation, local interconnect,
planarization
2011/9/16 NCHU, EE, Prof. F. H. Wang 98
Process Integration
MOSIS is a low-cost prototyping and small-volume production service for VLSI circuit development.
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2011/9/16 NCHU, EE, Prof. F. H. Wang 99
Processing Temperature
2011/9/16 NCHU, EE, Prof. F. H. Wang 100
Control ofConductivity is the Keyto Modern Electronic Devices
Conductivity, , is material conducts electricity.
Ohms Law: V=IR or J=E where J is current density
and E is electric field. Semiconductors: Conductivity can be varied by several
orders of magnitude.
It is the ability to control conductivity that make
semiconductors useful as current/voltage control
elements. Current/Voltage control is the key to
switches (digital logic including microprocessorsetc), amplifiers, LEDs, LASERs, photodetectors,
etc...
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2011/9/16 NCHU, EE, Prof. F. H. Wang 101
IC
2011/9/16 NCHU, EE, Prof. F. H. Wang 102
1960s: PMOS Process
Bipolar dominated
MOSFET Si substrate
Diffusion for doping
Boron diffuses faster in silicon
PMOS
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2011/9/16 NCHU, EE, Prof. F. H. Wang 103
Wafer Clean, Field Oxidation, and
Photoresist Coating
N-Silicon
Native Oxide
N-Silicon
N-Silicon
Field Oxide
N-Silicon
Primer
Photoresist
Field Oxide
2011/9/16 NCHU, EE, Prof. F. H. Wang 104
Photolithography and Etch
N-Silicon
Source/Drain Mask
Photoresist
Field Oxide
N-Silicon
Source/Drain Mask
PR
UV Light
N-Silicon
PR
Field Oxide
N-Silicon
PR
Field Oxide
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2011/9/16 NCHU, EE, Prof. F. H. Wang 105
Source/drain Doping and Gate
Oxidation
N-Silicon
Field Oxide
N-Siliconp+ p+
Field Oxide
N-Siliconp+ p+
Field Oxide
N-Siliconp+ p+
Gate Oxide Field Oxide
2011/9/16 NCHU, EE, Prof. F. H. Wang 106
Contact, Metallization, andPassivation
N-Siliconp+ p+
Gate Oxide Field Oxide
N-Siliconp+ p+
Gate Oxide Field OxideAlSi
N-Siliconp+
Gate Oxide Field Oxide
p+
N-Siliconp+
Gate Oxide CVD Cap Oxide
p+
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2011/9/16 NCHU, EE, Prof. F. H. Wang 107
CMOS Inverter
p-Si USGn-Si
Bulk Si
Polysilicon
STI
n+ Source/Drain p+ Source/DrainGate Oxide
2011/9/16 NCHU, EE, Prof. F. H. Wang 108
CMOS Chip with 2 Metal Layers
P-type substrate
p+p+N-well
SiO2LOCOS
BPSG
AlCuSi
Metal 2, AlCuSi
Nitride
Oxide
USG dep/etch/dep
Poly Si Gate
IMD
PMD
PD2
PD1
p+ p+n+n+
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2011/9/16 NCHU, EE, Prof. F. H. Wang 109
FSG
Metal 4 Copper
Passivation 1, USG
Passivation 2, nitride
Lead-tin
alloy bump
FSG
CopperMetal 2
FSG
FSG
CopperMetal 3
FSG
P-epi
P-wafer
N-wellP-well
n+STI p+ p+USGn+PSG Tungsten
FSG
Cu Cu
Tantalum
barrier layer
Nitride etch
stop layer
Nitride
seal layer
M 1
Tungsten local
Interconnection
Tungsten plug
PMD nitride
barrier layer
T/TiN barrier &
adhesion layer
Tantalum
barrier layer
CMOS Chip with 4 Metal Layers
2011/9/16 NCHU, EE, Prof. F. H. Wang 110
Actual Cross Section View
Metal 2
Metal 3
Metal 4
Metal 5
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2011/9/16 NCHU, EE, Prof. F. H. Wang 111
Wafer Process Flow
Materials
Design
Masks
IC Fab
Test
Packaging
Final Test
Thermal
Processes
Photo-lithography
Etch
PR stripImplant
PR strip
Metallization CMP Dielectricdeposition
Wafers
Memo