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Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register...

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Chapter 3 Chapter 3 Introduction to the Introduction to the 68000 68000 Register Set: data, address, Register Set: data, address, condition code, status. condition code, status. Basic Instruction Set Basic Instruction Set Basic addressing modes: Basic addressing modes: register, absolute, immediate, register, absolute, immediate, register indirect, etc. register indirect, etc. Assembling and debugging a Assembling and debugging a program program
Transcript
Page 1: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Chapter 3Chapter 3Introduction to the 68000Introduction to the 68000

• Register Set: data, address, Register Set: data, address, condition code, status. condition code, status.

• Basic Instruction SetBasic Instruction Set

• Basic addressing modes: register, Basic addressing modes: register, absolute, immediate, register indirect, absolute, immediate, register indirect, etc.etc.

• Assembling and debugging a Assembling and debugging a programprogram

Page 2: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Register SetRegister Set

DD3131 DD1616 DD0808 DD0000

D0D0

D7D7D6D6

PCPC

• 8 general-purpose data registers. Word 8 general-purpose data registers. Word operation on Doperation on D0000-D-D1515, byte operation on D, byte operation on D0000-D-D0707

• PC points at the next instruction to be PC points at the next instruction to be executed. executed. 31 0031 00

Page 3: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Address Register: A0-Address Register: A0-A7A7

Memory

10051004

10061007

4A

0E07

57 10051005

A0A0

AA3131 AA1616 AA0000

A0A0A1A1

A7A7

• 8 address registers of 32 bits.8 address registers of 32 bits.

• Information in an address register Information in an address register represents a location in memory.represents a location in memory.

• Special one: A7 is used as stack Special one: A7 is used as stack pointer.pointer.

[M(A0)] = [M(1005)] = 57

Page 4: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Condition Code Condition Code RegisterRegister

• The CCR is updated to reflect the result The CCR is updated to reflect the result of the operation.of the operation.

• Z=1Z=1 if the result is 0if the result is 0

C=1C=1 if there is carry-out from MSBif there is carry-out from MSB

V=1V=1 if there is overflowif there is overflow

N=1N=1 if the result is negativeif the result is negative

Carry

oV

erfl

ow

CCVVZZNNXX0077

Zero

Neg

ativ

e

eX

ten

d

Page 5: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Instruction SetInstruction Set• The 68000 has a large instruction set.The 68000 has a large instruction set.

– Move dataMove data– Modify or operate the dataModify or operate the data– Change execution sequenceChange execution sequence– Determine the operation mode of CPUDetermine the operation mode of CPU

• e.g. e.g. MOVE.BMOVE.B D3,1234D3,1234

MOVE.BMOVE.B #25,D2#25,D2

• Classification of instruction set architectureClassification of instruction set architecture– CISC (Complex instruction set computer):CISC (Complex instruction set computer):

large instruction set, powerful, but difficult to large instruction set, powerful, but difficult to optimizeoptimize codecode

– RISC (Reduced instruction set computer): RISC (Reduced instruction set computer): smaller instruction set, easy to optimize code, but smaller instruction set, easy to optimize code, but longer longer programprogram

Page 6: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Data MovementData Movement

• Register-to-register, register-to-Register-to-register, register-to-memory, memory-to-register, memory-memory, memory-to-register, memory-to-memory, to-memory, constant-to-memory/register.constant-to-memory/register.

• 8-bit, 16-bit, 32-bit correspond to 8-bit, 16-bit, 32-bit correspond to MOVE.B, MOVE.W, MOVE.LMOVE.B, MOVE.W, MOVE.L

• Legal:Legal: Assembler FormAssembler Form RTLRTL

MOVE.B D1,D2MOVE.B D1,D2 [D2] [D2] [D1] [D1]

MOVE.B D3, 1234MOVE.B D3, 1234 [M(1234)] [M(1234)] [D3] [D3]

MOVE.B 1234,2000MOVE.B 1234,2000 [M(2000)] [M(2000)] [M(1234)] [M(1234)]

MOVE.B #12,1234MOVE.B #12,1234 [M(1234)] [M(1234)] 12 12

• Illegal:Illegal: MOVE.B D3,#12MOVE.B D3,#12 12 12 [D3] ??? [D3] ???

Page 7: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Unconditional BranchUnconditional Branch

• BRA: BranchBRA: Branch

BRA BRA address address ; GOTO ; GOTO addressaddressExample:Example:

BRABRA NEXTNEXT

MOVE.BMOVE.B D1,D2D1,D2

NEXTNEXT MOVE.BMOVE.B #1,D4#1,D4

Which instruction will be executed after BRA NEXT is Which instruction will be executed after BRA NEXT is executed?executed?

Page 8: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Conditional Conditional BranchBranch

• BEQ, BNE, BCC, BCS, BVSBEQ, BNE, BCC, BCS, BVSExample:Example:

BCCBCC Check_5 Check_5 IF c=0 THEN branch to IF c=0 THEN branch to Check_5Check_5

MOVE.BMOVE.B D1,D2D1,D2

……

Check_5Check_5 MOVE.BMOVE.B #1,D4#1,D4

BCC Check_5C=0 C=1

Check_5 MOVE.B #1,D4

MOVE.B D1,D2

Page 9: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Conditional Branches Conditional Branches (con.)(con.)

BNEBNE Branch on [CCR(Z)]=0Branch on [CCR(Z)]=0

BEQBEQ Branch on [CCR(Z)]=1Branch on [CCR(Z)]=1

BCCBCC Branch on [CCR(C)]=0Branch on [CCR(C)]=0

BCSBCS Branch on [CCR(C)]=1Branch on [CCR(C)]=1

BVCBVC Branch on [CCR(V)]=0Branch on [CCR(V)]=0

BVSBVS Branch on [CCR(V)]=1Branch on [CCR(V)]=1

• The complete set of 68000 conditional The complete set of 68000 conditional branch instructions is given in Table 5.2 branch instructions is given in Table 5.2 on page 208. (e.g., BLT, BLE, BGT, BGE, on page 208. (e.g., BLT, BLE, BGT, BGE, etc.)etc.)

Page 10: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

CMP and TSTCMP and TST• Useful for changing program flowUseful for changing program flow

• CMP: CompareCMP: Compare– Syntax: CMP src,DnSyntax: CMP src,Dn– Operation: [Dn] - [src]Operation: [Dn] - [src]– Result of - is not savedResult of - is not saved

• TST: Test an operandTST: Test an operand– Syntax: TST destSyntax: TST dest– Compare [dest] to 0, no result saved Compare [dest] to 0, no result saved

• TST D1 is the same as CMP __,D1TST D1 is the same as CMP __,D1

Page 11: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

IFIF X1 = 0X1 = 0 THENTHEN X1 := Y1 X1 := Y1

IF1IF1 MOVE.B X1,D0MOVE.B X1,D0 (or “TST.B X1”)(or “TST.B X1”)

BNE ENDIF1BNE ENDIF1

THEN1THEN1 MOVE.B Y2,X1MOVE.B Y2,X1

ENDIF1ENDIF1 …… other codeother code

Change Program FlowChange Program FlowIF1IF1 Set Flag Set Flag

Test Test Opposite ConditionOpposite Condition andand BR to ENDIF if TRUE BR to ENDIF if TRUETHEN1 IF-PartTHEN1 IF-PartENDIF1 ...ENDIF1 ...

Page 12: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

IFIF X1 = 0X1 = 0 THENTHEN X1 := Y1X1 := Y1ELSEELSE

X1 := Y2X1 := Y2

WrongWrong

IF1IF1 MOVE.B MOVE.B X1,D0X1,D0

BEQ THEN1BEQ THEN1

ELSE1 MOVE.B Y2,X1ELSE1 MOVE.B Y2,X1

THEN1 MOVE.B Y1,X1THEN1 MOVE.B Y1,X1

ENDIF1 …ENDIF1 …

RightRight

IF1IF1 MOVE.B MOVE.B X1,D0X1,D0

BEQ THEN1BEQ THEN1

ELSE1 MOVE.B Y2,X1ELSE1 MOVE.B Y2,X1

BRA ENDIF1BRA ENDIF1

THEN1 MOVE.B Y1,X1THEN1 MOVE.B Y1,X1

ENDIF1 ...ENDIF1 ...

Change Program Flow Change Program Flow (con.)(con.)

Page 13: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

IFIF X1 = 0X1 = 0 THENTHEN X1 := Y1X1 := Y1ELSEELSE

X1 := Y2X1 := Y2

IF1IF1 MOVE.B X1,D0 MOVE.B X1,D0

BNE ELSE1BNE ELSE1

THEN1 MOVE.B Y1,X1THEN1 MOVE.B Y1,X1

BRA ENDIF1BRA ENDIF1 must have this must have this branchbranch

ELSE1 MOVE.B Y2,X1ELSE1 MOVE.B Y2,X1

ENDIF1 ...ENDIF1 ...

Change Program Flow Change Program Flow (con.)(con.)

Page 14: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

WHILE (K > 0) DO SWHILE (K > 0) DO S

WHILEWHILE TST.B KTST.B K

BLE ENDWH test opposite BLE ENDWH test opposite conditioncondition

SS loop body loop body

BRA WHILEBRA WHILE

ENDWH ENDWH ......

Change Program Flow Change Program Flow (con.)(con.)

Page 15: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

FOR I = N1 TO N2 DO SFOR I = N1 TO N2 DO S

MOVE.B N1,D0MOVE.B N1,D0 D0: loop counter D0: loop counter

NEXTNEXT CMP.B N2,D0CMP.B N2,D0

BGT ENDFORBGT ENDFOR

SS loop body loop body

ADD.B #1,D0ADD.B #1,D0

BRA NEXTBRA NEXT

ENDFOR ...ENDFOR ...

Change Program Flow Change Program Flow (con.)(con.)

Page 16: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

• 1 assembly language 1 assembly language instructioninstruction = 1 machine language = 1 machine language instructioninstruction• 1 high-level language 1 high-level language instruction instruction 1 machine language 1 machine language instructionsinstructions

Page 17: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

SubroutineSubroutine … …

BSR ADD12BSR ADD12

… …

BSRBSR ADD12ADD12

… …

ADD12 ADD.B D1,D2ADD12 ADD.B D1,D2

SUB.B SUB.B #12,D2#12,D2

RTSRTS

Page 18: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Data TypingData Typing

• Most high-level language, like Pascal, Most high-level language, like Pascal, Java, Ada, are said to be strongly Java, Ada, are said to be strongly typed.typed.

• Assembly language is not strongly Assembly language is not strongly typed.typed.

• How about C/C++?How about C/C++?– Example: A character can be multiplied by Example: A character can be multiplied by

an integer.an integer.• JAVA?JAVA?

Page 19: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Data Typing Data Typing (con.)(con.)

ORGORG $1000$1000

AA DC.BDC.B $12$12

BB DC.WDC.W $3456$3456

CC DS.BDS.B 11

DD DS.LDS.L 11

MOVE.BMOVE.B A,D0A,D0ADD.BADD.B B,D0B,D0 [D0] [D0] $12 + $34 $12 + $34

MOVE.BMOVE.B A,D0A,D0ADD.WADD.W B,D0B,D0 [D0] [D0] $12 + $3456 $12 + $3456

MOVE.LMOVE.L A,D0A,D0ADD.LADD.L B,D0B,D0 [D0] [D0] ? ?

1212 0000

0000 00003434 5656

A A 10001000B B 10021002C C 10041004

0000 00000000 0000

MOVE.WMOVE.W A,D0A,D0ADD.WADD.W B,D0B,D0 [D0] [D0] $1200 + $1200 + $3456$3456

Memory MapMemory Map

D 1006D 1006

Page 20: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Arithmetic Arithmetic OperationOperation

• ADD, SUB, CLR, NEG, ASL, ASRADD, SUB, CLR, NEG, ASL, ASR• ADD.B 1234,D3ADD.B 1234,D3 ; [D3] ; [D3] [M(1234)]+[D3] [M(1234)]+[D3]• The CCR is updated accordingly.The CCR is updated accordingly.• Example: V3 = V1 + V2Example: V3 = V1 + V2

signed integerssigned integers unsigned integers unsigned integers

ORGORG $400$400V1V1 DC.BDC.B 1212V2V2 DC.BDC.B 1414V3V3 DS.BDS.B 11

ORGORG $600$600MOVE.BMOVE.B V1,D0V1,D0ADD.B ADD.B V2,D0V2,D0MOVE.B MOVE.B D0,V3D0,V3BVSBVS Error1Error1......

ORGORG $400$400V1V1 DC.BDC.B 1212V2V2 DC.BDC.B 1414V3V3 DS.BDS.B 11

ORGORG $600$600MOVE.BMOVE.B V1,D0V1,D0ADD.B ADD.B V2,D0V2,D0MOVE.B MOVE.B D0,V3D0,V3BCSBCS Error1Error1......

Are the codescorrect?

Data

Program Where is

the right place for BVS/BCS?

Page 21: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Arithmetic Operation Arithmetic Operation (con.)(con.)

Subtraction: SUB src, destSubtraction: SUB src, dest ; [dest] ; [dest] [dest] - [src] [dest] - [src]

• SUB.BSUB.B D2,D0 ; [D0(0:7)] D2,D0 ; [D0(0:7)] [D0(0:7)] - [D2(0:7)] [D0(0:7)] - [D2(0:7)]

SUB.WSUB.W D2,D0 ; [D0(0:15)] D2,D0 ; [D0(0:15)] [D0(0:15)] - [D2(0:15)] [D0(0:15)] - [D2(0:15)]

SUB.LSUB.L D2,D0 ; [D0] D2,D0 ; [D0] [D0] - [D2] [D0] - [D2]

ClearClear

• CLR.BCLR.B D0 ; [D0(0:7)] D0 ; [D0(0:7)] 0 0

Negation: negative value, i.e,, 2’s complementNegation: negative value, i.e,, 2’s complement

• NEG.BNEG.B D4D4 ; 2’s complement of D4 ; 2’s complement of D4

If [D4] = 01101100, after [D4] = 10010100If [D4] = 01101100, after [D4] = 10010100

Page 22: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

ASL (Arithmetic Shift ASL (Arithmetic Shift Left)Left)

• Format: Format: – ASL #n,dest ASL #n,dest

or or

ASL DASL Dii,dest,dest

shifts bits in dest LEFT by n or [Dshifts bits in dest LEFT by n or [Dii] places, respectively] places, respectively

• The bit shifted out is shifted in C-bit of CCR.The bit shifted out is shifted in C-bit of CCR.

• Example: ASL.B #3,D0Example: ASL.B #3,D0[D0] = 0 1 0 1 1 1 0 0[D0] = 0 1 0 1 1 1 0 0

[C]=0[C]=0 1 0 1 1 1 0 0 0 1 0 1 1 1 0 0 0[C]=1[C]=1 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0[C]=0[C]=0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0

OperandOperandCC 00

Page 23: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

ASL (Arithmetic Shift ASL (Arithmetic Shift Left)Left)

• Why is ASL useful?Why is ASL useful?ASL is the fastest way to perform ASL is the fastest way to perform

““multiply by 2’s power”multiply by 2’s power”

• ASL dest = ASL #1,destASL dest = ASL #1,dest

• What does ASL #n, dest do?What does ASL #n, dest do?[dest] [dest] [dest] x 2 [dest] x 2nn

How to multiply D0 by 2 ?How to multiply D0 by 2 ?

[D0] = 00000110[D0] = 00000110 661010

After ASL.B #1,D0After ASL.B #1,D0

[D0] = 00001100[D0] = 00001100 12121010

Can ASR Can ASR cause cause overflow?overflow?

Page 24: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

ASR (Arithmetic Shift ASR (Arithmetic Shift Right)Right)

Example: [D0] = -22 = 11101010Example: [D0] = -22 = 11101010After After “ASR.B #1,D0”“ASR.B #1,D0”

[D0] = 11110101 = -11[D0] = 11110101 = -11[CCR(c)] = 0[CCR(c)] = 0

OperandOperand CCMSBMSB

• Same as ASL, but Same as ASL, but – bits shifted to RIGHTbits shifted to RIGHT

– MSB is duplicated back into MSB (Why?)MSB is duplicated back into MSB (Why?)

• ASR.B #1,D0 is equivalent to ASR.B #1,D0 is equivalent to dividing D0 by 2dividing D0 by 2

How to How to dividedivide

D1 by 32 ?D1 by 32 ?Can ASR Can ASR cause cause overflow?overflow?

Page 25: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Effect of Arithmetic Operations on Effect of Arithmetic Operations on CCRCCR• Addition:Addition:

1, if carry out from MSB 1, if carry out from MSB C = C = 0, otherwise0, otherwise

1, if operands are of same sign and1, if operands are of same sign andV = V = their sum is of the opposite sign their sum is of the opposite sign 0, otherwise0, otherwise

____ ____ ____

V= aV= an-1n-1 b bn-1n-1 s sn-1 n-1 + a+ an-1 n-1 b bn-1n-1 s sn-1 n-1

where awhere an-1n-1, b, bn-1n-1, s, sn-1 n-1 are the MSBs of are the MSBs of

source destination and result, respectivelysource destination and result, respectively

Page 26: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Effect of Arithmetic Operations on Effect of Arithmetic Operations on CCRCCR

• Subtraction:Subtraction: 1, if NO carry out from MSB 1, if NO carry out from MSB C = C = 0, otherwise0, otherwise

1, if operands are of opposite sign and1, if operands are of opposite sign andV = V = the result is of same sign as the source the result is of same sign as the source 0, otherwise0, otherwise

____________

V= (aV= (an-1n-1 b bn-1n-1) ) (d (dn-1 n-1 a an-1n-1))

where awhere an-1n-1, b, bn-1n-1, d, dn-1 n-1 are the MSBs of are the MSBs of

source destination and result, respectivelysource destination and result, respectively

Page 27: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Logical OperationLogical Operation

• AND, OR, EOR, NOTAND, OR, EOR, NOT• If If [D0] = 11110000[D0] = 11110000

AND.B #%10100110,D0 AND.B #%10100110,D0 ;[D0]=10100000;[D0]=10100000

OR.B #%10100110,D0OR.B #%10100110,D0 ;[D0]=11110110;[D0]=11110110

EOR.B #%10100110,D0EOR.B #%10100110,D0 ;[D0]=01010110;[D0]=01010110

Page 28: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Use Use RegistersRegisters

• Accesses to data registers are faster than Accesses to data registers are faster than accesses to memory.accesses to memory.

• Shorter instruction, 3 bits to indicate either Shorter instruction, 3 bits to indicate either one of 8 general-purpose registers.one of 8 general-purpose registers.

• Use comments to indicate how registers Use comments to indicate how registers are used in program.are used in program.

* GetChar:* GetChar: Input an ASCII-coded character into D0Input an ASCII-coded character into D0* Input Parameters:* Input Parameters: NoneNone* Output parameters:* Output parameters: ASCII character in D0, Error code in D6ASCII character in D0, Error code in D6* Registers modified: D0, D1, D6* Registers modified: D0, D1, D6GetCharGetChar MOVE.BMOVE.B ACIAC,D1ACIAC,D1

BTST.BBTST.B #RDRF,D1#RDRF,D1BEQBEQ GetCharGetCharMOVE.BMOVE.B ACIAC,D0ACIAC,D0AND.BAND.B #%01111100,D1#%01111100,D1MOVE.BMOVE.B D1,D6D1,D6RTSRTS

Page 29: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Addressing Addressing ModesModes• Concerned with the way in which data is Concerned with the way in which data is

accessed (where operand can be found) accessed (where operand can be found) • Data register direct, absolute, Data register direct, absolute,

immediate, and address register indirect.immediate, and address register indirect.• Looking for a house in a familiar Looking for a house in a familiar

neighborhood, “The house next to Tim’s” neighborhood, “The house next to Tim’s” (relative location) is enough.(relative location) is enough.

• Looking for a house in a new Looking for a house in a new environment, “61 William Street” (actual environment, “61 William Street” (actual address) is necessary, even with a city address) is necessary, even with a city name.name.

Page 30: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Absolute Absolute AddressingAddressing

• Use the actual or absolute address of the operand, Use the actual or absolute address of the operand, e.g. CLR.B $234e.g. CLR.B $234

• MOVE.B D2, $2000MOVE.B D2, $2000The source is data The source is data register directregister direct, a type of , a type of absolute addressing mode. $2000 is memory absolute addressing mode. $2000 is memory location 2000location 2000

• Symbols can also be usedSymbols can also be usedExample:Example:

MOVE.BMOVE.B Input,D0Input,D0

SUB.BSUB.B Time,D0Time,D0

Page 31: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Immediate Immediate AddressingAddressing• MOVE.B #25,D2MOVE.B #25,D2 ; [D2] ; [D2] 25 25• Immediate addressing is faster than Immediate addressing is faster than

the absolute addressing.the absolute addressing.• Data 25 is part of the instruction Data 25 is part of the instruction

stored in IR. stored in IR.

Absolute Addressing:

Hours DC.B 25ADD.B Hours,D2

Immediate Addressing:

Hours EQU 25ADD.B

#Hours,D2

What about “ADD.B #Hours,D2What about “ADD.B Hours,D2

Page 32: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

MOVE.BMOVE.B P,D0 P,D0

CMP.BCMP.B #7,D0 #7,D0

BLEBLE OutOfRange OutOfRange

CMP.BCMP.B #25,D0 #25,D0

BGEBGE OutOfRange OutOfRange

MOVE.BMOVE.B #6,X #6,X

OutOfRangeOutOfRange ……

IF 7<P<25 THEN IF 7<P<25 THEN X := 6 X := 6

if ((7<P) && (P<25))if ((7<P) && (P<25)) X = 6; X = 6;

X := 0X := 0FOR I := 1 TO 10 FOR I := 1 TO 10 X = X + I X = X + I

X = 0;X = 0;for (I = 1; I <= 10; I+for (I = 1; I <= 10; I++)+) X = X + I; X = X + I;

CLR.BCLR.B D1D1 D1: X D1: X

MOVE.B MOVE.B

#1,D0#1,D0 D0: I D0: I

NEXTNEXT ADD.B ADD.B D0,D1D0,D1

ADD.B ADD.B #1,D0#1,D0

CMP.B CMP.B #10,D0#10,D0

BLEBLE NEXTNEXT

MOVE.B D1,XMOVE.B D1,X

Page 33: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Address Register Address Register IndirectIndirect• The address of an operand is found in an address register, A0 to A7The address of an operand is found in an address register, A0 to A7

• Pointer or referencePointer or reference

• MOVEA: copy an address to address regMOVEA: copy an address to address reg

• MOVEA.L #$1000,A0MOVEA.L #$1000,A0

CLR.B CLR.B (A0) (A0)

same effect as same effect as

CLR.B $1000CLR.B $1000

10001000 A0A0100010000FFF0FFF

100110011002100210031003

0000

Page 34: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Indirect AddressingIndirect Addressing• Two accesses: Two accesses:

1) to the address register A0 to find the 1) to the address register A0 to find the actual address of operand, 1000. actual address of operand, 1000.

2) to the memory location 1000 to get 2) to the memory location 1000 to get the operand.the operand.

• Why is address register indirectWhy is address register indirect addressing useful?addressing useful?

Page 35: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Example: Add 100 numbers Example: Add 100 numbers together, the data starts at memory together, the data starts at memory location 2000location 20001616

MOVE.B $2000,D0MOVE.B $2000,D0

ADD.B ADD.B $2001,D0 $2001,D0

ADD.B ADD.B $2002,D0 $2002,D0

ADD.B ADD.B $2003,D0 $2003,D0

::

ADD.B ADD.B $2063,D0 $2063,D0

CLR.B CLR.B D0 D0

MOVEA.L #$2000,A0MOVEA.L #$2000,A0

NEXTNEXT ADD.B ADD.B (A0),D0 (A0),D0

ADDA.L #1,A0ADDA.L #1,A0

CMPA.L #$2064,A0CMPA.L #$2064,A0

BNE BNE NEXT NEXT

Page 36: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Different AddressingDifferent Addressing 1 1 * Program to test the different addressing modes. * Program to test the different addressing modes. 2 2 * [D2] * [D2] [M(0)] + 26. [M(0)] + 26. By Mingrui ZhangBy Mingrui Zhang 3 3 4 00001000 4 00001000 ORG ORG $1000$1000 5 00001000 1A ABSOL: DC.B5 00001000 1A ABSOL: DC.B 2626 6 0000001A6 0000001A IMMED: EQU IMMED: EQU 2626 7 7 8 00002000 ORG 8 00002000 ORG $2000$2000 9 00002000 207C00001000 MOVEA.L 9 00002000 207C00001000 MOVEA.L #$1000,A0#$1000,A0 10 00002006 24380000 MOVE.L 10 00002006 24380000 MOVE.L $0,D2$0,D2 11 0000200A D410 ADD.B 11 0000200A D410 ADD.B (A0),D2(A0),D2 12 12 13 0000200C 24380000 MOVE.L 13 0000200C 24380000 MOVE.L $0,D2$0,D2 14 00002010 D4381000 ADD.B 14 00002010 D4381000 ADD.B ABSOL,D2ABSOL,D2 15 15 16 00002014 24380000 MOVE.L 16 00002014 24380000 MOVE.L $0,D2$0,D2 17 00002018 0602001A ADD.B 17 00002018 0602001A ADD.B #IMMED,D2#IMMED,D2 18 18 19 0000201C 4E722700 STOP 19 0000201C 4E722700 STOP #$2700#$2700 20 00002000 END 20 00002000 END $2000$2000

Page 37: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

The Teesside MC68000 Cross-The Teesside MC68000 Cross-assembler and Simulatorassembler and Simulator

Desing the programDesing the program

Edit source fileEdit source file

Cross-assemble the programCross-assemble the program

Run the programRun the program

TOOLSTOOLS FILESFILES

text editor Test.X68text editor Test.X68

X68KX68K Test.BIN (and Test.BIN (and Test.LIS)Test.LIS)

E68KE68K

Page 38: Chapter 3 Introduction to the 68000 Register Set: data, address, condition code, status. Register Set: data, address, condition code, status. Basic Instruction.

Debugging Debugging CommandsCommands• HELP: Provide information about commandsHELP: Provide information about commands• MD (.): Displays the contents of memoryMD (.): Displays the contents of memory

e.g. MD 400e.g. MD 400

MD 400 -DI ;disassemble the contents ofMD 400 -DI ;disassemble the contents of

memory.memory.• MM: Memory modificationMM: Memory modification

e.g. MM 400 -Be.g. MM 400 -B MM 2100 -WMM 2100 -W

MM 400 -B -DECMM 400 -B -DEC MM 2100 -W -DECMM 2100 -W -DEC• DF: Displays the contents of all registersDF: Displays the contents of all registers• .PC: set PC.PC: set PC

e.g. .PC 400e.g. .PC 400• GO: Execute program, (ESC to escape)GO: Execute program, (ESC to escape)• TR: Executes a single instruction at a timeTR: Executes a single instruction at a time• BR 10000: Places a marker at location 10000BR 10000: Places a marker at location 10000• QU: QuitQU: Quit


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