1

EECS 150 - Components and Design Techniques for Digital Systems

Lec 24 –Power, Power, Power11/27/2007

David CullerElectrical Engineering and Computer Sciences

University of California, Berkeley

http://www.eecs.berkeley.edu/~cullerhttp://inst.eecs.berkeley.edu/~cs150

2

Broad Technology Trends

Today: 1 million transistors per $

Moore’s Law: # transistors on cost-effective chip doubles every 18 months

Mote!years

ComputersPer Person

103:1

1:106

Laptop

PDA

Mainframe

Mini

WorkstationPC

Cell

1:1

1:103

Bell’s Law: a new computer class emerges every 10 years

Same fabrication technology provides CMOS radios for communication and micro-sensors

3

Sustaining Moore’s Law

“If unchecked, the increasing power requirements of computer chips could boost heat generation to absurdly high levels,” said Patrick Gelsinger, Intel’s

CTO is reported to have said.

“By mid-decade, that Pentium PC may need the power of a nuclear reactor. By

the end of the decade, you might as well be feeling a rocket nozzle than

touching a chip. And soon after 2010, PC chips could feel like the bubbly hot

surface of the sun itself,”

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Power, Power, Power

• IT devices represent 2% of global CO2 emissions worldwide

years

ComputersPer Person

103:1

1:106

Laptop

PDA

Mainframe

Mini

WorkstationPC

Cell

1:1

1:103

Mote!

Mobile telecom, 9%

LAN and office telecom, 7%

Fixed-line Telecom, 15%

Printers, 6%

Servers, 23%

PCs and Monitors, 39%

Source Gartner

5

What is EECS150 about?

Transfer Function

Transistor Physics

Devices

Gates

Circuits

FlipFlops

EE 40

HDL

Machine Organization

Instruction Set Arch

Pgm Language

Asm / Machine Lang

CS 61C

Deep Digital Design Experience

Fundamentals of Boolean Logic

Synchronous Circuits

Finite State Machines

Timing & Clocking

Device Technology & Implications

Controller Design

Arithmetic Units

Bus Design

Encoding, Framing

Testing, Debugging

Hardware Architecture

HDL, Design Flow (CAD)

6

Data Centers

• 1.5% of total US energy consumption in 2006

• 60 Billion kWh• Doubled in past 5 years

and expected to double in next 5 to 100 Billion kWh

– 7.4 B$ annually

EPA report aug 4 2007 delivered to congress in response to public law 109-431

Client

years

ComputersPer Person

103:1

1:106

Laptop

PDA

Mainframe

Mini

WorkstationPC

Cell

1:1

1:103

Mote!

48% of IT budget spent on energy

50% of data center power goes into cooling

1 MW DC => 177 M kwH + 60 M gals water + 145 K lbs copper + 21 k lbs lead

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Servers: Total Cost of Ownership (TCO)

Machine rooms are expensive … removing heat dictates how many servers can fit

Electric bill adds up! Powering the servers + powering the air conditioners is a big part of TCO

Reliability: running computers hot makes them fail more often

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M. K. Patterson, A. Pratt, P. Kumar, “From UPS to Silicon: an end-to-end evaluation of datacenter efficiency”, Intel Corporation

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+1V -

1 Ohm Resistor

1A0.24 Calories per Second

Heats 1 gram of water 0.24 degree C

This is how electric tea pots work ...

1 Joule of Heat Energy per Second

1 Watt

20 W rating: Maximum power the package is able to transfer to the air. Exceed rating and resistor burns.

P watts = I amps * V volts

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Basics

• Warning! In everyday language, the term “power” is used incorrectly in place of “energy”

• Power is not energy– E = P * T

• Power is not something you can run out of

• Power can not be lost or used up

• It is not a thing, it is merely a rate

• It can not be put into a battery any more than velocity can be put in the gas tank of a car

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Data Center Power Usage Today

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PC

• HPxw4200– 180 w active with two LCDs– 130 w w/o monitor, 110 w idle, – 6 w suspend

• 60% are left on around the clock• 15% of all office power• US:

– 1.72 B$ & 15 M tons CO2 annually

• Mid size company:– 165 K$ & 1400 tons of CO2

• Existing power mgmt (hibernation) can reduce by 80%

=> Do nothing well

PC Energy Report 2007, 1E

Client

EnterpriseServer

J2EESOAP

years

ComputersPer Person

103:1

1:106

Laptop

PDA

Mainframe

Mini

WorkstationPC

Cell

1:1

1:103

Mote!

13

Do Nothing Well

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Notebooks ... now most of the PC market

Performance: Must be “close enough” to desktop performance ... many people no longer own a desktop

Heat: No longer “laptops” -- top may get “warm”, bottom “hot”. Quiet fans OK

Size and Weight: Ideal: paper notebook

1 in

8.9 in

12.8 in

Apple MacBook -- Weighs 5.2 lbs

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Battery: Set by size and weight limits ...

Almost full 1 inch depth. Width and height set by available space, weight.

Battery rating: 55 W-hour

At 2.3 GHz, Intel Core Duo CPU consumes 31 W running a heavy load - under 2 hours battery life! And, just for CPU!

At 1 GHz, CPU consumes 13 Watts. “Energy saver” option uses this mode ...

46x energy than iPod nano. iPod lets you listen to music for 14 hours!

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Battery Technology

• Battery technology has developed slowly• Li-Ion and NiMh still the dominate technologies• Batteries still contribute significantly to the

weight of mobile devices

Toshiba Portege 3110 laptop - 20%

Handspring PDA - 10%

Nokia 61xx - 33%

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55 W-hour battery stores the energy of

1/2 a stick of dynamite.

If battery short-circuits, catastrophe is possible ...

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CPU Only Part of Power Budget

2004-era notebook running a full workload.

If our CPU took no power at all to run, that would only double battery life!CPULCD

Backlight

“other”

LCD

GPU

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Automobiles700 Million

Telephones4 Billion

Electronic Chips60 Billion

X-Internet

“X-Internet” Beyond the PC

Forrester Research, May 2001Revised 2007

500Million

1.5 Billion

Internet Computers

Internet UsersToday’s Internet

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“X-Internet” Beyond the PC

Forrester Research, May 2001

0

5000

10000

15000

2001

2002

2003

2004

2005

2006

2007

2008

2009

2010

Millions

Year

XInternet

PCInternet

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Cooling an iPod nano ...

Like a resistor, iPod relies on passive transfer of heat from case to the airWhy? Users don’t want fans in their pocket ...

To stay “cool to the touch” via passive cooling, power budget of 5 W

If iPod nano used 5W all the time, its battery would last 15 minutes ...

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Powering an iPod nano (2005 edition)

Battery has 1.2 W-hour rating: Can supply 1.2 W of power for 1 hour

1.2 W / 5 W = 15 minutes

Real specs for iPod nano : 14 hours for music, 4 hours for slide shows

85 mW for music300 mW for slides

More W-hours require bigger battery and thus bigger “form factor” -- it wouldn’t be “nano” anymore!

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0.55 ounces

12 hour battery life

$79.00

1 GB

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12 hour battery life

24 hour battery life for audio

5 hour battery life for photos

20 hour battery life for audio, 6.5 hours for movies (80GB version)

Up from 14 hours for 2005 iPod nano

Up from 4 hours for 2005

iPod nano

Thinner than 2005 iPod nano

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What’s in the iPhone?

http://www.anandtech.com/printarticle.aspx?i=3026

Battery

WiFI antenna

GSM antenna

Motherboard

USB & GSM

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What’s in your iPhone?

• 3 ARM processors

WiFi & Most of Cell Phone

Main Processor

ARM1176 + 1GB mem

4 GB NAND Flash

LCD i/f

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iPhone Parts (?)

• Baseband processor: Infineon – S-Gold3/ARM926?

• Applications/video processor: Samsung/ARM10 or 11

• 802.11 chip: Marvell/ARM9? • Touchscreen controller: Broadcom • Touchscreen: Balda/TPK • Bluetooth: CSR • USB IC: Alcor, Phison • Audio: Wolfson • Memory module: A-Data, Transcend • Flash memory: Samsung, Toshiba,

Hynix • Position sensor (MEMS?):

STMicroelectronics, Analog devices? • Light sensor: ??? • Proximity sensor: ???

• Camera sensor: Micron? • Camera module: Altus or Lite-On

Technology, Primax Electronics • Camera lens: Largan Precision • Microphone: ??? • Power management: NXP? • Passives: Cyntec • Quartz: TXC • Assembly: Foxconn, FIH • Casing & mechanical parts:

Foxconn & Catcher • Push button: Sunrex • Connectors & cable: Entery, Cheng

Uei, Foxlink, Advanced Connectek • PCB: Unimicron & Tripod

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UCB Mote Platforms

*

* Crossbow variation

*

years

ComputersPer Person

103:1

1:106

Laptop

PDA

Mainframe

Mini

WorkstationPC

Cell

1:1

1:103

Mote!

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Key Design Elements

• Efficient wireless protocol primitives• Flexible sensor interface• Ultra-low power standby• Very Fast wakeup• Watchdog and Monitoring• Data SRAM is critical limiting resource

proc

DataSRAM pgm

EPROM

timersSensor Interface digital sensors

analog sensorsADC

Wireless NetInterface

Wired NetInterface

RFtransceiver

antenna

serial linkUSB,EN,…

Low-powerStandby & Wakeup

Flash Storage

pgm images

data logs

WD

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TinyOS-driven architecture

• 3K RAM = 1.5 mm2

• CPU Core = 1mm2

– multithreaded

• RF COMM stack = .5mm2

– HW assists for SW stack

• Page mapping • SmartDust RADIO = .25 mm2

• SmartDust ADC 1/64 mm2

• I/O PADS

• Expected sleep: 1 uW – 400+ years on AA

• 150 uW per MHz• Radio:

– .5mm2, -90dBm receive sensitivity– 1 mW power at 100Kbps

• ADC: – 20 pJ/sample – 10 Ksamps/second = .2 uW. jhill mar 6, 2003

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Microcontrollers

• Memory starved– Far from Amdahl-Case 3M rule

• Fairly uniform active inst per nJ– Faster MCUs generally a bit better– Improving with feature size

• Min operating voltage– 1.8 volts => most of battery energy– 2.7 volts => lose half of battery energy

• Standby power– substantial improvement in 2003– Probably due to design focus– Fundamentally SRAM leakage– Wake-up time is key

• Trade sleep power for wake-up time

– Memory restore

DMA Support: permits ADC sampling while processor is sleeping

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What we mean by “Low Power”

• 2 AA => 1.5 amp hours (~4 watt hours)• Cell => 1 amp hour (3.5 watt hours)

Cell: 500 -1000 mW => few hours activeWiFi: 300 - 500 mW => several hoursGPS: 50 – 100 mW => couple days

WSN: 50 mW active, 20 uW passive450 uW => one year45 uW => ~10 years

Ave Power = fact * Pact + fsleep * Psleep + fwaking * Pwaking

* System design

* Leakage (~RAM)

* Nobody fools mother nature

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Mote Power States at Node Level

Sleep WakeUP Work Sleep WakeUP Work

Active Active

Telos: Enabling Ultra-Low Power Wireless Research, Polastre, Szewczyk, Culler, IPSN/SPOTS 2005

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Radios

• Trade-offs: – resilience / performance => slow wake up– Wakeup vs interface level– Ability to optimize vs dedicated support

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Power to Communicate

0

20

40

60

80

100

120

140

0 1 2 3 4 5

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Multihop Routing

• Upon each transmission, one of the recipients retransmits

– determined by source, by receiver, by …– on the ‘edge of the cell’

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Energy Profile of a Transmission

• Power up oscillator & radio (CC2420)

• Configure radio• Clear Channel

Assessment, Encrypt and Load TX buffer

• Transmit packet• Switch to rcv mode,

listen, receive ACK

10mA

20mA

5 ms 10 ms

DatasheetAnalysis

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Example: TX maximum packet

0

5

10

15

20

25

-15 -10 -5 0 5 10 15

ms

mA

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The “Idle Listening” Problem

• The power consumption of “short range” (i.e., low-power) wireless communications devices is roughly the same whether the radio is transmitting, receiving, or simply ON, “listening” for potential reception

– includes IEEE 802.15.4, Zwave, Bluetooth, and the many variants– WiFi too!– Circuit power dominated by core, rather than large amplifiers

• Radio must be ON (listening) in order receive anything.

– Transmission is infrequent. Reception α Transmit x Density– Listening (potentially) happens all the time

⇒Total energy consumption dominated by idle listening

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Communication Power Consumption

Sleep~10 uA

Transmit~20 mA x 1-5 ms[20 - 100 uAs]

I

I

Time

Time

Listen~20 mA

Receive~20 mA x 2-6 ms

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Announcements

• Project Check-offs this week– TAs posting extra “office hours” for use of slip days

• Dr. Robert Iannucci, Nokia on Thurs– Bring questions, show off projects

• Short HW 10 out tonight– Due next wed.

• Wrap-up and Course Survey 12/4• Project Demos Friday 12/7

– Signup sheet is posted– 5 min demo + 5 min Q&A– Set up 20 mins in advance

• Final Exam Group: 15: TUESDAY, DECEMBER 18, 2007 5-8P

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• Power supply provides energy for charging and discharging wires and transistor gates. The energy supplied is stored & then dissipated as heat.

• If a differential amount of charge dq is given a differential increase in energy dw, the potential of the charge is increased by:

• By definition of current:dqdwV /=

dtdqI /=

dtdwP /≡Power: Rate of work being done wrt time

Rate of energy being used

IVPdt

dq

dq

dwdtdw ×==×=/

∫∞−

=t

Pdtw total energy

Units: tEP ∆= Watts = Joules/seconds

A very practical formulation!

If we would liketo know total energy

Basics – Power and Digital Design

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Recall: Transistor-level Logic Circuits

• Inverter (NOT gate):Vdd

Gnd

Vdd

Gnd0 volts

in out

3 volts

what is the relationship

between in and out?

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Older Logic Families have Pullup R

nMOS Inverter

R

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Power in CMOS

C

p u l l u pn e t w o r k

p u l l d o w nn e t w o r k

V d d

G N D

10

i ( t )

v ( t )t 0 t 1

v ( t )

V d d

Switching Energy: energy used to switch a node

Energy supplied Energy dissipatedEnergy stored

Calculate energy dissipated in pullup:

222 2121

)()()()()(

1

0

1

0

1

0

1

0

1

0

dd

t

t

t

t dddddd

t

t dd

t

t dd

t

tsw

cVcVcVdvvcdvcV

dtdtdvcvVdttivVdttPE

=−=⋅−=

=⋅−=⋅−==

∫ ∫∫∫∫

An equal amount of energy is dissipated on pulldown

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Switching Power

• Gate power consumption:– Assume a gate output is switching its output at a rate of:

1 / f

P a v g

c l o c k f

f⋅α

swavg ErateswitchingtEP ⋅=∆=

221 ddavg cVfP ⋅⋅= α

221 ddavgavgavg VcfnP ⋅⋅⋅= α

• Chip/circuit power consumption:

activity factor clock rate

Therefore:

number of nodes (or gates)

(probability of switching on any particular clock period)

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Other Sources of Energy Consumption

• “Short Circuit” Current:

V o u t

V i n

V i n

I

I

V o u tV i n

I

V

D i o d eC h a r a c t e r i s t i c10-20% of total chip power

~1nWatt/gatefew mWatts/chip

Transistor drain regions“leak” charge to substrate.

• Junction Diode Leakage :

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Other Sources of Energy Consumption

• Consumption caused by “DC leakage current” (Ids leakage):

• This source of power consumption is becoming increasing significant as process technology scales down

• For 90nm chips around 10-20% of total power consumption Estimates put it at up to 50% for 65nm

I o f f

V o u t = V d dV i n = 0

I d s

V g sV t hTransistor s/d conductance

never turns off all the way

Low voltage processes much worse

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Controlling Energy Consumption: What Control Do You Have as a Designer?

• Largest contributing component to CMOS power consumption is switching power:

• Factors influencing power consumption:– n: total number of nodes in circuit�α: activity factor (probability of each node switching)– f: clock frequency (does this effect energy consumption?)– Vdd: power supply voltage

• What control do you have over each factor? • How does each effect the total Energy?

221 ddavgavgavg VcfnP ⋅⋅⋅= α

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Example

• What is the cost of optimistic compute and select?

• How might we reduce it?

A B Operand Registers

add/sub and/or cmp

R

MUX

Result Register

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Discussion: Digital Design and Power

• Think about…– n�α– f– c– Vdd

• In – Function units– Registers, FSMs, Counters– Busses– Clock distribution

221 ddavgavgavg VcfnP ⋅⋅⋅= α

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Technology Scaling and Design Learning

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Scaling Switching Energy per GateMoore’s Lawat work …

From: “Facing the Hot Chips Challenge Again”, Bill Holt, Intel, presented at Hot Chips 17, 2005.

Due to reduced V and C (length and width of Cs decrease, but plate distance gets smaller)

Recent slope reduced because V is scaled less aggressively

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Device Engineers Trade Speed and Power

:F r o m -1 0 - S ilic o n D e v ic e S c a lin g t o t h e S u b n m R e g im e ,M e ik e i Ie o n g 1 * ,B r u c e D o r is 2 ,J a k u b K e d z ie r s k i 1 ,K e n R im 1 M in Ya n g 1

We can reduce leakage (Pstandby) by raising Vt

We can increase speed by raising Vdd and lowering Vt

We can reduce CV2 (Pactive) by lowering Vdd

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Customize processes for product types ...

From: “Facing the Hot Chips Challenge Again”, Bill Holt, Intel, presented at Hot Chips 17, 2005.

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Intel: Comparing 2 CPU Generations ...

Clock speed unchanged ... Lower Vdd, lower C,

but more leakage

Design tricks: architecture & circuits

Find enough tricks, and you can afford to raise Vdd a little so that you can raise the clock speed!

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Switching Energy: Fundamental Physics

Vdd

C

1

2 C Vdd

E1->0

= 21

2 C Vdd

E0->1

= 2

Vdd

Every logic transition dissipates energy

Strong result: Independent of technology

How can we limit

switching energy?

(1) Slow down clock (fewer transitions). But we like speed ...(2) Reduce Vdd. But lowering Vdd lowers the clock speed ...(3) Fewer circuits. But more transistors can do more work.(4) Reduce C per node. One reason why we scale processes.

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0V =

Second Factor: Leakage CurrentsEven when a logic gate isn’t switching, it burns power …

Igate: Ideal capacitors have zero DC current. But modern transistor gates are a few atoms thick, and are not ideal.

Isub: Even when this nFet is off, it passes an Ioff leakage current.

We can engineer any Ioffwe like, but a lower Ioff also results in a lower Ion, and thus the lower the clock speed.

Intel’s current processor designs, leakage vs switching power

A lot of work was done to get a ratio this good ... 50/50 is common.

Bill Holt, Intel, Hot Chips 17.

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Engineering “On” Current at 25 nm ...

I ds

Vs

Vd

V g

0.7 = Vdd

0.25 ≈ Vt

I ds

1.2 mA = Ion

Ioff

= 0 ???

We can increase Ion by raising Vdd and/or lowering Vt.

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Plot on a “Log” Scale to See “Off” Current

IdsV

s

Vd

Vg I

ds

Ioff

≈ 10 nA

We can decrease Ioff by raising Vt - but that lowers Ion

0.25 ≈ Vt

1.2 mA = Ion

0.7 = Vdd