Chemical/Mechanical Balance Management through Pad Microstructure in Si CMP

Post CMP Cleaning Austin 2017 | Ratanak Yim (Viorel Balan)

R. Yim1,2,5, C. Perrot2, V. Balan1, P-Y. Friot3, B. Qian3, N. Chiou3, G. Jacob3, E. Gourvest2, F. Salvatore4, S. Valette5 1 CEA LETI, Univ. Grenoble Alpes, 2 STMicroelectronics, 3 Dow Electronic Materials, 4 ENISE, 5 Univ. Lyon, Ecole Centrale de Lyon

| 2

Perfectsurfacequalityinordertobuildthe2ndtransistor

Si

Si

Si

SiO2

SiO2

SOIwafer

First gate fabrication

Insulator planarization Direct bonding Second gate

fabrication Multilayer

metal contact

Bonding Interface

Si CMP

▌ Planarization Challenges: § Si Thickness Control :SPEC < 10nm + Si Range < 1nm

Bonding Interface

Si CMP Challenges for 3D Monolithic CoolCubeTM

Excellent Silicon Surface Quality with Low Material Consumption

PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

| 3

Outline

PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

•  Chemical and Mechanical Synergy of the CMP Process

•  Conclusion

•  Correlation Results Between Wafer Surface Quality and Pad Microstructure in Advanced Si CMP

Chemical action Mechanical action

CMP

Si Wafer Pad

| 4 PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

CMP: CoMPlex Process

SYNERGY between :

CHEMICAL action

SLURRY Chemistry

MECHANICAL action PAD

+ Abrasive particles

Mechanical Removal Surface Chemical Modification

PAD

Material

Chemical/Mechanical Balance to Adapt to Each CMP Process

CMP

| 5 PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

Pad Characteristics and its Actions

CHEMICAL action Pores + Grooves à Slurry Transport

MECHANICAL action Pores + Asperities à Wafer Contact

The Pad Plays a Major Role in the Chemical/Mechanical Balance of the CMP Process

PAD

Pores Pores

CMP

| 6

Item Pore size Porosity Pad A Extra Small Medium Pad B Small High Pad C Small Extreme high Pad D Large High

PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

Pad Porosity

|6

4 Pads with Different Pore Sizes and Porosities Evaluated for Advanced Si CMP

SEM Cross section

Conventional Polishing Pad

SEM Cross section

Advanced Polishing Pad

Pores

| 7

Blanket Silicon Wafer Polishing Conditions

▌ Consumables: § Pad: Dow Pads § DD: 3M Brush or AF38 DD § Slurry: High Purity Colloidal Silica

▌ Process Conditions: § Pressure: 1.5psi § Rotation: Platen at 43 rpm § Flow: 200 ml/min § Downforce: 7 lbf (ex-situ conditioning)

▌ Polishing Tool: LK PRIME TM

Cleaner B Cleaner A

P3

CLEANER

metrology

P1 P2

P4

POLISHER

§ Only one CMP process step

ICPT2016 | Cédric Perrot

Same Conditioning to Compare Intrinsic Pad Properties PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

| 8

Pad and Wafer Characterizations ▌ Pad Characterization:

▌ Wafer Characterization: Wafer AFM Topography Wafer AFM Distribution

§ Pad Roughness Parameters § Height Distributions § Asperities Properties

§ Wafer Surface Roughness § AFM Height Distributions § Defect Level (SP2) § Si RR (Precision Balance)

Wafer

ICPT2016 | Cédric Perrot PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

Wafer Surface Quality = f (Pad Texture Parameters)

Pad

Si Wafer

| 9 PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

Pad & Wafer Roughness Correlation Results

Pad Roughness (µm)

Waf

er R

ough

ness

(A)

Low Pad Surface Roughness = Low Wafer Surface Roughness

Sq = 5-10µm

Rq = 1,3A

Si Wafer

Pad

Advanced pads

Advanced Polishing Pad

Sq = 23µm

Rq = 1,8A

Si Wafer

Pad Conventional pad

Conventional Polishing Pad

| 10

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

-1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0

Freq

uenc

y (a.

u.)

Wafer surface height (nm)

Si wafer (pad A) Si wafer (pad B) Si wafer (pad C) Si wafer (pad D)

Wafer polished on Conventional pad

Wafers polished on Advanced pads

PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

Pad & Wafer Roughness Correlation Results

Low Pad Surface Roughness = Low Wafer Surface Roughness

Sq = 5-10µm

Rq = 1,3A

Si Wafer

Pad

Advanced Polishing Pad

Sq = 23µm

Rq = 1,8A

Si Wafer

Pad

Conventional Polishing Pad

| 11 PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

Wafer Surface Quality Sq

Wafer Surface Roughness Driven by Pad Asperities Height: Atomic Si Planarization

Lower Post CMP SI Roughness with Smaller Pad Asperities

Sp

Wafer Surface Quality

| 12 PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

Pad Texture Open

Texture Open = Empty Volume/Projected Area 

Low Pore Size = Low Texture Open

Sz

Pad Open Texture

| 13 PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

Pad Texture Open Inpact on RR & Sq

Increasing Open Pad Texture Increase RR but Decrease Surface Quality à Chemical Effect of Slurry

Wafer Surface Quality RR

| 14 PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

Pad Texture Open Impact on RR & Defectivity

Increasing Open Pad Texture Increase RR and Decrease Defectivity Level

Post CMP DEF RR

| 15

0

4

8

12

16

20

0 20 40 60 80

Si W

afer

Rem

oval

Rate

(nm

/min

)

Pad Texture Open (µm)

Advanced Pad Conventional Pad

0

100

200

300

400

0 20 40 60 80

Si W

afer

Def

ect L

evel

Pad Texture Open (µm)

Advanced Pad Conventional Pad

0.00

0.05

0.10

0.15

0.20

0 20 40 60 80

Si W

afer

Rou

ghne

ss (n

m)

Pad Texture Open (µm)

Advanced Pad Conventional Pad

Lower Si Wafer Defect Level with High Pad Texture Open

Lower Si Wafer Roughness with Low Pad Texture Open

PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

Si Wafer Quality Surface & Pad Texture Open

Chemical / Mechanical Balance in Si CMP Can Be Managed Through Pad Microstructure

Conventional Pad Large Pore Size

= CHEMICAL action

Advanced Pad Small Pore Size

= MECHANICAL action

CMP Si Higher Si Removal Rate with High Texture Open

| 16 PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)

Conclusion

Large pore size à Higher RR

à Lower defectivity level

Small pore size à Better Surface

Roughness

CHEMICAL action

SLURRY Chemistry

MECHANICAL action PAD

+ Abrasive particles

CMP

Pores + Grooves à Slurry Transport

Pores + Asperities à Wafer contact

PAD

PAD

CMP

CMP Si

Chemical/Mechanical Balance Management through Pad Microstructure Advanced Pad & Advanced Wafer Characterizations:

Better Understanding of Roughness Transfer from Pad to Wafer Achieve Better CMP Performance

Leti, technology research institute Commissariat à l’énergie atomique et aux énergies alternatives Minatec Campus | 17 rue des Martyrs | 38054 Grenoble Cedex | France www.leti.fr

Thank you for your attention

ratanak.yim@cea.fr

ratanak.yim@st.com

| 18

Planche de pictos

CAPTEURS IMAGING SENSOR

SERVEURS ET CALCUL INTENSIF

SÉCURITÉ DISPOSITIFS MÉDICAUX

INTERNET DES OBJETS

RF ÉNERGIE ÉLECTRONIQUE DE PUISSANCE

COMPOSANTS PHOTONIQUE

NANO ELECTRONIQUE

PCMP Cleaning COnference Austin 2017 | Ratanak YIM (Viorel Balan)