class d amplifier using ADS

8/13/2019 class d amplifier using ADS

1/19

Class D Power amplifier-----using ADS

Song lin @utk June30


2/19

Outline

Why select Class D?

Compare different device

Simple Class D architectureLoad-pull to give out Zout

Matching and simulation results of ideal

narrow band Class D PABroad band matching


3/19

Why Class D?

Class D PA works in the switching mode, with asquare wave voltage and a half wave rectified sinewave of current.

In its ideal switching mode,

when Vds0, Ids=0;

when Ids0,Vds=0.

Class D PA can achieve very high frequency close to100%. Although it is very nonlinear, we still can usethe LINC technique to kill the IMD product.


4/19

Two kinds of Class D PA


5/19

Compare the device(I)

For high frequency, ----- the higher the better

For high on/off switching speed,----- the shorterthe better

For high efficiency, the on-resistance of a switchingdevice must be as low as possible to minimize the

power dissipation in the switches during the positivehalf cycle.----- Rsis the smaller the better.

For high Power output, ----- BV(beake down voltage)

the higher the better

For high Gain, ----- the bigger the betterFor power dissipate,----- the small the better

maxf

m

g

sdt

dsI


6/19

Compare the device(II)

Conclusion:

Also for the wide band application, we should chose thecomponent whose Zout and Zin has very little varietyin some frequency range.

I suggest to use the MRF282SR1.-----N-channelEnhancement-Mode Lateral MOSFETs


7/19

Basic Class D PA architecture


8/19

Load Pull to give out Zout


9/19

Narrow band input and output matchingand simulation results

0.5 1.0 1.5 2.00.0 2.5

-1.0

-0.5

0.0

0.5

1.0

-1.5

1.5

time, nsec

ts(vin),V

0.5 1.0 1.5 2.00.0 2.5

-4

-2

0

2

4

-6

6

time, nsec

ts(voad),V

0.5 1.0 1.5 2.00.0 2.5

0

2

4

6

8

-2

10

time, nsec

ts(vds1),V

ts(ID_

FET1.i

),A

0.5 1.0 1.5 2.00.0 2.5

0

2

4

6

8

-2

10

time, nsec

ts(vds2),V

ts(ID_

FET2.i

),A


10/19

Wide band matching using coaxial

freq30.00MHz80.00MHz

130.0MHz180.0MHz230.0MHz280.0MHz330.0MHz380.0MHz430.0MHz480.0MHz530.0MHz580.0MHz600.0MHz

Zin112.879 + j1.50811.948 - j1.362

10.330 - j1.8469.075 - j1.3208.380 - j0.3818.217 + j0.6128.497 + j1.4069.052 + j1.7669.545 + j1.5369.520 + j0.8578.775 + j0.2397.597 + j0.1177.105 + j0.224

A conventional design allows the coaxial

transformer to transform the impedance

to obtain a match the low end of the

band, then add additional low-pass

matching sections to lower the

impedance at the upper band edge.


11/19

Using the MRF282S to simulate narrowband VMCD @300MHz


12/19

Push_pull structure


13/19

Narrow band matching (input, output)


14/19

Narrow band simulation results

PAE78.833

Pdel_Watts36.194

Pdc45.112

Pdel_Watts/Pdc0.802

EqnPdel_dBm = 10*log10(Pdel_Watts)+30

EqnPavs_Watts=10**((28-30)/10)

Eqn Pdel_Watts=real(0.5*vout[1]*conj(Iload.i[1]))

Eqn PAE=100*(Pdel_Watts-Pavs_Watts)/Pdc

Eqn Is_h=exists("real(Is_high.i[0])")

Eqn Is_l=exists("real(Is_low.i[0])")

Eqn Vs_l=exists("real(Vs_low[0])")

Eqn Vs_h=exists("real(Vs_high[0])")

EqnPdc=Is_h*Vs_h +Is_l*Vs_l +1e-20

DC Power CalculationsThe exists() function checks to be surethe corresponding piece of data is inthe dataset. If it is not, then thefunction returns 0.

Power Delivered and Power-AddedEfficiency Calculations

Pavs is the available source power, set onthe schematic, and passed into the datasetusing the Harmonic Balance controller.

1 2 3 4 5 60 7

0

10

20

30

40

-10

50

0

1

2

3

-1

4

time, nsec

ts(vds1),V

ts(ID_FET1.i),A

1 2 3 4 5 60 7

0

10

20

30

40

-10

50

0

1

2

3

-1

4

time, nsec

ts(vds2),V

ts(ID_FET2.i),A


15/19

Final schematic


16/19

Final simulation results(1)

RFfreq

0.010000.030340.050690.071030.091380.111720.132070.152410.172760.193100.213450.233790.254140.274480.294830.315170.335520.355860.376210.396550.41690

0.437240.457590.477930.498280.518620.538970.55931

eta

3.1847719.1714926.6900733.8735738.0597340.5522152.8991561.1628863.5857865.0909069.3704071.5722474.1238973.8164771.2833972.0263276.8916476.9276375.8578578.1925980.02783

79.8680479.4126580.3053782.4331183.1881381.6628280.91020

Pdc

35.4236145.4257641.5319253.3718950.6750747.0099957.2424362.9260059.0168954.7549153.1365150.5148049.1444248.2410145.8544644.4901444.8106745.9219547.1437148.2536347.38484

47.1146546.8049145.7738043.7890841.5784240.0780339.06156

Pdel_Watts

1.128168.70879

11.0849018.0789619.2867919.0635930.2807638.4873537.5263535.6404736.8610136.1545736.4277635.6098132.6866132.0446134.4556635.3266735.7622137.7307737.92106

37.6295537.1690236.7588236.0967034.5883132.7288531.60478

PAE

-10.963638.13838

14.6225524.4831028.1695229.8909244.1436353.1981755.0935155.9376259.9383361.6506463.9256463.4272360.3534360.7611965.7070866.0137465.2268067.8060869.45087

69.2304368.7046469.3561570.9876271.1341169.1575368.07950

Gain

-6.476232.399603.447305.571705.852555.801997.811618.853138.743328.519408.665658.581638.614348.515728.143748.057608.372668.481098.534318.767028.78887

8.755358.701868.653668.574718.389328.149327.99753


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Final simulation results(2)

1 2 3 4 5 60 7

0

20

40

-20

60

-3

-2

-1

0

1

-4

2

time, nsec

ts(vd1),V

ts(I_ds

.i),A

eta

73.76255

Pdc

42.70324

Pdel_Watts

31.49900

PAE

62.02603

Gain

7.98301


18/19

The problem remain:

1. The Class D PA need a resonator tank to pull out the

fundamental signal, to filter out the third time signal, soI decide to divide the band into 3 parts, one from 30 to

88 MHz; 88MHz to 200MHz; 200MHz to 500MHz. We

can separate the signals by filter bank.

2. For the real device, the Rs isnt very small, so theefficiency cant be so high. Because of the , the Vds

and some overlap with Ids, it also kill some efficiency.

3. To achieve better performance at low frequency band, I

have to increase the Vgg.4. ADS is very hard to converge when simulation.

dst


19/19

Thank you!!!

Date post:	03-Jun-2018
Category:	Documents
Upload:	tomdarel
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class d amplifier using ADS

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