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Code Composer Studio (CCS) and the DSKsDSK6711, DSK6713 and DSK6416
Code Composer Studio (CCS) and the DSKsDSK6711, DSK6713 and DSK6416Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004
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Learning ObjectivesLearning
ObjectivesIntroduction to Code
Composer Studio (CCS).Installation and Setup of
CCS.Introduction to the DSK.Laboratorio (Implementazione
di un filtraggio vocale sul 6713-DSK).
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CCSCCSCode Composer StudioCode Composer Studio
CCSCCSCode Composer StudioCode Composer Studio
The Code Composer Studio (CCS) application provides an integrated environment with the following capabilities:
Integrated Development Environment (IDE) with an Editor, Compiler, Debugger, Project Manager, Profiler, etc.
C/C++ Compiler, Assembly Optimiser and Linker (code generation tools).
DSP Simulator. Real-time operating system - RTOS (DSP/BIOS™). Real-Time Data Exchange (RTDX™) between the Host
and Target. Real-time Analysis and Data Visualization.
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CCS - CCS - InstallationInstallation and and SetupSetupCCS - CCS - InstallationInstallation and and SetupSetup
(A) Install the CCS Software.(B) Run CCS Setup:
Start CCS setup utility by using the following desktop icon:
Alternatively: Windows Start Menu -> Programs -> Texas
Instruments -> Code Composer Studio 2 (‘C6000) -> Setup Code Composer Studio.
Run cc_setup.exe located in: c:\ti\cc\bin\
Setup CCS 2.lnk
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CCS CCS SetupSetupCCS CCS SetupSetup You should now see a screen similar to this:
Note: If you don’t see the Import Configuration dialog box you should open it from the menu using: File:Import.
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CCS CCS SetupSetupCCS CCS SetupSetup
You can clear the previous configuration by selecting the configuration you wish to clear and clicking the clear button.
Next select a new configuration that you would like to add:
Select the C6x11DSK - Port x - y Mode. The port number, x, and port mode, y,
depend on your PC setup.
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If you do not know your configuration then you can select it automatically using the “Configure C6x11 DSK” Utility.
CCS CCS SetupSetupCCS CCS SetupSetup
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Finally save and quit the import configuration dialog box.
CCS CCS SetupSetupCCS CCS SetupSetup
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Start CCS by either:Using the desktop icon:
Start -> Programs -> Texas Instruments -> Code Composer Studio 2 -> Code Composer Studio.
Run cc_app.exe in c:\ti\cc\bin\
Using CCSUsing CCS
CCS 2.lnk
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TroubleshootingTroubleshooting If the following window appears on
your screen then: Check that the DSK is connected
properly and powered up. Check if the port address and mode
is correct (See Slide 6).
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Introduction to the ‘C6711 DSK‘C6711 DSKIntroduction to the ‘C6711 DSK‘C6711 DSK
The ‘C6711 DSK provides a powerful, low-cost development environment.
The DSK comes with CCS code development tools (does not include the simulator).
A laboratory at the end of this section takes you through the DSK setup and shows you how to run the confidence test to check if it is working correctly.
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DSK6711DSK6711 Contents ContentsDSK6711DSK6711 Contents Contents
Hardware 150 MHz ‘C6711 DSP TI 16-bit A/D Converter (‘AD535) External Memory
16 MB SDRAM 128 kB Flash ROM
LED’s Daughter card expansion Power Supply & Parallel Port Cable
Software Code Generation Tools
(C Compiler, Assembler & Linker) Code Composer Debugger
(256K program limitation) Example Programs & S/W Utilities
Power-on Self Test Flash Utility Program Board Confidence Test Host access via DLL Sample Program(s)
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1.8V Power Supply 16M SDRAM 128K FLASH Daughter Card I/F(EMIF Connector)
ParallelPort I/F
PowerJack
PowerLED
3.3V Power Supply
JTAG HeaderEmulationJTAG Controller
Reset
Line Level Output (speakers)Line Level Input (microphone)
16-bit codec (A/D & D/A)Three User LEDs
User DIPswitches
‘C6711DSP
D. Card I/F(Periph Con.)
TMS320C6711
Hardware: Overview
Hardware: Overview
The daughter card interface socket provides a method for accessing most of the C6711 DSP for hardware extension.
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Hardware: DSK ConnectionsHardware: DSK Connections
(A) Parallel port: The PC’s parallel port is connected to the parallel port on the DSK.
(B) JTAG: An XDS - JTAG emulator connected to the PC (either internal or external) is connected to the JTAG header on the DSK.
Line-level OutputLine-level Input
PC DSK
Parallel Cable
Power Supply
External Power Supply
PC DSKJTAG
Power Supply Line-level Output
Line-level Input
XD
S External Power Supply
HP
I
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Hardware: Power On Self Test (POST)
Hardware: Power On Self Test (POST)
TestTest LED 3LED 3 LED 2LED 2 LED 1LED 1 DescriptionDescription 00 0 0 0 Start state 11 0 0 1 DSP internal SRAM test 22 0 1 0 External SDRAM test 33 0 1 1 DSP McBSP0 loop back test 44 1 0 0 External codec read/write test 55 1 0 1 External codec tone generation
test 66 1 1 0 External LED and DSP timer test 77 1 1 1 Unused – available for future test
useB L I N K A L LB L I N K A L L All tests completed successfullyAll tests completed successfully
There are three There are three LEDs to provide the user with feedback from the test to provide the user with feedback from the test procedure.procedure.
The The Test Program (stored in the FLASH memory, code available on (stored in the FLASH memory, code available on the DSK CD-ROM) runs every time DSK is powered on and reset.the DSK CD-ROM) runs every time DSK is powered on and reset.
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Hardware: Resets
Hardware: Resets
TMS320C6711
Apply PowerApply Power POST runs
CCS ResetCCS Reset Menu selection:
DebugDSP Reset Resets ‘C6711 DSP Causes bootload from
FLASH which overwrites internal memory
Absolute ResetAbsolute ResetOn rare occasions you might have to:
Pull power jack Pull parallel port
Reset PushbuttonReset Pushbutton Don’t push when CCS is running Does not force FULL system reset To fully reset board, pull power plug
Power On Self Test (POST)Power On Self Test (POST) Counts 1 - 7 4: mic input spkr out 5: sinewave spkr out Don’t start CCS until end (all 3 LEDs flash at the end) If switches are set to 0100, a fast version of POST is run
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Hardware: Memory Maps
Hardware: Memory Maps
FFFF_FFFFFFFF_FFFF
0000_00000000_000064 kB 64 kB Internal Internal – L2– L2((ProgramProgram or or DataData))
On-chip PeripheralsOn-chip Peripherals0180_00000180_0000
CE2 - 128 MB ExternalCE2 - 128 MB External
CE3 - 128 MB ExternalCE3 - 128 MB External
8000_00008000_0000
9000_00009000_0000
A000_0000A000_0000
B000_0000B000_0000
CE0CE0 - - 128 MB External128 MB External
CE1 - 128 MB ExternalCE1 - 128 MB External
TMS320C6711TMS320C6711TMS320C6711TMS320C6711
9008_00009008_0000
Available viaAvailable viaDaughter CardDaughter Card
ConnectorConnector
‘‘C6711 C6711 DSKDSK‘‘C6711 C6711 DSKDSK
16 MB SDRAM16 MB SDRAM
128 kB FLASH128 kB FLASH
4 byte I/O Port4 byte I/O Port
LED’sSwitchesDSK statusDSK rev#Daughter Card
Program File
Program File
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Description Description OriginOrigin LengthLengthInternal RAM (L2) mem 0x00000000 0x00010000EMIF control regs 0x01800000 0x00000024Cache configuration reg 0x01840000 0x00000004L2 base addr & count regs 0x01844000 0x00000020L1 base addr & count regs 0x01844020 0x00000020L2 flush & clean regs 0x01845000 0x00000008CE0 mem attribute regs 0x01848200 0x00000010CE1 mem attribute regs 0x01848240 0x00000010CE2 mem attribute regs 0x01848280 0x00000010CE3 mem attribute regs 0x018482c0 0x00000010HPI control reg 0x01880000 0x00000004McBSP0 regs 0x018c0000 0x00000028McBSP1 regs 0x01900000 0x00000028Timer0 regs 0x01940000 0x0000000cTimer1 regs 0x01980000 0x0000000cInterrupt selector regs 0x019c0000 0x0000000cEDMA parameter RAM 0x01a00000 0x00000800EDMA control regs 0x01a0ffe0 0x00000020QDMA regs 0x02000000 0x00000014QDMA pseudo-regs 0x02000020 0x00000014McBSP0 data 0x30000000 0x04000000McBSP1 data 0x34000000 0x04000000CE0, SDRAM, 16 MB 0x80000000 0x01000000CE1, 8-bit ROM (FLASH),128 kB 0x90000000 0x00020000CE1, 8-bit I/O port 0x90080000 0x00000004CE2 – Daughter card 0xA0000000 0x10000000CE3 – Daughter card 0xB0000000 0x10000000
On-chipOn-chipPeripheralsPeripherals
MemoryMaps
DK6711
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Software: PC Host Utilities
Software: PC Host Utilities
DSK Loader dsk6ldr.exe f.out Runs on PC host Downloads file.out to DSK memory map Stand alone DSK loader for when you want to bypass CCS
FLASH Programming hex6x.exe f.out h.cmd
flash.exe f.hex First, convert file.out to file.hex The flash utility downloads the file.hex into the on-DSK FLASH Both programs run on the PC host. Links: SPRA804.pdf
DSK Confidence Test dsk6xtst Run from MSDOS prompt Command-line utility tests proper installation of the DSK board Additionally, it tests: Internal SRAM, SDRAM, FLASH, McBSP, Timers, EDMA,
LEDs and Audio codec
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Software: CCS DSK Utilities
Software: CCS DSK Utilities
Confidence Test
1. Unload any gel files already loaded in CCS
2. Load conftest.gel3. Run confidence tests from
GEL menu
Quick Test
Run from CCS GEL menu
Defined in dsk6xinit.gel Non-intrusive test by reading and
writing: LEDs Switches DSK board revision
Outputs switch values
General Extension Language (GEL):
An interpretive language that enables you to write functions to configure the IDE and access the target processor.
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Software: DSK Help
Software: DSK Help
DSK6711 help is available via the Help menu in CCS.DSK6711 help is available via the Help menu in CCS.
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Software: PC DSKSoftware: PC DSK
CCS uses CCS uses parallel portparallel port to to control DSP via via JTAG portJTAG port
You can use full TI eXtended Device System (You can use full TI eXtended Device System (XDSXDS) via ) via 14 14 pin header connectorpin header connector
Communicate from Windows program (C++, VB) via Communicate from Windows program (C++, VB) via parallel portparallel port using using Win32 DLL (HPI)
CommunicationsCommunications
Note: You should not use the parallel port for simultaneous JTAG emulation
and HPI connection.
XDSXDS
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dsk6x_open( ) Open a connection to the DSK
dsk6x_close( ) Close a connection to the DSK
dsk6x_reset_board( ) Reset the entire DSK board
dsk6x_reset_dsp( ) Reset only the DSP on the DSK
dsk6x_coff_load( ) Load a COFF image to DSP memory
dsk6x_hpi_open( ) Open the HPI for the DSP
dsk6x_hpi_close( ) Close the HPI for the DSP
dsk6x_hpi_read( ) Read DSP memory via the HPI
dsk6x_hpi_write( ) Write to DSP memory via the HPI
dsk6x_generate_int( ) Generate a DSP interrupt
Win32 APIWin32 API functions for Host to DSK communications:
Software: PC DSKSoftware: PC DSKCommunicationsCommunications
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TMS320C6713DSP Starter Kit (DSK)
TMS320C6713DSP Starter Kit (DSK)
The TMS320C6713 DSP Starter Kit (DSK) developed jointly with Spectrum Digital is a low-cost development
platform designed to speed the development of high precision applications based on TI´s
TMS320C6000 floating point DSP generation.
Link: tmdsdsk6713.html Link: tmdsdsk6713.html
Link: Reference ManualLink: Reference Manual
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'C6713'C6713 - DSK Block Diagram'C6713'C6713 - DSK Block Diagram
Daughter CardDaughter Card
Roomfor
Expansion
Internal
MemoryCPUCPU
ProgramCache
DataCache
EMIF
SDRAM(8 MB)
CE2
CE3Flash ROM
(256 kB)
I/O Port
CE1
DSK uses all FOUR External Memory regions CE0 for SDRAM CE1 for Flash Memory and I/O Port (switches, LED’s, etc.) CE2 and CE3 pinned-out to daughter card connector
CE0
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‘‘C6713C6713 -- DSK Memory MapDSK Memory Map‘‘C6713C6713 -- DSK Memory MapDSK Memory Map
CPLDCPLDCComplex omplex PProgrammable rogrammable LLogic ogic DDeviceevice
Sono dispositivi logici programmabili e cancellabili. La programmazione permette ai CPLD di simulare un generico circuito
digitale di complessita' non elevata. A differenza delle FPGA le CPLD mantengono la programmazione anche quando non sono
alimentate perché contengono delle memorie non volatili. Vengono usate per applicazioni particolari dove sono richieste alte
velocita' o bassi costi o funzionalita' di glue logic overo di interfacciamento tra due dispositivi complessi.
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'C6713'C6713 - DSK Block Diagram'C6713'C6713 - DSK Block Diagram
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TMS320C6416DSP Starter Kit (DSK)TMS320C6416
DSP Starter Kit (DSK)
The TMS320C6416 DSP Starter Kit (DSK) developed jointly with Spectrum Digital is a low-cost development platform designed to speed the development of high
performance applications based on TI´s TMS320C64x DSP generation. The kit uses USB communications for
true plug-and-play functionality.
Link: tmdsdsk6416.htmlLink: tmdsdsk6416.html
Link: Reference ManualLink: Reference Manual
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'C6416'C6416 - DSK Block Diagram'C6416'C6416 - DSK Block Diagram
DSK uses both EMIFs (A and B) EMIFA
CE0 for SDRAM CE2 and CE3 pinned-out to daughter card connector
EMIFB CE1 for Flash Memory and CE0 for CPLD (switches, LED’s, etc.)
TMS320C6416 DSP Starter Kit (DSK)
Daughter CardDaughter Card
CE3
CE2
SDRAM(16 MB)
Flash ROM(512 kB)
CPLDCE1
CE0
L2 RAM
Prog/Data
(1 MB)CPUCPU
EMIFA
EMIFB
ProgramCache
DataCache
CE0
Roomfor
Expansion
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'C6416'C6416 - DSK Block Diagram'C6416'C6416 - DSK Block Diagram
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‘‘C6416C6416 - DSK Memory Map‘‘C6416C6416 - DSK Memory Map
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Laboratory Exercise:DSK Hardware Setup
Laboratory Exercise:DSK Hardware Setup
(1) Connect the following cables: Parallel port. Audio cables.
(2) Connect the power and observe the Power On Self-Test (POST).(3.a) If using the DSK6711 Configure and test the DSK with the utilities shown below:
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(3.b) If you are using the DSK6713 or DSK6416
Use the Diagnostics Utilities show below:
Laboratory Exercise:DSK Hardware Setup
Laboratory Exercise:DSK Hardware Setup
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Notes:
The SDRAM may take a while due to the large amount of SDRAM on the ‘C6711 DSK.
The CODEC test performs two operations: (1) a 1kHz tone output, and (2) an audio input to output loopback. You must have a speaker connected to the the output jack to hear the test.
If the confidence test fails:(1) Remove the power and parallel cable from the DSK.(2) Reset your PC.(3) Reconnect the power and the parallel cable.(4) Invoke CCS.
Laboratory Exercise:DSK Hardware Setup
Laboratory Exercise:DSK Hardware Setup
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Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
Implement:
with: ai = {40, 39, …, 1}
xi = {1, 2, …, 40}(1) Create a working directory and copy the following files from \Code\Chapter 03 - CCS and DSK\:
(a) lab3.cdb(b) lab3.c(c) lab3cfg.cmd
(2) Create a new project:(a) Start CCS.(b) Create a new project as shown on the following slide.
1
0
N
iii xay
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Note: When you type in the “Note: When you type in the “Project NameProject Name” a directory is created in the “” a directory is created in the “LocationLocation”. ”.
Delete this if not required.Delete this if not required.
Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
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(3) Add files to the project- lab3.c (source file)
- lab3.cdb (configuration file)
- lab3.cmd (linker command file)
Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
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(4) Change the build options (compile and link):
Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
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(5) Build the output program (lab3.out): (a) Build the project by:
(i) Clicking the Rebuild All toolbar icon.
(ii) Selecting Rebuild All in the project menu.
(b) Verify that the build output window is complete with “0 errors, 0 warnings”:
Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
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Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
(6) Load the output file lab3.out into DSP memory: (a) The program will be automatically loaded after each
project build if the “Program Load after Build” option is selected as shown below:
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(6) Load the output file lab3.out into DSP memory: (b) Load the lab3.out by selecting File:
Load Program as shown below:
Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
42
(7) Debug and run code: (a) Go to the beginning of the program, that is main() by selecting
Debug:Go Main.
(b) Watch variables:
(i) Select the variable (to be watched) from the lab3.c file, right click
and select “Add To Watch Window”. If the variable is y for instance, the following window will be shown.
(ii) To add another variable to the watch select it and then drag and
drop it on to the window.
Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
43
(7) Debug and run code:
(c) CCS will automatically add the local variables:
Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
44
(7) Debug and run code: (d) You can run or step through the code by using the various icons on the toolbar or use the Debug menu:
Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
45
(7) Debug and run code: (e) Stop the processor from running and watch the variable y:
y = 0x2cdb or 11480(8) Benchmarking and profiling code: (a) Stop the processor, reload the code or select
Debug:Restart then select Debug:Go Main. (b) Open a new profiling session and name it “Session 1”
and select “Profile All Functions” by clicking the following toolbar button:
Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
46
(8) Benchmarking and profiling code: (c) Expand the lab3.c as shown below:
Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
47
(8) Benchmarking and profiling code: (d) Add a breakpoint at “for(;;);”. This can be done by: (i) Click the cursor on the highlighted line below. (ii) Click the “Add Breakpoint” toolbar button:
Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
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(8) Benchmarking and profiling code: (e) Run the program and examine the profile window:
Laboratory Exercise: Using CCSUsing CCSLaboratory Exercise: Using CCSUsing CCS
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CCS and DSKCCS and DSK
CCS Overview: \Links\spru301c.p
df Resets:
\Links\ccs_dsk.pdf