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    Arithmetic operations in binary

    Addition / subtraction

    01011

    + 111

    ?

    Method exatly the same as decimal

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    Arithmetic operations in binaryAddition

    X = xn xi x0

    + Y = yn yi y0

    __________________di

    di = (xi + yi ) mod r + carry-in

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    AdditionFor ( i = 0n ) do

    di = (xi + yi + carry-in) mod r

    carry-out = (xi + yi + carry-in) div r

    End for

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    Arithmetic operations in binary Subtraction

    Can you write an equivalent method

    (algorithm) for subtraction?

    Algorithm: a systematic sequence of

    steps/operations that describes how tosolve a problem

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    Arithmetic operations in binary Subtraction

    X = xn xi x0 Y = yn yi y0

    ___________________________________________________

    diFor ( i = 0n ) do

    di = ( xi yi bi-1 ) mod rborrow-out = ( xi yi bi-1 ) div r

    End for

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    Subtraction

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    Arithmetic operations in binary Multiplication

    For ( i = 0n ) dodi = ( xi v yi + ci-1 ) mod r

    ci = ( xi v yi + ci-1 ) div r

    End for

    Is this correct?

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    Negative numbers (4 traditions):

    n = number of symbols (digits, bits, etc.)

    r = radixradix complement of x is

    1)1( ! xrxr nn

    e.g. n = 4, r = 107216 --> 9999 - 7216 + 1 = 2784 (10s complement)

    n = 4, r = 2

    0101 --> 1111 - 0101 + 1 = 1011 (2s complement)

    Signed magnitude

    Radix complementDiminished radix complement

    Excess-b (biased)

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    xrn

    )1(

    e.g. n = 4, r = 10

    7216 --> 9999 - 7216 = 2783 (9s complement)

    n = 4, r = 20101 --> 1111 - 0101 = 1010 (1s complement)

    diminished radix complement is

    Note: operation is reversible (ignoring overflow)

    i.e. complement of complement returns original pattern

    (for both radix and diminished radix forms)

    for zero and its complement:

    10s complement: 0000 --> 9999 + 1 = 10000 --> 0000

    9s complement: 0000 --> 9999 --> 0000

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    Arithmetic with complements n = 4r = 2

    Excess-8

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    Signed number representations[[N]] = rn ( rn N ) = N

    ( N + [N] ) mod rn = 0

    Example: (n = 4)+5 | 0101

    -5 | 1011

    10000 | 24

    N + [N] mod 24 = 0

    N = 5 r = 10 N = 32546

    [N] = 105 32546 = (67454)10

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    Twos complement arithmetic

    ( an-1, an-2, a0 ) in 2-s complement is

    Example: (n = 4)

    0101 p 0v23 + 1v22 + 0v2 + 1v1 = 4 + 1 = 51011 p 1v23 + 0v22 + 1v2 + 1v1 = 8 + 2 + 1 = 5

    Addition/subtraction (n = 5)

    +10 | 01010

    +3 | 00011

    01101 | 13

    !

    2

    0

    1

    1 22n

    i

    i

    i

    n

    naa

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    Twos complement arithmetic

    Addition/subtraction (n = 5)

    +10 | 01010

    +7 | 00111Overflow 10001 | 15

    +15 | 01010

    13 | 10011

    Discard 100010 | 2

    When can overflowhappen? Only when

    both operands have

    the same sign and the

    sign bit of the result is

    different.

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    Cyclic representation (n = 4, r = 2)

    avoid discontinuity between

    0111 and 1000

    Add x:

    move x positions clockwise

    Subtract x:

    move x positions counterclockwise

    move (16 - x) positions clockwise

    (i.e. add radix complement)

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    How to detect discontinuity?

    5

    + 6

    11

    0101

    + 0110

    1011

    no overflow (in 4-bit register)

    but, carry into most significant bit is 1 while carry out is 0

    -5

    + -6

    -11

    1011

    + 1010

    10101

    overflow

    but, carry into most significant bit is 0 while carry out is 1

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    Same circuitry

    signed numbers

    add

    subtract (use 2s complement of subtrahend)

    Intel architecture OF (overflow flag) detects out-of-range resultunsigned numbers

    same protocol

    but discontinuity is now between 0000 and 1111

    detect with overflow for addition

    lack of overflow for subtraction

    Intel uses CF (carry flag) to detect out-of-range result

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    Codes

    4-bit codes for digits 0 through 9 (BCD : 8421 weighted)

    2421 and Excess-3 are self-complementing

    (complement bits to get 9s complement representation)

    Biquinary has two ranges 01 and 10

    one-bit error produces invalid codeword

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    Number representation inside

    computer

    Integers represented in 2s complement

    Single precision 32 bits

    Largest positive integer is 231-1 =

    2,147,483,647

    Smallest negative integer is -231 =

    2,147,483,648

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    Number representation inside

    computer

    Floating point

    Scientific notation

    0.0043271 = 0.43271v10-2

    normalized number

    The digit after the decimal point is { 0Normalized notation maximizes the use of

    significant digits.

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    Floating point numbers

    Floating point

    N = (-1)S v m v rE

    S = 0 p positive

    S = 1 p negative

    m p normalized fraction for radix r = 2

    As MSB digit is always 1, no need to explicitly store it

    Called hidden bit p gives one extra bit of precision

    S E m

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    Floating point formats

    IEEE format: (-1)Sv(1.m)v2E-127

    DEC format: (-1)Sv(0.m)v2E-128

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    Floating point formats

    Different manufacturers used differentrepresentations

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    Mechanical encoder with sequential

    sector numbering

    At boundaries can get a code differentthan either adjacent sector

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    Gray code:

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    Gray code algorithm:

    input: (binary)

    output: (Gray code)0121 bbbb nn .

    0121 gggg nn .

    !

    !

    else,1

    ,0 1iii

    bbg

    e.g.

    n = 3: 6 -> 110 -> 101

    n = 4: 10 -> 1010 -> 1111

    Alternative algorithm (n bits)

    If n = 1 use 0->0 and 1->1

    If n > 1

    first half is Gray code on (n - 1) bits preceded by 0

    second half is reversed Gray code on (n - 1) bits preceded by 1

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    Representing non-numeric data

    Code: systematic and preferably standardized wayof using a set of symbols for representing

    information

    Example: BCD (binary coded decimal) for decimal #s

    It is a weighted code p the value of a symbol is aweighted sum

    Extending number of symbols to include

    alphabetic characters

    EBCDIC (by IBM): Extended BCD Interchange Code

    ASCII: American Standard Code for Information

    Interchange

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    Codes

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    Cyclic codes

    A circular shift of any code word produces a

    valid code word (maybe the same)

    Gray code example of a cyclic code

    Code words for consecutive numbers differ by

    one bit only

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    Ascii, ebcdic codesState codes, e.g.

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    Consequences of binary versus one-hot coding:

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    n-cubes of codewords:

    Hamming distance between x and y is count of positions where

    x-bit differs from y-bit

    Also equals link count in shortest path from x to y

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    Gray code is path that visits each

    vertex exactly once

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    Error-detecting codes

    Problem Solution: parity

    concept:

    choose code words such thatcorruption generates a non-code word

    to detect single-bit error, code words must occupy

    non-adjacent cube vertices

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    Example: correct one bit errors or detect two-bit errors

    Error-correcting codes

    minimum distance between code words > 1

    Two-bit error from0001011

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    Write minimum distance as 2c + d + 1 bits ==>

    corrects c-bit errors and

    detects (c + d)-bit errors

    Example: min distance = 4 = 2(1) + 1 + 1

    But also, 4 = 2(0) + 3 + 1

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    Why?suppose minimum distance is h

    c ch - 2c

    y

    d = h - 2c -1

    pair of closest nodes

    maximally distant from left with entering correction zone

    2c + d + 1 = 2c + (h - 2c - 1) + 1 = h

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    Hamming codes: 12 ! kn

    number bit positions 1, 2, 3, ... n from right to left

    bit position is a power of 2 => check bit

    else => information bite.g. (n = 7)

    check bits in positions 1, 2, 4

    information bits in positions 3, 5, 6, 7

    Create group for each check bitExpress check bit position in binary

    Group all information bits whose binary position has a one in same place

    e.g. (n = 7)

    check information

    1 (001) 3 (011), 5 (101), 7 (111)

    2 (010) 3 (011), 6 (110), 7 (111)

    4 (100) 5 (101), 6 (110), 7 (111)

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    Note:Single bit error corrupts one or more parity groups => minimum distance > 1

    Two-bit error in locations x, y corrupts at least one parity group =>

    minimum distance > 2

    Three-bit error (i.e. 1, 4, 5) goes undetected => minimum distance = 3

    3 = 2(1) + 0 + 1 = 2(0) + 2 + 1 => can correct 1-bit errors or detect errors

    of size 1 or 2.

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    Pattern generalizes to longer bit strings: Single bit error corrupts one or more parity groups => minimum distance > 1

    15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

    Group 8

    Group 4

    Group 2

    Group 1

    Consider two-bit error in positions x and y. To avoid corrupting all groups:

    -- avoid group 1: bit 1 (lsb) same for both x and y

    -- avoid group 2: bit 2 same for both

    -- avoid group 4: bit 3 same for both, etc.

    -- forces x = y

    So true two-bit error corrupts at least one parity group => min distance > 2

    Three-bit error (two msb and lsb) goes undetected => minimum distance = 3

    Conclude: process always produces a Hamming code with min distance = 3

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    Traditional to permute check bits to far right

    Used in memory protection schemes

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    Add traditional parity bit (for entire word) to obtain

    code with minimum distance = 4

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    Number of check bits grows slowly with information bits

    For minimum distance = 4: total bits 2

    parity bits 1

    information bitslg 1

    payloadratio 1

    kn

    p k

    i n pn p n n

    n n

    ! !

    ! !

    ! !

    ! !

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    Two-dimensional codes (product codes)

    min distance is product of

    row and column distances

    for simple parity on each (below)

    min distance is 4

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    Scheme for RAID storage

    CRC is extension ofHamming codeseach disk is separate row

    column is disk block (say 512 characters)

    rows have CRC on row disk

    columns have even parity

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    Checksum codes

    mod-256 sum of info bytes becomes checksum byte

    mod-255 sum used in IP packets

    m-hot codes (m out of n codes)

    each valid codes has m ones in a frame of n bits

    min distance is 2detect all unidirectional errors

    bit flips are all 0 to 1 or 1 to 0

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    Serial data transmission

    (simple) transmit clock and sync with data (3 lines)

    (complex) recover clock and/or sync from data line

    Serial line codes:

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    NRZ: clock recovery except during long sequences of zeros or ones

    NRZ1: nonreturn to zero, invert on one

    zero => no change, one => change polarity

    RZ: clock recovery except during long sequences of zeroDC balance

    Bipolar return to zero (aka alternate mark inversion: send one as +1 or -1)

    Manchester: zero => 0 to 1 transition, one => 1 to 0 transition

    at interval center

    Serial line codes: