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COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23...

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COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 [email protected] [email protected]
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Page 1: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

COMP311-07BComputer Systems Architecture

Matthew Luckie / Tony McGregorOffice: G1.28 / G1.23

[email protected]@cs.waikato.ac.nz

Page 2: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

COMP311 – 2007 Course Web Page

http://www.cs.waikato.ac.nz/Teaching/COMP311A Lectures

Lecture 1 Tue 16:00 - 18:00 K.G.06 Lecture 2 Thu 12:00 - 13:00 I.1.08 Lecture 3 Fri 09:00 - 10:00 K.G.01

Textbook Computer Organization and Design: The Hardware/Software

Interface, THIRD Edition, Patterson and Hennessy Excellent and essential part of the course

Page 3: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

COMP311 – 2007 Tutor

Sam Bartels Class Representatives

??

Page 4: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

COMP311 – 2007 Assignments (30%)

Assignment 1: Due Fri 10th August 5pm (5%) Assignment 2: Due Fri 14th September 5pm (10%) Assignment 3: Due Fri 28th September 5pm (5%) Assignment 4: Due Fri 12th October 5pm (10%)

Test (20%) 90 Minutes (Tuesday 14th August) during lecture time

Exam (50%) 3hrs closed book – date and time to be set

Page 5: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

Overview 201

Introduction to how a computer operates Only small emphasis on issues that affect

performance 311

how to analyse their performance (or how not to!)

issues affecting modern processor design (caches, pipelines)

Page 6: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

Topics Introduction and Performance The Future of Computer Architecture Hardware Description Language Intro

VHDL Design

Components Single cycle per instruction CPU Multi-cycle implementation Pipelined Implementation

Memory caching

I/O PC Architectures

Page 7: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

Introduction

Rapid Advances in Computer technology first stored program computer ran 1st program 50

years ago Looks like the first phase has ended

CPU clock speeds have tended to double every two years

Heat becoming a bigger issue New techniques will be required to extract

performance gains Probably based around multiple simple CPU cores

Page 8: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.
Page 9: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

History

Babbage (The Father/Great Uncle of Computing) 1791 – 1871 1822: Difference Engine Designed a computer to calculate polynomial

functions He did not successfully build the machine Using his plans, 1989 – 1991 it was built, London

Science Museum A ‘computer’ was someone who produced

mathematical tables by hand

Page 10: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

History Babbage (The Father/Great Uncle of Computing)

1791 - 1871 Designed a General purpose Computer (Analytical

Engine) Machine controlled by punched cards stung together like

punched paper tape Location in Data store numbered For control he devised a system rotating barrels with projecting

studs (barrels could step forward or backwards an arbitrary number of steps

Never built, but programmed by Ada Lovelace Next significant step not till 1945

Page 11: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

History Eckert + Mauchly at the Moore School

of the University of Pennsylvania Funded by the US army to build a machine

to calculate artillery firing tables Electronic Numerical Integrator and

Calculator (ENIAC) The machine was programmed by

adjusting cables and switches

Page 12: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

History ENIAC was operating in 1945

Designed and built by Eckert and Mauchly 18,000 vacuum tubes 30 Tons Was programmable and had conditional

jumps Programmed using a set of plugs and

switches

Page 13: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

History In 1944 John von Neumann and others joined the

team Ideas they came up with can be summarized as:

Electronic Operation Binary Instruction set as user interface Serial execution of instructions Single Memory Modification and construction of instructions

Paper published only had Von Neumanns name on

Page 14: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

History ENIAC (Electronic

Numerical Integrator and Calculator) was operating in 1945 Designed and built by

Eckert and Mauchly 18,000 Valves Was programmable and

had conditional Jumps Programmed using a set

of plugs and switches

Page 15: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

History

Input Output

Memory

Control ALU

Page 16: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

History This led to a whole series of machines being

developed: Mark-I built at the University of Manchester EDSAC by Maurice Wilkes of Cambridge University

(1949) 1949 BINAC (Eckert and Mauchly Corp.) 1951 UNIVAC I (Remington-Rand Corp.) 1964 System/360 (IBM) 1976 Cray-1 …

Page 17: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

Technology Improvements Technologies used in Computers over time

1951 – Vacuum Tube Tube with electrodes in a vacuum, held in glass

1965 – Transistor On/off switch controlled by electricity

1975 – Integrated Circuit Dozens of transistors in a die

1995 – Very Large Scale Circuit Hundreds of millions of transistors in a die

Rate of increasing integration has been very constant over time

Page 18: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

DRAM Capacity

1998 Morgan Kaufmann Publishers

0

100000

200000

300000

400000

500000

600000

Capcity (MB) 16 64 256 1000 4000 16000 64000 1E+05 3E+05 5E+05

1977 1980 1983 1985 1989 1993 1996 1998 2000 2002

Page 19: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

Performance Increases

Year

Transistors

1000

10000

100000

1000000

10000000

100000000

1970 1975 1980 1985 1990 1995 2000

i80386

i4004

i8080

Pentium

i80486

i80286

i80862X transistors/ChipEvery 1.5 years

Called “Moore’s Law”

Alpha 21264: 15 millionPentium Pro: 5.5 millionPowerPC 620: 6.9 millionAlpha 21164: 9.3 millionSparc Ultra: 5.2 million

Moore’s Law

Athlon (K7): 22 Million

Itanium 2: 41 Million

Page 20: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

Technology => dramatic change Processor

logic capacity: about 30% per year clock rate: about 20% per year

Memory DRAM capacity: about 60% per year (4x every 3 years) Memory speed: about 10% per year Cost per bit: improves about 25% per year

Disk capacity: about 60% per year Total use of data: 100% per 9 months!

Network Bandwidth Bandwidth increasing more than 100% per year!

Page 21: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

Characteristics over TimeYear Name Size

(cu. Ft.)Power (watts)

Performance (adds/sec)

Memory (KB)

Adjusted price (1996$)

Adjusted price/perfomance

1951 UNIVAC1 1000 124,500 1,900 48 4,996,749 1

1964 IBM S/360 model 50

60 10,000 500,000 64 4,140,257 318

1965 PDP-8 8 500 330,00 4 66,071 13,135

1976 Cray-1 58 60,000 166,000,000 32,768 8,459,712 51,604

1981 IBM PC 1 150 240,000 256 4,081 154,673

1991 HP9000 /model 750

2 500 50,000,000 16,384 8,156 16,122,356

1996 Intel Ppro PC

2 500 400,000,000 16,384 4,400 239,078908

Page 22: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

Chip Manufacture

Page 23: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

Software Technology Designers must also be aware of software

technologies Mixes of instructions generated by compilers Locality of reference (memory hierarchy)

Page 24: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

Price/Performance Other areas designers must be aware

of: Target markets Price Performance Price/performance

Page 25: COMP311-07B Computer Systems Architecture Matthew Luckie / Tony McGregor Office: G1.28 / G1.23 mluckie@cs.waikato.ac.nz tonym@cs.waikato.ac.nz.

Parting Thought Compare with transport industry

If similar advances made the travel coast to coast in US in 5 seconds for 50 cents


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