AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Compal confidential
REV:2.0
Mobile Banias uFCBGA/uFCPGA with IntelODEM_MCH+ICH4-M core logic
Schematics Document
2003-07-09
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0
Cover Sheet
1 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Power On/Off CKT.
File Name : LA-1701
Touch Pad
ATA-100
page 28
CRT & TV-OUT Conn.
LPC BUS
page 23
Compal confidential
uFCBGA-593
page 18
H_A#(3..31)
CardBus Controller
IDSEL:AD20(PIRQA#,GNT#2,REQ#2)
SD Connector
H_D#(0..63)
page 26
page 19
VGA Board Connector
ENE CB1410
page 14
MDC & BT Conn
page 24
page 27
Int.KBD
page 20
page 30
AGP BUS
BANK 0, 1, 2, 3
USB conn
400MHz
AD1981BHub-Link
SMsC LPC47N227
page 22
page35,36,37,38,39,40,41,42
page 21
DC/DC Interface CKT.
PARALLEL
Mobile Banias
page 30
Mini PCIsocket
page 33
USB2.0
PSB
CDROM ConnectorRJ45/11 CONN
IDSEL:AD18,AD22(PIRQC/D#,GNT#3/4,REQ#3/4)
Clock Generator
page 26
ICS 950810
page 29
RTL 8139CL+
EC I/O Buffer
Fan Control
Power Circuit DC/DC
HDDConnector
PCI BUS
Mini-PCI solt
uFCBGA-479/uFCPGA-478 CPU
IEEE 1394VT6307S
3.3V 33 MHz
page 25
IDSEL:AD17(PIRQB#,GNT#1,REQ#1)
page 28
DDR-SO-DIMM X2
IDSEL:AD16(PIRQA#,GNT#0,REQ#0)
page 31
Secondary IDE
page 34
Intel ODEM MCH-M
ATA-100
page 21
LAN
Slot 0
BIOS
page 4
2.5V DDR- 200/266
page 4,5
page 28
RTC CKT.
Audio CKT
page 12
Memory BUS(DDR)
page 13
BGA-421
page 32
AC-LINK
page 4
page 18
page 6,7,8
Intel ICH4-M
Thermal SensorADM1032AR
page 9,10,11
page 15,16,17
page 28
Super I/O
SPR CONN.
page 19
FIR
Primary IDE
EC NS87591L
page 25
*RJ45 CONN*PS2 x2 CONN*CRT CONN*LINE IN JACK*LINE OUT JACK*1394 CONN*SPDIF CONN*DVI CONN*DC JACK*TVOUT CONN*PRINTER PORT*COM PORT*USB CONN x2
AMP & Audio Jack
Power OK CKT.
page 16
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
page 31
LA-1701 1.0
Block Diagram
2 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
AA
1 1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
IDSEL #
VIN
SMBUS
OFF
OFF
Power Plane
D
OFF
ON
+2.5V
N/AN/A
ATA 100
ON
LPC I/F
ON
AC or battery power rail for power circuit
+12V
AC97
+CPU_CORE
+3VALW
+1.25VS
S3
D31
+1.5VS
0
ON
5V power rail
AC97 MODEM
ON
1
ON
ON
3V power rail
OFF
D29
AGP_DEVSEL#
1.5V always on power rail
RTC power
OFF
4
+3V
+VCCP
OFF
ON
D8 (AD24)
A
ON
2
5V switched power rail
N/A
1 0 1 0 0 0 1 X
ON
3
+2.5VS
RTCVCC
ON
2.5V power rail for DDR
12V always on power rail
Internal PCI Devices
N/A
+1.5VALW
ON*
A2
+5V
Wireless LAN
USB
ONON
I2C / SMBUS ADDRESSING
AGP BUS
OFF
D31
C
A
ON
ON
1 0 1 0 0 0 0 X
D2
CARD BUS
A0
CLOCK GENERATOR (EXT.)
HEX
D0
D30
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
DDR SO-DIMM 1
OFF
ON
1.25V switched power rail for DDR Vtt
ON
S0-S1
OFF
ON
D6
D31
OFF
1.2V switched power rail for MCH core power
2.5V switched power rail
5V always on power rail
ON OFF
ON
OFF
ON
+12VS
3.3V always on power rail
D4
PCI Device ID
N/A
OFF
N/A
D
ADDRESS
12V power rail
ON
AD17
DEVICE
OFF
OFF
PCI Device ID
ON*
ON
ON
Description
ON*
B
Mini-PCI
OFF
+12VALW
DDR SO-DIMM 0
DEVICE
OFF
1.05V rail for Processor I/O
+1.2VS
1394
HUB
Adapter power supply (19V)
ON
AD16
ON
1 1 0 1 0 0 1 X
AD18
+5VALW
LAN
External PCI Devices
ON*
ON
N/A
ON
1.8V switched power rail for CPU PLL & Hub-Link
ETHERNET
3.3V switched power rail+3VS
N/A
REQ/GNT #
OFF
D31
D2
OFF
OFF
OFF
DEVICE
Core voltage for CPU
OFF
AD22
+5VS
OFF
PIRQ
S5
D31
D1
1.5V switched power rail for AGP interface
12Vswitched power rail on power rail
OFF
B+
Voltage Rails
AD20
ON
+1.8VS
Symbol note:
:means digital ground.
:means analog ground.
:means reserved.@
LA-1701 1.0
Notes List
3 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
AA
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Address:1001_100X
Thermal Sensor ADM1032AR
ITP700FLEX FOR BANIAS
Fan Control circuit
W=15mil
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701
1.0
INTEL CPU BANIAS (1 of 2)
4 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
ITP_BPM#0
H_D#47
H_A#13
H_A#11
H_A#3
ITP_DBRESET#ITP_TRST#
ITP_BPM#4
H_A#12
ITP_TCK
ITP_BPM#5
H_A#14
H_REQ#4
H_D#60
H_D#44
H_D#52H_D#53
H_D#4
H_THERMDA
H_D#11
H_A#30
H_A#19
H_A#31
ITP_BPM#2
ITP_BPM#0
H_REQ#3
H_REQ#1
H_INTR
ITP_BPM#3
H_SMI#
H_A#6
TEST1
H_D#50
H_A#24
H_D#38
H_D#27
ITP_TMS
H_D#14
H_A#22
H_D#15
H_A#4
H_THERMTRIP#
H_PROCHOT#
H_CPURST#
H_CPUPWRGD
CLK_CPU_ITP#
H_REQ#0
H_D#25
H_D#41
H_THERMTRIP#
H_D#9
H_D#49
H_A#8
H_THERMDA
H_D#0
H_D#23
H_A#29
H_IERR#
H_D#42
H_REQ#[0..4]
ITP_BPM#2
ITP_TMS
H_RS#2
H_D#17
H_PROCHOT#
ITP_TMS
H_A#[3..31]
H_D#56
H_D#19
H_D#29
ITP_BPM#5
H_RS#1
H_D#1
H_A#7
H_D#24
RESETITP#
ITP_TDI
H_D#36
H_A#16ITP_BPM#1
H_THERMDC
ITP_TDO
H_D#40
H_D#21
H_A#21
H_D#48
H_D#6
H_D#13
H_D#46
ITP_BPM#3
H_RS#0
H_IGNNE#
H_D#26
ITP_BPM#1
ITP_TDO_R
H_D#32
CLK_CPUITP
H_THERMDC
H_D#33
H_A#10
H_A#28
H_D#39
ITP_TCK
H_D#22
H_A#9
H_A#25
H_D#34
H_A#5
H_A20M#
H_D#2
H_D#16
H_REQ#2
H_D#18
H_D#57
H_A#27
ITP_TRST#
ITP_TCK
TEST2
H_D#58
H_A#18
H_D#35
H_D#62
H_NMI
H_D#28
H_D#31
H_INIT#
H_D#63
H_D#54
H_A#20
ITP_DBRESET#
H_D#8
H_D#55
H_D#61
H_D#5
H_A#23
ITP_BPM#4
H_STPCLK#
H_D#12
H_D#7
H_D#10
ITP_TDI
H_A#26
H_A#17
ITP_TCK
H_D#[0..63]
H_D#30
H_D#51
H_D#59
H_D#43
H_CPUSLP#
H_D#45
H_A#15
H_D#20
H_D#3
CLK_CPU_ITP
H_D#37
ITP_TDO_R
CLK_CPUITP#
FAN1_ON
FAN1_VOUT
ITP_TDI
ITP_TRST#
H_CPURST# RESETITP# ITP_TDO
+VCCP
+VCCP
+VCCP
+3VALW
+3VS
+VCCP
+3VALW
+VCCP
+VCCP+VCCP
+VCCP
+VCCP
+5VS
+5VS
+12VS
C129
2200P_0402_25V7K
1
2
R114
@10K_0402_5%
12
C131
0.1U_0402_10V6K1
2
R11856_0402_5%
12
U13
ADM1032AR_SOP8
1
6
4 5
2
3
8
7
VDD
ALERT#
THERM# GND
D+
D-
SCLK
SDATA
JP15
53398-0310
123
ADDR GROUP
CONTROL GROUP
HOST CLK
MISC
DATA GROUP
THERMALDIODE
LEGACY CPU
BaniasU9A
mFCBGA479
P4U4V3R3V2
W1T4
W2Y4Y1U1
AA3Y3
AA2AF4AC4AC7AC3AD3AE4AD2AB4AC6AD5AE2AD6AF3AE1AF1
A19A25A22B21A24B26A21B20C20B24D24E24C26B23E23C25H23G25L23M26H24F25G24J23M23J25L26N24M25H26N25K25Y26AA24T25U23V23R24R26R23AA23U26V24U25V26Y23AA26Y25AB25AC23AB24AC20AC22AC25AD23AE22AF23AD24AF20AE21AD21AF25AF22AF26
R2P3T2P1T1
C23K24W25AE24C22L24W24AE25
D25J26T24AD20
U3AE5
B15B14
A16A15
C2D3A3B5D1D4
C6B4
C17A18B18
N2L1J3N4L4H2K3K4A4J2
B11
H1K1L2
C8B8A9C9
A7M2B7
C19A10B10B17
E4A6
A13C12A12C5
F23C11
M3
B13
A3#A4#A5#A6#A7#A8#A9#A10#A11#A12#A13#A14#A15#A16#A17#A18#A19#A20#A21#A22#A23#A24#A25#A26#A27#A28#A29#A30#A31#
D0#D1#D2#D3#D4#D5#D6#D7#D8#D9#
D10#D11#D12#D13#D14#D15#D16#D17#D18#D19#D20#D21#D22#D23#D24#D25#D26#D27#D28#D29#D30#D31#D32#D33#D34#D35#D36#D37#D38#D39#D40#D41#D42#D43#D44#D45#D46#D47#D48#D49#D50#D51#D52#D53#D54#D55#D56#D57#D58#D59#D60#D61#D62#D63#
REQ0#REQ1#REQ2#REQ3#REQ4#
DSTBN0#DSTBN1#DSTBN2#DSTBN3#DSTBP0#DSTBP1#DSTBP2#DSTBP3#
DINV0#DINV1#DINV2#DINV3#
ADSTB0#ADSTB1#
BCLK0BCLK1
ITP_CLK0ITP_CLK1
A20M#FERR#
IGNNE#INIT#
LINT0/INTRLINT1/NMI
STPCLK#SMI#
THERMTRIP#THERMDCTHERMDA
ADS#BNR#BPRI#BR0#DEFER#DRDY#HIT#HITM#IERR#LOCK#RESET#
RS0#RS1#RS2#
BPM0#BPM1#BPM2#BPM3#
DBR#DBSY#DPSLP#DPWR#PRDY#PREQ#PROCHOT#
PWRGOODSLP#TCKTDITDOTEST1TEST2TMS
TRDY#
TRST#
[email protected]_0402_1%
12
D23RB751V_SOD323
21
S
GD Q23
SI3456DV-T1_TSOP63
624
51
R110150_0402_5%
1 2
R111 0_0402_5%1 2
C439
@10000P
1
2
R10256 _0402_1%
12
C
BE
Q20@2SC2411K_SOT23
1
2
3
R120
1K_0402_5%
12
R138@0_0402_5%
R11922.6_0402_1%
12
C1391U_0603_10V6K
1 2
C145
@0.1U_0402_16V7K
1 2
R109
330_0402_5%1 2
R135 39.2_0603_1%1 2
JP29
@ITP700-FLEXCON
12573
12
11
89
101416182022
272826
2524
232119171513
46
TDITMSTCKTDOTRST#
RESET#
FBO
BCLK#BCLK
GND0GND1GND2GND3GND4GND5
VTT0VTT1VTAP
DBR#DBA#
BPM#0BPM#1BPM#2BPM#3BPM#4BPM#5
NC1NC2
R134 150_0402_1%1 2
R101330_0402_5%
1 2
Q21
MMBT3904_SOT23
2
31
U14
LM321MF_SOT23-5
1
3
52
4+
-
PG
O
R34110K_0402_5%
12
R137 0_0402_5%1 2
C448
@2200P_0603_16V7K
1 2
Q22
MMBT3904_SOT232
31
R340 7.32K_0603_1%1 2
C42210U_1206_10V4Z
1
2
C140
0.1U_0402_10V6K1
2
[email protected]_0402_1%
12
C427@10000P
1
2
R136 0_0402_5%1 2
R154 27.4_0402_1%1 2
R10454.9_0402_1%
12
R124330_0402_5%
12
R11256_0402_5%
1 2
R105 @1K_0402_5%
R34213K_0603_1%
12
R129 680_0402_5%1 2
R107 @1K_0402_5%
R10856_0402_5%
1 2
R121330_0402_5%
1 2
H_DBSY#
PROCHOT#
H_A20M#
H_BPRI#
H_CPUPWRGD
THRMTRIP#
H_DINV#1 H_DINV#0
H_DINV#2
H_INIT#
H_D#[0..63]
H_BNR#
H_HIT#
H_ADSTB#0
H_TRDY#
H_DRDY#
H_DSTBP#0
EC_SMC_2
H_BR0#
H_LOCK#
H_DSTBN#2
H_RS#2
H_DSTBP#1
H_DPSLP#
H_INTR
H_DINV#3
H_RS#0
H_A#[3..31]
H_HITM#
H_CPURST#
ITP_DBRESET#
H_IGNNE#
H_ADS#
CLK_CPU_BCLK
H_DSTBP#3
CLK_CPU_BCLK#
H_CPUSLP#
H_REQ#[0:4]
H_FERR#
MAINPWON
H_DPWR#
H_RS#1
H_NMI
H_STPCLK#
H_DSTBP#2
H_DEFER#
H_DSTBN#3
H_SMI#
H_DSTBN#1 H_DSTBN#0
H_ADSTB#1
CLK_CPU_ITP#CLK_CPU_ITP
EN_FAN1
FANSPEED1
EC_SMD_2
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
12m ohm/4
Resistor placed within0.5" of CPU pin.Traceshould be at least 25miles away from anyother toggling signal.
Vcc-coreDecoupling
5m ohm/35MLCC 0805 X5R3.5nH/44X220uF
ESL,nHC,uF
SPCAP,Polymer0.6nH/3535X10uF
Resistor placed within0.5" of CPU pin.Traceshould be at least 25miles away from anyother toggling signal.
ESR, mohm
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0
INTEL CPU BANIAS (2 of 2)
5 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
VCCSENSE
GTL_REF0
VSSSENSE
COMP3
COMP0COMP1COMP2
+CPU_VCCA
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE+CPU_CORE
+VCCP
+1.8VS
+VCCP
+CPU_CORE
+CPU_CORE
+CPU_CORE
+VCCP
+CPU_VCCA
R361K_0402_1%
12
R296
27.4_0402_1%
12
R293
54.9_0402_1%
12
R56
54.9_0402_1%
12
C122
10U_1206_6.3V7K
1
2
C4910U_1206_6.3V7K
1
2
R322K_0402_1%
12
R79
0_1206_5%
1 2
R57
27.4_0402_1%
12
C356
0.01U_0402_16V7K
1
2
C9210U_1206_6.3V7K
1
2
C117
10U_1206_6.3V7K
1
2
+C564
100U_6.3V_M
1
2
C640.01U_0402_16V7K
1
2
C126
10U_1206_6.3V7K
1
2
C50
10U_1206_6.3V7K
1
2
C349
10U_1206_6.3V7K
1
2
C387
10U_1206_6.3V7K
1
2
+ C280220U_D2_2VM
1
2
C105
10U_1206_6.3V7K
1
2
C67
10U_1206_6.3V7K
1
2
R103
@1K_0402_5%
C121
10U_1206_6.3V7K
1
2
C430
0.1U_0402_16V7K
1
2
+ C281220U_D2_2VM
1
2
Banias
POWER, GROUND
U9C
mFCBGA479
T26U2U6U22U24V1V4V5V21V25W3W6W22W23W26Y2Y5Y21Y24AA1AA4AA6AA8AA10AA12AA14AA16AA18AA20AA22AA25AB3AB5AB7AB9AB11AB13AB15AB17AB19AB21AB23AB26AC2AC5AC8AC10AC12AC14AC16AC18AC21AC24AD1AD4AD7AD9AD11AD13AD15AD17AD19AD22AD25AE3AE6AE8AE10AE12AE14AE16AE18AE20AE23AE26AF2AF5AF9AF11AF13AF15AF17AF19AF21AF24
M4M5
M21M24
N3N6
N22N23N26
P2P5
P21P24R1R4R6
R22R25
T3T5
T21T23
AF18
F20F22G5
G21H6
H22J5
J21K22U5V6
V22W5
W21Y6
Y22AA5AA7AA9
AA11AA13AA15AA17AA19AA21
AB6AB8
AB10AB12AB14AB16AB18AB20AB22AC9
AC11AC13AC15AC17AC19
AD8AD10AD12AD14AD16AD18
AE9AE11AE13AE15AE17AE19
AF8AF10AF12AF14AF16
VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS
VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS
VCC
VCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCCVCC
C431
0.1U_0402_16V7K
1
2
C363
0.1U_0402_16V7K
1
2
+ C110220U_D2_2VM
1
2
C359
0.1U_0402_16V7K
1
2
C348
0.1U_0402_16V7K
1
2
+ C62220U_D2_2VM
1
2
C3410.1U_0402_16V7K
1
2
C346
0.1U_0402_16V7K
1
2
C372
0.1U_0402_16V7K
1
2
C428
0.1U_0402_16V7K
1
2
C365
10U_1206_6.3V7K
1
2
C388
10U_1206_6.3V7K
1
2
C386
10U_1206_6.3V7K
1
2
C429
0.1U_0402_16V7K
1
2
C325
10U_1206_6.3V7K
1
2
C351
10U_1206_6.3V7K
1
2
C36410U_1206_6.3V7K
1
2
C35210U_1206_6.3V7K
1
2
C389
10U_1206_6.3V7K
1
2
C385
10U_1206_6.3V7K
1
2
C81
10U_1206_6.3V7K
1
2
C8710U_1206_6.3V7K
1
2
C72
10U_1206_6.3V7K
1
2
C324
10U_1206_6.3V7K
1
2
C350
10U_1206_6.3V7K
1
2
C68
10U_1206_6.3V7K
1
2
C69
10U_1206_6.3V7K
1
2
C70
10U_1206_6.3V7K1
2
C82
10U_1206_6.3V7K1
2
C8810U_1206_6.3V7K
1
2
C71
10U_1206_6.3V7K
1
2
C327
10U_1206_6.3V7K
1
2
C127
0.01U_0402_16V7K
1
2
R290 @54.9_0402_1%1 2
C341U_0603_10V6K
1
2
R288 @54.9_0402_1%1 2
C328
10U_1206_6.3V7K
1
2
C104
10U_1206_6.3V7K1
2
C102
10U_1206_6.3V7K1
2
Banias
POWER, GROUNG, RESERVED SIGNALS AND NC
U9B
mFCBGA479
B2AF7C14
C3
C16
E1
P25P26AB2AB1
AD26E26G1
AC1
E2F2F3G3G4H4
F26B1N1
AC26
P23W4
D10D12D14D16E11E13E15F10F12F14F16K6L5
L21M6
M22N5
N21P6
P22R5
R21T6
T22U21
AE7AF6
A2A5A8A11A14A17A20A23A26B3B6B9B12B16B19B22B25C1C4C7C10C13C15C18C21C24D2D5D7D9D11D13D15D17D19D21D23D26E3E6E8E10E12E14E16E18E20E22E25F1F4F5F7F9F11F13F15F17F19F21F24G2G6G22G23G26H3H5H21H25J1J4J6J22J24K2K5K21K23K26
D6D8
D18D20D22
E5E7E9
L3L6L22L25M1
E17E19E21
F6F8
F18
RSVDRSVDRSVDRSVD
TEST3
PSI#
COMP0COMP1COMP2COMP3
GTLREF0GTLREF1GTLREF2GTLREF3
VID0VID1VID2VID3VID4VID5
VCCA0VCCA1VCCA2VCCA3
VCCQ0VCCQ1
VCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCPVCCP
VCCSENSEVSSSENSE
VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS
VCCVCCVCCVCCVCCVCCVCCVCC
VSSVSSVSSVSSVSS
VCCVCCVCCVCCVCCVCC
C362
10U_1206_6.3V7K
1
2
C103
10U_1206_6.3V7K
1
2
C101
10U_1206_6.3V7K
1
2
C326
10U_1206_6.3V7K
1
2
C37220P_0402_50V8K
1
2
C98
0.01U_0402_16V7K
1
2
CPU_VID4CPU_VID3
CPU_VID0
CPU_VID2CPU_VID1
CPU_VID5
PSI#
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Note:
DDRST1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TEST MODE
MCH STRAPST2X
400 Mhz PSB
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
X1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Placement R308,R305close to MCH
X01
LA-1701 1.0
ODEM(1/3)
6 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
HUB_PD4
AGP_AD1
AGP_AD10
HUB_PD7
HUB_PD5
H_REQ#2
HUB_PD9
AGP_SBA2
AGP_C/BE#0
AGP_AD29
H_A#[3..31]
AGP_AD13
H_REQ#[0..4]
HUB_PD10
AGP_AD16
AGP_AD8
H_RCOMP0
AGP_ST2
AGP_AD3
AGP_AD27
AGP_SBA0
AGP_AD28
AGP_AD23
HUB_PD2
H_RS#[0..2]
AGP_ST2
AGP_AD19
HUB_PD8
H_SWNG1
AGP_AD15
AGP_AD25
H_SWNG0
HUB_PD0
H_REQ#3
AGP_SBA7
HUB_PD1
+AGPREF
AGP_AD24
H_SWNG0
AGP_C/BE#2
AGP_ST0
+AGPREF
HUB_PD3
AGP_AD12AGP_AD11
AGP_SBA3
CLK_MCH_66M
AGP_C/BE#[0..3]
AGP_AD21
AGP_AD14
AGP_SBA5
AGP_RCOMPAGP_ST1
H_RS#0
AGP_AD18
AGP_SBA1
AGP_AD30
H_RS#2AGP_SBA6
AGP_C/BE#3
AGP_AD17
AGP_AD7
H_REQ#1
AGP_AD4
AGP_SBA4
AGP_C/BE#1
HUB_PD[0..10]
AGP_AD9
AGP_AD5
H_SWNG1
H_REQ#4
H_REQ#0
MGH_GTLREF
AGP_AD6
AGP_SBA[0..7]
AGP_AD22
AGP_AD0
AGP_AD20
AGP_AD2
AGP_AD31
HUB_PD6
AGP_ST1
AGP_AD26
HUB_RCOMP
H_RS#1
H_D#[0..63]
AGP_AD[0..31]
H_RCOMP1
H_A#30
H_A#25
H_A#4
H_A#27
H_A#13
H_A#15
H_A#29
H_A#17
H_A#3
H_A#9
H_A#22
H_A#8
H_A#26
H_A#5
H_A#20
H_A#23
H_A#14
H_A#16
H_A#18
H_A#7
H_A#28
H_A#31
H_A#21
H_A#10
H_A#24
H_A#19
H_A#6
H_A#11H_A#12
H_D#49
H_D#52H_D#51
H_D#10
H_D#37
H_D#25H_D#24
H_D#56
H_D#38
H_D#7
H_D#11
H_D#30
H_D#44
H_D#57
H_D#23
H_D#47
H_D#45
H_D#22
H_D#8
H_D#26
H_D#12
H_D#17
H_D#0
H_D#46
H_D#14
H_D#60
H_D#18
H_D#15
H_D#62
H_D#42
H_D#40
H_D#3
H_D#27
H_D#16
H_D#13
H_D#9
H_D#50
H_D#20
H_D#54
H_D#31
H_D#34
H_D#4H_D#5
H_D#2
H_D#6
H_D#29
H_D#36
H_D#1
H_D#43
H_D#58
H_D#48
H_D#55
H_D#32
H_D#53
H_D#61
H_D#63
H_D#41
H_D#28
H_D#35
H_D#39
H_D#59
H_D#21
H_D#19
H_D#33
HUB_VREF
+1.5VS
+VCCP
+VCCP
+1.8VS
+VCCP
+AGPREF
+1.5VS
+1.5VS
R291@1K_0402_5%
12
C334
0.1U_0402_10V6K
1
2
Odem
HOST
U12A
RG82P4300M_FCBGA593
AA2AB5AA5AB3AB4AC5AA3AA6AE3AB7AE5AF3AC6AC3AF4AE2AG4AG2AE7AE8AH2AC7AG3AD7AH7AE6AC8AG8AG7AH3AF8AH5AC11AC12AE9AC10AE10AD9AG9AC9AE12AF10AG11AG10AH11AG12AE13AF12AG13AH13AC14AF14AG14AE14AG15AG16AG17AH15AC17AF16AE15AH17AD17AE16
U6T5R2U3R3P7T3P4P3P5R6N2N5N3J3
M3M4M5L5K3J2N6L6L2K5L3L7K4J5
U2T7R7U5T4
R5N7
K8J8
AC2AC13
AA7AD13
AD4AF6
AD11AC15
AD3AG6
AE11AC16
AD5AG5AH9
AD15
AE17M7P8AA9AB12AB16
U7V4
W2Y4Y3Y5
W3V7V3Y7V5
W7W5W6
HD#0HD#1HD#2HD#3HD#4HD#5HD#6HD#7HD#8HD#9
HD#10HD#11HD#12HD#13HD#14HD#15HD#16HD#17HD#18HD#19HD#20HD#21HD#22HD#23HD#24HD#25HD#26HD#27HD#28HD#29HD#30HD#31HD#32HD#33HD#34HD#35HD#36HD#37HD#38HD#39HD#40HD#41HD#42HD#43HD#44HD#45HD#46HD#47HD#48HD#49HD#50HD#51HD#52HD#53HD#54HD#55HD#56HD#57HD#58HD#59HD#60HD#61HD#62HD#63
HA#3HA#4HA#5HA#6HA#7HA#8HA#9HA#10HA#11HA#12HA#13HA#14HA#15HA#16HA#17HA#18HA#19HA#20HA#21HA#22HA#23HA#24HA#25HA#26HA#27HA#28HA#29HA#30HA#31
HREQ#0HREQ#1HREQ#2HREQ#3HREQ#4
HADSTB#0HADSTB#1
BCLK#BCLK
HRCOMP0HRCOMP1
HSWNG0HSWNG1
HDSTBN#0HDSTBN#1HDSTBN#2HDSTBN#3HDSTBP#0HDSTBP#1HDSTBP#2HDSTBP#3DBI#0DBI#1DBI#2DBI#3
CPURST#HVREF0HVREF1HVREF2HVREF3HVREF4
ADS#HTRDY#DRDY#DEFER#HITM#HIT#HLOCK#BR0#BNR#BPRI#DBSY#RS#0RS#1RS#2
R5527.4_0402_1%
12
R303301_0402_1%
12
R299150_0402_1%
12
R30227.4_0402_1%
12
Odem
HUB
GND
AGP
U12B
RG82P4300M_FCBGA593
R27R28T25R25T26T27U27U28V26V27T23U23T24U24U25V24Y27Y26
AA28AB25AB27AA27AB26
Y23AB23AA24AA25AB24AC25AC24AC22AD24
P25P24N27P23M26M25L28L27M27N28M24
V25V23Y25
AA23
N25N24
P27
P26
Y24W28W27W24W23W25
AG24AH25
R24
AC27R23
AC28
AH28AH27AG28AG27AE28AE27AE24AE25
AF27AF26
AE22AE23AF22
AG25AF24AG26
P22AA21AD25
M6P6T6V6Y6AB6AD6AF5AJ5A3J4L4N4R4U4W4AA4AC4AE4AJ3E1J1L1N1R1U1W1AA1AC1AE1AG1
U8W8AA8AD8AF7AJ7D5F6H6K6
AB9AD10AF9AJ9A7F8J7L8N8R8
GAD0GAD1GAD2GAD3GAD4GAD5GAD6GAD7GAD8GAD9GAD10GAD11GAD12GAD13GAD14GAD15GAD16GAD17GAD18GAD19GAD20GAD21GAD22GAD23GAD24GAD25GAD26GAD27GAD28GAD29GAD30GAD31
HI_0HI_1HI_2HI_3HI_4HI_5HI_6HI_7HI_8HI_9
HI_10
GCBE#0GCBE#1GCBE#2GCBE#3
HI_STBHI_STB#
HLRCOMP
HI_REF
GFRAME#GDEVSEL#GIRDY#GTRDY#GSTOP#GPARGREQ#GGNT#
AD_STB0
AD_STB1AD_STB#0
AD_STB#1
SBA0SBA1SBA2SBA3SBA4SBA5SBA6SBA7
SB_STBSB_STB#
RBF#WBF#PIPE#
ST0ST1ST2
66INAGPREF
GRCOMP
VSS111VSS112VSS113VSS114VSS115VSS116VSS117VSS118VSS119VSS120VSS121VSS122VSS123VSS124VSS125VSS126VSS127VSS128VSS129VSS130VSS131VSS132VSS133VSS134VSS135VSS136VSS137VSS138VSS139VSS140VSS141
VSS101VSS102VSS103VSS104VSS105VSS106VSS107VSS108VSS109VSS110
VSS91VSS92VSS93VSS94VSS95VSS96VSS97VSS98VSS99
VSS100
R315 36.5_0402_1%1 2
R77100_0402_1%
12
C3921U_0603_10V6K
1
2
C333
220P_0402_50V7K
1
2
R6649.9_0402_1%
12
C335
220P_0402_50V7K
1
2 R30036.5_0603_1%
1 2
R3081K_0402_1%
12
R3051K_0402_1%
12C381
@10P_0402_50V8K
1
2
R314@22_0402_5%
12
C3790.01U_0402_16V7K
1
2
R304301_0402_1%
12
C3400.1U_0402_16V4Z
1
2
R287@1K_0402_5%
12
R306150_0402_1%
12
R292@1K_0402_5%
12
C330
0.1U_0402_10V6K
1
2
AGP_DEVSEL#
AGP_SBSTB
AGP_ADSTB1
H_DSTBN#0
H_A#[3..31]
H_HIT#
AGP_REQ#
H_DINV#0
AGP_FRAME#
H_DRDY#
H_DSTBN#3H_DSTBP#0
AGP_IRDY#
CLK_MCH_BCLK#
H_BNR#
AGP_GNT#
AGP_ST2
H_DBSY#
H_ADSTB#1AGP_PAR
H_LOCK#
AGP_TRDY#
AGP_ADSTB0
H_DINV#1
H_DSTBP#1
H_D#[0..63]
H_BR0#
CLK_MCH_66M
AGP_ST1AGP_ST0
AGP_CBE#[0..3]
H_DSTBN#1
H_ADSTB#0
AGP_RBF#H_CPURST#
H_TRDY#
H_HITM#
H_DSTBP#2
AGP_STOP#
H_REQ#[0..4]
HUB_PD[0:10]
H_BPRI#
HUB_PSTRB#
H_DINV#2
AGP_WBF#
AGP_ADSTB1#
H_DINV#3
AGP_ADSTB0#
AGP_AD[0..31]
H_ADS#
AGP_SBSTB#
CLK_MCH_BCLK
H_DSTBN#2
HUB_PSTRB
H_DEFER#
H_RS#[0..2]
AGP_SBA[0..7]
H_DSTBP#3
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
NOTE:1.M_RCV# max 2Via 2.G15 to Via max=40mils 3.G14 to Via max=40mils 4.Via to Via must = 100mils +-5mils
LA-1701 1.0
ICH4-M(2/3)
7 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
DDR_MMA6
DDR_SDQ13
DDR_SDQ56
DDR_SDQ59
DDR_MMA8
DDR_SDQS2
DDR_SDQ61
DDR_SDQ11
DDR_SDQ14
DDR_SDQ52
DDR_SDQ28
DDR_SDQ53
DDR_SDQ63
DDR_SDQ31
DDR_RCOMPDDR_CB4
DDR_SDQS8
DDR_SDQ20
DDR_SDQS1
DDR_MMA10
DDR_CB3
DDR_SDQ6
DDR_MMA12
DDR_SDQ35
DDR_MMA1
DDR_SDQ16
DDR_SDQ[0..63]
DDR_SDQ4
DDR_SDQ58
DDR_SDQ1
DDR_SDQ37
DDR_MMA0
DDR_SDQ55
DDR_SDQ22
DDR_SDQ42
DDR_SDQ25
DDR_MMA3
DDR_SDQ9
DDR_MMA[0..12]
DDR_SDQ39
DDR_SDQ49
DDR_MMA5
DDR_SDQ24
DDR_SDQ2
DDR_SDQ26
DDR_CB7
DDR_CB2
DDR_SDQS7
DDR_SDQ60
DDR_SDQ0
DDR_MMA9
DDR_SDQS3
DDR_SDQ29
DDR_SDQ7
DDR_SDQ23
DDR_SDQ12
DDR_SDQ57
DDR_SDQ43
DDR_MMA7
DDR_SDQ45DDR_SDQ46
DDR_SDQ40
DDR_CB0DDR_CB1
DDR_SDQ44
DDR_SDQ47
DDR_CB5
DDR_MMA2
DDR_CB[0..7]
DDR_SDQS[0..8]
DDR_SDQ30
DDR_SDQ18
DDR_SDQ21
DDR_SDQ50
DDR_SDQ33
DDR_SDQS6
DDR_SDQS0
DDR_SDQS5DDR_SDQS4
DDR_MMA11
DDR_SDQ36
M_RCV#
DDR_SDQ19
DDR_SDQ3
DDR_CB6
DDR_SDQ54
DDR_SDQ62
DDR_SDQ38
DDR_SDQ10
DDR_SDQ51
DDR_SDQ48
DDR_SDQ27
MCH_TEST#
DDR_SDQ5
DDR_SDQ32
DDR_SDQ8
DDR_SDQ17
DDR_SDQ41
DDR_SDQ15
DDR_SDQ34
DDR_MMA4
+1.5VS
+1.25VS_SMVREF
+1.25VS
+SDREF
R91 @4.7K_0402_5%1 2
R326
30.1_0603_1%1 2
Odem
MEMORY
U12C
RG82P4300M_FCBGA593
G28F27C28E28H25G27F25B28E27C27B25C25B27D27D26E25D24E23C22E21C24B23D22B21C21D20C19D18C20E19C18E17E13C12B11C10B13C13C11D10E10C9D8E8E11B9B7C7C6D6D4B3E6B5C4E4C3D3F4F3B2C2E2G4C16D16B15C14B17C17C15D14
E12F17E16G17G18E18F19G20G19F21F13E20G21
F26C26C23B19D12
C8C5E3
E15
G22
G11
G8F11
J25
G5
G24
G25
G6
K23
K25
F5
E24
J24
G7
J23
J9J21
G23E22H23F23
E9F7F9E7
G12G13
J27H27H26
J28
G15
G14
AD26AD27
V8Y8
SDQ0SDQ1SDQ2SDQ3SDQ4SDQ5SDQ6SDQ7SDQ8SDQ9
SDQ10SDQ11SDQ12SDQ13SDQ14SDQ15SDQ16SDQ17SDQ18SDQ19SDQ20SDQ21SDQ22SDQ23SDQ24SDQ25SDQ26SDQ27SDQ28SDQ29SDQ30SDQ31SDQ32SDQ33SDQ34SDQ35SDQ36SDQ37SDQ38SDQ39SDQ40SDQ41SDQ42SDQ43SDQ44SDQ45SDQ46SDQ47SDQ48SDQ49SDQ50SDQ51SDQ52SDQ53SDQ54SDQ55SDQ56SDQ57SDQ58SDQ59SDQ60SDQ61SDQ62SDQ63SDQ64SDQ65SDQ66SDQ67SDQ68SDQ69SDQ70SDQ71
SMA0SMA1SMA2SMA3SMA4SMA5SMA6SMA7SMA8SMA9SMA10SMA11SMA12
SDQS0SDQS1SDQS2SDQS3SDQS4SDQS5SDQS6SDQS7SDQS8
RSVD2
SWE#
SCAS#SRAS#
SCK0
SCK1
SCK2
SCK3
SCK4
SCK5
SCK#0
SCK#1
SCK#2
SCK#3
SCK#4
SCK#5
SMVREF0SMVREF1
SCKE0SCKE1SCKE2SCKE3
SCS#0SCS#1SCS#2SCS#3
SBS0SBS1
RSTIN#RSVD1
TESTIN#
SMRCOMP
RCVENIN#
RCVENOUT#
NC0NC1
DPSLP#DPWR#
C4040.1U_0402_16V4Z
1
2
C4050.1U_0402_16V4Z
1
2
C4030.1U_0402_16V4Z
1
2
R328
0_0805_5%
12
DDR_CLK0
DDR_CKE1
DDR_SWE#
DDR_CLK5#
DDR_CKE3
DDR_SCS#3
DDR_SCAS#
DDR_CLK4#
DDR_SDQS[0..8]
DDR_CLK5
DDR_CB[0..7]
H_DPWR#
DDR_SDQ[0..63]
DDR_SRAS#
PCIRST#
DDR_CKE0
DDR_MMA[0..12]
DDR_SCS#1
H_DPSLP#
DDR_CLK1
DDR_CKE2
DDR_CLK2#
DDR_SCS#2
DDR_SCS#0
DDR_SBS0
DDR_CLK0#
DDR_CLK2
DDR_CLK4DDR_CLK3#
DDR_CLK1#
DDR_SBS1
DDR_CLK3
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.LA-1701 1.0
ODEM(3/3)
8 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
+VCCP
+1.5VS
+1.5VS
+1.2VS
+2.5V
+2.5V
+1.8VS
+1.2VS
+1.8VS
+1.8VS
+2.5V
+VCCP
+2.5V
C409
0.1U_0402_16V4Z
1
2
C4180.1U_0402_16V4Z
1
2
C432
0.1U_0402_16V4Z
1
2
C402
0.1U_0402_16V4Z1
2
C406
0.1U_0402_16V4Z
1
2
+C344150U_D2_6.3VM
1
2
C345
0.1U_0402_16V4Z
1
2
C371
0.1U_0402_16V4Z
1
2
C321
0.1U_0402_16V4Z
1
2
C336
0.1U_0402_16V4Z
1
2
C316
0.1U_0402_16V4Z
1
2
+C366
150U_D2_6.3VM1
2
C3060.1U_0402_16V4Z
1
2
C338
0.1U_0402_16V4Z
1
2
C347
2.2U_0805_10V6K
1
2
C374
0.01U_0402_16V7K
1
2
C3940.047U_0603_16V7K
1
2
C380
0.015U_0402_16V7K
1
2
C3670.1U_0402_16V4Z
1
2
C353
0.22U_0603_10V7K
1
2
C393
0.022U_0603_16V7K
1
2
C315
0.1U_0402_16V4Z
1
2
C311
0.1U_0402_16V4Z
1
2
+C563
100U_6.3V_M
1
2
Odem
POWER GND
U12D
RG82P4300M_FCBGA593
R29W29
AC29AG29
U26AA26AE26AJ25AD23AF23R22U22
W22AA22AB21AD21
P17N16P15R16T15U16N14P13R14U14
L29L25N26N23M22
AG23AJ23AE21AG21AJ21AB20AC19AD20AE19AF20AG19AJ19AB18AD18AF18AB14AB10
M8T8
AB8
E29J29N29U29AA29AE29A27K27AJ27E26G26J26L26R26W26AC26AF25A23F24L24M23AC23AH23D21H21J22L22N22T22V22Y22AB22AC21AD22AF21AG22AH21A19F20H19AB19AC20AD19AE20AF19AG20AH19D17H17N17R17U17AB17AC18AE18AF17AG18AJ17A15F15H15N15P16R15T16U15AB15AD16AF15AJ15D13E14H13N13P14R13T14U13AB13AD14AF13AJ13A11F12H11AB11AD12AF11AJ11D9H9
C29G29A25D25K26D23H24K24L23A21F22H22K22D19H20A17F18H18D15F16H16A13F14H14D11H12
A9F10H10D7H8K7A5E5H5J6C1G1
T17
T13
H4
G16G10G9H7G2G3H3
VCCAGP0VCCAGP1VCCAGP2VCCAGP3VCCAGP4VCCAGP5VCCAGP6VCCAGP7VCCAGP8VCCAGP9VCCAGP10VCCAGP11VCCAGP12VCCAGP13VCCAGP14VCCAGP15
VCC0VCC1VCC2VCC3VCC4VCC5VCC6VCC7VCC8VCC9
VCCHL0VCCHL1VCCHL2VCCHL3VCCHL4
VCCP0VCCP1VCCP2VCCP3VCCP4VCCP5VCCP6VCCP7VCCP8VCCP9VCCP10VCCP11VCCP12VCCP13VCCP14VCCP15VCCP16VCCP17VCCP18VCCP19
VSS0VSS1VSS2VSS3VSS4VSS5VSS6VSS7VSS8VSS9
VSS10VSS11VSS12VSS13VSS14VSS15VSS16VSS17VSS18VSS19VSS20VSS21VSS22VSS23VSS24VSS25VSS26VSS27VSS28VSS29VSS30VSS31VSS32VSS33VSS34VSS35VSS36VSS37VSS38VSS39VSS40VSS41VSS42VSS43VSS44VSS45VSS46VSS47VSS48VSS49VSS50VSS51VSS52VSS53VSS54VSS55VSS56VSS57VSS58VSS59VSS60VSS61VSS62VSS63VSS64VSS65VSS66VSS67VSS68VSS69VSS70VSS71VSS72VSS73VSS74VSS75VSS76VSS77VSS78VSS79VSS80VSS81VSS82VSS83VSS84VSS85VSS86VSS87VSS88VSS89VSS90
VCCSM0VCCSM1VCCSM2VCCSM3VCCSM4VCCSM5VCCSM6VCCSM7VCCSM8VCCSM9VCCSM10VCCSM11VCCSM12VCCSM13VCCSM14VCCSM15VCCSM16VCCSM17VCCSM18VCCSM19VCCSM20VCCSM21VCCSM22VCCSM23VCCSM24VCCSM25VCCSM26VCCSM27VCCSM28VCCSM29VCCSM30VCCSM31VCCSM32VCCSM33VCCSM34VCCSM35VCCSM36VCCSM37
VCCGA
VCCHA
ETS#
RSVD3RSVD4RSVD5RSVD6RSVD7RSVD8RSVD9
+C301150U_D2_6.3VM
1
2
C337
0.1U_0402_16V4Z
1
2
C305
0.1U_0402_16V4Z
1
2
C383
0.1U_0402_16V4Z1
2
C373
10U_1206_10V4Z
1
2
R327
10K_0603_0.5%1 2
+C357150U_D2_6.3VM
1
2
C396
0.1U_0402_16V4Z
1
2
C3840.1U_0402_16V4Z
1
2
C361
10U_1206_10V4Z
1
2
C138
22U_1206_10V4Z
1
2
C39510U_1206_10V4Z
1
2
C400
22U_1206_10V4Z1
2
C4340.1U_0402_16V4Z
1
2
C408
0.1U_0402_16V4Z
1
2
+C401
150U_D2_6.3VM
1
2
C399
0.1U_0402_16V4Z1
2
C398
0.1U_0402_16V4Z
1
2
C310
0.1U_0402_16V4Z
1
2
C410
0.1U_0402_16V4Z1
2
C417
0.1U_0402_16V4Z
1
2
C38210U_1206_10V4Z
1
2
C433
0.1U_0402_16V4Z1
2
C3680.1U_0402_16V4Z
1
2
C411
0.1U_0402_16V4Z
1
2
C419
0.1U_0402_16V4Z1
2
C413
0.1U_0402_16V4Z
1
2
C320
0.1U_0402_16V4Z
1
2
C416
0.1U_0402_16V4Z1
2
55
4
4
3
3
2
2
1
1
D D
C C
B B
A ADIMM0
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-1701 1.0
DDR-SODIMM SLOT1
9 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
DDR_SDQ[0..63]
DDR_DQS[0..8]
DDR_DQ[0..63]
DDR_F_CB[0..7]
DDR_MMA[0..12]
DDR_SDQS[0..8]
DDR_CB[0..7]
DDR_DQS5DDR_SDQS5
DDR_SDQS7 DDR_DQS7
DDR_F_SMA1
DDR_F_SWE#
DDR_DQS5
DDR_F_SBS0
DDR_DQS7
DDR_F_SMA7
DDR_DQS8
DDR_F_SMA9
DDR_F_CB0
DDR_F_SMA3
DDR_F_CB3
DDR_F_CB2
DDR_F_SMA12
DDR_F_SMA10
DDR_DQS1
DDR_DQS6
DDR_F_CB1
DDR_DQS0
DDR_SCS#0
DDR_CKE1
DDR_F_SMA5
DDR_F_CB5
DDR_F_CB7
DDR_F_SRAS#
DDR_F_CB6
DDR_F_SMA6
DDR_CKE0
DDR_F_SMA2
DDR_F_SMA8
DDR_F_SMA4
DDR_F_SMA0
DDR_F_SMA11
DDR_F_SCAS#
DDR_F_CB4
DDR_F_SBS1
DDR_SCS#1
DDR_MMA8
DDR_SDQ19
DDR_SDQ1
DDR_SDQ9
DDR_SDQ12
DDR_SDQ0
DDR_SDQ20
DDR_SDQ2
DDR_SDQ18
DDR_SDQ10
DDR_SDQ16
DDR_SDQ5
DDR_SDQ17
DDR_SDQ4
DDR_SDQ3
DDR_SDQ15
DDR_SDQ14
DDR_SDQ8
DDR_SDQ7
DDR_SDQ13
DDR_DQ2
DDR_DQ3
DDR_DQ10
DDR_DQ7
DDR_DQ8
DDR_DQ12
DDR_DQ15
DDR_DQ4
DDR_DQ0
DDR_DQ13
DDR_DQ19
DDR_DQ17
DDR_DQ1
DDR_DQ20
DDR_DQ18
DDR_DQ5
DDR_DQ16
DDR_DQ6DDR_SDQ6
DDR_SDQ11 DDR_DQ11
DDR_DQS0DDR_SDQS0
DDR_DQS1DDR_SDQS1
DDR_DQ14DDR_DQ9
DDR_DQS2DDR_SDQS2
DDR_SDQ22 DDR_DQ22
DDR_SDQ23 DDR_DQ23
DDR_SDQ25 DDR_DQ25DDR_SDQ24 DDR_DQ24
DDR_SDQ29 DDR_DQ29
DDR_SDQ31 DDR_DQ31DDR_SDQ30 DDR_DQ30
DDR_DQ27DDR_SDQ27DDR_DQS3DDR_SDQS3
DDR_DQ37DDR_SDQ37DDR_DQ32DDR_SDQ32
DDR_SDQ35 DDR_DQ35DDR_SDQ39 DDR_DQ39
DDR_SDQS4 DDR_DQS4DDR_SDQ36 DDR_DQ36
DDR_SDQ34 DDR_DQ34DDR_DQ38DDR_SDQ38
DDR_SDQ40 DDR_DQ40DDR_SDQ44 DDR_DQ44
DDR_SDQ45 DDR_DQ45
DDR_DQ43DDR_SDQ43DDR_DQ42DDR_SDQ42
DDR_SDQ41 DDR_DQ41
DDR_SDQ46 DDR_DQ46DDR_SDQ47 DDR_DQ47
DDR_DQ49DDR_SDQ49DDR_SDQ52 DDR_DQ52
DDR_DQ51DDR_SDQ51DDR_DQ54DDR_SDQ54
DDR_DQS6DDR_SDQS6DDR_SDQ50 DDR_DQ50
DDR_DQ55DDR_SDQ55DDR_SDQ48 DDR_DQ48
DDR_SDQ56 DDR_DQ56DDR_SDQ62 DDR_DQ62
DDR_DQ58DDR_SDQ58DDR_SDQ63 DDR_DQ63
DDR_DQ60DDR_SDQ60DDR_SDQ61 DDR_DQ61
DDR_SDQ59 DDR_DQ59DDR_SDQ57 DDR_DQ57
DDR_DQ21DDR_SDQ21
DDR_SDQ26 DDR_DQ26
DDR_SDQ33 DDR_DQ33
DDR_DQ53DDR_SDQ53DDR_F_SMA0
DDR_MMA9DDR_F_SMA12
DDR_F_SMA8
DDR_MMA7
DDR_F_SMA4
DDR_F_SMA2
DDR_F_SMA10
DDR_MMA12
DDR_MMA1DDR_MMA2
DDR_F_SMA9
DDR_MMA4DDR_MMA5
DDR_F_SMA1
DDR_MMA0DDR_MMA10
DDR_F_SMA7
DDR_F_SMA5
DDR_F_SRAS#DDR_SRAS#
DDR_F_SMA11DDR_MMA11
DDR_MMA6 DDR_F_SMA6
DDR_F_SWE#DDR_SWE#DDR_F_SMA3DDR_MMA3
DDR_F_SBS1DDR_SBS1
DDR_F_SCAS#DDR_SCAS#
DDR_F_SBS0DDR_SBS0
DDR_CB0 DDR_F_CB0
DDR_F_CB7
DDR_CB6DDR_F_CB2DDR_CB2DDR_F_CB6
DDR_CB4 DDR_F_CB4DDR_F_CB5DDR_CB5
DDR_F_CB1DDR_CB1DDR_CB3 DDR_F_CB3
DDR_SDQS8 DDR_DQS8DDR_CB7
DDR_DQS3
DDR_DQS2
DDR_DQS4
DDR_DQ4DDR_DQ5DDR_DQ6DDR_DQ0
DDR_DQ1DDR_DQ3
DDR_DQ2DDR_DQ7DDR_DQ8DDR_DQ13
DDR_DQ12DDR_DQ9
DDR_DQ14DDR_DQ15DDR_DQ11DDR_DQ10
DDR_DQ16DDR_DQ20DDR_DQ17DDR_DQ21
DDR_DQ22DDR_DQ18
DDR_DQ23DDR_DQ19DDR_DQ24DDR_DQ25
DDR_DQ29DDR_DQ28
DDR_DQ26DDR_DQ27DDR_DQ30DDR_DQ31
DDR_DQ32DDR_DQ37DDR_DQ36DDR_DQ33
DDR_DQ38DDR_DQ34
DDR_DQ39DDR_DQ35DDR_DQ44DDR_DQ40
DDR_DQ41DDR_DQ45
DDR_DQ42DDR_DQ43DDR_DQ47DDR_DQ46
DDR_DQ52DDR_DQ49DDR_DQ48DDR_DQ55
DDR_DQ53DDR_DQ50
DDR_DQ54DDR_DQ51DDR_DQ63DDR_DQ58
DDR_DQ57DDR_DQ59
DDR_DQ62DDR_DQ56DDR_DQ61DDR_DQ60
DDR_SDQ28 DDR_DQ28
+2.5V
+3VS
+2.5V
+1.25VS_SDREF_R
RP23
10_4P2R_0404_5%
1 42 3
R206 10_0402_5%12
RP31
10_4P2R_0404_5%
1 42 3
RP26
10_4P2R_0404_5%
1 42 3
RP37
10_4P2R_0404_5%
1 42 3
RP57
10_4P2R_0404_5%
1 42 3
C2220.1U_0402_16V4Z
1
2
RP21
10_4P2R_0404_5%
1 42 3
RP60
10_4P2R_0404_5%
1 42 3
RP20
10_4P2R_0404_5%
1 42 3
R207 10_0402_5%12
RP48
10_4P2R_0404_5%
1 42 3
RP29
10_4P2R_0404_5%
1 42 3
RP41
10_4P2R_0404_5%
1 42 3
RP39
10_4P2R_0404_5%
1 42 3
RP46
10_4P2R_0404_5%
1 42 3
R208 10_0402_5%12
RP35
10_4P2R_0404_5%
1 42 3
RP28
10_4P2R_0404_5%
1 42 3
RP22
10_4P2R_0404_5%
1 42 3
RP19
10_4P2R_0404_5%
1 42 3
RP27
10_4P2R_0404_5%
1 42 3
R222 10_0402_5%12
RP24
10_4P2R_0404_5%
1 42 3
RP25
10_4P2R_0404_5%
1 42 3
R224 10_0402_5%12
RP32
10_4P2R_0404_5%
1 42 3
R201 10_0402_5%12
R205 10_0402_5%12
RP58
10_4P2R_0404_5%
1 42 3
RP40
10_4P2R_0404_5%
1 42 3
RP49
10_4P2R_0404_5%
1 42 3
R203 10_0402_5%12
RP52
10_4P2R_0404_5%
1 42 3
R223 10_0402_5%12
RP54
10_4P2R_0404_5%
1 42 3
RP47
10_4P2R_0404_5%
1 42 3
RP18
10_4P2R_0404_5%
1 42 3
RP45
10_4P2R_0404_5%
1 42 3
RP33
10_4P2R_0404_5%
1 42 3
RP50
10_4P2R_0404_5%
1 42 3
R202 10_0402_5%12
RP42
10_4P2R_0404_5%
1 42 3
RP44
10_4P2R_0404_5%
1 42 3
JP30
AMP1565618_1_REVERSE4.0
13579
111315171921232527293133353739
414345474951535557596163656769717375777981838587899193959799
101103105107109111113115117119121123125127129131133135137139141143
246810121416182022242628303234363840
4244464850525456586062646668707274767880828486889092949698100102104106108110112114116118120122124126128130132134136138140142144
145147149151153155157159161163165167169171173175177179181183185187189191193195197199
146148150152154156158160162164166168170172174176178180182184186188190192194196198200
VREFVSSDQ0DQ1VDDDQS0DQ2VSSDQ3DQ8VDDDQ9DQS1VSSDQ10DQ11VDDCK0CK0#VSS
DQ16DQ17VDDDQS2DQ18VSSDQ19DQ24VDDDQ25DQS3VSSDQ26DQ27VDDCB0CB1VSSDQS8CB2VDDCB3DUVSSCK2CK2#VDDCKE1DU/A13A12A9VSSA7A5A3A1VDDA10/APBA0WE#S0#DUVSSDQ32DQ33VDDDQS4DQ34VSSDQ35DQ40VDD
VREFVSSDQ4DQ5VDDDM0DQ6VSSDQ7
DQ12VDD
DQ13DM1VSS
DQ14DQ15VDDVDDVSSVSS
DQ20DQ21VDDDM2
DQ22VSS
DQ23DQ28VDD
DQ29DM3VSS
DQ30DQ31VDDCB4CB5VSSDM8CB6VDDCB7
DU/RESET#VSSVSSVDDVDD
CKE0DU/BA2
A11A8
VSSA6A4A2A0
VDDBA1
RAS#CAS#
S1#DU
VSSDQ36DQ37VDDDM4
DQ38VSS
DQ39DQ44VDD
DQ41DQS5VSSDQ42DQ43VDDVDDVSSVSSDQ48DQ49VDDDQS6DQ50VSSDQ51DQ56VDDDQ57DQS7VSSDQ58DQ59VDDSDASCLVDD_SPDVDD_ID
DQ45DM5VSS
DQ46DQ47VDD
CK1#CK1VSS
DQ52DQ53VDDDM6
DQ54VSS
DQ55DQ60VDD
DQ61DM7VSS
DQ62DQ63VDDSA0SA1SA2DU
R204 10_0402_5%12
RP53
10_4P2R_0404_5%
1 42 3
RP36
10_4P2R_0404_5%
1 42 3
RP59
10_4P2R_0404_5%
1 42 3
R200 10_0402_5%12
RP30
10_4P2R_0404_5%
1 42 3
RP55
10_4P2R_0404_5%
1 42 3
RP51
10_4P2R_0404_5%
1 42 3
RP38
10_4P2R_0404_5%
1 42 3
R221 10_0402_5%12
RP34
10_4P2R_0404_5%
1 42 3
RP56
10_4P2R_0404_5%
1 42 3
RP43
10_4P2R_0404_5%
1 42 3
DDR_CB[0..7]
DDR_SDQS[0..8]
DDR_SDQ[0..63]
DDR_F_CB[0..7]
DDR_MMA[0..12]
DDR_DQS[0..8]
DDR_DQ[0..63]
SMB_DATASMB_CLK
DDR_CLK0DDR_CLK0#
DDR_CLK2#DDR_CLK2
DDR_CKE1
DDR_SCS#1 DDR_SCS#0
DDR_CKE0
DDR_CLK1# DDR_CLK1
DDR_SRAS#
DDR_SWE#
DDR_SBS1
DDR_SCAS#
DDR_SBS0
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DIMM1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-1701 1.0
DDR-SODIMM SLOT1
10 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
DDR_SCS#2DDR_SCS#3
DDR_DQS4
DDR_DQS0
DDR_DQS7
DDR_DQS5
DDR_DQS3DDR_DQS2
DDR_CKE1DDR_CKE0
DDR_CKE2DDR_CKE3
DDR_CKE3
DDR_SWE#
DDR_F_CB0
DDR_SBS0
DDR_F_CB3
DDR_DQS8DDR_F_CB2
DDR_F_CB1
DDR_SCS#2
DDR_SBS1
DDR_SCAS#
DDR_F_CB5
DDR_F_CB6
DDR_F_CB7
DDR_F_CB4
DDR_SCS#3
DDR_CKE2
DDR_SRAS#
DDR_DQS[0..8]
DDR_DQ[0..63]
DDR_CB[0..7]
DDR_SDQ[0..63]
DDR_SDQS[0..8]
DDR_MMA[0..12]
DDR_F_CB[0..7]
DDR_DQS8
DDR_MMA6
DDR_MMA12
DDR_MMA7
DDR_MMA8
DDR_MMA10
DDR_MMA9
DDR_MMA3DDR_MMA5
DDR_MMA2DDR_MMA4
DDR_MMA1 DDR_MMA0
DDR_MMA11
DDR_DQS1
DDR_DQ6
DDR_DQ12
DDR_DQ14
DDR_DQ2
DDR_DQ11
DDR_DQ1
DDR_DQ4
DDR_DQS0
DDR_DQ8
DDR_DQ29
DDR_DQ24
DDR_DQS2
DDR_DQ30
DDR_DQ16DDR_DQ17
DDR_DQ23
DDR_DQ26
DDR_DQ22
DDR_DQS3
DDR_DQ44
DDR_DQ38
DDR_DQS5
DDR_DQ63
DDR_DQ47
DDR_DQ32
DDR_DQ57
DDR_DQ36
DDR_DQ41
DDR_DQ39
DDR_DQ54
DDR_DQS7
DDR_DQ42
DDR_DQS4
DDR_DQ52DDR_DQ48
DDR_DQ61
DDR_DQ53
DDR_DQ62
DDR_DQ51
DDR_DQ60
DDR_DQ49
DDR_DQ59
DDR_DQ56
DDR_DQ55
DDR_DQ58
DDR_DQ50
DDR_DQ40
DDR_DQ45
DDR_DQ34
DDR_DQ33
DDR_DQ43
DDR_DQ37
DDR_DQ46
DDR_DQ35
DDR_DQ25
DDR_DQ20
DDR_DQ5
DDR_DQ3
DDR_DQ21
DDR_DQ9
DDR_DQ19
DDR_DQ10
DDR_DQ18
DDR_DQ7
DDR_DQ28
DDR_DQ13
DDR_DQ0
DDR_DQ31DDR_DQ27
DDR_DQ15
DDR_DQ2
DDR_DQ4
DDR_DQ6
DDR_DQ5
DDR_DQ0
DDR_DQ3DDR_DQ1
DDR_DQ7
DDR_DQ19
DDR_DQ16
DDR_DQ18DDR_DQ22
DDR_DQ20
DDR_DQ23
DDR_DQ30
DDR_DQ34DDR_DQ38
DDR_DQ32
DDR_DQ31
DDR_DQ37
DDR_MMA12
DDR_MMA1
DDR_MMA9
DDR_MMA6
DDR_SCAS#
DDR_MMA10
DDR_MMA2
DDR_SWE#
DDR_MMA8
DDR_MMA5
DDR_MMA11
DDR_SRAS#
DDR_MMA7
DDR_MMA3
DDR_MMA0
DDR_SBS1DDR_SBS0
DDR_MMA4
DDR_SCS#1DDR_SCS#0
DDR_DQ21DDR_DQ17
DDR_F_CB1DDR_F_CB5
DDR_F_CB2DDR_F_CB6
DDR_F_CB0DDR_F_CB4
DDR_DQ11DDR_DQ10
DDR_DQ15DDR_DQ14
DDR_DQ13DDR_DQ8
DDR_DQ9DDR_DQ12
DDR_DQ29DDR_DQ28
DDR_DQ24DDR_DQ25
DDR_DQ27DDR_DQ26
DDR_DQ35DDR_DQ39
DDR_DQ36DDR_DQ33
DDR_DQ41DDR_DQ45
DDR_DQ43DDR_DQ42
DDR_DQ46DDR_DQ47
DDR_DQ48DDR_DQ55
DDR_DQ49DDR_DQ52
DDR_DQ50DDR_DQ53
DDR_DQ54DDR_DQ51
DDR_DQ63DDR_DQ58
DDR_DQ62DDR_DQ56
DDR_DQ57DDR_DQ59
DDR_DQ60DDR_DQ61
DDR_DQS6
DDR_DQS6
DDR_DQS1
DDR_F_CB7DDR_F_CB3
DDR_DQ40DDR_DQ44
+1.25VS+1.25VS
+3VS
+2.5V
+SDREF
+2.5V
+1.25VS_SDREF_R
+3VS
RP107
56_4P2R_0404_5%
1 42 3
RP110
56_4P2R_0404_5%
1 42 3
RP75
56_4P2R_0404_5%
1423
RP99
56_4P2R_0404_5%
1 42 3
RP103
56_4P2R_0404_5%
1 42 3
RP90
56_4P2R_0404_5%
1 42 3
RP87
56_4P2R_0404_5%
1 42 3
RP83
56_4P2R_0404_5%
1423 RP93
56 _8P4R_0804_5%
18273645
RP106
56_4P2R_0404_5%
1 42 3
R232 56_0402_5%12
RP94
56 _8P4R_0804_5%
18273645
RP76
56_4P2R_0404_5%
1423
RP98
56_4P2R_0404_5%
1 42 3
R230 56_0402_5%12
R343 0_0805_5%1 2
R233 56_0402_5%12
RP92
56_4P2R_0404_5%
1423
RP85
56_4P2R_0404_5%
1423
RP80
56_4P2R_0404_5%
1423
R231 56_0402_5%12
RP105
56_4P2R_0404_5%
1 42 3
RP63
56_4P2R_0404_5%
1423
R228 56_0402_5%12
RP78
56_4P2R_0404_5%
1423
RP88
56_4P2R_0404_5%
1 42 3
RP65
56_4P2R_0404_5%
1423
RP111
56_4P2R_0404_5%
1 42 3
RP91
56_4P2R_0404_5%
1423
RP86
56_4P2R_0404_5%
1423
RP79
56_4P2R_0404_5%
1423
R229 56_0402_5%12
R236 56_0402_5%1 2
RP104
56_4P2R_0404_5%
1 42 3
RP102
56_4P2R_0404_5%
1 42 3
R234 56_0402_5%12
RP64
56_4P2R_0404_5%
1423
RP68
56_4P2R_0404_5%
1423
RP109
56_4P2R_0404_5%
1 42 3
RP81
56_4P2R_0404_5%
1423
RP95
56 _8P4R_0804_5%
18273645
RP82
56_4P2R_0404_5%
1423
RP97
56_4P2R_0404_5%
1 42 3
RP101
56_4P2R_0404_5%
1 42 3
R235 56_0402_5%12
RP67
56 _8P4R_0804_5%
18273645
RP62
56_4P2R_0404_5%
1423
C2340.1U_0402_16V4Z
1
2
RP66
56_4P2R_0404_5%
1423
RP108
56_4P2R_0404_5%
1 42 3
JP22
AMP11376408_STANDARD5.2
13579
111315171921232527293133353739
414345474951535557596163656769717375777981838587899193959799
101103105107109111113115117119121123125127129131133135137139141143
246810121416182022242628303234363840
4244464850525456586062646668707274767880828486889092949698100102104106108110112114116118120122124126128130132134136138140142144
145147149151153155157159161163165167169171173175177179181183185187189191193195197199
146148150152154156158160162164166168170172174176178180182184186188190192194196198200
VREFVSSDQ0DQ1VDDDQS0DQ2VSSDQ3DQ8VDDDQ9DQS1VSSDQ10DQ11VDDCK0CK0#VSS
DQ16DQ17VDDDQS2DQ18VSSDQ19DQ24VDDDQ25DQS3VSSDQ26DQ27VDDCB0CB1VSSDQS8CB2VDDCB3DUVSSCK2CK2#VDDCKE1DU/A13A12A9VSSA7A5A3A1VDDA10/APBA0WE#S0#DUVSSDQ32DQ33VDDDQS4DQ34VSSDQ35DQ40VDD
VREFVSSDQ4DQ5VDDDM0DQ6VSSDQ7
DQ12VDD
DQ13DM1VSS
DQ14DQ15VDDVDDVSSVSS
DQ20DQ21VDDDM2
DQ22VSS
DQ23DQ28VDD
DQ29DM3VSS
DQ30DQ31VDDCB4CB5VSSDM8CB6VDDCB7
DU/RESET#VSSVSSVDDVDD
CKE0DU/BA2
A11A8
VSSA6A4A2A0
VDDBA1
RAS#CAS#
S1#DU
VSSDQ36DQ37VDDDM4
DQ38VSS
DQ39DQ44VDD
DQ41DQS5VSSDQ42DQ43VDDVDDVSSVSSDQ48DQ49VDDDQS6DQ50VSSDQ51DQ56VDDDQ57DQS7VSSDQ58DQ59VDDSDASCLVDD_SPDVDD_ID
DQ45DM5VSS
DQ46DQ47VDD
CK1#CK1VSS
DQ52DQ53VDDDM6
DQ54VSS
DQ55DQ60VDD
DQ61DM7VSS
DQ62DQ63VDDSA0SA1SA2DU
RP77
56_4P2R_0404_5%
1423
RP96
56_4P2R_0404_5%
1 42 3
RP100
56_4P2R_0404_5%
1 42 3
RP89
56_4P2R_0404_5%
1 42 3
RP84
56_4P2R_0404_5%
1423
RP61
56_4P2R_0404_5%
1423
SMB_DATASMB_CLK
DDR_SWE# DDR_SCAS# DDR_SRAS#
DDR_SDQS[0..8]
DDR_SDQ[0..63]
DDR_DQS[0..8]
DDR_MMA[0..12]
DDR_CB[0..7]
DDR_F_CB[0..7]
DDR_DQ[0..63]
DDR_CLK3#DDR_CLK3
DDR_CLK5DDR_CLK5#
DDR_CKE3
DDR_SCS#2 DDR_SCS#3
DDR_CLK4 DDR_CLK4#
DDR_CKE2
DDR_CKE0 DDR_CKE1
DDR_SBS1 DDR_SBS0
DDR_SCS#0 DDR_SCS#1
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Place one cap close to every 2 pull up resistors termination to+1.25V
Layout note :
Layout note :
Distribute as close as possible to DDR-SODIMM.
LA-1701 1.0
DDR SODIMM Decoupling
11 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
+1.25VS
+1.25VS
+2.5V
+1.25VS
+1.25VS
+2.5V
+1.25VS
+2.5V
+1.25VS
C2230.1U_0402_16V4Z
1
2
C5440.1U_0402_16V4Z
1
2
C2410.1U_0402_16V4Z
1
2
C5410.1U_0402_16V4Z
1
2
C5220.1U_0402_16V4Z
1
2
C5140.1U_0402_16V4Z
1
2
C5400.1U_0402_16V4Z
1
2
C2370.1U_0402_16V4Z
1
2
C5210.1U_0402_16V4Z
1
2
C5270.1U_0402_16V4Z
1
2
C5000.1U_0402_16V4Z
1
2
C2430.1U_0402_16V4Z
1
2
C2420.1U_0402_16V4Z
1
2
C5390.1U_0402_16V4Z
1
2
C2240.1U_0402_16V4Z
1
2
C5190.1U_0402_16V4Z
1
2
C5100.1U_0402_16V4Z
1
2
C5310.1U_0402_16V4Z
1
2
C4990.1U_0402_16V4Z
1
2
C5330.1U_0402_16V4Z
1
2
C5360.1U_0402_16V4Z
1
2
C2250.1U_0402_16V4Z
1
2
C5170.1U_0402_16V4Z
1
2
C5340.1U_0402_16V4Z
1
2
C5040.1U_0402_16V4Z
1
2
C2260.1U_0402_16V4Z
1
2
C5380.1U_0402_16V4Z
1
2
C5350.1U_0402_16V4Z
1
2
C5230.1U_0402_16V4Z
1
2
C2270.1U_0402_16V4Z
1
2
C5300.1U_0402_16V4Z
1
2
C4970.1U_0402_16V4Z
1
2
C5260.1U_0402_16V4Z
1
2
C2290.1U_0402_16V4Z
1
2
C5280.1U_0402_16V4Z
1
2
C5240.1U_0402_16V4Z
1
2
C5420.1U_0402_16V4Z
1
2
C2280.1U_0402_16V4Z
1
2
C5430.1U_0402_16V4Z
1
2
C5130.1U_0402_16V4Z
1
2
C4980.1U_0402_16V4Z
1
2
C5030.1U_0402_16V4Z
1
2
C2300.1U_0402_16V4Z
1
2
C5250.1U_0402_16V4Z
1
2
C2460.1U_0402_16V4Z
1
2
C5010.1U_0402_16V4Z
1
2
C2310.1U_0402_16V4Z
1
2
C5200.1U_0402_16V4Z
1
2
+C505150U_D2_6.3VM
1
2
C2450.1U_0402_16V4Z
1
2
C5150.1U_0402_16V4Z
1
2
C5020.1U_0402_16V4Z
1
2
+C221150U_D2_6.3VM
1
2
C5320.1U_0402_16V4Z
1
2
C5160.1U_0402_16V4Z
1
2
C5180.1U_0402_16V4Z
1
2
C2390.1U_0402_16V4Z
1
2
C5120.1U_0402_16V4Z
1
2
C2480.1U_0402_16V4Z
1
2
C2380.1U_0402_16V4Z
1
2
C2440.1U_0402_16V4Z
1
2
C2490.1U_0402_16V4Z
1
2
C2360.1U_0402_16V4Z
1
2
C2470.1U_0402_16V4Z
1
2
C5090.1U_0402_16V4Z
1
2
C2400.1U_0402_16V4Z
1
2
C5070.1U_0402_16V4Z
1
2
C5370.1U_0402_16V4Z
1
2
C5110.1U_0402_16V4Z
1
2
C5290.1U_0402_16V4Z
1
2
C5460.1U_0402_16V4Z
1
2
C5080.1U_0402_16V4Z
1
2
C5450.1U_0402_16V4Z
1
2
AA
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
200.001100.00100.00
133.33
1
Width=40 mils
SEL1166.67
1
0166.670
133.33
SEL0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
0SEL2 CPUCLKC[0..2]
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Clock Generator
0 1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
0
CPUCLKT[0..2]
200.000
0
0
LA-1701 1.0
Clock Generator
12 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
XTALIN
ICH_66M
PCI_PCM
PCI_SIO
PCI_LAN
CLK_MCH#
CLK_MCH
CLK_BCLK
CLK_ICH14M
CLK_ITP#
PCI_LPC
CLK_BCLK#
CLK_SD48MPCI_1394
XTALOUT
+3V_VDD
CLK_ICH48M
CLK_ITP
PCI_SD
PCI_MINI
PCI_ICH
AGP_66MMCH_66M
+3VS
+3VS
+3VS
+3VS
+3VS
+3V_CLK
+3VS
R17233_0402_5%
1 2
R15533_0402_5%
1 2
R180 33_0402_5%1 2
R15033_0402_5%
1 2
R364 475_0402_1%1 2
R139@1K_0402_5%
1 2R17049.9_0402_1%
1 2
R158 33_0402_5%1 2
L14CHB2012U121_08051 2
R173 49.9_0402_1%1 2
R178 33_0402_5%1 2
R16149.9_0402_1%1 2
U18
ICS950810CG_TSSOP56
1 8 14 19 32 37 46 50
26
4 9 15 20 31 36 41 47
273
2
405554
253453
28
43
2930
3335
42
45
44
49
48
52
51
24
232221
765
18171613121110
39
38
56
VD
D_R
EF
VD
D_P
CI_
0V
DD
_PC
I_1
VD
D_3
V66
_0V
DD
_3V
66_1
VD
D_4
8MH
ZV
DD
_CP
U_0
VD
D_C
PU
_1
VDDA
GN
D_R
EF
GN
D_P
CI_
0G
ND
_PC
I_1
GN
D_3
V66
_0G
ND
_3V
66_1
GN
D_4
8MH
ZG
ND
_IR
EF
GN
D_C
PU
VSSAXTAL_OUT
XTAL_IN
SEL2SEL1SEL0
PWR_DWN#PCI_STOP#CPU_STOP#
VTT_PWRGD#
MULT0
SDATASCLK
3V66_03V66_1/VCH_CLK
IREF
CPUCLKT2
CPU_CLKC2
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
3V66_5
3V66_43V66_33V66_2
PCICLK_F2PCICLK_F1PCICLK_F0
PCICLK6PCICLK5PCICLK4PCICLK3PCICLK2PCICLK1PCICLK0
48MHZ_USB
48MHZ_DOT
REF
C144
0.1U_0402_16V4Z
1
2
R167 49.9_0402_1%1 2
C186
0.1U_0402_16V4Z
1
2
R15149.9_0402_1%
1 2
C462
0.1U_0402_16V4Z
1
2
C19210U_1206_10V4Z
1
2
R156 49.9_0402_1%1 2
C471
0.1U_0402_16V4Z
1
2
C166
0.1U_0402_16V4Z
1
2
C181
0.1U_0402_16V4Z
1
2
C464
0.1U_0402_16V4Z
1
2
C184@10P_0402_50V8K
1
2
C465
0.1U_0402_16V4Z
1
2
C19110U_1206_10V4Z
1
2
R16933_0402_5%
1 2
L13CHB2012U121_08051 2
C142@10P_0402_50V8K
1
2
R185 33_0402_5%1 2R188 33_0402_5%1 2
R128 33_0402_5%1 2
R127 33_0402_5%1 2
R191 33_0402_5%1 2
C180@10P_0402_50V8K
1
2
R1401K_0402_5%
12
C187
0.1U_0402_16V4Z
1
2
R362 10K_0402_5%1 2
R164 33_0402_5%1 2
Y214.318MHZ_16PF_DSX840GA
12
R133@1K_0402_5%
12
R157 33_0402_5%1 2R126 33_0402_5%1 2
C177@10P_0402_50V8K
1
2
R171 33_0402_5%1 2
C154@10P_0402_50V8K
1 2
C151@10P_0402_50V8K
1 2
C171@10P_0402_50V8K
1
2
R186 33_0402_5%1 2
R16633_0402_5%
1 2
R16033_0402_5%
1 2
R198 10K_0402_5%1 2
R179 33_0402_5%1 2
R1321K_0402_5%
1 2
R165 33_0402_5%1 2
R366 1K_0402_5%1 2
R168 33_0402_5%1 2
G
D
S
Q29@2N7002 1N_SOT23
2
13
CLK_PCI_SD
CLK_14M_SIO
CLK_CPU_ITP#
CLK_PCI_ICH
CLK_PCI_LPC
CLK_ICH_66M
CLK_PCI_MINI CLK_14M_CODEC
SLP_S1# CLK_CPU_BCLK#
CLK_MCH_66M
CLK_SD_48M
CLK_ICH_14M
VGATE
CLK_MCH_BCLK#
CLK_PCI_LAN
SMB_DATA
CLK_PCI_SIO
CLK_CPU_ITP
STP_PCI#
CLK_PCI_PCM
CLK_PCI_1394
CLK_ICH_48M
STP_CPU# CLK_MCH_BCLK
CLK_CPU_BCLK
SMB_CLK
CLK_AGP_66M
CLKEN#
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AGP CONN
LCD POWER CIRCUIT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701 1.0
AGP & LCD CONN
Custom13 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
ENAVDD
ENABLT#
DISPOFF#
AGP_STOP#
AGP_SBA7
AGP_CBE#[0..3]
AGP_ADSTB1#
AGP_WBF#
DAC_BRIG
VSYNC
AGP_AD13
AGP_TRDY#
AGP_AD21
AGP_DEVSEL#
AGP_AD1
AGP_AD19
AGP_GNT#
BLUE
AGP_FRAME#
AGP_AD14
AGP_AD[0..31]
CRMA
AGP_AD29
AGP_ST0
AGP_IRDY#
AGP_AD10
AGP_SBA0
AGP_AD25
AGP_SBA6
AGP_ADSTB0#
AGP_AD7
AGP_AD31
RED
AGP_SBA5
HSYNC
AGP_AD3
AGP_ADSTB1
AGP_SBA[0..7]
INVT_PWM
LUMA
AGP_AD2
AGP_AD0
AGP_PAR
ENAVDD
AGP_SBA3
AGP_AD26
AGP_AD23
AGP_CBE#0ENABLT#
AGP_AD17
AGP_AD22
AGP_SBSTB#
AGP_AD9AGP_AD24
AGP_AD16
AGP_AD11
AGP_ST1
AGP_SBA1
AGP_SBSTB
DISPOFF#
AGP_CBE#3
AGP_CBE#2
AGP_AD6
AGP_SBA2
AGP_CBE#1
GREENAGP_AD18
AGP_AD8
COMPSAGP_AD28
AGP_ST2
AGP_AD20
AGP_REQ#
AGP_SBA4
AGP_AD27
AGP_ST[0..2]
AGP_AD12
AGP_AD4AGP_AD5
AGP_AD15AGP_AD30
AGP_RBF#
AGP_ADSTB0
LCDVDD
+3VS +1.5VS
LCDVDD
+12VALW
+3VS
+2.5VS
+12VALW
+1.8VS
+3VS
+1.5VS
+3VS
+1.5VS
+1.8VS
CPUB++
LCDVDD
CPUB++_L
+1.8VS
+2.5VS +2.5VS
C940.1U_0402_16V4Z
1
2
L6
KC FBM-L11-201209-221LMAT_08051 2
JP12
FOXCONN-100P
24681012141618202224262830323436384042444648505254565860626466687072747678808284868890
13579
1113151719212325272931333537394143454749515355575961636567697173757779818385878991 9293 9495 9697 9899 100
GND468
101214161820
GND242628303234363840
GND444648505254565860
GND646668707274767880
GND84868890
GND35791113151719GND232527293133353739GND434547495153555759GND636567697173757779GND8385878991 9293 9495 9697 98GND GND
R524.7K_0402_5%
12
C1110.1U_0402_16V4Z
1
2
C3020.1U_0402_16V4Z
1
2
R16100K_0402_5%
12
C890.1U_0402_16V4Z
1
2
R14100_0402_5%
12
G
D
S
Q72N7002 1N_SOT23
2
13
C25
0.047U_0402_16V4Z
1
2
C274.7U_0805_10V4Z
1
2
R15100K_0402_5%
12
C244.7U_0805_10V4Z
1
2
G
DS
Q8SI2302DS 1N_SOT23
2
13
JP13
FOXCONN-100P
24681012141618202224262830323436384042444648505254565860626466687072747678808284868890
13579
1113151719212325272931333537394143454749515355575961636567697173757779818385878991 9293 9495 9697 9899 100
GND468
101214161820
GND242628303234363840
GND444648505254565860
GND646668707274767880
GND84868890
GND35791113151719GND232527293133353739GND434547495153555759GND636567697173757779GND8385878991 9293 9495 9697 98GND GND
G
D
S Q52N7002 1N_SOT23
2
13
22K
22K Q6
DTC124EK_SOT23
2
13
R17
150K_0402_5%
12
G
D
S
Q152N7002 1N_SOT23
2
13
C4568P_0402_50V8J
1
2
C28
0.1U_0402_16V7K
1
2
D10
RB751V_SOD323
21BKOFF#
ENABLT#
COMPS
INVT_PWM
PID1
VSYNC
PCIRST#
AGP_STOP#
C3_STAT#
AGP_DEVSEL#
VB2
PID0
DDCCLK
AGP_AD[0..31]
VB0
AGP_ST[0..2]
AGP_SBA[0..7]
AGP_WBF#
VB1
AGP_ADSTB0 AGP_ADSTB1
AGP_SBSTB
CLK_AGP_66M RED
AGP_ADSTB1#
HSYNC
AGP_REQ#
PID2
PCI_PIRQA#
BLUE
AGP_PAR
CRMA
AGP_CBE#[0..3]
LUMA
SUS_STAT#
AGP_BUSY#
AGP_TRDY#
AGP_IRDY#
GREEN
AGP_FRAME#
DDCDATA
AGP_SBSTB#
AGP_ADSTB0#
MSEN#
AGP_GNT#
AGP_RBF#
PID3
DAC_BRIG
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
W=40mils
TV-Out Connector
S-Video
CRT Connector
DDC_MD2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Unused GATE
LA-1701 1.0
CRT & TVout Connector
14 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
COMPS_CL
RED_L
D_VSYNC_L
GREEN_L
BLUE_L
D_HSYNC_L
CRMA_CL
LUMA_CL
+3VS
+3VS
CRTVDD
CRTVDD
CRTVDD+RCRT_VCC
CRTVDD
+3VS
+5VS+3VS
+5VS
+5VS
+5VS+5VS
CF11
H18HOLEA
1
H24HOLEA
1
C15
150P_0402_50V8J
1
2
C8
270P_0402_50V7K
1
2
C256270P_0402_50V7K
1
2
H5HOLEA
1
H15HOLEA
1
D16
RB411D_SOT23
2 1
H1HOLEA
1
F1
POLYSWITCH_1A
H20HOLEA
1
D2DAN217_SOT23
2 31
H9HOLEA
1
L20FCM2012C-800_0805
1 2
R25875_0402_1%
12
D3DAN217_SOT23
2 31
D1DAN217_SOT23
2 31
L21FCM2012C-800_0805
1 2
H26HOLEA
1
C263
@22P_0402_25V8K
1
2
U43A
SN74AHCT126PWR_TSSOP14
2 3
17
14
A Y
OE
GP
JP3
S CONN._SUYIN
1234567
H3HOLEA
1
C6
100P_0402_50V8J
1
2
H13HOLEA
1
C418P_0402_50V8J
1
2
C118P_0402_50V8J
1
2
C5268P_0402_50V8K
1
2
L22FCM2012C-800_0805
1 2
H10HOLEA
1
H7HOLEA
1
R256
75_0402_1%
12
H14HOLEA
1
C2550.1U_0402_16V7K
1
2
C573
0.1U_0402_16V4Z
1
2
H25HOLEA
1
C5
10P_0402_50V8K
1
2
L19 FBM-L10-160808-300LM-T1 2
H19HOLEA
1
G
D S
Q2
BSN20_SOT23
2
1 3
C218P_0402_50V8J
1
2
D14DAN217_SOT23
2 31
H17HOLEA
1
D13DAN217_SOT23
2 31
L2 FCM1608C-121T_06031 2
G
D S
Q1
BSN20_SOT23
2
1 3
D15DAN217_SOT23
2 31
R2644.7K_0402_5%
12
U43C
SN74AHCT126PWR_TSSOP14
9 8
107
14
A Y
OE
GP
H8HOLEA
1
FM21
JP1CRT-15P
611
17
1228
1339
144
1015
5
H22HOLEA
1
FM11
C1147P_0402_50V8J
1 2
FM51
C13150P_0402_50V8J
1
2
C264@22P_0402_25V8K
1
2
CF21
FM31
C7270P_0402_50V7K
1
2
R2654.7K_0402_5%
12
R257
75_0402_1%
12
L1 FCM1608C-121T_06031 2
CF91
FM41
H2HOLEA
1
R775_0402_1%
12
FM61
CF31
H4HOLEA
1
U43D
SN74AHCT126PWR_TSSOP14
12 11
137
14
A Y
OE
GP
R8
75_0402_1%
12
CF61
C25768P_0402_50V8K
1
2
H23HOLEA
1
CF101
C14150P_0402_50V8J
1
2
R254@10K_0402_5%
12
H11HOLEA
1
CF141
C265
@22P_0402_25V8K
1
2
R2462.2K_0402_5%
12
CF51
C10
47P_0402_50V8J
1 2
C3
10P_0402_50V8K
1
2
CF81
H12HOLEA
1
R269
10K_0402_5%1 2
CF121
H16HOLEA
1
L18 FBM-L10-160808-300LM-T1 2
CF161
H21HOLEA
1
CF111
CF71
H6HOLEA
1
U43B
SN74AHCT126PWR_TSSOP14
5 6
47
14
A Y
OE
GP
L3 FCM1608C-121T_06031 2
CF151
R255@10K_0402_5%
12
CF41
C1247P_0402_50V8J
1 2
R2452.2K_0402_5%
12
R6
75_0402_1%
12
CF131
BLUE
D_DDCCLK
DDCDATA
D_DDCDATA
DDCCLK
VSYNC
HSYNC
D_VSYNC
LUMA
CRMA
REDMSEN#
GREEN
D_HSYNC
COMPS
AA
B
B
C
C
D
D
1 1
2 2
3 3
4 4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Note:R122,R123 placementcenter of MCH andICH4M
PCI Pullups
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LA-1701 1.0
ICH4-M(1/3)
15 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
PCI_DEVSEL#
PCI_LOCK#
PCI_REQ#4
SMLINK1
PCI_AD11
PCIRST#
PCI_REQ#3
SIRQ
PCI_GNT#3
PCI_SERR#
PCI_GNT#1
HUB_PD8
PCI_PIRQC#
PCI_DEVSEL#
PCI_AD4
PCI_AD9
PCI_AD6
PCI_AD0
PCI_REQ#0
PCI_AD19PCI_AD20
SMLINK0
PCI_PIRQH#
PCI_AD16
PCI_IRDY#
APICD1
PCI_AD25
PCI_SERR#
SMB_DATA
PCI_PIRQB#
HUB_PD5
HUB_PD10
SIRQ
PCI_AD12
PCI_AD30
PCI_GNT#4
PCIRST#
PCI_AD3
PCI_AD18
PCI_AD5
PCI_AD24
PCI_FRAME#
GPI11
PCI_AD[0..31]
PCI_PIRQD#
PCI_IRDY#
PCI_AD17
PCI_PIRQA#
PCI_PIRQG#
PCI_REQA#
PCI_C/BE#3
PCI_STOP#
PCI_AD2
HUB_PD6
SMB_CLK
PCI_PIRQF#
PCI_C/BE#1
PCI_REQB#
HUB_PD1
PCI_REQ#2
CLK_ICH_66M
PCI_PIRQE#
PCI_AD7
PCI_PERR#
PCI_PIRQD#
PCI_PIRQE#
INTRUDER#
PCI_TRDY#
PCI_REQ#1
PCI_PIRQC#
PCI_STOP#
PCI_REQ#2
PIDERST#PCI_REQB#
HUB_PD9
PCI_REQA#
PCI_AD21
PCI_REQ#0
H_FERR#
APICCLK
PCI_AD13
PCI_AD22
PCI_C/BE#2
SMB_CLK
PCI_REQ#1
PCI_PIRQA#PCI_PERR#
GPI11
SD_IRQ15
SD_IRQ15
PCI_PIRQG#
PCI_FRAME#
H_FERR#
HUB_PD2
PCI_TRDY#
PCI_PIRQF#
PCI_PIRQH#
HUB_PD[0..10]
HUB_PD4
PCI_AD23
HUB_PD7
PCI_LOCK#
PCI_AD27
PCI_AD1
HUB_RCOMP_ICH
HUB_PD3
APICD0
CLK_PCI_ICH
PCI_AD26
APICCLK
PCI_AD14
PCI_REQ#4
CLK_ICH_66M
PCI_GNT#0
PCI_PIRQB#
SMLINK0
INTRUDER#
PCI_AD31
PCI_AD15
CLK_PCI_ICH
PCI_AD10
PD_IRQ14
SMB_DATA
PCI_GNT#2
HUB_PD0
PIDERST#
SMLINK1
PCI_AD28
PD_IRQ14
PCI_AD29
PCI_C/BE#0
APICD0
HUB_RCOMP_ICH
PCI_AD8
APICD1
PCI_REQ#3
SIDERST#
HUB_VREF
+3VS
+3VALW
+3VS
+3VS
+3VS
+3VS
+VCCP
HUB_VREF
+3VS
+3VS
+1.8VS
+3VS
HUB_VREF
+RTCVCC
R13136.5_0402_1%
1 2
RP9
8.2K_10P8R_1206_5%
109876
12345
PCI
I/F
SM I/F
CPU I/F
HUB I/F
Inte
rrup
t I/
F
EEPROM I/F
LAN I/F
ICH4U8A
FW82801DBM_BGA421
H5J3H3K1G5J4H4J5K2G2L1G4L2H2L3F5F4N1E5N2E3N3E4M5E2P1E1P2D3R1D2P4
J2K4M4N4
B1A2B3C7B6
C1E6A7B7D6
P5
F1M3L5G1L4
M2W2U5K5F3F2
W6AC3AB1AC4AB4AA5
Y22AB23U23AA21W21V22AB22V21Y23U22U21W23V23
L19L20M19M21P19R19T20R20P23L22N22K21
T21
P21N20
R23M23R22
J19H19K20D5C2B4A3C8D7C3C4
J22
AC13AA19
D10D11A8C12
A10A9A11B10C10A12C11B11Y5
B5A6E8C5
AD0AD1AD2AD3AD4AD5AD6AD7AD8AD9AD10AD11AD12AD13AD14AD15AD16AD17AD18AD19AD20AD21AD22AD23AD24AD25AD26AD27AD28AD29AD30AD31
C/BE#0C/BE#1C/BE#2C/BE#3
REQ#0REQ#1REQ#2REQ#3REQ#4
GNT#0GNT#1GNT#2GNT#3GNT#4
PCICLK
FRAME#DEVSEL#IRDY#PARPERR#LOCK#PME#PCIRST#SERR#STOP#TRDY#
INTRUDER#SMLINK0SMLINK1
SMB_CLKSMB_DATA
SMB_ALERT#/GPI11
A20GATEA20M#
DPSLP#FERR#
IGNNE#INIT#INTRNMI
CPU_PWRGOODRCIN#
SLP#SMI#
STPCLK#
HI0HI1HI2HI3HI4HI5HI6HI7HI8HI9
HI10HI11
CLK66
HI_STBHI_STB#
HICOMPHUB_VREF
HUB_VSWING
APICCLKAPICD0APICD1PIRQA#PIRQB#PIRQC#PIRQD#
PIRQE#/GPI2PIRQF#/GPI3PIRQG#/GPI4PIRQH#/GPI5
SERIRQ
IRQ14IRQ15
EE_CSEE_IN
EE_OUTEE_SHCLK
LAN_RXD0LAN_RXD1LAN_RXD2LAN_TXD0LAN_TXD1LAN_TXD2
LAN_CLKLAN_RSTSYNC
LAN_RST#
REQA#/GPI0REQB#/GPI1/REQ5#GNTA#/GPO16GNTB#/GPO17/GNT5#
R35856_0402_5%
1 2
R123150_0402_1%
12
R35956_0402_5%1 2
R3320_0402_5%
12
R85@1K_0402_5%
1 2
R371
10K_0402_5%1 2
R33810K_0402_5%
12
RP72
8.2K _8P4R_0804_5%
1 82 73 64 5
C1410.1U_0402_16V4Z
1
2
U37
@74LVC1G125GW_SOT3535
2 4
53
1
I O
PG
OE
#
R333
10K_0402_5%
12
R346@22_0402_5%
12
R347 0_0402_5%1 2
R354330K_0402_5%
1 2
R3698.2K_0402_5%
1 2
RP74
8.2K _8P4R_0804_5%
1 82 73 64 5
C460@10P_0402_50V8K
1
2
R3708.2K_0402_5%
1 2
C447
15P_0402_50V8J
1
2
R376
4.7K_0402_5%1 2
R37210K_0402_5%
1 2
R344
10_0402_5%
12
R374
4.7K_0402_5%1 2
R37310K_0402_5%
1 2
R339@56_0402_5%1 2
R322 @1K_0402_5%1 2
R35610K_0402_5%
1 2
C453
0.01U_0402_16V7K
1
2
R122150_0402_1%
12
RP11
8.2K_10P8R_1206_5%
109876
12345
C4440.01U_0402_16V7K
1
2
PD_IRQ14
H_INTR
H_STPCLK#
PCI_GNT#3
PCI_REQ#1
H_SMI#
PCI_PIRQB#
HUB_PD[0..10]
PCI_IRDY#
SD_IRQ15
PCI_GNT#2
PCI_PERR#
PCI_REQ#4
H_INIT#
CLK_ICH_66M
PCI_GNT#1
H_IGNNE#
B_PCIRST#
SMB_DATA
H_FERR#
PCI_REQ#3
PCI_CBE#1
PIDERST#
H_CPUSLP#
HUB_PSTRB
SMB_CLK
PCIRST#
H_CPUPWRGD
PCI_PIRQD# PCI_FRAME#
GATEA20
CLK_PCI_ICH
PCI_CBE#3
RC#
PCI_SERR#
PCI_AD[0..31]
PCI_CBE#2
PCI_REQ#0
PCI_PAR
SIDERST#
PCI_PIRQC#
PCI_STOP#
PCI_GNT#0
PCI_DEVSEL#
PCI_CBE#0
H_NMI
PCI_GNT#4
PCI_TRDY#
PCI_PIRQA#
SIRQ
H_A20M#
PCI_REQ#2
H_DPSLP#
HUB_PSTRB#
AA
B
B
C
C
D
D
1 1
2 2
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1701
1.0
ICH4-M(2/3)
16 49Wednesday, July 09, 2003
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
SB_SPKR
AGP_BUSY#
ICH_AC_SDOUT
CPUPERF#
ATF_INT#
ICH_AC_SDOUT
PM_RSMRST#
CLK_ICH_48M
PM_CLKRUN#
R_VBIAS
ICH_AC_SYNC
PD_D[0..15]
SD_D[0..15]
SB_SPKR
SD_A1
PD_D12
PD_D1
CLK_ICH_14M
SD_D2
PD_D10
PD_D5
PD_A0
OVCUR#5
C3_STAT#
RTCX1
SD_D4SD_D3
PD_D8PD_D7
PD_D2
PD_CS#3
SD_D11
PD_D9
PD_D4
LPC_FRAME#
THRMTRIP#
SD_CS#3
PD_D3
SD_IOR#
SD_D13
SD_D6
PD_IOR#
PM_RSMRST#
SD_D10
SD_D1
SD_IOW#
PD_IOW#
PD_A1
OVCUR#4
LPC_DRQ#0
LPC_AD2
VBIAS
SD_D15
SD_D7
SD_SIORDY
AC97_SDIN0
AC97_BITCLK
CLK_ICH_48M
SD_D12
PD_D13
PD_A2
AC97_SDIN2
RTCX2
SD_D5
SD_DREQ
LPC_AD3
LPC_AD1LPC_AD0
PM_DPRSLPVR
SD_D14
SD_CS#1SD_A2
SD_A0
PD_D15
EC_SMI#
USB_RBIAS
SUS_STAT#
AGP_BUSY#
CLK_ICH_14M
SD_DACK#
PD_CS#1
SCI#
OVCUR#0
CPUPERF#
PM_BATLOW#SYSRST#
PD_D14
PD_DACK#
OVCUR#1SD_D9
PD_DREQ
EC_RIOUT#
SD_D8
PD_D6
PD_D0
EC_LID_OUT#
AC97_SDIN1
PD_D11
PD_PIORDY
LPC_DRQ#1
OVCUR#2
RTC_RST#
ICH_AC_SDOUT
SD_D0
ATF_INT#
SLP_S5#
ICH_AC_SYNC
OVCUR#3
OVCUR#3OVCUR#2OVCUR#1
OVCUR#5
VB0VB1VB2BID0BID1BID2
BID0BID1BID2
SYSRST#
PM_DPRSLPVR
+3VS
+3VS
+RTCVCC
+3VS
+3VS
+3VS
+VCCP
+3VALW
+3VS
+3VALW
+3VS
+3VS
R38410M_0603_5%
1 2
C4610.1U_0402_16V4Z
1
2
R331@22_0402_5%
12
D27
RB751V_SOD323
2 1
R368 10K_0402_5%12
R337
@0_0402_5%
12
R385 0_0402_5%12
R19610M_0603_5%
1 2
D12
RB751V_SOD323
2 1
C438@10P_0402_50V8K
1
2
C19015P_0402_50V8J
1
2
C20315P_0402_50V8J
1
2
J2JOPEN
12
R336@22_0402_5%
12
C4810.047U_0603_16V7K
1 2
R353180K_0402_5%
1 2
R3891K_0402_5%
1 2
R383@22M_0603_5%
12
R325@10K_0402_5%
12
RP73
10K_8P4R_0804_5%
1 82 73 64 5
R115
0_0402_5%
12
[email protected]_0603_1%
12
R32133_0402_5%
1 2
R32033_0402_5%
1 2
U38@74AHC1G08
1
2
3
4
5
C391@22P_0402_50V8J
1
2
C390@22P_0402_50V8J
1
2
R95
22.6_0402_1%12
R98
0_0402_5%
12
R13010K_0402_5%
12
R3558.2K_0402_5%
1 2
X232.768KHz_12.5P_CM155
12
R335
0_0402_5%
12
ICH4
PM
IST
AC97 I/F
LPC I/F
USB I/F
GPIO
MISC
CLOCK
IDE I/F
GPIO
U8B
FW82801DBM_BGA421
R2Y3
AB2T3
AC2V20AA1AB6
Y1AA6W18
Y4Y2
AA2W19Y21AA4AB3
V1
J21Y20V19
B8C13D13A13B13D9C9
T2R4T4U2U3U4T5
C20D20A21B21C18D18A19B19C16D16A17B17
B15C14A15B14A14D14
A23B23
J20G22F20G20F21H20F23H22G23H21F22E23
R3V4V5W3V2W1W4
AA13AB13W13Y13AB14
AA11Y12AC12W12AB12
AB11AC11Y10AA10AA7AB8Y8AA8AB9Y9AC9W9AB10W10W11Y11
AA20AC20AC21AB21AC22
AB18AB19Y18AA18AC19
W17AB17W16AC16W15AB15W14AA14Y14AC15AA15Y15AB16Y16AA17Y17
J23F19
W7
AC7
AC6
Y6
H23
W20
AGPBUSY#SYSRST#BATLOW#C3_STAT#CLKRUN#DPRSLPVRPWRBTN#PWROKRI#RSMRST#SLP_S1#SLP_S3#SLP_S4#SLP_S5#STP_CPU#STP_PCI#SUS_CLKSUS_STAT#/LPCPD#THRM#
SSMUXSELCPUPERF#VGATE/VRMPWRGD
AC_BITCLKAC_RST#AC_SDATAIN0AC_SDATAIN1AC_SDATAIN2AC_SDATAOUTAC_SYNC
LPC_AD0LPC_AD1LPC_AD2LPC_AD3LPC_DRQ#0LPC_DRQ#1LPC_FRAME#
USBP0+USBP0-USBP1+USBP1-USBP2+USBP2-USBP3+USBP3-USBP4+USBP4-USBP5+USBP5-
OC#0OC#1OC#2OC#3OC#4OC#5
USB_RBIASUSB_RBIAS#
GPIO32GPIO33GPIO34GPIO35GPIO36GPIO37GPIO38GPIO39GPIO40GPIO41GPIO42GPIO43
GPI7GPI8
GPI12GPI13
GPIO25GPIO27GPIO28
PDA0PDA1PDA2
PDCS1#PDCS3#
PDDREQPDDACK#
PDIOR#PDIOW#PIORDY
PDD0PDD1PDD2PDD3PDD4PDD5PDD6PDD7PDD8PDD9
PDD10PDD11PDD12PDD13PDD14PDD15
SDA0SDA1SDA2
SDCS1#SDCS3#
SDDREQSDDACK#
SDIOR#SDIOW#SIORDY
SDD0SDD1SDD2SDD3SDD4SDD5SDD6SDD7SDD8SDD9
SDD10SDD11SDD12SDD13SDD14SDD15
CLK14CLK48
RTCRST#
RTCX1
RTCX2
VBIAS
SPKR
THRMTRIP#
R14110K_0402_5%
1 2
R37510K_0402_5%
12
R100
@0_0402_5%
12
R446 @10K_0402_5%12
C420@10P_0402_50V8K
1
2
R390 @10K_0402_5%1 2
R117@1K_0402_5%
1 2
C486@1U_0805_25V4Z1 2
R106
@0_0402_5%
12
R345
100K_0402_5%
12
LPC_DRQ#0
PD_A2
PM_CLKRUN#
VGATE
PM_BATLOW#
AC97_SDIN0
SD_D[0..15]
PD_CS#3
SLP_S1# PD_A0
LPC_AD1
THRMTRIP#
EC_THRM#
PD_PIORDY
PD_A1
EC_LID_OUT#
PD_DREQ
LPC_AD3
PD_CS#1
PD_IOW#
AC97_SDIN1
PWRBTN_OUT#
LPC_DRQ#1
AC97_RST#
SLP_S3#
EC_RIOUT#
SD_A1
LPC_AD2
AC97_SDOUT
AC97_BITCLK
AC97_SDIN2
LPC_AD0
STP_CPU#
PM_POK
AC97_SYNC
PD_DACK#
EC_FLASH#
ITP_DBRESET#
SD_A0
PD_D[0..15]
LPC_FRAME#
PD_IOR#
SD_A2
CLK_ICH_14M
USB20P4-USB20P4+
STP_PCI#
SB_SPKR
SD_SIORDY
SD_IOR# USB20P1+
SD_CS#3
SCI#
USB20P2-
CLK_ICH_48M
USB20P2+
SUS_STAT#
SD_DACK#
PM_RSMRST#
USB20P1-
USB20P0+
C3_STAT#
OVCUR#0
USB20P0-
PM_DPRSLPVR
SLP_S5#
SD_CS#1
SLP_S4#
SD_IOW#
SD_DREQ
AGP_BUSY#EC_SMI#
USB20P5+USB20P5-
VB1VB0
VB2
USB20P3+USB20P3-
OVCUR#4
ACIN
AA
B
B
C
C