-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Cover Page
B
1 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Cover Page
B
1 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Cover Page
B
1 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Intel Diamondville Processor with Calistoga(945GSE) + DDRII +
ICH7M
KAV60 Schematics Document
REV: 1.0
Compal Confidential
2009-02-22
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Block Diagrams
B
2 40Thursday, January 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Block Diagrams
B
2 40Thursday, January 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Block Diagrams
B
2 40Thursday, January 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Compal Confidential
Model Name : KAV60
X2 mode
File Name : LA-5141P
Touch Pad
CRT Conn
LPC BUSpage 20
27x27mm
H_A#(3..31) H_D#(0..63)
page 24
page 14
page 21
Int.KBDpage 25
400/533MHz
ALC272
DMI
Diamondville SC
FSB
Transfermer
Power ON/OFF & LED CONN
page 25
page 13
FCBGA8
DDRII-SO-DIMM Calistoga GSE FCBGA998
SPI ROM
page 4
1.8V DDRII 400/533
page 4,5
page 27
Aralia Codec
Memory BUS(DDRII)
31x31mm
page 6,7,8,9,10
ICH7M BGA652
Thermal Sensor
page 11
page 15,16,17,18
page 27
ENE KBC KB926
AMP & INT Speaker
10/100 Ethernet AR8114A
page 24
SDIO CONN MINI Card x2
PCI-Express
EMC1402
LCD Conn.
page 27
page 19
LVDS
page 28USB Port X1
SPI
INT DMIC CONNHeadPhone & MIC Jack
RGB
page 22I/O Board X2
page 22
to I/O board CONN
page 24
RJ45DC/DC Interface
3VALW/5VALW
1.8V/VCCP
1.5VS/0.9VS/2.5VS
CPU_CORE
Clock Generator CK505
page 12
page 21 page 13page 26
page 29
page 37
page 33
page 35
page 36
USB
BlueToothX1
CMOS CAM
page19
page13
HDA
page 31
page 32
page 34CHARGER
DC IN
BATT IN
437Pins
22x22mm
page 22
to I/OBoard CONN
SATA
WLANX1page19
WWANX1page19
RTS5159E
P/N : DA60000BO00
JP7
SATA CONN
USB Port X2
USB Card Reader x1 RTS5159E
I/O board
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Notes List
B
3 40Thursday, January 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Notes List
B
3 40Thursday, January 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Notes List
B
3 40Thursday, January 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
ON
SLP_S3#
S5 (Soft OFF)
S4 (Suspend to Disk)
S3 (Suspend to RAM)
LOW
ON ON
ON
ON
ON
ON
ON
ON
HIGH
OFF
OFF
OFF
OFF
OFF
SLP_S4#
OFF
ON
ON
LOW LOW
LOW
OFF
OFF
SLP_S5#
HIGH
HIGH HIGH HIGH
HIGH HIGHHIGH
LOW
LOW LOW
+VALW
HIGH
+V +VS Clock
S1(Power On Suspend)
Full ON
STATE
OFF
OFF
ON
ON OFF
OFF OFFON
ON
+CPU_CORE
1.5V switched power rail
OFF
Voltage Rails
+2.5VS
+1.5VS
0.9V switched power rail for DDR terminator+0.9VS
OFF OFFON
Adapter power supply (19V)
1.8V power rail for DDR
B+
VIN
S5
+1.8V
S3 S1
VCCP switched power rail
Core voltage for CPU
AC or battery power rail for power circuit.
OFF ON
OFF ON
Description Power Plane
N/A N/A N/A
N/A N/AN/A
OFF
SIGNAL
Address
1001 100X b0001 011X b
EEPROM(24C16/02)
1010 000XbDDR DIMMA
�������
1101 001Xb
ICH7M SM Bus address
������ �������
Note : ON* means that this power plane is ON only with AC power
available, otherwise it is OFF. Address
Address
Clock Generator (SLG8SP556VTR)
Device
���
EMC1402
1010 000X b
External PCI Devices
Device
EC SM Bus1 address
Smart Battery
Device
EC SM Bus2 address
No PCI Device
+VCCP
ON
OFF
OFF
+5VS
3.3V always on power rail
5V always on power rail
3.3V switched power rail
+RTCVCC RTC power
+3VALW
+3VS
+5VALW
ON ON*
5V switched power rail
+VSB VSB always on power rail ON ON*
ONON
ON
ON
OFF ON
ON
ON ON*
OFF
ON
2.5V switched power rail
ID
0
8.2K
18K
R01 (EVT)
NC
R03 (PVT)
0V
0.25V
0.50V
3.3V
R02 (DVT)
R10A (MP)
Rb VabBRD ID0
1
2
3
BOARD ID Table(Page 25)
Ra
NC
100K
100K
100K
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_DBSY#
H_ADSTB#0
H_ADS#
H_A20M#
H_THERMDA
H_REQ#4
H_REQ#2
H_DEFER#
H_THERMTRIP#
H_IGNNE# CLK_CPU_BCLK#
H_LOCK#
CLK_CPU_BCLK
H_HITM#
H_DRDY#
H_REQ#0
H_BPRI#
H_BR0#
H_TRDY#
H_ADSTB#1
H_THERMDC
H_REQ#1
H_HIT#
H_RESET#
H_REQ#3
H_FERR#
H_BNR#
H_A#7
H_A#18
H_A#10
H_A#28
H_A#12
H_A#26
H_A#29
H_A#9
H_A#13
H_A#23
H_A#27
H_A#22
H_A#4
H_A#19
H_A#15
H_A#21
H_A#17
H_A#11
H_A#24 H_A#25
H_A#8
H_A#14
H_A#3
H_A#5
H_A#20
H_A#16
H_A#31
H_A#6
H_A#30
H_A#32 H_A#33 H_A#34 H_A#35
H_A#32 H_A#33 H_A#34 H_A#35
H_AP1
H_AP0
H_A20M# H_IGNNE#
H_IERR# H_INIT#_R
H_RS#1 H_RS#2
H_RS#0
ITP_TMS ITP_TDI
ITP_TCK ITP_TRST#
H_PROCHOT#_R
ITP_TRST#
PREQ#ITP_TCK ITP_TDI ITP_TDO ITP_TMS
H_D#57
H_D#36
H_D#11
CPU_BSEL2
H_D#3
H_D#12
H_D#39
H_D#32
CPU_BSEL0
H_DINV#3
H_D#59
H_D#40
H_D#23
H_D#18
H_D#16
H_DINV#0
H_D#52
H_D#48
H_D#43
H_D#25
H_DSTBP#2 H_DINV#2
H_D#55
H_D#46
H_D#42
H_D#4H_D#35
H_D#14
H_PWRGOOD
H_D#62
H_D#44
H_D#26
H_D#50 H_D#49
H_D#33
H_D#31
H_D#24
H_D#20
COMP1
H_D#7
H_D#37
H_D#34
H_D#21
H_D#1
COMP0
CPU_BSEL1
H_DSTBN#2
H_D#27
H_D#2
COMP3
H_CPUSLP#
H_D#63
H_D#6
H_D#51
H_D#29
H_D#22
H_D#17
H_D#15
H_DSTBP#0
H_DPSLP#
H_D#61 H_D#60
H_D#58
H_D#56
H_D#41
H_D#38
H_D#30
COMP2
H_DPRSTP#
H_D#8
H_D#54
H_DSTBP#1
H_D#47
H_D#10
H_D#0
H_D#53
H_D#5
H_D#45
H_DSTBN#0
H_D#9
H_D#28
H_D#19
H_DSTBP#3
H_D#13
H_DINV#1
H_DSTBN#1 H_DSTBN#3
H_DP#0
H_DP#1
ACLKPH DCLKPH
H_DP#2
H_DP#3
H_DPWR#
H_THERMDA
H_THERMDC
EC_SMB_CK2
EC_SMB_DA2
ITP_TDO
H_SMI#
H_STPCLK#H_INTR H_NMI
PREQ#
H_PROCHOT#
H_A#[3..16](6)
H_DINV#0(6)
CPU_BSEL0(12)CPU_BSEL1(12)CPU_BSEL2(12)
H_RESET# (6)
H_THERMTRIP# (6,16)
H_BR0# (6)
H_HITM# (6)
H_DEFER# (6)
H_BPRI# (6)
H_A20M#(16)
H_REQ#[0..4](6)
H_HIT# (6)
H_ADSTB#1(6)
H_ADS# (6)
H_TRDY# (6)
H_FERR#(16)
H_BNR# (6)
H_DBSY# (6)
CLK_CPU_BCLK (12)
H_LOCK# (6)
CLK_CPU_BCLK# (12)
H_ADSTB#0(6)
H_IGNNE#(16)
H_DRDY# (6)
H_A#[17..31](6)
H_INIT# (16)
H_RS#[0..2] (6)
H_PROCHOT# (37)
H_DPSLP# (16)
H_DINV#3 (6)
H_CPUSLP# (6)
H_DINV#1(6)
H_DPRSTP# (16,37)
H_DINV#2 (6)
H_PWRGOOD (16)
H_D#[48..63] (6)
H_D#[32..47] (6)
H_D#[16..31](6)
H_D#[0..15](6)
H_DSTBP#0(6)H_DSTBN#0(6)
H_DSTBP#1(6)H_DSTBN#1(6)
H_DSTBN#2 (6) H_DSTBP#2 (6)
H_DSTBN#3 (6) H_DSTBP#3 (6)
H_DPWR# (6)
EC_SMB_CK2 (25)
EC_SMB_DA2 (25)
H_SMI#(16)
H_STPCLK#(16)H_INTR(16)H_NMI(16)
+CPU_GTLREF
+VCCP
+CPU_GTLREF
+VCCP
+VCCP
+VCCP +VCCP
+VCCP
+VCCP
+CPU_CMREF
+CPU_CMREF
+VCCP
+CPU_EXTBGREF
+CPU_EXTBGREF
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Diamondville(1/2)
Custom
4 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Diamondville(1/2)
Custom
4 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Diamondville(1/2)
Custom
4 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
H_THERMDA, H_THERMDC routing together. Trace width / Spacing =
10 / 10 mil
Close to CPU pin within 500mils. Zo=55ohm
This shall place near CPU
Close to CPU pin within 500mils. Zo=55ohm
Close to CPU pin within 500mils. Zo=55ohm
Layout note: COMP0,2 connect with Zo=27.4ohm +/-15%, make trace
length shorter than 0.5"COMP1,3 connect with Zo=55ohm +/-15%, make
trace length shorter than0.5"
Address:100_1100
CPU THERMAL SENSOR
Close to CPU
Close to CPU
Modify schematic by 10/21
change BOM structure 11/14
R234 1K_0402_1%R234 1K_0402_1%
12
R206 56_0402_5% @R206 56_0402_5% @1 2
R49 2K_0402_1%R49 2K_0402_1%
12
R205 68_0402_5%R205 68_0402_5% 1 2
R29 1K_0402_5%R29 1K_0402_5% 1 2
R200 56_0402_5%R200 56_0402_5% 1 2
C351
2200P_0402_50V7K
C3511
2200P_0402_50V7K 2
C352
0.1U
_040
2_16
V4Z
C352
0.1U
_040
2_16
V4Z 1
2
R32 1K_0402_5% @
R32 1K_0402_5% @
1 2
R209 54.9_0402_1%R209 54.9_0402_1% 12
T13 PAD T13 PAD
AD
DR
G
RO
UP
0
AD
DR
GR
OU
P 1
CO
NT
RO
LX
DP
/ITP
SIG
NA
LSH
CLK
TH
ER
MN
C
U5A
AU80586GE025512_FCBGA437.
N270@
AD
DR
G
RO
UP
0
AD
DR
GR
OU
P 1
CO
NT
RO
LX
DP
/ITP
SIG
NA
LSH
CLK
TH
ER
MN
C
U5A
AU80586GE025512_FCBGA437.
N270@
A[10]#M19
A[11]#H21
A[12]#L20
A[13]#M20
A[14]#K19J20 A[15]#
A[16]#L21
C19 A[17]#F19 A[18]#E21 A[19]#
A[20]#A16
A[21]#D19
A[22]#C14
A[23]#C18
A[24]#C20
A[25]#E20
A[26]#D20
A[27]#B18
A[28]#C15
A[29]#B16
A[3]#P21
B17
A[31]#A[30]#
C16
RSVD1RSVD2
A3
RSVD3 C1 C21
A[4]#H20N20 A[5]#
A[6]#R20J19 A[7]#
A[8]#N19
A[9]#G20
A20M#U18
ADS# V19
ADSTB[0]#K20
ADSTB[1]#B19
BCLK[0] V11
BCLK[1] V12
BNR# Y19
BPM[0]# K17
BPM[1]# J18
BPM[2]# H15
BPM[3]# J15
BPRI# U21
BR0# T20
BR1# V15
DBSY# Y18
DEFER# T21
DRDY# T19
FERR#T16
HIT# AA17
HITM# V20
IERR# F16
IGNNE#J4
INIT# V16
T15
LINT1LINT0
R15
LOCK# W20
PRDY# K18
PREQ# J16
PROCHOT# G17
N21 REQ[0]#J21 REQ[1]#G19 REQ[2]#P20
REQ[4]#REQ[3]#
R19
RESET# D15
RS[0]# W18
RS[1]# Y17
RS[2]# U20
SMI#U17
STPCLK#R16
TCK M17
TDI N16
TDO M16
THERMTRIP# H17
THRMDA E4
THRMDC E5
TMS L17
TRDY# W19
TRST# K16
K5 NC5
K4 NC4
H6 NC3
G6 NC1NC2
D6
NC6M15
A17 A[32]#B14 A[33]#B15
A[35]#A[34]#
A14
NC7L16
AP0D17
AP1M18
T5T5 PADPAD
U17
EMC1402-1-ACZL-TR_MSOP8
U17
EMC1402-1-ACZL-TR_MSOP8
DN3
DP2
VDD1
ALERT# 6
SMCLK 8
THERM# 4 GND 5
SMDATA 7
R198 56_0402_5%R198 56_0402_5% 1 2
R57 27.4_0402_1%R57 27.4_0402_1% 1 2
R47 1K_0402_1%R47 1K_0402_1%
12
R218 56_0402_5%R218 56_0402_5% 1 2
T7 PAD T7 PAD
T15 PAD T15 PAD
R48 2K_0402_1%R48 2K_0402_1%
12
R239 1K_0402_5% @R239 1K_0402_5% @1 2
R31 1K_0402_5%R31 1K_0402_5% 1 2
T10 PAD T10 PAD
R51 1K_0402_1%R51 1K_0402_1%
12
U5
CPU
N280@
U5
CPU
N280@
R34 1K_0402_5%R34 1K_0402_5% 1 2
C342 1U_0402_6.3V4Z
C342 1U_0402_6.3V4Z
1
2
C65C650.1U_0402_16V4Z 0.1U_0402_16V4Z
1
2
R202 22_0402_5%R202 22_0402_5% 1 2
R304 10K_0402_5%
R304 10K_0402_5%
12
R199 56_0402_5%R199 56_0402_5% 1 2
R213 56_0402_5%R213 56_0402_5% 1 2
R30 1K_0402_5%R30 1K_0402_5% 1 2
R238 2K_0402_1%R238 2K_0402_1%
12
R208 27.4_0402_1%R208 27.4_0402_1% 12
R201 56_0402_5%R201 56_0402_5%
12
DA
TA
GR
P 0
DA
TA
GR
P 1
DA
TA G
RP
2D
AT
A G
RP
3
MISC
U5B
AU80586GE025512_FCBGA437
N270@
DA
TA
GR
P 0
DA
TA
GR
P 1
DA
TA G
RP
2D
AT
A G
RP
3
MISC
U5B
AU80586GE025512_FCBGA437
N270@
COMP[0] T1
COMP[1] T2
COMP[2] F20
COMP[3] F21
Y11 D[0]# D[1]#W10
D[10]#W15
D[11]#AA13Y16 D[12]#
D[13]#W13
D[14]#AA9
D[15]#W9
AA5 D[16]#Y8 D[17]#
W3
D[19]#D[18]#
U1
D[2]#Y12
D[20]#W7
D[21]#W6
D[22]#Y7
D[23]#AA6
D[24]#Y3
D[25]#W2
D[26]#V3
D[27]#U2
D[28]#T3
D[29]#AA8
D[3]#AA14
V2
D[31]#D[30]#
W4
D[32]# R3
D[33]# R2
D[34]# P1
D[35]# N1
D[36]# M2
D[37]# P2
D[38]# J3
D[39]# N3
D[4]#AA11
D[40]# G3
D[41]# H2
D[42]# N2
D[43]# L2
D[44]# M3
D[45]# J2
D[46]# H1
D[47]# J1
D[48]# C2
D[49]# G2
D[5]#W12
D[50]# F1
D[51]# D3
D[52]# B4
D[53]# E1
D[54]# A5
D[55]# C3
D[56]# A6
D[57]# F2
D[58]# C6
D[59]# B6
D[6]#AA16
D[60]# B3
D[61]# C4
D[62]# C7
D[63]# D2
D[7]#Y10
D[8]#Y9
D[9]#Y13
DINV[0]#W16
DINV[1]#Y6
DINV[2]# L1
DINV[3]# C5
DPRSTP# R18
DPSLP# R17
DPWR# U4
DSTBN[0]#Y14
DSTBN[1]#Y4
DSTBN[2]# K2
DSTBN[3]# E2
DSTBP[0]#Y15
DSTBP[1]#Y5
DSTBP[2]# K3
DSTBP[3]# F3
GTLREFA7
PWRGOOD V17
SLP# N18J6 BSEL[0]H5
BSEL[2]BSEL[1]
G5
ACLKPHU5
T17 DCLKPHBINIT#
V5
DP#0V9
DP#1R4
DP#2 M4
DP#3 D4
EDMR6
CORE_DET A13
CMREF[1] B7
M6 EXTBGREFN15 FORCEPR#
N6 HFPLLP17
RSP#MCERR#
T6
R27 330_0402_5%R27 330_0402_5%
12
R58 54.9_0402_1%R58 54.9_0402_1% 1 2
C62C620.1U_0402_16V4Z 0.1U_0402_16V4Z
1
2
T12 PAD T12 PAD
R33 1K_0402_5%R33 1K_0402_5% 1 2
R240 1K_0402_5% @R240 1K_0402_5% @1 2
R28 1K_0402_5% @
R28 1K_0402_5% @
1 2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU_VID0CPU_VID1
CPU_VID3 CPU_VID4
CPU_VID2
CPU_VID5 CPU_VID6
+1.5VS
VCCSENSE
VSSSENSE
CPU_VID0 (37) CPU_VID1 (37) CPU_VID2 (37)CPU_VID3 (37) CPU_VID4
(37) CPU_VID5 (37) CPU_VID6 (37)
VCCSENSE (37)
VSSSENSE (37)
+VCCP
+CPU_CORE
+VCCP
+1.5VS
+CPU_CORE
+CPU_CORE +CPU_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Diamondville(2/2)
B
5 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Diamondville(2/2)
B
5 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Diamondville(2/2)
B
5 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Length match within 25 mils The trace space 7 mils,
Zo=27.4ohm
PLACE IN CORRIDOR AND CLOSE TO CPU
PLACE IN CAVITY
PLACE IN CAVITY
2 x 330uF(9mohm/2)
130mA
C334
10U_0805_10V4Z
C334
10U_0805_10V4Z
1
2
C328
10U_0805_10V4Z
C328
10U_0805_10V4Z
1
2
C327
1U_0402_6.3V6K
C327
1U_0402_6.3V6K
1
2
C299
10U_0805_10V4Z
C299
10U_0805_10V4Z
1
2
C295
0.1U_0402_16V7K
C295
0.1U_0402_16V7K
1
2
C311
1U_0402_6.3V6K
C311
1U_0402_6.3V6K
1
2
C309
1U_0402_6.3V6K
C309
1U_0402_6.3V6K
1
2
C304
10U_0805_10V4Z
C304
10U_0805_10V4Z
1
2
+ C331
330U_D2_2.5VY_R9M @
+ C331
330U_D2_2.5VY_R9M @
1
2
U5D
AU80586GE025512_FCBGA437
N270@
U5D
AU80586GE025512_FCBGA437
N270@
VSS99 AA12
VSS98 AA15
VSS97 AA18
VSS96 AA19
VSS95 AA20
VSS9B1
N4 VSS84
M21 VSS83
M13 VSS82
M9 VSS80VSS81
M7
VSS8A20
M5 VSS79
M1 VSS78
L19 VSS77
L18 VSS76
L15 VSS75
L13 VSS74
L9 VSS73
L7 VSS72
L6 VSS70VSS71
L5
VSS7A19
L4 VSS69
L3 VSS68
K21 VSS67
K15 VSS66
K13 VSS65
K9 VSS64
K7 VSS63
K6 VSS62
K1 VSS60VSS61
J17
VSS6A18
J13 VSS59
J9 VSS58
J7 VSS57
J5 VSS56
H19 VSS55
H18 VSS54
H16 VSS53
H13 VSS51VSS52
H9
VSS5A15
H7 VSS49
H4 VSS48
H3 VSS46
G21 VSS45
G13 VSS41VSS42
G9
VSS4A8
G7 VSS39
G4 VSS38
G1 VSS37
F18 VSS36
F17 VSS35
F7 VSS34
F6 VSS33
F5 VSS32
F4 VSS31
E19 VSS30
E16 VSS29
E15 VSS28
E8 VSS27
E7 VSS26
E6 VSS25
E3 VSS24
D21 VSS23
D18 VSS22
D14 VSS20VSS21
D8
VSS2A4
D5 VSS19
D1 VSS18
C17 VSS16VSS17
C8
VSS158 N17
VSS157 P3
VSS156 P4
VSS155 P5
VSS154 P6
VSS153 P7
VSS152 P9
VSS151 P13
VSS15B21 VSS149 P15
VSS148 P16
VSS147 P18
VSS146 P19
VSS145 R1
VSS144 R5
VSS143 R7
VSS142 R9
VSS141 R13
VSS140 R21
VSS14B20
VSS139 T4
VSS138 T5
VSS137 T7
VSS136 T9
VSS135 T10
VSS134 T11
VSS133 T12
VSS132 T13
VSS131 T18
VSS130 U3
VSS13B13
VSS129 U6
VSS128 U7
VSS127 U15
VSS126 U16
VSS125 U19
VSS124 V1
VSS123 V4
VSS122 V6
VSS121 V7
VSS120 V8
VSS12B8
VSS119 V13
VSS118 V14
VSS117 V18
VSS116 V21
VSS115 W1
VSS114 W5
VSS113 W8
VSS112 W11
VSS111 W14
VSS110 W17
VSS11B5
VSS109 W21
VSS108 Y1
VSS107 Y2
VSS106 Y20
VSS105 Y21
VSS104 AA2
VSS103 AA3
VSS102 AA4
VSS101 AA7
VSS100 AA10
VSS10B2
VSS1A2
VSS159 N13 VSS160 N9 VSS161 N7 VSS162 N5
C323
1U_0402_6.3V6K
C323
1U_0402_6.3V6K
1
2
C314
1U_0402_6.3V6K
C314
1U_0402_6.3V6K
1
2
C307
0.1U_0402_16V7K
C307
0.1U_0402_16V7K
1
2
U5C
AU80586GE025512_FCBGA437
N270@
U5C
AU80586GE025512_FCBGA437
N270@
VCCQ1A9
VCCFV10
VCCPC63 F13
VCCPC62 E14
VCCPC61 E13
VCCQ2B9
VCCA D7
VTT9 H14 VTT8 H8 VTT7 G14 VTT6 G8 VTT5 F9 VTT4 F8
VTT32 U14 VTT31 U13 VTT30 U12
VTT3 E9
VTT29 U11 VTT28 U10 VTT27 U9 VTT26 U8 VTT25 T14 VTT24 T8 VTT23
R14 VTT22 R8 VTT21 P14 VTT20 P8
VTT2 D9
VTT19 N14 VTT18 N8 VTT17 M14 VTT16 M8 VTT15 L14 VTT14 L8 VTT13
K14 VTT12 K8 VTT11 J14 VTT10 J8
VTT1 C9
VID[0] F15
VID[1] D16
VID[2] E18
VID[3] G15
VID[4] G16
VID[5] E17
VID[6] G18
VSSSENSE D13
VCCSENSE C13
A10 VCCP1A11 VCCP2A12 VCCP3B10 VCCP4B11 VCCP5B12 VCCP6C10
VCCP7C11 VCCP8C12 VCCP9D10 VCCP10D11 VCCP11D12 VCCP12E10 VCCP13E11
VCCP14E12
VCCP16VCCP15
F10
L12 VCCP33
L11 VCCP32
L10 VCCP31
K12 VCCP30
K11 VCCP29
K10 VCCP28
J12 VCCP27
J11 VCCP26
J10 VCCP25
H12 VCCP24
H11 VCCP23
H10 VCCP22
G12 VCCP21
G11 VCCP20
G10 VCCP19
F12 VCCP17VCCP18
F11
M10 VCCP34M11 VCCP35M12 VCCP36N10 VCCP37N11 VCCP38N12 VCCP39P10
VCCP40P11 VCCP41P12 VCCP42R10 VCCP43R11
VCCP45VCCP44
R12
VCCPC64 F14
C324
1U_0402_6.3V6K
C324
1U_0402_6.3V6K
1
2
C325
1U_0402_6.3V6K
C325
1U_0402_6.3V6K
1
2
C337
1U_0402_6.3V6K
C337
1U_0402_6.3V6K
1
2
R221
100_0402_1%
R221
100_0402_1%
12
C322
1U_0402_6.3V6K
C322
1U_0402_6.3V6K
1
2
C335
10U_0805_10V4Z
C335
10U_0805_10V4Z
1
2
C320
1U_0402_6.3V6K
C320
1U_0402_6.3V6K
1
2
C326
1U_0402_6.3V6K
C326
1U_0402_6.3V6K
1
2
R220
100_0402_1%
R220
100_0402_1%
12
C46
10U_0805_10V4Z
C46
10U_0805_10V4Z
1
2
C300
10U_0805_10V4Z
C300
10U_0805_10V4Z
1
2
C303
10U_0805_10V4Z
C303
10U_0805_10V4Z
1
2
C338C3380.1U_0402_16V7K 0.1U_0402_16V7K
1
2
C308
1U_0402_6.3V6K
C308
1U_0402_6.3V6K
1
2
C315
1U_0402_6.3V6K
C315
1U_0402_6.3V6K
1
2
C312
1U_0402_6.3V6K
C312
1U_0402_6.3V6K
1
2
C310
1U_0402_6.3V6K
C310
1U_0402_6.3V6K
1
2
C321
1U_0402_6.3V6K
C321
1U_0402_6.3V6K
1
2
+ C51
330U_D2_2.5VY_R9M
+ C51
330U_D2_2.5VY_R9M
1
2
C47
10U_0805_10V4Z
C47
10U_0805_10V4Z
1
2
C302
10U_0805_10V4Z
C302
10U_0805_10V4Z
1
2
+ C57
220U_B2_2.5VM_R35
+ C57
220U_B2_2.5VM_R35
1
2
C298
10U_0805_10V4Z
C298
10U_0805_10V4Z
1
2
C301
10U_0805_10V4Z
C301
10U_0805_10V4Z
1
2
C341
1U_0402_6.3V6K
C341
1U_0402_6.3V6K
1
2
C313
1U_0402_6.3V6K
C313
1U_0402_6.3V6K
1
2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+H_VREF
H_D#55
H_D#37
H_D#14
H_D#12
H_D#2
H_XRCOMP
H_D#52
H_D#42
H_D#36
H_D#33
H_D#17
H_XSCOMP
H_D#54
H_D#7
H_D#5 H_D#4
H_D#56
H_D#18
H_D#44
H_YRCOMP +H_SWNG0
+H_SWNG1
H_D#27
H_D#25
H_D#15
H_D#11
H_D#63
H_D#61
H_D#41
H_D#34
H_D#20
H_D#10
H_D#1
+H_SWNG1
H_D#46
H_D#40
H_D#26
H_D#59
H_D#30
H_D#19
H_D#0
H_D#57
H_D#49
H_D#28
H_D#24
H_D#22
H_D#8
H_D#58
H_D#50
H_D#47
H_D#35
H_D#32
H_D#6
H_D#3
H_D#16
H_D#13
H_D#23
H_D#9
H_D#53
H_D#51
H_D#43
H_D#39
H_YSCOMP
+H_SWNG0
H_D#62
H_D#60
H_D#48
H_D#38
H_D#29
H_D#45
H_D#31
H_D#21
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7
H_A#11
H_A#8 H_A#9
H_A#12
H_A#10
H_A#15
H_A#13 H_A#14
H_A#17
H_A#20
H_A#18
H_A#21
H_A#19
H_A#22
H_A#27 H_A#26 H_A#25
H_A#23
H_A#28
H_A#31
H_A#24
H_A#29 H_A#30
H_A#16
H_ADS#H_ADSTB#0H_ADSTB#1 +H_VREF H_BNR# H_BPRI#H_BR0#H_RESET#
+H_VREF
CLK_MCH_BCLK# CLK_MCH_BCLK H_DBSY# H_DEFER#
H_DINV#2
H_DINV#0
H_DINV#3
H_DINV#1
H_DPWR# H_DRDY#
H_DSTBP#0
H_DSTBP#2 H_DSTBP#3
H_DSTBN#3
H_DSTBP#1
H_DSTBN#0H_DSTBN#1 H_DSTBN#2
H_HIT# H_HITM# H_LOCK#
H_CPUSLP# H_TRDY#
H_RS#0
H_RS#2 H_RS#1
H_REQ#4
H_REQ#0H_REQ#1H_REQ#2 H_REQ#3
DMI_RXP0 DMI_RXP1
DMI_TXP0 DMI_TXP1
DMI_RXN0 DMI_RXN1
DMI_TXN0 DMI_TXN1
DDR_CS1# DDR_CS0#
M_ODT1
DDR_CKE0 DDR_CKE1
M_CLK_DDR1 M_CLK_DDR0
M_CLK_DDR#0 M_CLK_DDR#1
M_ODT0
SMRCOMPN SMRCOMPP
MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2
PM_EXTTS#0
PM_EXTTS#0
CFG5
ICH_POK PLTRST_R#
H_THERMTRIP#
PM_EXTTS#1
PM_EXTTS#1
CFG3
CFG6
H_D#[0..63](4) H_A#[3..31] (4)
H_ADS# (4)H_ADSTB#0 (4) H_ADSTB#1 (4)
H_BNR# (4)H_BPRI# (4)
H_RESET# (4)H_BR0# (4)
CLK_MCH_BCLK# (12) CLK_MCH_BCLK (12) H_DBSY# (4) H_DEFER#
(4)
H_DINV#3 (4)
H_DINV#0 (4) H_DINV#1 (4) H_DINV#2 (4)
H_DPWR# (4) H_DRDY# (4)
H_DSTBN#[0..3] (4)
H_DSTBP#[0..3] (4)
H_HIT# (4)H_HITM# (4) H_LOCK# (4)
H_RS#[0..2] (4)
H_CPUSLP# (4) H_TRDY# (4)
H_REQ#[0..4] (4)
DMI_TXN0(17)DMI_TXN1(17)DMI_TXP0(17)DMI_TXP1(17)
DMI_RXN0(17)DMI_RXN1(17)DMI_RXP0(17)DMI_RXP1(17)
M_CLK_DDR0(11)M_CLK_DDR1(11)
M_CLK_DDR#0(11)M_CLK_DDR#1(11)
DDR_CKE0(11)
DDR_CS0#(11)
M_ODT0(11)
MCH_CLKSEL0 (12) MCH_CLKSEL1 (12) MCH_CLKSEL2 (12)
MCH_ICH_SYNC# (15)PM_BMBUSY# (17)PM_EXTTS#0 (11)
PM_DPRSLPVR (17,37)
ICH_POK (17,25)
CLK_MCH_DREFCLK# (12)CLK_MCH_DREFCLK (12) MCH_SSCDREFCLK# (12)
MCH_SSCDREFCLK (12) MCH_CLKREQ# (12)
PLTRST# (15,17,19,24,25,27)
H_THERMTRIP# (4,16)
DDR_CKE1(11)
DDR_CS1#(11)
M_ODT1(11)
+VCCP
+VCCP
+VCCP
+VCCP
+1.8V
+3VS
+DIMM_VREF
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(1/5)-GTL/DMI/DDR
Custom
6 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(1/5)-GTL/DMI/DDR
Custom
6 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(1/5)-GTL/DMI/DDR
Custom
6 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Layout Note: H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 / H_SWNG1
trace width and spacing is 10/20.
Low = DMI x 2 * High = DMI x 4
CFG5
Strap Pin Table
Layout Note: +DIMM_VREF trace width and spacing is 20/20.
10uA
C50 be placed
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_DM0
DDR_A_DM3
DDR_A_DM1
DDR_A_DM4
DDR_A_DM6
DDR_A_DM2
DDR_A_DM5
DDR_A_DM7
DDR_A_DQS0DDR_A_DQS1DDR_A_DQS2
DDR_A_DQS6
DDR_A_DQS3
DDR_A_DQS7
DDR_A_DQS4 DDR_A_DQS5
DDR_A_DQS#1
DDR_A_DQS#3DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#7
DDR_A_DQS#0
DDR_A_D43
DDR_A_D27
DDR_A_D32
DDR_A_D2
DDR_A_D58
DDR_A_D26
DDR_A_D49
DDR_A_D15
DDR_A_D11
DDR_A_D47
DDR_A_D41
DDR_A_D6
DDR_A_D42
DDR_A_D23
DDR_A_D5
DDR_A_D48
DDR_A_D46
DDR_A_D36
DDR_A_D40
DDR_A_D1
DDR_A_D8
DDR_A_D20
DDR_A_D54
DDR_A_D14
DDR_A_D10
DDR_A_D24
DDR_A_D63
DDR_A_D57
DDR_A_D39
DDR_A_D45
DDR_A_D37
DDR_A_D18
DDR_A_D9
DDR_A_D4
DDR_A_D30
DDR_A_D16
DDR_A_D13
DDR_A_D62
DDR_A_D17
DDR_A_D51
DDR_A_D19
DDR_A_D60
DDR_A_D53
DDR_A_D7
DDR_A_D61
DDR_A_D52
DDR_A_D3
DDR_A_D38
DDR_A_D50
DDR_A_D12
DDR_A_D44
DDR_A_D29
DDR_A_D59
DDR_A_D0
DDR_A_CAS# DDR_A_RAS#
SA_RCVENIN# SA_RCVENOUT#
DDR_A_WE#
DDR_A_BS0 DDR_A_BS1
DDR_A_D55
DDR_A_D21DDR_A_D22
DDR_A_D25
DDR_A_D34 DDR_A_D35
DDR_A_D28
DDR_A_D33
DDR_A_D31
DDR_A_D56
DDR_A_BS2
DDR_A_MA13
DDR_A_MA11
DDR_A_MA1
DDR_A_MA6
DDR_A_MA8DDR_A_MA9 DDR_A_MA10
DDR_A_MA12
DDR_A_MA5
DDR_A_MA0
DDR_A_MA7
DDR_A_MA4
DDR_A_MA2 DDR_A_MA3
DDR_A_BS0(11)DDR_A_BS1(11)
DDR_A_DM[0..7](11)
DDR_A_DQS[0..7](11)
DDR_A_DQS#[0..7](11)
DDR_A_MA[0..13](11)
DDR_A_CAS#(11)DDR_A_RAS#(11)
DDR_A_WE#(11)
DDR_A_D[0..63] (11)
DDR_A_BS2(11)
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(2/5)-DDR2
Custom
7 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(2/5)-DDR2
Custom
7 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(2/5)-DDR2
Custom
7 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
DDR2 SYSTEM MEMORY
Calistoga-GSE_FCBGA998
U1C
DDR2 SYSTEM MEMORY
Calistoga-GSE_FCBGA998
U1C
SA_DQ_0 AC31
SA_DQ_1 AB28
SA_DQ_2 AE33
SA_DQ_3 AF32
SA_DQ_4 AC33
SA_DQ_5 AB32
SA_DQ_6 AB31
SA_DQ_7 AE31
SA_DQ_8 AH31
SA_DQ_9 AK31
SA_DQ_10 AL28
SA_DQ_11 AK27
SA_DQ_12 AH30
SA_DQ_13 AL32
SA_DQ_14 AJ28
SA_DQ_15 AJ27
SA_DQ_16 AH32
SA_DQ_17 AF31
SA_DQ_18 AH27
SA_DQ_19 AF28
SA_DQ_20 AJ32
SA_DQ_21 AG31
SA_DQ_22 AG28
SA_DQ_23 AG27
SA_DQ_24 AN27
SA_DQ_25 AM26
SA_DQ_26 AJ26
SA_DQ_27 AJ25
SA_DQ_28 AL27
SA_DQ_29 AN26
SA_DQ_30 AH25
SA_DQ_31 AG26
SA_DQ_32 AM12
SA_DQ_33 AL11
SA_DQ_34 AH9
SA_DQ_35 AK9
SA_DQ_36 AM11
SA_DQ_37 AK11
SA_DQ_38 AM8
SA_DQ_39 AK8
SA_DQ_40 AG9
SA_DQ_41 AF9
SA_DQ_42 AF8
SA_DQ_43 AK6
SA_DQ_44 AF7
SA_DQ_45 AG11
SA_DQ_46 AJ6
SA_DQ_47 AH6
SA_DQ_48 AN6
SA_DQ_49 AM6
SA_DQ_50 AK3
SA_DQ_51 AL2
SA_DQ_52 AM5
SA_DQ_53 AL5
SA_DQ_54 AJ3
SA_DQ_55 AJ2
SA_DQ_56 AG2
SA_DQ_57 AF3
SA_DQ_58 AE7
SA_DQ_59 AF6
SA_DQ_60 AH5
SA_DQ_61 AG3
SA_DQ_62 AG5
SA_DQ_63 AF5
SB_CAS# AG19
SB_RAS# AG21
SB_WE# AG20
AN20 SB_MA_0AL21 SB_MA_1AK21 SB_MA_2AK22 SB_MA_3AL22 SB_MA_4AH22
SB_MA_5AG22 SB_MA_6AF21 SB_MA_7AM21 SB_MA_8AE21 SB_MA_9AL20
SB_MA_10AE22 SB_MA_11AE26
SB_MA_13SB_MA_12
AE20
AJ17 SA_CAS#AK18 SA_RAS#AN28 SA_RCVENIN#AM28
SA_WE#SA_RCVENOUT#
AH17
AJ15 SA_MA_0 SA_MA_1AM17
SA_MA_2AM15AH15 SA_MA_3AK15 SA_MA_4AN15 SA_MA_5AJ18 SA_MA_6AF19
SA_MA_7AN17 SA_MA_8AL17 SA_MA_9AG16 SA_MA_10AL18 SA_MA_11AG18
SA_MA_13SA_MA_12
AL14
AC29 SA_DQS#_0 SA_DQS#_1AK30
SA_DQS#_2AJ33AM25 SA_DQS#_3
AN8 SA_DQS#_4 SA_DQS#_5AJ8
SA_DQS#_6AM3
SA_DQS#_7AE2
SA_DQS_0AC28
SA_DQS_1AJ30
SA_DQS_2AK33AL25 SA_DQS_3AN9 SA_DQS_4
SA_DQS_5AH8
SA_DQS_6SA_DQS_7
AM2AE3
AB30 SA_DM_0AL31 SA_DM_1
SA_DM_2AF30AK26 SA_DM_3
AL9 SA_DM_4 SA_DM_5AG7
SA_DM_6SA_DM_7
AK5AH3
AK12 SA_BS_0AH11 SA_BS_1
SA_BS_2AG17
AH21 SB_BS_0AJ20
SB_BS_2SB_BS_1
AE27
T9 PADT9 PAD T8 PAD T8 PAD
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LCTLA_CLK
LCTLB_DATA
LCTLA_CLK
L_IBG
LCTLB_DATA
GMCH_CRT_R
GMCH_CRT_B
GMCH_CRT_G
LVDS_ACLK# LVDS_ACLK
LVDS_A0
LVDS_A1#
LVDS_A1
LVDS_A2#
LVDS_A2
LVDS_A0#
PEGCOMP
CRT_IREF
LVDS_SDA LVDS_SCL
GMCH_CRT_G
GMCH_CRT_B
GMCH_CRT_R
GMCH_CRT_VSYNC_R GMCH_CRT_HSYNC_R
GMCH_CRT_VSYNC_R
GMCH_CRT_HSYNC_R
CLK_MCH_3GPLL#(12)CLK_MCH_3GPLL(12)
GMCH_CRT_DATA(14)
GMCH_CRT_R(14)
GMCH_CRT_G(14)
GMCH_CRT_CLK(14)
GMCH_CRT_B(14)
GMCH_ENVDD(13)
LVDS_ACLK(13)LVDS_ACLK#(13)
LVDS_A0#(13)LVDS_A1#(13)LVDS_A2#(13)
LVDS_A0(13)LVDS_A1(13)LVDS_A2(13)
GMCH_ENBKL(25)
LVDS_SCL(13)LVDS_SDA(13)
GMCH_CRT_VSYNC(14)
GMCH_CRT_HSYNC(14)
+3VS
+1.5VS
+1.5VS_PCIE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(3/5)-VGA/LVDS/TV
B
8 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(3/5)-VGA/LVDS/TV
B
8 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(3/5)-VGA/LVDS/TV
B
8 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Close to U4.H25
Disable TV
Place R282,R296 close to F27,D27 11/18
R8 150_0402_1%R8 150_0402_1% 12
SDVO
LVDS
VGA
TV
MISC
Calistoga-GSE_FCBGA998
U1F
SDVO
LVDS
VGA
TV
MISC
Calistoga-GSE_FCBGA998
U1F
J27 SDVO_CTRLCLKY26
G_CLKPG_CLKN
AA26
SDVO_CTRLDATAH27
TV_DACA A21
TV_DACB C20
TV_DACC E20
TV_IREF G23
TV_IRTNA B21
TV_IRTNB C21
TV_IRTNC D21
H20 CRT_DDC_CLKH22 CRT_DDC_DATAA24 CRT_BLUEA23 CRT_BLUE#E25
CRT_GREENF25 CRT_GREEN#C25 CRT_REDD25 CRT_RED#F27 CRT_VSYNCD27
CRT_IREFCRT_HSYNC
H25
H30 L_BKLTCTLG29 L_BKLTENF28 L_CLKCTLAE28 L_CTLBDATAG28
L_DDC_CLKH28 L_DDC_DATAK30 L_VDDENK27 L_IBGJ29 L_VBGJ30
L_VREFLL_VREFH
K29
D30
LA_CLKPLA_CLKN
C30
G31 LA_DATAN_0F32
LA_DATAN_2LA_DATAN_1
D31
H31 LA_DATAP_0G32
LA_DATAP_2LA_DATAP_1
C31
SDVO_RED N28
SDVO_GREEN M32
SDVO_BLUE P33
SDVO_CLKP R32
SDVO_RED# P28
SDVO_GREEN# N32
SDVO_BLUE# P32
SDVO_CLKN T32
SDVO_TVCLKIN M30
SDVO_INT P30
SDVO_FLDSTALL T30
SDVO_TVCLKIN# N30
SDVO_INT# R30
SDVO_FLDSTALL# T29
EXP_A_COMPI R28
EXP_A_ICOMPO M28
F33 LB_DATAN_0D33
LB_DATAN_2LB_DATAN_1
F30
E33 LB_DATAP_0D32
LB_DATAP_2LB_DATAP_1
F29
A30
LB_CLKPLB_CLKN
A29
TV_DCONSEL0 G26
TV_DCONSEL1 J26
R9 150_0402_1%R9 150_0402_1% 12
R192 10K_0402_5%R192 10K_0402_5% 1 2
R191 10K_0402_5%R191 10K_0402_5% 1 2
R183 255_0402_1%R183 255_0402_1% 12
R190R19024.9_0402_1% 24.9_0402_1%
1 2
R28239_0402_5%
R28239_0402_5% 1 2
R10 150_0402_1%R10 150_0402_1% 12
R171 100K_0402_5%R171 100K_0402_5% 12
R296R296 39_0402_5% 39_0402_5%1 2
R184 1.5K_0402_1%R184 1.5K_0402_1% 12
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.5VS+VCCP
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(4/5)-PWR/GND
Custom
9 40Thursday, January 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(4/5)-PWR/GND
Custom
9 40Thursday, January 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(4/5)-PWR/GND
Custom
9 40Thursday, January 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
VSS
Calistoga-GSE_FCBGA998
U1E
VSS
Calistoga-GSE_FCBGA998
U1EAH33 VSS_1
VSS_2Y33V33 VSS_3
VSS_4R33
VSS_6AK32
VSS_7AG32
VSS_8AE32
VSS_9AC32
VSS_10AA32
VSS_11U32
VSS_12H32E32 VSS_13
VSS_14C32
VSS_15AM31
VSS_16AJ31AA31 VSS_17
U31 VSS_18T31 VSS_19R31 VSS_20P31 VSS_21N31 VSS_22M31 VSS_23J31
VSS_24F31 VSS_25
VSS_26AL30
VSS_27AG30
VSS_28AE30
VSS_29AC30
VSS_30AA30
VSS_31Y30
VSS_32V30
VSS_33U30
VSS_34G30
VSS_35E30B30 VSS_36
AA29 VSS_37U29 VSS_38R29 VSS_39P29 VSS_40N29 VSS_41M29 VSS_42H29
VSS_43E29 VSS_44B29 VSS_45
AK28 VSS_46AH28 VSS_47AE28 VSS_48AA28 VSS_49
U28 VSS_50T28 VSS_51J28 VSS_52D28 VSS_53
AM27 VSS_54AF27 VSS_55AB27 VSS_56AA27 VSS_57
Y27 VSS_58U27 VSS_59T27 VSS_60R27 VSS_61P27 VSS_62N27
VSS_63M27
VSS_65VSS_64
G27
C27 VSS_67B27
VSS_69VSS_68
AL26
W26 VSS_71U26 VSS_72
AN25
VSS_74VSS_73
AK25
J25 VSS_77G25 VSS_78A25 VSS_79H23
VSS_81VSS_80
F23
VSS_111 J16
VSS_112 AL15
VSS_113 AG15
VSS_114 W15
VSS_115 R15
VSS_116 F15
VSS_117 D15
VSS_118 AM14
VSS_119 AH14
VSS_120 AE14
VSS_121 H14
VSS_122 B14
VSS_123 F13
VSS_124 D13
VSS_125 AL12
VSS_126 AG12
VSS_127 H12
VSS_128 B12
VSS_129 AN11
VSS_130 AJ11
VSS_131 AE11
VSS_132 AM9
VSS_134 AB9
VSS_135 W9
VSS_136 R9
VSS_137 M9
VSS_138 J9
VSS_139 F9
VSS_140 C9
VSS_141 A9
VSS_142 AL8
VSS_143 AG8
VSS_144 AE8
VSS_145 U8
VSS_146 AA7
VSS_147 V7
VSS_148 R7
VSS_149 N7
VSS_150 H7
VSS_151 E7
VSS_152 B7
VSS_153 AL6
VSS_154 AG6
VSS_155 AE6
VSS_156 AB6
VSS_157 W6
VSS_158 T6
VSS_159 M6
VSS_160 K6
VSS_161 AN5
VSS_162 AJ5
VSS_163 B5
VSS_164 AA4
VSS_165 V4
VSS_166 R4
VSS_167 N4
VSS_168 K4
VSS_169 H4
VSS_170 E4
VSS_171 AL3
VSS_172 AD3
VSS_173 W3
VSS_174 T3
VSS_5G33
VSS_133 AJ9
VSS_175 B3
VSS_176 AK2
VSS_177 AH2
VSS_178 AF2
VSS_179 AB2
VSS_180 M2
VSS_181 K2
VSS_182 H2
VSS_183 F2
VSS_184 V1
VSS_185 R1
VSS_66E27
VSS_70AH26
AG25
VSS_76VSS_75
AE25
VSS_82B23
AJ22 VSS_84AF22
VSS_86VSS_85
G22
VSS_83AM22
E22 VSS_87J21 VSS_88H21 VSS_89F21
VSS_91VSS_90
AM20
AF18 VSS_100
AH18 VSS_98VSS_99
AM18
W19 VSS_96
D20 VSS_94VSS_95
AF20
AK20
VSS_93VSS_92
AH20
VSS_97R19
U18 VSS_101H18 VSS_102D18 VSS_103
AK17 VSS_104V17 VSS_105T17 VSS_106F17 VSS_107B17 VSS_108
AH16
VSS_110VSS_109
U16
NC
Calistoga-GSE_FCBGA998
U1G
NC
Calistoga-GSE_FCBGA998
U1G
NC1W33AM33 NC2
NC3AL33C33 NC4
NC5B33
NC6AN32
NC7A32
NC8AN31
NC9W28
NC10V27
NC11W29J24 NC12
NC13H24
NC14W32
NC15G24F24 NC16E24 NC17D24 NC18K33 NC19A31 NC20E21 NC21C23
NC22
AN19 NC23AM19 NC24
NC25AL19
NC29AN3
NC30Y9
NC31J19
NC32H19
NC33G19
NC34F19E19 NC35D19 NC36C19
NC38NC37
B19
G16 NC41F16 NC42E16 NC43D16 NC44C16 NC45B16
NC47NC46
AN2
Y7 NC49AM4 NC50AF4 NC51AD4 NC52AL4
NC54NC53
AK4
AH4 NC57AG4 NC58AE4
NC60NC59
AM1
NC64 Y5NC63NC62
AL1 Y6
NC61 W30
RESERVED26 Y25
RESERVED27 Y24
RESERVED28 AB22
RESERVED29 AB21
RESERVED30 AB19
RESERVED31 AB16
RESERVED32 AB14
RESERVED33 AA12
RESERVED34 W24
RESERVED35 AA24
RESERVED36 AB24
RESERVED37 AB20
RESERVED38 AB18
RESERVED39 AB15
RESERVED40 AB13
RESERVED41 AB12
NC28AH19
NC26AK19
NC27AJ19
A19
NC40NC39
Y8
NC48A16
W31
NC56NC55
AJ4 RESERVED42 AB17
NC65 Y10
NC66 W10
NC67 W25
NC68 V24
NC69 U24
NC70 V10
NC71 U10
NC72 K18
NCTF
Calistoga-GSE_FCBGA998
U1H
NCTF
Calistoga-GSE_FCBGA998
U1H
VCC_NCTF1T25R25 VCC_NCTF2
VCC_NCTF3P25N25 VCC_NCTF4
VCC_NCTF5M25
VCC_NCTF6P24
VCC_NCTF7N24
VCC_NCTF8M24
VCC_NCTF9Y22
VCC_NCTF10W22
VCC_NCTF11V22U22 VCC_NCTF12
VCC_NCTF13T22
VCC_NCTF14R22
VCC_NCTF15P22N22 VCC_NCTF16M22 VCC_NCTF17Y21 VCC_NCTF18
W21 VCC_NCTF19V21 VCC_NCTF20U21 VCC_NCTF21T21 VCC_NCTF22R21
VCC_NCTF23P21 VCC_NCTF24N21 VCC_NCTF25M21 VCC_NCTF26Y20
VCC_NCTF27
W20 VCC_NCTF28V20 VCC_NCTF29U20 VCC_NCTF30T20 VCC_NCTF31R20
VCC_NCTF32P20 VCC_NCTF33N20 VCC_NCTF34M20 VCC_NCTF35Y19
VCC_NCTF36P19 VCC_NCTF37N19 VCC_NCTF38M19 VCC_NCTF39Y18
VCC_NCTF40P18 VCC_NCTF41N18 VCC_NCTF42M18 VCC_NCTF43Y17
VCC_NCTF44P17 VCC_NCTF45N17 VCC_NCTF46M17 VCC_NCTF47Y16
VCC_NCTF48P16 VCC_NCTF49N16 VCC_NCTF50M16 VCC_NCTF51Y15
VCC_NCTF52P15 VCC_NCTF53N15 VCC_NCTF54M15
VCC_NCTF56VCC_NCTF55
Y14
VCCAUX_NCTF1 AD25
VCCAUX_NCTF2 AC25
VCCAUX_NCTF3 AB25
VCCAUX_NCTF4 AD24
VCCAUX_NCTF5 AC24
VCCAUX_NCTF6 AD22
VCCAUX_NCTF7 AD21
VCCAUX_NCTF8 AD20
VCCAUX_NCTF9 AD19
VCCAUX_NCTF10 AD18
VCCAUX_NCTF11 AD17
VCCAUX_NCTF12 AD16
VCCAUX_NCTF13 AD15
VCCAUX_NCTF14 AD14
VCCAUX_NCTF15 K14
VCCAUX_NCTF16 AD13
VCCAUX_NCTF17 Y13
VCCAUX_NCTF18 W13
VCCAUX_NCTF19 V13
VCCAUX_NCTF20 U13
VCCAUX_NCTF21 T13
VCCAUX_NCTF22 R13
VCCAUX_NCTF23 P13
VCCAUX_NCTF24 N13
VCCAUX_NCTF25 M13
VCCAUX_NCTF26 AD12
VCCAUX_NCTF27 Y12
VCCAUX_NCTF28 W12
VSS_NCTF1 AN33
VSS_NCTF2 AA25
VSS_NCTF3 V25
VSS_NCTF4 U25
VSS_NCTF5 AA22
VSS_NCTF6 AA21
VSS_NCTF7 AA20
VSS_NCTF8 AA19
VSS_NCTF9 AA18
VSS_NCTF10 AA17
VSS_NCTF11 AA16
VSS_NCTF12 AA15
VSS_NCTF13 AA14
T10 VTT_NCTF1R10 VTT_NCTF2P10 VTT_NCTF3N10
VTT_NCTF5VTT_NCTF4
L10
W14 VCC_NCTF57V14 VCC_NCTF58U14 VCC_NCTF59T14
VCC_NCTF61VCC_NCTF60
R14
VCCAUX_NCTF29 V12
VCCAUX_NCTF30 U12
VCCAUX_NCTF31 T12
VCCAUX_NCTF32 R12
VCCAUX_NCTF33 P12
VCCAUX_NCTF34 N12
VCCAUX_NCTF35 M12
VCCAUX_NCTF36 AD11
VCCAUX_NCTF37 AD10
VCCAUX_NCTF38 K10
P14 VCC_NCTF62N14
VCC_NCTF64VCC_NCTF63
M14
VTT_NCTF6D1
VSS_NCTF14 AA13
VSS_NCTF15 A4
VSS_NCTF16 A33
VSS_NCTF17 B2
VSS_NCTF18 AN1
VSS_NCTF19 C1
M10 RSVD_3A18 RSVD_4
AB10
RSVD_6RSVD_5
AA10
CFG_19 K28
RESERVED10 K25
RESERVED11 K26
RESERVED12 R24
RESERVED13 T24
RESERVED14 K21
RESERVED15 K19
RESERVED16 K20
RESERVED17 K24
RESERVED18 K22
RESERVED19 J17
RESERVED20 K23
RESERVED21 K17
RESERVED22 K12
RESERVED23 K13
RESERVED24 K16
RESERVED25 K15
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
U4_AA1
U4_A14
U4_F1
U4_A7
+1.5VS_3GPLL
+2.5VS_CRTDAC
+1.5VS
U4_AM32 U4_AB33
+V
CC
P_D
+VCCP
+1.5VS
+VCCP
+1.5VS
+3VS
+1.8V
+1.5VS_MPLL +1.5VS_HPLL +1.5VS_DPLLA +1.5VS_DPLLB +1.5VS
+2.5VS
+1.5VS+1.5VS_3GPLL
+1.5VS_MPLL +1.5VS_HPLL
+1.5VS
+1.5VS_DPLLA+1.5VS_DPLLB
+1.5VS +1.5VS
+2.5VS
+2.5VS
+1.5VS_PCIE
+1.5VS_3GPLL +2.5VS
+2.5VS
+2.5VS +VCCP
+1.5VS
+2.5VS
+1.5VS
+1.5VS
+2.5VS
+VCCP
+2.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(5/5)-PWR/GND
Custom
10 40Wednesday, February 18, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(5/5)-PWR/GND
Custom
10 40Wednesday, February 18, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2Calistoga(5/5)-PWR/GND
Custom
10 40Wednesday, February 18, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
PCI-E/MEM/PSB PLL decoupling
45mA Max.
close pin B31
Route +2.5VS from GMCH pinN33 to decoupling cap
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D28DDR_A_D29
DDR_A_DQS3
DDR_A_D31
DDR_A_D23
DDR_A_DQS#3
DDR_CKE1
DDR_A_D30
DDR_A_DM2
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_D3
DDR_A_MA2
DDR_A_D8
DDR_A_D10
DDR_A_D2
DDR_A_D1 DDR_A_D0
DDR_A_D9
DDR_A_DQS0
DDR_A_DQS1
DDR_A_D11
DDR_A_MA0
DDR_A_MA11
DDR_A_BS1 DDR_A_RAS#
DDR_A_MA6
M_ODT0
DDR_A_MA4
DDR_A_MA7
DDR_A_MA13
DDR_CS0#
DDR_A_DQS#2
DDR_A_D39
DDR_A_D25
DDR_A_D16 DDR_A_D17
DDR_A_D18DDR_A_D19
DDR_A_D24
DDR_A_DM3
DDR_A_DQS2
DDR_A_DM4
DDR_A_D53 DDR_A_D52
DDR_A_D44
DDR_A_D47
DDR_A_D37
DDR_A_DQS5 DDR_A_DQS#5
DDR_A_D36
DDR_A_D45
DDR_A_D38
DDR_A_D46
DDR_A_D54
DDR_A_D60
DDR_A_D63
DDR_A_D61
DDR_A_D55
DDR_A_D62
M_CLK_DDR1 M_CLK_DDR#1
DDR_A_DM6
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D26DDR_A_D27
DDR_CKE0
DDR_A_BS2
DDR_A_MA3
DDR_A_MA12
DDR_A_MA1
DDR_A_MA5
DDR_A_MA9 DDR_A_MA8
DDR_CS1#
DDR_A_DM5
DDR_A_CAS#
DDR_A_D40
M_ODT1
DDR_A_D35
DDR_A_DQS#4
DDR_A_WE#
DDR_A_D34
DDR_A_MA10
DDR_A_D32
DDR_A_D43
DDR_A_DQS4
DDR_A_D49
DDR_A_D33
DDR_A_D48
DDR_A_D41
DDR_A_BS0
DDR_A_D42
DDR_A_DM7
DDR_A_D56
DDR_A_D59
CLK_SMBCLK
DDR_A_DQS#6
DDR_A_D57
DDR_A_D58
CLK_SMBDATA
DDR_A_D50
DDR_A_DQS6
DDR_A_D51
DDR_A_D6
DDR_A_D5
DDR_A_D12
DDR_A_D7
DDR_A_D4
DDR_A_D13
DDR_A_DM1
DDR_A_DM0
DDR_A_D15 DDR_A_D14
M_CLK_DDR#0 M_CLK_DDR0
DDR_A_D20 DDR_A_D21
DDR_A_D22
M_ODT1
DDR_A_BS1
DDR_A_MA4 DDR_A_MA2
DDR_A_MA6
DDR_CS1#
DDR_A_BS2
DDR_A_RAS#
DDR_A_MA11
DDR_A_MA0 DDR_A_MA13
DDR_A_MA7DDR_CKE1
DDR_A_BS0 DDR_A_WE#
DDR_A_CAS# DDR_A_MA5
DDR_CKE0
DDR_A_MA9
DDR_A_MA10
DDR_A_MA12
DDR_A_MA8
M_ODT0
DDR_A_MA1 DDR_A_MA3
DDR_CS0#
DDR_A_MA[0..13](7)
DDR_A_DQS[0..7](7)
DDR_A_DQS#[0..7](7)
DDR_A_DM[0..7](7)
DDR_A_D[0..63](7)
M_CLK_DDR0 (6) M_CLK_DDR#0 (6)
DDR_CKE1 (6)
DDR_A_BS1 (7) DDR_A_RAS# (7) DDR_CS0# (6)
M_ODT0 (6)
M_CLK_DDR1 (6) M_CLK_DDR#1 (6)
PM_EXTTS#0 (6)
CLK_SMBDATA (12,19)
DDR_CKE0(6)
DDR_A_BS2(7)
DDR_A_WE#(7)DDR_A_BS0(7)
DDR_A_CAS#(7)DDR_CS1#(6)
M_ODT1(6)
CLK_SMBCLK (12,19)
+1.8V
+DIMM_VREF
+0.9VS
+0.9VS
+1.8V
+DIMM_VREF
+DIMM_VREF
+1.8V +1.8V
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2DDRII-SODIMMA
B
11 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2DDRII-SODIMMA
B
11 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2DDRII-SODIMMA
B
11 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
20mils
Layout Note: Place these resistor closely DIMMA,all trace length
Max=1.3"
Layout Note: Place near JDIM1
Layout Note: Place one cap close to every 2 pullup resistors
terminated to +0.9VS
Layout Note: Place these resistor closely DIMMA,all trace
length
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FSB
FSC
CLK_XTAL_IN
CLK_XTAL_OUT
ITP_EN
CLK_SMBDATA
CLK_SMBCLK
CLK_PCIE_LAN
CLK_CPU_BCLK
CLK_PCIE_LAN#
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_MCH_DREFCLK
CLK_MCH_DREFCLK#
MCH_SSCDREFCLK
MCH_SSCDREFCLK#
FSA
FSB
FSC
CLK_XTAL_OUT
CLK_XTAL_IN
PCI2_TME
ITP_EN PCI4_SEL PCI2_TME
WLAN_CLKREQ#
MCH_CLKREQ# SATA_CLKREQ#
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
CLK_PCIE_ICH#
CLK_PCIE_ICH
WLAN_CLKREQ#
PCI4_SEL
CLK_PCIE_CARD#
CLK_PCIE_CARD
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_SATA
CLK_PCIE_SATA#
MCH_CLKREQ#
CLK_PCIE_WWAN#
CLK_PCIE_WWAN
WWAN_CLKREQ#
WWAN_CLKREQ#
VGATE
H_STP_PCI#
SATA_CLKREQ#
CLK_SMBCLK
CLK_SMBDATA
H_STP_CPU#
H_STP_PCI#
FSACLK_ICH_48M(17)
CLK_ICH_14M(17)
H_STP_PCI#(17)
H_STP_CPU#(17)
CLK_PCI_ICH(15)
CLK_SMBDATA (11,19)
CLK_SMBCLK (11,19)
CLK_PCIE_LAN (24)
CLK_PCIE_LAN# (24)
CLK_CPU_BCLK# (4)
CLK_CPU_BCLK (4)
CLK_MCH_BCLK (6)
CLK_MCH_BCLK# (6)
CLK_MCH_DREFCLK (6)
CLK_MCH_DREFCLK# (6)
MCH_SSCDREFCLK (6)
MCH_SSCDREFCLK# (6)
CPU_BSEL0(4)
MCH_CLKSEL0 (6)
CPU_BSEL1(4)
MCH_CLKSEL1 (6)
CPU_BSEL2(4)
MCH_CLKSEL2 (6)
CLK_PCIE_WLAN# (19)
CLK_PCIE_WLAN (19)
CLK_PCIE_ICH (17)
CLK_PCIE_ICH# (17)
WLAN_CLKREQ# (19)
CLK_PCI_LPC(25)
CLK_PCIE_CARD# (27)
CLK_PCIE_CARD (27)
CLK_MCH_3GPLL# (8)
CLK_MCH_3GPLL (8)
CLK_PCIE_SATA# (16)
CLK_PCIE_SATA (16)
MCH_CLKREQ# (6)
CLK_PCIE_WWAN# (19)
CLK_PCIE_WWAN (19)
WWAN_CLKREQ# (19)
VGATE (17,25,37)
SATA_CLKREQ# (17)
ICH_SMBCLK(17)
ICH_SMBDATA(17)
+1.05VM_CK505
+3VM_CK505
+3VM_CK505
+3VS
+1.05VM_CK505
+VCCP
+VCCP
+VCCP
+VCCP
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.2
Clock Generator CK505
12 40Sunday, February 22, 2009
2007/10/15 2007/8/18Compal Electronics, Inc.
KAV60 LA-5141P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.2
Clock Generator CK505
12 40Sunday, February 22, 2009
2007/10/15 2007/8/18Compal Electronics, Inc.
KAV60 LA-5141P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.2
Clock Generator CK505
12 40Sunday, February 22, 2009
2007/10/15 2007/8/18Compal Electronics, Inc.
KAV60 LA-5141P
SRC PORT LIST
REQ_3#
DEVICE PORT
REQ PORT LIST
REQ_4#
REQ_6#
REQ_7#
REQ_9#
REQ_10#
REQ_11#
REQ_A#
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# Pin28/29 : LCDCLK /
LCDCLK#
1 = Pin24/25 : SRC_0 / SRC_0# Pin28/29 : 27M/27M_SS
PCIE_WLAN
SATA
MCH_3GPLL
Routing the trace at least 10mil
1000
CLKSEL1
0
PCI MHz
266
SRCCPU MHz MHzCLKSEL2
33.30
FSACLKSEL0
FSC FSB REF MHz
DOT_96 MHz
USB MHz
14.318 96.0 48.0
0 1000 133 33.31 14.318 96.0 48.0
0 1001 200 33.30 14.318 96.0 48.0
0 1001 166 33.31 14.318 96.0 48.0
1 1000 333 33.30 14.318 96.0 48.0
1 1000 100 33.31 14.318 96.0 48.0
1 1001 400 33.30 14.318 96.0 48.0
1 1 1 Reserved SA000020K00 (Silego : SLG8SP556VTR ) SA000020H10
(ICS : ICS9LPRS387AKLFT)
SRC10
SRC11
PCIE_ICH
SRC6
SRC4
MCH_3GPLL
SRC0
DEVICE
SRC3
MCH_DREFCLK
SRC2
SRC7
SRC8
SRC9 PCIE_LAN
PCIE_WLAN
For PCI2_TME:0=Overclocking of CPU and SRC allowed (ICS only)
1=Overclocking of CPU and SRC NOT allowed
PORT
PCIE_CARDREADER
SATA HDD
PCIE_WWAN
PCIE_WWAN
Close to L11
Close to L12
change R112,R108,Q10A,Q10B BOM structure 11/20
add R149,R150 11/20
del R143 and CLK_SD_48M 11/21
Change R137 from 12 ohm to 33 ohm 11/21
add C32,C33,C42 for keypart 12/08
Del R129 12/14
add C45 for keypart 12/14
change R137 BOM structure 12/15 add R143 12/15
del R143 12/15
change C32 C33 C42 C45 BOM structre 12/14
change R141,R140,R147,R81,R91 R82,R97,R95,R98 BOM structure
12/29
change R141,R140,R147,R81,R91R82,R97,R95,R98 BOM structure
01/17
Del R110, R119 01/17
add C164,C165 01/22
move C159 from P11 to P12 01/22
change C162 from 27P to 22P 01/23
change C42,C45 from 22p to 15p 02/06
change R115,R121 from 39 ohm to 47 ohm 02/06
change R137 from 33 to 39 ohm 02/06change C32 from 10P to
15p ohm 02/06
R99 1K_0402_5%R99 1K_0402_5%
1 2
R108
2.2K_0402_5%
@
R108
2.2K_0402_5%
@
R147 0_0402_5%
R147 0_0402_5%
1 2
Y214.31818MHZ_16PF_DSX840GA
Y214.31818MHZ_16PF_DSX840GA
12
R97
1K_0402_5%
R97
1K_0402_5%
12
C162 22P_0402_50V8J C162 22P_0402_50V8J 1 2
Q10B 2N7002DW-T/R7_SOT363-6 @ Q10B 2N7002DW-T/R7_SOT363-6 @3
5
4
C155
0.1U_0402_16V4Z
C155
0.1U_0402_16V4Z
1
2
R98 0_0402_5%
@ R98 0_0402_5%
@
12
R132
10K_0402_5%
R132
10K_0402_5%
12
R645 10K_0402_5% @R645 10K_0402_5% @1 2
C851 47P_0402_50V8J
C851 47P_0402_50V8J
1
2
C175
0.1U_0402_16V4Z
C175
0.1U_0402_16V4Z
1
2
R81
1K_0402_5%
R81
1K_0402_5%
12
C163
10U_0805_10V4Z
C163
10U_0805_10V4Z
1
2
C151
10U_0805_10V4Z
C151
10U_0805_10V4Z
1
2
R95 0_0402_5%
R95 0_0402_5%
1 2
C154
0.1U_0402_16V4Z
C154
0.1U_0402_16V4Z
1
2
R82 0_0402_5%
@ R82 0_0402_5%
@
12
R84 10K_0402_5%R84 10K_0402_5% 12
C181
0.1U_0402_16V4Z
C181
0.1U_0402_16V4Z
1
2
C199
0.1U_0402_16V4Z
C199
0.1U_0402_16V4Z
1
2
R100 10K_0402_5%R100 10K_0402_5%
12
C165
0.1
U_
04
02
_1
6V
4Z C165
0.1
U_
04
02
_1
6V
4Z
1
2
C45C45 15P_0402_50V8J 15P_0402_50V8J
C33 10P_0402_50V8J
C33 10P_0402_50V8J
12
C198
0.1U_0402_16V4Z
C198
0.1U_0402_16V4Z
1
2
C834 47P_0402_50V8J
C834 47P_0402_50V8J
1
2
R137 39_0402_1% R137 39_0402_1%1 2
R111 10K_0402_5%R111 10K_0402_5% 12
R1
12
2.2
K_
04
02
_5
%
@
R1
12
2.2
K_
04
02
_5
%
@
Q10A 2N7002DW-T/R7_SOT363-6 @ Q10A 2N7002DW-T/R7_SOT363-6 @
6 1
2
R109
10K_0402_5%
R109
10K_0402_5%
12
R91 0_0402_5%
R91 0_0402_5%
1 2
R138R1382.2K_0402_5% 2.2K_0402_5%
12
C42
15P_0402_50V8J
C42
15P_0402_50V8J
L11
FBMA-L11-201209-221LMA30T_0805
L11
FBMA-L11-201209-221LMA30T_0805 12
C189
0.1U_0402_16V4Z
C189
0.1U_0402_16V4Z
1
2
R149 0_0402_5%R149 0_0402_5%
1 2
L12L12 FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
12
C197
0.1U_0402_16V4Z
C197
0.1U_0402_16V4Z
1
2
R140 56_0402_5%
@ R140 56_0402_5%
@
12
R141 1K_0402_5%
R141 1K_0402_5%
12
R117
10K_0402_5%
R117
10K_0402_5%
12
U11
SLG8SP556VTR_QFN72_10X10
U11
SLG8SP556VTR_QFN72_10X10
CKPWRGD/PD#1
FS_B/TEST_MODE2
VSS_REF3
XTAL_OUT4
XTAL_IN5
VDD_REF6
7
REF_1
REF_0/FS_C/TEST_
8
SDA 9
SCL 10
NC11
VDD_PCI12
13 PCI_1
14 PCI_2
15 PCI_3
16
PCIF_5/ITP_EN
PCI_4/SEL_LCDCL
17
VSS_PCI18
VDD_4819
USB_0/FS_A20
USB_1/CLKREQ_A# 21
VSS_4822
VDD_IO23
SRC_0/DOT_96 24
SRC_0#/DOT_96# 25
VSS_IO26
VDD_PLL327
LCDCLK/27M 28
LCDCLK#/27M_SS 29
VSS_PLL330
VDD_PLL3_IO31
SRC_2 32
SRC_2# 33
VSS_SRC34
SRC_3 35
SRC_3# 36
VDD_CPU72
CPU_0 71
CPU_0# 70
VSS_CPU69
CPU_1 68
CPU_1# 67
VDD_CPU_IO66
CLKREQ_7# 65
SRC_8/CPU_ITP 64
SRC_8#/CPU_ITP# 63
VDD_SRC_IO62
SRC_7 61
SRC_7# 60
VSS_SRC59
CLKREQ_6# 58
SRC_6 57
SRC_6# 56
VDD_SRC55
PCI_STOP#54
CPU_STOP#53
VDD_SRC_IO52
SRC_10# 51
SRC_10 50
SLKREQ_10# 49
SRC_11 48
SRC_11# 47
CLKREQ_11# 46
SRC_9# 45
SRC_9 44
CLKREQ_9# 43
VSS_SRC42
CLKREQ_4# 41
SRC_4# 40
SRC_4 39
VDD_SRC_IO38
CLKREQ_3# 37
VSS73
R139 10K_0402_5%R139 10K_0402_5% 12
C167
0.1U_0402_16V4Z
C167
0.1U_0402_16V4Z
1
2
C152
0.1U_0402_16V4Z
C152
0.1U_0402_16V4Z
1
2
R142 1K_0402_5%R142 1K_0402_5%
1 2
C153
0.1U_0402_16V4Z
C153
0.1U_0402_16V4Z
1
2
R85 10K_0402_5%R85 10K_0402_5% 12
C169 27P_0402_50V8J C169 27P_0402_50V8J
C200
0.1U_0402_16V4Z
C200
0.1U_0402_16V4Z
1
2
R86 1K_0402_5%R86 1K_0402_5%
1 2
33_0402_5% R101
33_0402_5% R101
1 2
C159
0.1
U_
04
02
_1
6V
4Z C159
0.1
U_
04
02
_1
6V
4Z
1
2
R150 0_0402_5%R150 0_0402_5% 1 2
R121 47_0402_5%R121 47_0402_5% 1 2
R115 47_0402_5%R115 47_0402_5% 1 2
C164
0.1
U_
04
02
_1
6V
4Z C164
0.1
U_
04
02
_1
6V
4Z
1
2
C32
15P_0402_50V8J
C32
15P_0402_50V8J
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LVDS_SDA
LVDS_SCL
+LC
DV
DD
_R
+CAM_VCC
USB20_N1 USB20_N1_1
USB20_P1 USB20_P1_1
DMIC_CLK_R DMIC_DATA_R
LVDS_A1LVDS_A1#
LVDS_A0# LVDS_A0
LVDS_ACLK LVDS_ACLK#
LVDS_A2LVDS_A2#
BKOFF# INVT_PWM
LVDS_SDA LVDS_SCL
DMIC_CLK_R DMIC_DATA_R
USB20_P1_1 USB20_N1_1
+LEDVDD
USB20_P1
USB20_N1
+LCDVDD_L INVT_PWM
LVDS_SCL (8)
LVDS_SDA (8)
GMCH_ENVDD(8)
USB20_N1(17)
USB20_P1(17)
LVDS_A1(8)LVDS_A1#(8)
LVDS_A0#(8)LVDS_A0(8)
LVDS_ACLK#(8)LVDS_ACLK(8)
LVDS_A2#(8)LVDS_A2(8)
BKOFF#(25)INVT_PWM(25)
DMIC_CLK_R (20) DMIC_DATA_R (20)
+3VS
+3VS+LCDVDD+LCDVDD
+3VS
+3VS
+CAM_VCC
+LCDVDDB+
+3VS
+CAM_VCC
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2LVDS/Camera/DMIC conn
B
13 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2LVDS/Camera/DMIC conn
B
13 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED
BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION
IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KAV60 LA-5141P 0.2LVDS/Camera/DMIC conn
B
13 40Sunday, February 22, 2009
2006/08/18 2007/8/18Compal Electronics, Inc.
LCD/PANEL BD. Conn.
change to JAQ10 circuit 11/14
1/3 Change
LCD POWER CIRCUIT
W=20milsW=20mils
change BOM structure 11/14
restore R563,Q31 BOM structure 11/20
reserve +3VALW 11/16
change +3VS to +CAM_VCC 11/16
change +3VS to +CAM_VCC 11/16
CMOS Camera CONN
del +3VALW 11/17
del JP1 11/26
change JLVDS1 Conn form 20 pin to 30 pin 11/26
For ESD 10/11
combine the DMIC Conn and Camera Conn 11/26
For panel ADJ
(20 MIL)280mA
400mA
LVDS camera
DMIC
SWAP JLVDS1 12/02
move R441,R438 form P13 to P20 12/02
SWAP D2 pin define 12/05
C362 L7 12/05
return D2 pin define 12/08
add C5 for keypart 12/08
change D17 P/N from SCA00000700 to SCA00000A00 and BOM structure
12/22
change D2 P/N from SC300000O00 to SC300000B00 and BOM structure
12/22
change C603 from 220P to 100P 01/23
change C603 from 100P to 47P 01/23
del L8,R145,R146 02/20JLVDS1
ACES_88242-3001CONN@
JLVDS1
ACES_88242-3001CONN@
2525
8 8
24 24
4 4
2121
18 1816 16
77
99 10 10
33
2929
2323
1515
1717
55
272726 26
20 20
14 141111 12 12
6 6
11 2 2
1919
28 28
30 30
1313
22 22
31
GND2GND1
32
D2
CM1293-04SO_SOT23-6
D2
CM1293-04SO_SOT23-6
CH36
Vp5
CH44
CH2 3
Vn 2
CH1 1
C603 47P_0402_50V8JC603 47P_0402_50V8J1
2
R44
10
K_0
402_
5%R
44
10K
_040
2_5%
12
Q68 DTC115EUA_SC70-3Q68 DTC115EUA_SC70-3
2
13
D17
PJDLC05_SOT23-3
D17
PJDLC05_SOT23-3
231
J13
JUMP_43X39 @
J13
JUMP_43X39 @
1 1 2 2
G
D
S
Q31
2N7002W-T/R7_SOT323-3
G
D
S
Q31
2N7002W-T/R7_SOT323-3 2
13
G
D S
Q30 AO3413_SOT23
G
D S
Q30 AO3413_SOT23
2
1 3
C6704.7U_0603_6.3V6K
@
C6704.7U_0603_6.3V6K
@
1
2
C362 100P_0402_50V8JC362 100P_0402_50V8J
1
2
R563 300_0603_5%
R563 300_0603_5%
12
R42
10
K_0
402_
5%R
42
10K
_040
2_5%
12
C3C30.1U_0402_16V4Z 0.1U_0402_16V4Z
1
2
R564
100K_0402_5%
R564
100K_0402_5%
12
C671
0.047U_0402_16V4Z
C671
0.047U_0402_16V4Z
1
2
C368 330P_0402_50V7KC368 330P_0402_50V7K1
2
C668C6680.1U_0402_16V4Z 0.1U_0402_16V4Z
1
2
C669
4.7U_0805_10V4Z
C669
4.7U_0805_10V4Z
1
2
R565 4.7K_0402_5% R565 4.7K_0402_5%
12
C5
1000P_0402_50V
7K
C5
1000P_0402_50V
7K
1
2
FBMA-L11-201209-221LMA30T_0805L7
FBMA-L11-201209-221LMA30T_0805L7 12
L6 FBMA-L11-201209-221LMA30T_0805 L6
FBMA-L11-201209-221LMA30T_080512
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
GREEN
JVGA_VS
BLUE
VGA_DDC_DAT
RED
JVGA_HS
CRT_VSYNC_1
CRT_HSYNC_1
VGA_DDC_CLK
RED
JVGA_VS
BLUE
VGA_DDC_DAT
VGA_DDC_CLK
JVGA_HS
GREEN
GMCH_CRT_VSYNC(8)
GMCH_CRT_DATA(8)
GMCH_CRT_CLK(8)
GMCH_CRT_B(8)
GMCH_CRT_G(8)
GMCH_CRT_R(8)
GMCH_CRT_HSYNC(8)
CRT_DET# (17)
+5VS
+5VS
+CRT_VCC
+3VS
+3VS
+CRT_VCC+5VS
+CRT_VCC
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORI
