-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
AMD Fs1r2 Richland Processor with DDRIII + Bolton-M3 FCH
VALGC_GD M/B Schematics Document
REV:1.0
Compal Confidential
2013-04-16
AMD Mars XT M2
LA-A091P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
Cover Page
Custom
1 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
Cover Page
Custom
1 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
Cover Page
Custom
1 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.
www.chinafix.com
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
File Name :LA-A091P
Compal confidential
page 37
Card Reader
USB20 Port 6
page 39
Left USB3.0 x2USB30 Port 0,1
page 34
ODD Conn.SATA Port 1
page 34
HDD Conn.SATA Port 0
page 35
Audio CodecCONEXANTCX20757
page 12SPI ROM
Realtek RTS5170
page 31
LAN
AtherosAR8162QCA8172(10/100)
page 32RJ45 Conn.
USB30 x2
USB20 x6
SATA Gen3
AZALIA
SATA
Int. Camera
page 27USB20 Port 3PCIe Mini Card
USB20 Port 2 page 30
PCIe Port 1
WLAN+BT4.0 ComboUSB20 x1
4MB
page 37
Audio Combo JacksHP & MIC
15"
LS9902P
IO/B
Power/B
ODD/BLS9901P LS9904P
LED/B
14"
LS9903P
Sub-borad
USB20 Port 4
Touch Screen
page 39
PCIe Port 0
page 11~15
RTD2132S
AMD FS1r2 APU
page 5,6,7,8
Dual Channel
AMD MARS XT M2 128 bits
Sun Pro M2 64bit
BANK 0, 1, 2
204pin DDRIII-SO-DIMM X2
DDR3 / DDR3L 1600MHz
Memory BUS(DDRIII)
page 9,10
DP Port0LVDS
translator
DP1
HDMI Conn. DP Port2
Richland
uPGA 722 pin
35mm x 35mm
page 16~25
page 26
page 29
GPP0GPP1
24.5mm x 24.5mm
uFCBGA-656
Bolton M3
LVDS Conn.page 27
x4 UMI Gen. 12.5GT/s per lane
page 28
VRAM: DDR3 type, 1GB/ 2GB
DP0
DP2
page 35
Int. MIC Conn.
page 35
Int. Speaker Conn.page 36
ECENE KB9012
page 33Thermal Sensor
page 37Int. KBD
page 37Touch Pad
PCIEx8 Gen2
FCH CRT (VGA DAC)CRT Conn.
page 39USB20 Port 0
Right USB2.0
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
MB Block Diagram
Custom
2 57Friday, April 12, 2013
2012/11/13 2013/11/12Compal Electronics, Inc.
VALGD MB L
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
MB Block Diagram
Custom
2 57Friday, April 12, 2013
2012/11/13 2013/11/12Compal Electronics, Inc.
VALGD MB L
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
MB Block Diagram
Custom
2 57Friday, April 12, 2013
2012/11/13 2013/11/12Compal Electronics, Inc.
VALGD MB L
www.chinafix.com
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
X+3VALW+3VALW+3VALW+3VS VXXFCH ThermalSensor XXSMB_EC_CK2_SUS
SOURCEKB9012 VGA BATT KB9012 SODIMM
SMBUS Control TableFCH_SCLK0FCH_SDATA0 FCH
WLANWWANSMB_EC_DA2_SUSSMB_EC_CK1SMB_EC_DA1 X V VXX XX XX
XXKB9012 XUSB 3.0USB 2.0 Port
4 ExternalUSB Port
Card Reader
Touch Screen
0
1
2
3
4
5
6
7
8
9
10
11
12
13
USB Port Table
Board ID / SKU ID Table for AD channelBOARD ID Table
STATESIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S3# SLP_S5# +VALW +V +VS Clock
Board ID
0
1
2
3
4
5
6
7
PCB Revision
0.2
Voltage Rails
BTO ItemBOM Structure
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW LOW
LOW
HIGH HIGH
HIGHHIGH
HIGH
HIGH
HIGH
PX@
Mini Card(WLAN)
+3VS +3VSBOM Structure Table
O
X
S3
+3VS
X
X
+3VALW
+5VS
O
+APU_CORE
OO
X
X X
+1.2VS
powerplane
O
O
O
O
X
S5 S4/ Battery only
X X X
+B
State
+1.5VS
+1.5V
S5 S4/AC & Batterydon't exist
S5 S4/AC
+5VALW
S0
O
O
+VGA_CORE
+1.8VGS
+2.5VS
+1.5VGS
+APU_CORE_NB
LAN
4
3
2
1
Thermal Sensor 1001_101xb
EC SM Bus1 address
Device
DDR DIMM0 1001 000Xb
DDR DIMM2 1001 010Xb
PCH SM Bus address
Device Address
Address Address
EC SM Bus2 address
Device
Smart Battery 0001 011X b
APU PCIE PORT LIST
USB 2.0 Port (Left Side)
USB 2.0 Port (Left Side)
WLAN
VGA circuit
CMOS@AR8162 LAN part
CMOS Camera part
Port Device
+0.95VGS
+0.75VS
+1.1VS
+3.3VGS
XHCI
0
1
2
3
8162@
8172@
ME@
Unpop
ME part
@
X76@ X76 Level part for VRAM
+1.1VALW
4
3
2
1
FCH PCIE PORT LISTPort Device
3
2
1
OC# USB Port
USB OC MAPPING
0 USB30 port0,port1
USB20 port0
APU RTD2132X XX XVUSB20 port10,port11
SB-TSI(default) 1001_100xb
VGA(int. thermal) 1000_001xb
RTD2132S 1010_1000b
+1.5V_APU
AR8172 LAN part
ID BRD ID Ra Rb Vab
x
100K
100K
100K
0
8.2K
18K
33K
0V
0.25V
0.5V
0.82VR01 EVT
R02 DVT
R03 PVT
R10 MP0
1
2
3
Ra = R310
Rb = R311
Camera /
+1.5VV V V+3VS(LV shifter) X XSMB_EC_CK2SMB_EC_DA2 X XKB9012 XXX
XX XVGA(ext. thermal) 0100_1101b
USB Port 2.0 (Right Side)
@EMI@ Reserve for EMI@ESD@ Reserve for ESDEMI@ EMI partSHORT
PAD@ SHORT PADTEST POINT@
JUMP@TSET POINT
JUMP
885N@ Unpop in KBC pageMIC@ MIC part
DEBUG@ For debug
14@
15@
For 14"
For 15"
45@ HDMI LOGO
CMOS@ For CMOS circuit
NOGCLK@ No use GCLK circuit
LVDS@ LVDS circuit
LDO@
SWR@
LDO mode for LAN
SWR mode for LAN
TS@ For Touch Screen circuit
GCLK@ Ues GCLK circuit
GCLK302@
GCLK238@
302 part for DIS
238 part for UMA
PXNOGCLK@ No use GCLK circuit in GPU
MARS@
2132S@
2132R@
VRAM CHB parts for MARS
Panel PWM part for RTD2132S
Panel PWM part for RTD2132R
ShareROM@ Reserve for ShareROM
Strap@ Reserve for Strap pin
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
Notes List
Custom
3 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
Notes List
Custom
3 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
Notes List
Custom
3 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.
www.chinafix.com
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Mars XT VRAM STRAP
Vendor
VDD_CT(+1.8VGS)
VDDR3(+3VGS)
VDDC/VDDCI(+VGA_CORE)
PERSTb
Straps Reset
Straps Valid
REFCLK
VDDR1(+1.5VGS)
Power-Up/Down Sequence
PCIE_VDDC(+0.95VGS)
Global ASIC Reset
T4+16clock
"Mars" has the following requirements with regards to
power-supply sequencing to
avoid damaging the ASIC:
All the ASIC supplies must reach their respective nominal
voltages within 20ms‧of the start of the ramp-up sequence, though a
shorter ramp-up duration is
preferred. The maximum slew rate on all rails is 50mV/us.
The external pull ups on the DDC/AUX signals (if applicable)
should ramp up‧before or after both VDDC and VDD_CT have ramped
up.
VDDC and VDD_CT should not ramp up simultaneously. For example,
VDDC should‧reach 90% before VDD_CT starts to ramp up (or vice
versa).
For power down, reversing the ramp-up sequence is
recommended.‧
UV5,UV6,UV7,UV8,UV9,UV10,UV11,UV12
PS_3[3] PS_3[2] PS_3[1] R_pu R_pd
RV20 RV27
Micron 2048Mbits
SA000067500
128Mx16 MT41J128M16JT-093G:k
0 0 0 NC 4.75K
X76@X76@
UV9,UV10,UV11,UV12
PS_3[2]PS_3[3] R_pdR_puPS_3[1]
0
Micron 2048Mbits
SA000065D00
256M16 MT41K256M16HA-107G
RV27RV20
00
X76@ X76@Sun PRO VRAM STRAP
Vendor
0 0 1 8.45K 2K
Samsung 2048Mbits
SA000068U00
128M16 K4W2G1646E-BC1A FBGA
Hynix 2048Mbits
SA000065300
128M16 H5TQ2G63DFR-N0C FBGA4.53K 2K0 1 0
100
01 1
1 1 1
Micron 1024Mbits
SA000067500
128Mx16 MT41J128M16JT-093G:k
Samsung 1024Mbits
SA000068U00
128M16 K4W2G1646E-BC1A FBGA
Hynix 1024Mbits
SA000065300
128M16 H5TQ2G63DFR-N0C FBGA
Samsung 2048Mbits
SA000068R00
256M16 K4W4G1646B-HC11 FBGA4.75KNC
2K8.45K
10K3.4K
4.75K NC
SS2G
SM2G
SS1G
SH1G
SM1G
MS2G
MM2G
MH2G 0 1 1 6.98K 4.99K
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
VGA Notes List
Custom
4 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
VGA Notes List
Custom
4 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
VGA Notes List
Custom
4 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.
www.chinafix.com
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Power Sequence of APU
+1.5V
+2.5VS
+1.5VS
+APU_CORE
+APU_CORE_NB
+1.2VS
Group A
Group B
LAN
WLAN
P_ZVDDP
PCIE_CTX_C_GRX_P0PCIE_CTX_C_GRX_N0PCIE_CTX_C_GRX_P1PCIE_CTX_C_GRX_N1PCIE_CTX_C_GRX_P2PCIE_CTX_C_GRX_N2PCIE_CTX_C_GRX_P3PCIE_CTX_C_GRX_N3
PCIE_CTX_GRX_P0PCIE_CTX_GRX_N0PCIE_CTX_GRX_P1PCIE_CTX_GRX_N1PCIE_CTX_GRX_P2PCIE_CTX_GRX_N2PCIE_CTX_GRX_P3PCIE_CTX_GRX_N3
PCIE_CTX_C_GRX_P4PCIE_CTX_C_GRX_N4PCIE_CTX_C_GRX_P5PCIE_CTX_C_GRX_N5PCIE_CTX_C_GRX_P6PCIE_CTX_C_GRX_N6PCIE_CTX_C_GRX_P7PCIE_CTX_C_GRX_N7
PCIE_CTX_GRX_P4PCIE_CTX_GRX_N4PCIE_CTX_GRX_P5PCIE_CTX_GRX_N5PCIE_CTX_GRX_P6PCIE_CTX_GRX_N6PCIE_CTX_GRX_P7PCIE_CTX_GRX_N7
PCIE_CRX_GTX_P0PCIE_CRX_GTX_N0PCIE_CRX_GTX_P1PCIE_CRX_GTX_N1PCIE_CRX_GTX_P2PCIE_CRX_GTX_N2PCIE_CRX_GTX_P3PCIE_CRX_GTX_N3PCIE_CRX_GTX_P4PCIE_CRX_GTX_N4PCIE_CRX_GTX_P5PCIE_CRX_GTX_N5PCIE_CRX_GTX_P6PCIE_CRX_GTX_N6PCIE_CRX_GTX_P7PCIE_CRX_GTX_N7
PCIE_CTX_GRX_P[0..7]
PCIE_CTX_GRX_N[0..7]
PCIE_CRX_GTX_P[0..7]
PCIE_CRX_GTX_N[0..7]
P_ZVSS
UMI_TXP0_CUMI_TXN0_CUMI_TXP1_CUMI_TXN1_CUMI_TXP2_CUMI_TXN2_CUMI_TXP3_CUMI_TXN3_C
PCIE_PTX_DRX_N0PCIE_PTX_DRX_P0
PCIE_PTX_DRX_N1PCIE_PTX_DRX_P1
UMI_RXP0UMI_RXN0UMI_RXP1UMI_RXN1UMI_RXP2UMI_RXN2UMI_RXP3UMI_RXN3
PCIE_CTX_GRX_P[0..7]
PCIE_CTX_GRX_N[0..7] PCIE_CRX_GTX_N[0..7]
PCIE_CRX_GTX_P[0..7]
UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3
UMI_TXN3
PCIE_PRX_DTX_P0PCIE_PRX_DTX_N0
PCIE_PTX_C_DRX_P0 PCIE_PTX_C_DRX_N0
PCIE_PRX_DTX_P1PCIE_PRX_DTX_N1
PCIE_PTX_C_DRX_P1 PCIE_PTX_C_DRX_N1
+1.2VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
FS1r2 PCIE/UMI
Custom
5 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
FS1r2 PCIE/UMI
Custom
5 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
FS1r2 PCIE/UMI
Custom
5 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.
CV2050.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
C43 0.1U_0402_16V7KC43 0.1U_0402_16V7K1 2
CV2030.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
C37 0.1U_0402_16V7KC37 0.1U_0402_16V7K1 2
C82 0.1U_0402_16V7KC82 0.1U_0402_16V7K1 2
CV2090.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
R1 196_0402_1%R1 196_0402_1%
1 2
CV2100.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
C35 0.1U_0402_16V7KC35 0.1U_0402_16V7K1 2
C42 0.1U_0402_16V7KC42 0.1U_0402_16V7K1 2
C36 0.1U_0402_16V7KC36 0.1U_0402_16V7K1 2
C103 0.1U_0402_16V7KC103 0.1U_0402_16V7K1 2
CV2060.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
CV2040.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
CV2070.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
R2 196_0402_1%R2 196_0402_1%
1 2
C40 0.1U_0402_16V7KC40 0.1U_0402_16V7K1 2
CV2120.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
CV250.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
CV2110.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
CV240.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
UM
IG
PP
GR
AP
HIC
S
PCI EXPRESS
JCPU1A
LOTES_ACA-ZIF-109-P12-A_FS1R2ME@
UM
IG
PP
GR
AP
HIC
S
PCI EXPRESS
JCPU1A
LOTES_ACA-ZIF-109-P12-A_FS1R2ME@
P_ZVDDPAG11
P_UMI_RXN3AE9 P_UMI_RXP3AE8 P_UMI_RXN2AF8 P_UMI_RXP2AF7
P_UMI_RXN1AG5 P_UMI_RXP1AG6 P_UMI_RXN0AG9 P_UMI_RXP0AG8
P_GPP_RXN3AC6 P_GPP_RXP3AC5 P_GPP_RXN2AC8 P_GPP_RXP2AC9
P_GPP_RXN1AD7 P_GPP_RXP1AD8 P_GPP_RXN0AE6 P_GPP_RXP0AE5
P_GFX_RXN15M7 P_GFX_RXP15M8 P_GFX_RXN14N6 P_GFX_RXP14N5
P_GFX_RXN13N8 P_GFX_RXP13N9 P_GFX_RXN12P7 P_GFX_RXP12P8
P_GFX_RXN11R6 P_GFX_RXP11R5 P_GFX_RXN10R8 P_GFX_RXP10R9
P_GFX_RXN9T7 P_GFX_RXP9T8 P_GFX_RXN8U6 P_GFX_RXP8U5 P_GFX_RXN7U8
P_GFX_RXP7U9 P_GFX_RXN6V7 P_GFX_RXP6V8 P_GFX_RXN5
W6 P_GFX_RXP5W5 P_GFX_RXN4W8 P_GFX_RXP4W9 P_GFX_RXN3Y7
P_GFX_RXP3Y8 P_GFX_RXN2
AA6 P_GFX_RXP2AA5 P_GFX_RXN1AA8 P_GFX_RXP1AA9 P_GFX_RXN0AB7
P_GFX_RXP0AB8
P_ZVSSAH11
P_UMI_TXN3AE3P_UMI_TXP3AE2P_UMI_TXN2AF2P_UMI_TXP2AF1P_UMI_TXN1AF5P_UMI_TXP1AF4P_UMI_TXN0AG3P_UMI_TXP0AG2
P_GPP_TXN3AB4P_GPP_TXP3AB5P_GPP_TXN2AC2P_GPP_TXP2AC3P_GPP_TXN1AD1P_GPP_TXP1AD2P_GPP_TXN0AD4P_GPP_TXP0AD5
P_GFX_TXN15M1P_GFX_TXP15M2P_GFX_TXN14M4P_GFX_TXP14M5P_GFX_TXN13N2P_GFX_TXP13N3P_GFX_TXN12P1P_GFX_TXP12P2P_GFX_TXN11P4P_GFX_TXP11P5P_GFX_TXN10R2P_GFX_TXP10R3P_GFX_TXN9T1P_GFX_TXP9T2P_GFX_TXN8T4P_GFX_TXP8T5P_GFX_TXN7U2P_GFX_TXP7U3P_GFX_TXN6V1P_GFX_TXP6V2P_GFX_TXN5V4P_GFX_TXP5V5P_GFX_TXN4W2P_GFX_TXP4W3P_GFX_TXN3Y1P_GFX_TXP3Y2P_GFX_TXN2Y4P_GFX_TXP2Y5P_GFX_TXN1AA2P_GFX_TXP1AA3P_GFX_TXN0AB1P_GFX_TXP0AB2
C38 0.1U_0402_16V7KC38 0.1U_0402_16V7K1 2
CV2130.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
CV510.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
C41 0.1U_0402_16V7KC41 0.1U_0402_16V7K1 2
CV2080.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
CV2150.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
C44 0.1U_0402_16V7KC44 0.1U_0402_16V7K1 2
C39 0.1U_0402_16V7KC39 0.1U_0402_16V7K1 2
CV2140.1U_0402_16V7K [email protected]_0402_16V7K PX@1 2
www.chinafix.com
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Place them close to APU within 1"Place them close to APU within
1"Place them close to APU within 1"Place them close to APU within
1"EVENT# pull high 0.75V reference voltage
15mil
15mil
DDRA_SDQ59DDRA_SDQ60
DDRA_SDQ3
DDRA_SDQ13
DDRA_SDQ40
DDRA_SDQ28DDRA_SDQ29
DDRA_SDQ61
DDRA_SDQ15
DDRA_SDQ34
DDRA_SDQ36
DDRA_SDQ4
DDRA_SDQ0
DDRA_SDQ53
DDRA_SDQ47
DDRA_SDQ43
DDRA_SDQ39
DDRA_SDQ46
DDRA_SDQ33
DDRA_SDQ24
DDRA_SDQ54
DDRA_SDQ5DDRA_SDQ6
DDRA_SDQ8
DDRA_SDQ51
DDRA_SDQ9
DDRA_SDQ50
DDRA_SDQ12
DDRA_SDQ31
DDRA_SDQ7
DDRA_SDQ63DDRA_SDQ62
DDRA_SDQ42
DDRA_SDQ26
DDRA_SDQ58
DDRA_SDQ25
DDRA_SDQ32
DDRA_SDQ1
DDRA_SDQ44
DDRA_SDQ48
DDRA_SDQ11
DDRA_SDQ55
DDRA_SDQ2
DDRA_SDQ38
DDRA_SDQ27
DDRA_SDQ41
DDRA_SDQ10
DDRA_SDQ14
DDRA_SDQ49
DDRA_SDQ30
DDRA_SDQ35
DDRA_SDQ37
DDRA_SDQ52
DDRA_SDQ45
DDRA_SDQ57DDRA_SDQ56
DDRB_SDQ48
DDRB_SDQ39
DDRB_SDQ1
DDRB_SDQ42
DDRB_SDQ36
DDRB_SDQ2
DDRB_SDQ58
DDRB_SDQ33
DDRB_SDQ31
DDRB_SDQ21
DDRB_SDQ54
DDRB_SDQ62
DDRB_SDQ24
DDRB_SDQ15
DDRB_SDQ12
DDRB_SDQ49
DDRB_SDQ60
DDRB_SDQ43
DDRB_SDQ18
DDRB_SDQ34
DDRB_SDQ4
DDRB_SDQ61
DDRB_SDQ6
DDRB_SDQ25
DDRB_SDQ23
DDRB_SDQ57
DDRB_SDQ13
DDRB_SDQ0
DDRB_SDQ28
DDRB_SDQ16
DDRB_SDQ22
DDRB_SDQ19
DDRB_SDQ9
DDRB_SDQ50
DDRB_SDQ35
DDRB_SDQ46
DDRB_SDQ5
DDRB_SDQ37
DDRB_SDQ26
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ29
DDRB_SDQ14
DDRB_SDQ7
DDRB_SDQ51
DDRB_SDQ10
DDRB_SDQ59
DDRB_SDQ17
DDRB_SDQ44
DDRB_SDQ41
DDRB_SDQ38
DDRB_SDQ47
DDRB_SDQ32
DDRB_SDQ20
DDRB_SDQ52
DDRB_SDQ30
DDRB_SDQ63
DDRB_SDQ53
DDRB_SDQ40
DDRB_SDQ27
DDRB_SDQ45
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ11
DDRA_SWE#DDRA_SCAS#DDRA_SRAS#
DDRA_SBS2#DDRA_SBS1#DDRA_SBS0#
DDRA_SMA15
DDRA_SMA12
DDRA_SMA14DDRA_SMA13
DDRA_SMA11DDRA_SMA10
DDRA_SMA6
DDRA_SMA1
DDRA_SMA7
DDRA_SMA2DDRA_SMA3
DDRA_SMA8
DDRA_SMA5DDRA_SMA4
DDRA_SMA9
DDRA_SMA0
DDRA_SDM6
DDRA_SDM3
DDRA_SDM5DDRA_SDM4
DDRA_SDM2DDRA_SDM1
DDRA_SDM7
DDRA_SDM0
DDRA_SDQS0DDRA_SDQS0#
DDRA_SDQS3DDRA_SDQS3#
DDRA_SDQS2DDRA_SDQS2#
DDRA_SDQS1DDRA_SDQS1#
DDRA_SDQS4DDRA_SDQS4#DDRA_SDQS5DDRA_SDQS5#DDRA_SDQS6DDRA_SDQS6#
DDRA_SDQS7#DDRA_SDQS7
DDRA_CLK0#DDRA_CLK0
DDRA_SCS1#DDRA_SCS0#
DDRA_ODT0DDRA_ODT1
DDRA_CKE0DDRA_CKE1
MEM_MA_EVENT#
M_ZVDDIO
MEM_MA_RST#
DDRA_CLK1#DDRA_CLK1
DDRA_SDQ20
DDRA_SDQ22DDRA_SDQ21
DDRA_SDQ23
DDRA_SDQ17DDRA_SDQ16
DDRA_SDQ18
DDRB_SMA14
DDRB_SMA10
DDRB_SMA7
DDRB_SMA1
DDRB_SMA12
DDRB_SMA6
DDRB_SMA11
DDRB_SMA0
DDRB_SMA9
DDRB_SMA15
DDRB_SMA3
DDRB_SMA5
DDRB_SMA8
DDRB_SMA13
DDRB_SMA2
DDRB_SMA4
DDRB_SRAS#DDRB_SCAS#DDRB_SWE#
DDRB_ODT0DDRB_ODT1
DDRB_CKE1DDRB_CKE0
DDRB_CLK0#DDRB_CLK0
DDRB_SCS1#DDRB_SCS0#
DDRB_CLK1#
MEM_MB_RST#MEM_MB_EVENT#
DDRB_CLK1
DDRB_SDQS6DDRB_SDQS6#
DDRB_SDQS2DDRB_SDQS2#
DDRB_SDQS5DDRB_SDQS5#
DDRB_SDQS1DDRB_SDQS1#
DDRB_SDQS4DDRB_SDQS4#
DDRB_SDQS0DDRB_SDQS0#
DDRB_SDQS7DDRB_SDQS7#
DDRB_SDQS3DDRB_SDQS3#
DDRB_SDM6
DDRB_SDM4
DDRB_SDM2
DDRB_SDM0
DDRB_SDM5
DDRB_SDM3
DDRB_SDM1
DDRB_SDM7
DDRB_SBS0#DDRB_SBS1#DDRB_SBS2#
DDRA_SDQ19
MEM_MA_EVENT#
MEM_MB_EVENT# +MEM_VREF
DDRB_SDQ[63..0]
DDRA_SBS0#DDRA_SBS1#DDRA_SBS2#
DDRA_SDQS0DDRA_SDQS0#DDRA_SDQS1DDRA_SDQS1#DDRA_SDQS2DDRA_SDQS2#DDRA_SDQS3DDRA_SDQS3#DDRA_SDQS4DDRA_SDQS4#DDRA_SDQS5DDRA_SDQS5#DDRA_SDQS6DDRA_SDQS6#DDRA_SDQS7DDRA_SDQS7#
DDRA_CLK0DDRA_CLK0#
DDRA_CKE0DDRA_CKE1
DDRA_ODT0DDRA_ODT1
DDRA_SCS0#DDRA_SCS1#
DDRA_SRAS#DDRA_SCAS#DDRA_SWE#
MEM_MA_RST#MEM_MA_EVENT#
DDRA_CLK1DDRA_CLK1#
DDRA_SMA[15..0]
DDRA_SDM[7..0]
DDRA_SDQ[63..0]
DDRB_SBS0#DDRB_SBS1#DDRB_SBS2#
DDRB_SMA[15..0]
DDRB_SRAS#DDRB_SCAS#DDRB_SWE#
DDRB_CLK0DDRB_CLK0#
DDRB_CKE0DDRB_CKE1
DDRB_ODT0DDRB_ODT1
DDRB_SCS0#DDRB_SCS1#
MEM_MB_RST#MEM_MB_EVENT#
DDRB_CLK1DDRB_CLK1#
DDRB_SDQS7DDRB_SDQS7#
DDRB_SDQS6
DDRB_SDQS5
DDRB_SDQS4
DDRB_SDQS3
DDRB_SDQS2
DDRB_SDQS1
DDRB_SDQS0
DDRB_SDQS6#
DDRB_SDQS5#
DDRB_SDQS4#
DDRB_SDQS3#
DDRB_SDQS2#
DDRB_SDQS1#
DDRB_SDQS0#
DDRB_SDM[7..0]
+1.5V_APU
+MEM_VREF
+1.5V_APU
+1.5V_APU
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
FS1r2 DDRIII Memory I/F
Custom
6 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
FS1r2 DDRIII Memory I/F
Custom
6 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
FS1r2 DDRIII Memory I/F
Custom
6 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.
R41K_0402_1%
R41K_0402_1%
12
C46
0.1U_0402_16V7K
C46
0.1U_0402_16V7K1
2
R6 1K_0402_5%R6 1K_0402_5%1 2
MEMORY CHANNEL A
JCPU1B
LOTES_ACA-ZIF-109-P12-A_FS1R2ME@
MEMORY CHANNEL A
JCPU1B
LOTES_ACA-ZIF-109-P12-A_FS1R2ME@
M_ZVDDIOW21
M_VREFW20
MA_RESET_LH25
MA_WE_LW23 MA_CAS_LW24 MA_RAS_LV21
MA_CS_L1AA26 MA_CS_L0
V22
MA_ODT1AA27 MA_ODT0
Y25
MA_CKE1H27 MA_CKE0H28
MA_CLK_L1R24 MA_CLK_H1R23 MA_CLK_L0T22 MA_CLK_H0T21
MA_DQS_L7AA15 MA_DQS_H7AA14 MA_DQS_L6AA18 MA_DQS_H6AB18
MA_DQS_L5AA22 MA_DQS_H5AB22 MA_DQS_L4AD26 MA_DQS_H4AE26
MA_DQS_L3
E26 MA_DQS_H3E27 MA_DQS_L2H21 MA_DQS_H2J21 MA_DQS_L1H18
MA_DQS_H1G18 MA_DQS_L0H14 MA_DQS_H0G14
MA_DM7AC15 MA_DM6AD19 MA_DM5AC23 MA_DM4AD27 MA_DM3
F25 MA_DM2E21 MA_DM1J17 MA_DM0E14
MA_BANK2L23 MA_BANK1U21 MA_BANK0U24
MA_ADD15L20 MA_ADD14L21 MA_ADD13
AA25 MA_ADD12L24 MA_ADD11
M22 MA_ADD10U23 MA_ADD9M21 MA_ADD8N21 MA_ADD7N20 MA_ADD6N23
MA_ADD5N24 MA_ADD4P21 MA_ADD3P22 MA_ADD2R21 MA_ADD1R20
MA_ADD0U20
MA_DATA63Y13MA_DATA62AB14MA_DATA61AB16MA_DATA60Y17MA_DATA59AC13MA_DATA58AA13MA_DATA57Y15MA_DATA56AA16
MA_DATA55AD17MA_DATA54AD18MA_DATA53Y19MA_DATA52AB20MA_DATA51AA17MA_DATA50AC17MA_DATA49AC19MA_DATA48AA19
MA_DATA47AC21MA_DATA46AA21MA_DATA45AD24MA_DATA44AB24MA_DATA43AA20MA_DATA42Y21MA_DATA41AA23MA_DATA40Y23
MA_DATA39AC25MA_DATA38AB26MA_DATA37AD28MA_DATA36AE28MA_DATA35AA24MA_DATA34AD25MA_DATA33AC27MA_DATA32AB28
MA_DATA31F27MA_DATA30E28MA_DATA29H24MA_DATA28F23MA_DATA27G26MA_DATA26G27MA_DATA25E25MA_DATA24G24
MA_DATA23H22MA_DATA22G22MA_DATA21E20MA_DATA20G20MA_DATA19H23MA_DATA18J23MA_DATA17F21MA_DATA16H20
MA_DATA15F19MA_DATA14H19MA_DATA13H16MA_DATA12G16MA_DATA11J19MA_DATA10E19MA_DATA9F17MA_DATA8H17
MA_DATA7E15MA_DATA6F15MA_DATA5F13MA_DATA4H13MA_DATA3J15MA_DATA2H15MA_DATA1J13MA_DATA0E13
MA_EVENT_LT24
R5 1K_0402_5%R5 1K_0402_5%1 2
C451000P_0402_50V7KC451000P_0402_50V7K
1
2
R3 39.2_0402_1%R3 39.2_0402_1%
1 2
MEMORY CHANNEL B
JCPU1C
LOTES_ACA-ZIF-109-P12-A_FS1R2ME@
MEMORY CHANNEL B
JCPU1C
LOTES_ACA-ZIF-109-P12-A_FS1R2ME@
MB_EVENT_LT25 MB_RESET_LJ25
MB_WE_LV28 MB_CAS_LV27 MB_RAS_LV24
MB_CS_L1Y27 MB_CS_L0V25
MB_ODT1Y28 MB_ODT0
W27
MB_CKE1J27 MB_CKE0J26
MB_CLK_L1P28 MB_CLK_H1P27 MB_CLK_L0R27 MB_CLK_H0R26
MB_DQS_L7AG14 MB_DQS_H7AH14 MB_DQS_L6AG18 MB_DQS_H6AG17
MB_DQS_L5AF21 MB_DQS_H5AG21 MB_DQS_L4AG25 MB_DQS_H4AG24
MB_DQS_L3
A26 MB_DQS_H3B26 MB_DQS_L2D22 MB_DQS_H2E22 MB_DQS_L1D18
MB_DQS_H1E18 MB_DQS_L0B15 MB_DQS_H0C15
MB_DM7AD14 MB_DM6AH18 MB_DM5AG22 MB_DM4AF25 MB_DM3
C25 MB_DM2A22 MB_DM1A18 MB_DM0D14
MB_BANK2K28 MB_BANK1T28 MB_BANK0U27
MB_ADD15K24 MB_ADD14K25 MB_ADD13
W26 MB_ADD12K27 MB_ADD11L27 MB_ADD10U26 MB_ADD9L26 MB_ADD8
M25 MB_ADD7M24 MB_ADD6M27 MB_ADD5M28 MB_ADD4N26 MB_ADD3N27
MB_ADD2P25 MB_ADD1P24 MB_ADD0T27
MB_DATA63AF13MB_DATA62AE14MB_DATA61AF15MB_DATA60AG16MB_DATA59AD13MB_DATA58AG13MB_DATA57AD15MB_DATA56AG15
MB_DATA55AD16MB_DATA54AF17MB_DATA53AG19MB_DATA52AG20MB_DATA51AH16MB_DATA50AE16MB_DATA49AE18MB_DATA48AF19
MB_DATA47AD20MB_DATA46AD21MB_DATA45AD22MB_DATA44AD23MB_DATA43AH20MB_DATA42AE20MB_DATA41AH22MB_DATA40AE22
MB_DATA39AE24MB_DATA38AH24MB_DATA37AF27MB_DATA36AG27MB_DATA35AG23MB_DATA34AF23MB_DATA33AH26MB_DATA32AG26
MB_DATA31C27MB_DATA30D26MB_DATA29D24MB_DATA28B24MB_DATA27D28MB_DATA26B27MB_DATA25B25MB_DATA24E24
MB_DATA23B23MB_DATA22E23MB_DATA21B21MB_DATA20D20MB_DATA19A24MB_DATA18C23MB_DATA17B22MB_DATA16C21
MB_DATA15C19MB_DATA14B19MB_DATA13B17MB_DATA12E17MB_DATA11A20MB_DATA10B20MB_DATA9B18MB_DATA8C17
MB_DATA7A16MB_DATA6B16MB_DATA5C13MB_DATA4B13MB_DATA3E16MB_DATA2D16MB_DATA1B14MB_DATA0A14
R71K_0402_1%
R71K_0402_1%
12
www.chinafix.com
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HDT Debug conn
THERMTRIP shutdown temperature: 125 degree
Asserted as an input to force theprocessor into the HTC-active
state
Indicates to the FCH that a thermal trip has occurred. Its
assertion will cause the FCH to transition the system to S5
immediately
If not used, pins are left unconnected (DG ref.)
20101111
LVDS
HDMI
To FCH
To HDMI
To FCH
To LVDSTranslater
CPU TSI interface level shift
BSH111, the Vgs is:min = 0.4VMax = 1.3V
To EC
To EC
Route as differential
with APU_VDD_SEN_L
Place near APU
C61~C68 Close Connector
ESD request
11/14 Change net name
Close to Header
The VDDIO voltage source provides power to the DDR3 output
drivers and other
miscellaneous functions within the processor. VDDIO_SENSE is
internally tied to the
processor substrate and is used for sensing the memory
controller and interface
voltage level at the processor. VDDIO_SENSE can be routed as a
single-ended signal,
or it can be routed with VSS_SENSE as its complement.
SIT: For ESD requirement
APU_TEST18APU_TEST19APU_TEST20
APU_THERMTRIP#
APU_TDIAPU_TDOAPU_TCKAPU_TMSAPU_TRST#APU_DBRDYAPU_DBREQ#
DP_AUX_ZVSS
APU_SIDAPU_SIC
APU_DBRDY
APU_DBREQ#
APU_TEST18
APU_TEST19
APU_PWRGD
APU_RST#
APU_TDI
APU_TDO
APU_TCK
APU_TMS
ALERT_L
APU_THERMTRIP#
ML_VGA_AUXP
ML_VGA_AUXN
TEST25_HTEST25_L
APU_TEST35
APU_TEST24
APU_TEST31
FS1R2
APU_PWRGD
APU_RST#
APU_PROCHOT#
DP0_AUXP
DP0_AUXN
DP2_TXP0DP2_TXN0
DP2_TXP1DP2_TXN1
DP2_TXP2DP2_TXN2
DP2_TXP3DP2_TXN3
DP1_TXP0
DP1_TXP1DP1_TXN1
DP1_TXP2DP1_TXN2
DP1_TXP3DP1_TXN3
DP1_TXN0
ML_VGA_AUXPML_VGA_AUXN
APU_SIC
APU_SVC
APU_SVD
APU_SVT
APU_PWRGD
APU_SID
APU_TRST#
APU_TDI
APU_DBREQ#
APU_TRST#
ALERT_LAPU_SIDAPU_SIC
ALLOW_STOP
DP0_TXP0DP0_TXP0DP0_TXN0DP0_TXN0
DP0_AUXPDP0_AUXN
APU_TMSAPU_TCK
ALLOW_STOP
APU_CLKAPU_CLK#
APU_DISP_CLKAPU_DISP_CLK#
APU_RST#
DP0_TXP0_CDP0_TXN0_C
DP0_AUXP_C DP0_AUXN_C
APU_SVCAPU_SVD
DP_INT_PWM
H_PROCHOT#
H_THERMTRIP#
APU_SVT
APU_VDD_SEN_H
APU_VDDNB_SEN_H
ALLOW_STOP
EC_SMB_DA2_SUS
EC_SMB_CK2_SUS
APU_PROCHOT#
APU_VDD_SEN_L
DP0_HPD
HDMI_TX2+_CKHDMI_TX2-_CK
HDMI_TX1+_CKHDMI_TX1-_CK
HDMI_TX0+_CKHDMI_TX0-_CK
HDMI_CLK+_CKHDMI_CLK-_CK
ML_VGA_TXP0ML_VGA_TXN0
ML_VGA_TXP1ML_VGA_TXN1
ML_VGA_TXP2ML_VGA_TXN2
ML_VGA_TXP3ML_VGA_TXN3
HDMICLK_NB HDMIDAT_NB
ML_VGA_AUXP_C ML_VGA_AUXN_C
TMDS_B_HPD# FCH_CRT_HPD
APU_PWRGD
+1.5V
+1.5V_APU
+1.5V_APU
+1.5V_APU
+1.2VS
+1.5V_APU
+3VALW
+1.5VS +3VS
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
FS1r2 Display/MISC/HDT
Custom
7 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
FS1r2 Display/MISC/HDT
Custom
7 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
FS1r2 Display/MISC/HDT
Custom
7 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.
R34
30K_0402_1%
R34
30K_0402_1%
1 2
R52 300_0402_5%R52 300_0402_5%1 2R348 1K_0402_5%DEBUG@R348
1K_0402_5%DEBUG@1 2
C438
1000P_0402_50V7KESD@
C438
1000P_0402_50V7KESD@
1
2
C53 0.1U_0402_16V7KC53 0.1U_0402_16V7K1 2
C68 0.1U_0402_16V7KC68 0.1U_0402_16V7K1 2
T6 TEST POINT@T6 TEST POINT@
C465100P_0402_50V8J@ESD@
C465100P_0402_50V8J@ESD@
12
C56 0.1U_0402_16V7KC56 0.1U_0402_16V7K1 2
JHDT1
SAMTE_ASP-136446-07-BME@
JHDT1
SAMTE_ASP-136446-07-BME@
11
33
55
77
99
1111
1313
1515
1717
1919
22
44
66
88
1010
1212
1414
1616
1818
2020
R56 300_0402_5%R56 300_0402_5%1 2
R2310K_0402_5%R2310K_0402_5%
12
T9 TEST POINT@T9 TEST POINT@
RH141 0_0402_1% SHORT PAD@RH141 0_0402_1% SHORT PAD@1 2
R28 0_0402_1%SHORT PAD@
R28 0_0402_1%SHORT PAD@
1 2
R25 510_0402_1%R25 510_0402_1%1 2
T5 TEST POINT@T5 TEST POINT@
C50 0.1U_0402_16V7K LVDS@C50 0.1U_0402_16V7K LVDS@1 2
RP3
1K_0804_8P4R_5%SD309100180
RP3
1K_0804_8P4R_5%SD309100180
1 82 73 64 5
R221K_0402_5%
R221K_0402_5%
12
R9 1.8K_0402_5%R9 1.8K_0402_5%12
T2 TEST POINT@T2 TEST POINT@
R27 39.2_0402_1%R27 39.2_0402_1%1 2
C55 0.1U_0402_16V7KC55 0.1U_0402_16V7K1 2
G
DS
Q3
BSH111 1N_SOT23-3
G
DS
Q3
BSH111 1N_SOT23-3
2
13
C62 0.1U_0402_16V7KC62 0.1U_0402_16V7K1 2
R33
31.6K_0402_1%
R33
31.6K_0402_1%
1 2
R21 510_0402_1%R21 510_0402_1%1 2
C47 0.1U_0402_16V7KLVDS@ C47 0.1U_0402_16V7KLVDS@ 1 2
E
B
C
Q2
MMBT3904_NL_SOT23-3
E
B
C
Q2
MMBT3904_NL_SOT23-3
2
3 1
DIS
PLA
Y P
OR
T 2
DIS
PLA
Y P
OR
T 1
ANALOG/DISPLAY/MISC
SE
NS
E
RS
VD
JT
AG
CT
RL
SE
R.
CLK
TE
ST
DIS
PLA
Y P
OR
T M
ISC
.
DIS
PLA
Y P
OR
T 0
JCPU1D
LOTES_ACA-ZIF-109-P12-A_FS1R2ME@
DIS
PLA
Y P
OR
T 2
DIS
PLA
Y P
OR
T 1
ANALOG/DISPLAY/MISC
SE
NS
E
RS
VD
JT
AG
CT
RL
SE
R.
CLK
TE
ST
DIS
PLA
Y P
OR
T M
ISC
.
DIS
PLA
Y P
OR
T 0
JCPU1D
LOTES_ACA-ZIF-109-P12-A_FS1R2ME@
VDDR_SENSEB5 VDD_SENSEC4 VDDIO_SENSEA5 VDDNB_SENSEA4
VDDP_SENSEC5 VSS_SENSEB4
DBREQ_LH9 DBRDYG9 TRST_LF9 TMS
G10 TCKF10 TDOJ10 TDIH10
ALERT_LAF12 THERMTRIP_LAE12 PROCHOT_LAC10
PWROKAB12 RESET_LAF10
SIDAH12 SICAG12
SVTC3
SVDA3 SVCB3
DISP_CLKIN_LAA11 DISP_CLKIN_HAB11
CLKIN_LAD11 CLKIN_HAE11
DP2_TXN3J5 DP2_TXP3J6
DP2_TXN2K7 DP2_TXP2K8
DP2_TXN1L6 DP2_TXP1L5
DP2_TXN0L8 DP2_TXP0L9
DP1_TXN3F1 DP1_TXP3F2
DP1_TXN2G2 DP1_TXP2G3
DP1_TXN1H1 DP1_TXP1H2
DP1_TXN0H4 DP1_TXP0H5
DP0_TXN3J2 DP0_TXP3J3
DP0_TXN2K1 DP0_TXP2K2
DP0_TXN1K4 DP0_TXP1K5
DP0_TXN0L2 DP0_TXP0L3
RSVD4K21RSVD3Y12RSVD2AA10RSVD1Y10
TEST5R18TEST4P18
DMAACTIVE_LAC12FS1R2W10
TEST35AA12TEST32_LN19TEST32_HT19TEST31K22TEST30_LR19TEST30_HP19TEST28_LM10TEST28_HL10TEST25_LAD10TEST25_HAE10TEST24H12TEST20J12TEST19G12TEST18F12TEST17J11TEST16H11TEST15G11TEST14F11TEST10N18TEST9M18TEST6AD12
DP_AUX_ZVSSC1
DP_VARY_BLA6DP_DIGONB6DP_BLONC6
DP5_HPDG7DP4_HPDF7DP3_HPDE7DP2_HPDD7DP1_HPDE3DP0_HPDD3
DP5_AUXNG6DP5_AUXPG5
DP4_AUXNF6DP4_AUXPF5
DP3_AUXNE6DP3_AUXPE5
DP2_AUXND6DP2_AUXPD5
DP1_AUXNE2DP1_AUXPE1
DP0_AUXND2DP0_AUXPD1
T8TEST POINT@T8TEST POINT@
R10 1.8K_0402_5%R10 1.8K_0402_5%12
RP9
1K_0804_8P4R_5%
SD309100180RP9
1K_0804_8P4R_5%
SD3091001801 82 73 64 5
C61 0.1U_0402_16V7KC61 0.1U_0402_16V7K1 2
C64 0.1U_0402_16V7KC64 0.1U_0402_16V7K1 2
RP1
10K_0804_8P4R_5%
RP1
10K_0804_8P4R_5%
18273645
C51 0.1U_0402_16V7KC51 0.1U_0402_16V7K1 2
C58 0.1U_0402_16V7KC58 0.1U_0402_16V7K1 2
R32 10K_0402_5%R32 10K_0402_5%1 2
C66 0.1U_0402_16V7KC66 0.1U_0402_16V7K1 2
T4 TEST POINT@T4 TEST POINT@
C48 0.1U_0402_16V7K LVDS@C48 0.1U_0402_16V7K LVDS@1 2
T1 TEST POINT@T1 TEST POINT@
R11 1.8K_0402_5%R11 1.8K_0402_5%12
RP2
1K_0804_8P4R_5%SD309100180
RP2
1K_0804_8P4R_5%SD309100180
1 82 73 64 5
C60 0.1U_0402_16V7KC60 0.1U_0402_16V7K1 2
C54 0.1U_0402_16V7KC54 0.1U_0402_16V7K1 2
T10 TEST POINT@T10 TEST POINT@
C59 0.1U_0402_16V7KC59 0.1U_0402_16V7K1 2
R35 1K_0402_5%DEBUG@
R35 1K_0402_5%DEBUG@
1 2
R38 1K_0402_5%DEBUG@
R38 1K_0402_5%DEBUG@
1 2
T7TEST POINT@T7TEST POINT@
R15 150_0402_1%R15 150_0402_1%1 2
C57 0.1U_0402_16V7KC57 0.1U_0402_16V7K1 2
C63 0.1U_0402_16V7KC63 0.1U_0402_16V7K1 2
R596 1K_0402_5%R596 1K_0402_5%1 2
R30 300_0402_5%DEBUG@R30 300_0402_5%DEBUG@1 2
C69 0.1U_0402_16V4ZC69 0.1U_0402_16V4Z1 2
C52 0.1U_0402_16V7KC52 0.1U_0402_16V7K1 2
R8 1.8K_0402_5%R8 1.8K_0402_5%12
T3 TEST POINT@T3 TEST POINT@
R40 1K_0402_5%DEBUG@
R40 1K_0402_5%DEBUG@
1 2
R121K_0402_5%
R121K_0402_5%
12
R29 300_0402_5%R29 300_0402_5%1 2
R45 0_0402_1%SHORT PAD@
R45 0_0402_1%SHORT PAD@
1 2
C67 0.1U_0402_16V7KC67 0.1U_0402_16V7K1 2
G
DS
Q6
BSH111 1N_SOT23-3
G
DS
Q6
BSH111 1N_SOT23-3
2
13
C65 0.1U_0402_16V7KC65 0.1U_0402_16V7K1 2
C49 0.1U_0402_16V7KLVDS@ C49 0.1U_0402_16V7KLVDS@ 1 2
RH140 0_0402_1% SHORT PAD@RH140 0_0402_1% SHORT PAD@1 2
www.chinafix.com
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
across VDDIO and VSS
split
VDDR decoupling
40mil
3.2A
VDD+APU_CORE
VDDA+2.5VS 0.5A
VDDNB+APU_CORE_NB
VDDIO +1.5V
Consumption
60A
VDDP / VDDR+1.2VS
Power Name
5A / 3.5A
29A
VDDP0.22uF x 2180pF x 2
VDDIO_SUS (CPU side)22uF x 44.7uF x 40.22uF x 6 +2(split)180pF x
1 + 2(split)
VDDR0.22uF x 21nF x 4180pF x 2
Demo Board Capacitor
APU_CORE 22uF x 100.22uF x 20.01uF x 3180pF x 2
CORE_NB22uF x 210uF x 10.22uF x 2180pF x 3
VDDIO_SUS (DIMM x2)100uF x 20.1uF x 12
CORE_NB_CAP22uF x 2180pF x 1
VDDA4.7uF x 10.22uF x 13.3nF x 1
VDDP decoupling
Northbridge Power Pins
for Remote Decoupling
(330uF_6.3V_4.2L_ESR17m)*1=(SF000002Z00)
Need Short
Check
SIT:Need Short
+VDDA
+VDDNB_CAP
+APU_CORE
+APU_CORE_NB
+1.5V_APU
+1.2VS
+APU_CORE
+APU_CORE_NB
+1.5V_APU
+1.5V_APU
+1.5V
+APU_CORE
+APU_CORE_NB
+2.5VS
+1.2VS
+1.5V +1.5V_APU
+1.5V +1.5V_APU
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
FS1r2 PWR/GND
Custom
8 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
FS1r2 PWR/GND
Custom
8 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
FS1r2 PWR/GND
Custom
8 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.
J2
PAD-OPEN 4x4m
JUMP@J2
PAD-OPEN 4x4m
JUMP@
1 2
C1
08
0.2
2U
_0
40
2_
6.3
V6
K
C1
08
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C7
8
0.2
2U
_0
40
2_
6.3
V6
K
C7
8
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C9
92
2U
_0
60
3_
6.3
V6
MC
99
22
U_
06
03
_6
.3V
6M
1
2
C1
11
18
0P
_0
40
2_
50
V8
J
C1
11
18
0P
_0
40
2_
50
V8
J
1
2
JCPU1F
LOTES_ACA-ZIF-109-P12-A_FS1R2
ME@
JCPU1F
LOTES_ACA-ZIF-109-P12-A_FS1R2
ME@
VSS_72J8 VSS_71H7 VSS_70G8 VSS_69
F24 VSS_68K16 VSS_67A13 VSS_66A17 VSS_65
Y9 VSS_64Y22 VSS_63Y20 VSS_62Y11 VSS_61W7 VSS_60W4 VSS_59
W16 VSS_58V9 VSS_57
V19 VSS_56AF11 VSS_55M11 VSS_54
L7 VSS_53L19 VSS_52
AC11 VSS_51K9 VSS_50
K14 VSS_49K11 VSS_48
J7 VSS_47J4 VSS_46
J24 VSS_45J22 VSS_44G4 VSS_43
G25 VSS_42G23 VSS_41G21 VSS_40G19 VSS_39G17 VSS_38G15 VSS_37G13
VSS_36F28 VSS_35F26 VSS_34F22 VSS_33F20 VSS_32F18 VSS_31F16
VSS_30F14 VSS_29E9 VSS_28E4 VSS_27
D27 VSS_26D25 VSS_25D23 VSS_24D19 VSS_23D17 VSS_22D15 VSS_21D13
VSS_20C28 VSS_19C26 VSS_18C24 VSS_17C22 VSS_16C20 VSS_15
C2 VSS_14C16 VSS_13C14 VSS_12
B7 VSS_11AH25 VSS_10AH23 VSS_9AF24 VSS_8AE21 VSS_7AC22 VSS_6AB17
VSS_5
A15 VSS_4W18 VSS_3
R7 VSS_2L4 VSS_1
J20
VSS_143W12VSS_142K18VSS_141E8VSS_140C7VSS_139P11VSS_138W14VSS_137D21VSS_136C18VSS_135P9VSS_134AH21VSS_133AH19VSS_132AH17VSS_131AH15VSS_130AH13VSS_129AG7VSS_128AG4VSS_127AF9VSS_126AF28VSS_125AF26VSS_124AF22VSS_123AF20VSS_122AF18VSS_121AF16VSS_120AF14VSS_119AE7VSS_118AE4VSS_117AE27VSS_116AE25VSS_115AE23VSS_114AE19VSS_113V11VSS_112U7VSS_111U4VSS_110U18VSS_109U10VSS_108T9VSS_107T11VSS_106R4VSS_105R10VSS_104N7VSS_103N4VSS_102N10VSS_101M9VSS_100AE17VSS_99AE15VSS_98AE13VSS_97AD9VSS_96AC7VSS_95AC4VSS_94AC28VSS_93AC26VSS_92AC24VSS_91AC20VSS_90AC18VSS_89AC16VSS_88AC14VSS_87AB9VSS_86AB27VSS_85AB25VSS_84AB23VSS_83AB21VSS_82AB19VSS_81AB15VSS_80AB13VSS_79AA7VSS_78AA4VSS_77A7VSS_76A25VSS_75A23VSS_74A21VSS_73A19
C1
12
10
00
P_
04
02
_5
0V
7K
C1
12
10
00
P_
04
02
_5
0V
7K
1
2
C7
7
0.2
2U
_0
40
2_
6.3
V6
K
C7
7
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C1
20
4.7
U_
04
02
_6
.3V
6M
C1
20
4.7
U_
04
02
_6
.3V
6M
1
2
+C
98
33
0U
_2
.5V
_M
+C
98
33
0U
_2
.5V
_M
1
2
J3
PAD-OPEN 4x4m
JUMP@J3
PAD-OPEN 4x4m
JUMP@
1 2
C7
1
0.0
1U
_0
40
2_
16
V7
K
C7
1
0.0
1U
_0
40
2_
16
V7
K
1
2
C9
2
0.2
2U
_0
40
2_
6.3
V6
K
C9
2
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C8
8
4.7
U_
06
03
_6
.3V
6K
C8
8
4.7
U_
06
03
_6
.3V
6K
1
2
C9
7
18
0P
_0
40
2_
50
V8
J
C9
7
18
0P
_0
40
2_
50
V8
J
1
2
C1
07
18
0P
_0
40
2_
50
V8
J
C1
07
18
0P
_0
40
2_
50
V8
J
1
2
C9
0
4.7
U_
06
03
_6
.3V
6K
C9
0
4.7
U_
06
03
_6
.3V
6K
1
2
C8
5
22
U_
06
03
_6
.3V
6M
C8
5
22
U_
06
03
_6
.3V
6M
1
2
L1FBMA-L11-201209-221LMA30T_0805L1FBMA-L11-201209-221LMA30T_0805
12
C7
6
0.0
1U
_0
40
2_
16
V7
K
C7
6
0.0
1U
_0
40
2_
16
V7
K
1
2
C7
5
0.2
2U
_0
40
2_
6.3
V6
K
C7
5
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C1
01
0.2
2U
_0
40
2_
6.3
V6
K
C1
01
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C7
0
0.2
2U
_0
40
2_
6.3
V6
K
C7
0
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C8
9
4.7
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06
03
_6
.3V
6K
C8
9
4.7
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06
03
_6
.3V
6K
1
2
C9
1
0.2
2U
_0
40
2_
6.3
V6
K
C9
1
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C1
02
0.2
2U
_0
40
2_
6.3
V6
K
C1
02
0.2
2U
_0
40
2_
6.3
V6
K
1
2C
94
0.2
2U
_0
40
2_
6.3
V6
K
C9
4
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C1
18
33
00
P_
04
02
_5
0V
7K
C1
18
33
00
P_
04
02
_5
0V
7K
12
C1
17
0.2
2U
_0
40
2_
6.3
V6
K
C1
17
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C1
04
18
0P
_0
40
2_
50
V8
J
C1
04
18
0P
_0
40
2_
50
V8
J
1
2
C1
16
0.2
2U
_0
40
2_
6.3
V6
K
C1
16
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C7
3
18
0P
_0
40
2_
50
V8
J
C7
3
18
0P
_0
40
2_
50
V8
J
1
2
C8
4
22
U_
06
03
_6
.3V
6M
C8
4
22
U_
06
03
_6
.3V
6M
1
2
C9
5
0.2
2U
_0
40
2_
6.3
V6
K
C9
5
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C1
00
22
U_
06
03
_6
.3V
6M
C1
00
22
U_
06
03
_6
.3V
6M
1
2
C8
0
18
0P
_0
40
2_
50
V8
J
C8
0
18
0P
_0
40
2_
50
V8
J
1
2
C1
14
18
0P
_0
40
2_
50
V8
J
C1
14
18
0P
_0
40
2_
50
V8
J
1
2
C7
2
0.0
1U
_0
40
2_
16
V7
K
C7
2
0.0
1U
_0
40
2_
16
V7
K
1
2
C7
9
18
0P
_0
40
2_
50
V8
J
C7
9
18
0P
_0
40
2_
50
V8
J
1
2
C1
10
18
0P
_0
40
2_
50
V8
J
C1
10
18
0P
_0
40
2_
50
V8
J
1
2
C8
7
4.7
U_
06
03
_6
.3V
6K
C8
7
4.7
U_
06
03
_6
.3V
6K
1
2
JCPU1E
LOTES_ACA-ZIF-109-P12-A_FS1R2ME@
JCPU1E
LOTES_ACA-ZIF-109-P12-A_FS1R2ME@
VDDAAB10
VDDP_5AH7 VDDP_4AH3 VDDP_3AH4 VDDP_2AH5 VDDP_1AH6
VDDIO_18AA28 VDDIO_17
P26 VDDIO_16P23 VDDIO_15P20 VDDIO_14N28 VDDIO_13N25 VDDIO_12N22
VDDIO_11M26 VDDIO_10M23 VDDIO_9M20 VDDIO_8L28 VDDIO_7L25 VDDIO_6L22
VDDIO_5K26 VDDIO_4K23 VDDIO_3J28 VDDIO_2K20 VDDIO_1H26
VDDNB_12C10 VDDNB_11E11 VDDNB_10E10 VDDNB_9A11 VDDNB_8
A8 VDDNB_7A10 VDDNB_6
A9 VDDNB_5C9 VDDNB_4
B12 VDDNB_3B8 VDDNB_2
D10 VDDNB_1C8
VDD_31M19 VDD_30
H3 VDD_29K10 VDD_28
P3 VDD_27R1 VDD_26
AC1 VDD_25AB6 VDD_24AA1 VDD_23Y14 VDD_22T18 VDD_21W1 VDD_20V6
VDD_19
L18 VDD_18F3 VDD_17V3 VDD_16
V18 VDD_15V10 VDD_14
K6 VDD_13M3 VDD_12
K17 VDD_11K3 VDD_10
K19 VDD_9J9 VDD_8
J18 VDD_7J16 VDD_6P10 VDD_5
P6 VDD_4J14 VDD_3
J1 VDD_2H6 VDD_1F8
VDDR_4AH10VDDR_3AH9VDDR_2AH8VDDR_1AG10
VDDIO_36G28VDDIO_35Y24VDDIO_34W28VDDIO_33W25VDDIO_32W22VDDIO_31V26VDDIO_30V23VDDIO_29V20VDDIO_28R22VDDIO_27R25VDDIO_26R28VDDIO_25T20VDDIO_24Y26VDDIO_23U28VDDIO_22U25VDDIO_21U22VDDIO_20T26VDDIO_19T23
VDDNB_CAP_2K12VDDNB_CAP_1K13
VDDNB_23B9VDDNB_22E12VDDNB_21B10VDDNB_20A12VDDNB_19B11VDDNB_18D11VDDNB_17D12VDDNB_16D8VDDNB_15D9VDDNB_14C12VDDNB_13C11
VDD_62L11VDD_61AF3VDD_60AF6VDD_59F4VDD_58D4VDD_57Y3VDD_56Y18VDD_55Y16VDD_54U1VDD_53U19VDD_52T6VDD_51T3VDD_50N1VDD_49N11VDD_48M6VDD_47Y6VDD_46L1VDD_45AE1VDD_44AD6VDD_43AD3VDD_42AB3VDD_41W19VDD_40W17VDD_39W15VDD_38W13VDD_37W11VDD_36U11VDD_35G1VDD_34H8VDD_33T10VDD_32R11
C1
19
0.2
2U
_0
40
2_
6.3
V6
K
C1
19
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C1
06
18
0P
_0
40
2_
50
V8
J
C1
06
18
0P
_0
40
2_
50
V8
J
1
2
C9
6
0.2
2U
_0
40
2_
6.3
V6
K
C9
6
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C1
05
18
0P
_0
40
2_
50
V8
J
C1
05
18
0P
_0
40
2_
50
V8
J
1
2
C8
3
22
U_
06
03
_6
.3V
6M
C8
3
22
U_
06
03
_6
.3V
6M
1
2
C9
3
0.2
2U
_0
40
2_
6.3
V6
K
C9
3
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C1
09
0.2
2U
_0
40
2_
6.3
V6
K
C1
09
0.2
2U
_0
40
2_
6.3
V6
K
1
2
C7
4
18
0P
_0
40
2_
50
V8
J
C7
4
18
0P
_0
40
2_
50
V8
J
1
2
C8
1
18
0P
_0
40
2_
50
V8
J
C8
1
18
0P
_0
40
2_
50
V8
J
1
2
C8
6
22
U_
06
03
_6
.3V
6M
C8
6
22
U_
06
03
_6
.3V
6M
1
2
www.chinafix.com
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
standard H:8mm
15mil15mil
Place near DIMM1
DDRA_SDQ36
DDRA_SDQ63
DDRA_SDQ26
DDRA_SDQS6
DDRA_SDQ2
DDRA_SDQ5
DDRA_SDQ22
DDRA_SDQ25
DDRA_SDQ35
DDRA_SMA12
DDRA_SDQ14
DDRA_SDQS0#
DDRA_SDQS4
DDRA_SDM6
DDRA_SDQ42
DDRA_CKE1
DDRA_SMA15
DDRA_SDQ31
DDRA_CKE0
DDRA_SDQ12
DDRA_SDQ59
DDRA_SMA3
DDRA_SA0
DDRA_SDQ6
DDRA_SCS1#
DDRA_SDQ39
DDRA_SBS1#
DDRA_SWE#
DDRA_SMA7
DDRA_SDQS0
DDRA_SMA0
DDRA_SDM2
DDRA_SDQS7
DDRA_SDM1
DDRA_SDQ57
DDRA_SDQ46
DDRA_SDQ0
DDRA_SDQ28
DDRA_SDM0
DDRA_SDQS5#
DDRA_SDQ51
DDRA_SDQ19
DDRA_SDM4
DDRA_SDQ4
DDRA_SDQ30
DDRA_SDQS2
DDRA_SDQ44
DDRA_SRAS#
DDRA_SDQ33
DDRA_SDQ58
DDRA_SDM5
DDRA_SDQS3
DDRA_SMA8
DDRA_SCS0#
DDRA_SDQ10
DDRA_SMA6
DDRA_SMA10
DDRA_SDQ3
MEM_MA_RST#
DDRA_SDQS7#
DDRA_SDQS6#
DDRA_SDQ1
DDRA_SDQ40
DDRA_SMA9
DDRA_SDQ16
DDRA_SDQ29
DDRA_SDQS4#
DDRA_SDQ52
DDRA_SDM3
DDRA_SDQS5
DDRA_SDQ54
DDRA_SDQ49
DDRA_SBS2#
DDRA_SDQ45
DDRA_SDQ9
DDRA_SDM7
DDRA_SMA1
DDRA_SDQ7
DDRA_SDQ13
DDRA_SDQ20
DDRA_SDQ60
DDRA_SBS0#
DDRA_SCAS# DDRA_ODT0
DDRA_SDQ37
DDRA_SMA5
DDRA_SDQS1#
DDRA_SDQ55
DDRA_SMA4
DDRA_SDQ21
DDRA_SDQ62
DDRA_SDQ24
DDRA_SDQ15
DDRA_SDQ56
DDRA_SDQ23
DDRA_SDQ53
DDRA_SDQ47
DDRA_ODT1
DDRA_SDQ18
DDRA_SDQ43
DDRA_SDQ34
DDRA_CLK1DDRA_CLK1#
DDRA_SDQ48
DDRA_SDQS2#
DDRA_SDQ11
DDRA_SDQ38
DDRA_CLK0DDRA_CLK0#
DDRA_SDQ32
DDRA_SDQS3#
DDRA_SMA13
DDRA_SMA11
DDRA_SDQ50
DDRA_SDQ8
DDRA_SDQS1
DDRA_SDQ61
DDRA_SMA2
DDRA_SDQ41
DDRA_SDQ17
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SMA[0..15]
+VREF_DQ +VREF_CA
MEM_MA_EVENT#
DDRA_SDQ27
DDRA_SMA14
DDRA_CKE0
DDRA_SCS1#
DDRA_SBS1#
DDRA_SWE#
DDRA_SRAS#
DDRA_SCS0#
MEM_MA_RST#
DDRA_SBS2#
DDRA_SBS0#
DDRA_SCAS# DDRA_ODT0
DDRA_ODT1
DDRA_CLK1# DDRA_CLK1 DDRA_CLK0
DDRA_CLK0#
DDRA_CKE1
FCH_SDATA0 FCH_SCLK0
DDRA_SDQS3
DDRA_SDQS0
DDRA_SDQS3#
DDRA_SDQS0#
DDRA_SDQS5 DDRA_SDQS5#
DDRA_SDQS7 DDRA_SDQS7#
DDRA_SDQS1#DDRA_SDQS1
DDRA_SDQS2#DDRA_SDQS2
DDRA_SDQS4#DDRA_SDQS4
DDRA_SDQS6#DDRA_SDQS6
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SMA[0..15]
MEM_MA_EVENT#
+0.75VS
+3VS
+1.5V +1.5V+VREF_DQ
+VREF_CA
+1.5V
+VREF_DQ
+1.5V
+VREF_CA
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
DDRIII SO-DIMM 1
Custom
9 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
DDRIII SO-DIMM 1
Custom
9 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
DDRIII SO-DIMM 1
Custom
9 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.
C127
0.1
U_
04
02
_1
6V
4Z
C127
0.1
U_
04
02
_1
6V
4Z
1
2
C1312.2U_0603_6.3V6K
C1312.2U_0603_6.3V6K
1
2
C122
0.1U_0402_16V4Z
C122
0.1U_0402_16V4Z
1
2
C126
0.1U_0402_16V4Z
C126
0.1U_0402_16V4Z
1
2
C123
0.1U_0402_16V4Z
C123
0.1U_0402_16V4Z
1
2
C121
0.1U_0402_16V4Z
C121
0.1U_0402_16V4Z
1
2
JDIMM1
FOX_AS0A626-U8SN-7FME@
JDIMM1
FOX_AS0A626-U8SN-7FME@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851
DQ2352
DQ1953
VSS1954
VSS2055
DQ2856
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261
DQS#362
DM363
DQS364
VSS2365
VSS2466
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83
A1184
A985
A786
VDD587
VDD688
A889
A690
CKE073
CKE174
VDD175
VDD276
NC177
A1578
BA279
A1480
VDD381
VDD482
A591
A492
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105
VDD12106
A10/AP107
BA1108
BA0109
RAS#110
VDD13111
VDD14112
WE#113
S0#114
CAS#115
ODT0116
VDD15117
VDD16118
A13119
ODT1120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133
VSS30134
DQS#4135
DM4136
DQS4137
VSS31138
VSS32139
DQ38140
DQ34141
DQ39142
DQ35143
VSS33144
VSS34145
DQ44146
DQ40147
DQ45148
DQ41149
VSS35150
VSS36151
DQS#5152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165
DQ53166
VSS41167
VSS42168
DQS#6169
DM6170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175
DQ55176
DQ51177
VSS45178
VSS46179
DQ60180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185
DQS#7186
DM7187
DQS7188
VSS49189
VSS50190
DQ58191
DQ62192
DQ59193
DQ63194
VSS51195
VSS52196
SA0197
EVENT#198
VDDSPD199
SDA200
SA1201
SCL202
VTT1203
VTT2204
G1205
G2206
C130
10
00
P_
04
02
_5
0V
7K
C130
10
00
P_
04
02
_5
0V
7K
1
2
C124
0.1U_0402_16V4Z
C124
0.1U_0402_16V4Z
1
2
C125
0.1U_0402_16V4Z
C125
0.1U_0402_16V4Z
1
2
C1320.1U_0402_16V4ZC1320.1U_0402_16V4Z
1
2
C129
0.1
U_
04
02
_1
6V
4Z
C129
0.1
U_
04
02
_1
6V
4Z
1
2
R651K_0402_1%R651K_0402_1%
12
R681K_0402_1%R681K_0402_1%
12
R661K_0402_1%R661K_0402_1%
12
R671K_0402_1%R671K_0402_1%
12
C128
10
00
P_
04
02
_5
0V
7K
C128
10
00
P_
04
02
_5
0V
7K
1
2
www.chinafix.com
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Standard H:4mm
15mil 15mil
Place near DIMM2
SIT:1/26 change to POLY
DDRB_SDQS6
DDRB_SDQ26
DDRB_SDQ63
DDRB_SDQ36
DDRB_SDQ35
DDRB_SDQ25
DDRB_SDQ22
DDRB_SDQ5
DDRB_SDQ2
DDRB_SDQS0#
DDRB_SDQ14
DDRB_SMA12
DDRB_CKE1
DDRB_SDQ42
DDRB_SDM6
DDRB_SDQS4
DDRB_SMA15
DDRB_SDQ27
DDRB_SDQ12
DDRB_CKE0
DDRB_SDQ31
DDRB_SMA3
DDRB_SDQ59
DDRB_SBS1#
DDRB_SDQ39
DDRB_SCS1#
DDRB_SDQ6
DDRB_SA0
DDRB_SDQS0
DDRB_SMA7
DDRB_SWE#
DDRB_SMA0
DDRB_SDM2
DDRB_SDQ0
DDRB_SDQ46
DDRB_SDQ57
DDRB_SDM1
DDRB_SDQS7
DDRB_SDM0
DDRB_SDQ28
DDRB_SDM4
DDRB_SDQ19
DDRB_SDQ51
DDRB_SDQS5#
DDRB_SDQS2
DDRB_SDQ30
DDRB_SDQ4
DDRB_SDQ33
DDRB_SRAS#
DDRB_SDQ44
DDRB_SDQS3
DDRB_SDM5
DDRB_SDQ58
DDRB_SMA8
DDRB_SCS0#
DDRB_SMA10
DDRB_SMA6
DDRB_SDQ10
DDRB_SDQS6#
DDRB_SDQS7#
MEM_MB_RST#
DDRB_SDQ3
DDRB_SDQ16
DDRB_SMA9
DDRB_SDQ1
DDRB_SDQS4#
DDRB_SDQ29
DDRB_SDQ49
DDRB_SDQ54
DDRB_SDQS5
DDRB_SDM3
DDRB_SDQ9
DDRB_SDQ45
DDRB_SBS2#
DDRB_SDQ20
DDRB_SDQ13
DDRB_SDQ7
DDRB_SMA1
DDRB_SDM7
DDRB_SBS0#
DDRB_SDQ60
DDRB_SDQ37
DDRB_ODT0DDRB_SCAS#
DDRB_SDQ55
DDRB_SMA14
DDRB_SDQS1#
DDRB_SMA5
DDRB_SDQ21
DDRB_SMA4
DDRB_SDQ62
DDRB_SDQ15
DDRB_SDQ24
DDRB_SDQ47
DDRB_SDQ53
DDRB_SDQ23
DDRB_SDQ56
DDRB_SDQ43
DDRB_SDQ18
DDRB_ODT1
DDRB_CLK1#DDRB_CLK1
DDRB_SDQ34
DDRB_SDQS2#
DDRB_SDQ48
DDRB_CLK0#DDRB_CLK0
DDRB_SDQ11
DDRB_SDQ50
DDRB_SMA11
DDRB_SMA13
DDRB_SDQS3#
DDRB_SDQ32
DDRB_SMA2
DDRB_SDQ61
DDRB_SDQS1
DDRB_SDQ8
DDRB_SDQ17
DDRB_SDQ41DDRB_SDQ40
DDRB_SDQ38
DDRB_SDQ52
+VREF_DQ +VREF_CA
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
DDRB_SMA[0..15]
MEM_MB_EVENT#
DDRB_SCS1#
DDRB_CKE0
DDRB_SCS0#
DDRB_SRAS#
DDRB_SWE#
DDRB_SBS1#
DDRB_SCAS#
DDRB_SBS0#
DDRB_SBS2#
MEM_MB_RST#
DDRB_CLK1 DDRB_CLK1#
DDRB_ODT1
DDRB_ODT0
DDRB_CKE1
DDRB_CLK0#DDRB_CLK0
DDRB_SDQS2DDRB_SDQS2#
DDRB_SDQS4DDRB_SDQS4#
DDRB_SDQS6DDRB_SDQS6#
DDRB_SDQS0# DDRB_SDQS0
DDRB_SDQS3# DDRB_SDQS3
DDRB_SDQS5 DDRB_SDQS5#
DDRB_SDQS7 DDRB_SDQS7#
FCH_SDATA0 FCH_SCLK0
DDRB_SDQS1#DDRB_SDQS1
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
DDRB_SMA[0..15]
MEM_MB_EVENT#
+0.75VS
+1.5V+1.5V
+3VS
+VREF_DQ
+VREF_CA
+VREF_DQ+VREF_CA
+1.5V
+0.75VS+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
DDRIII SO-DIMM 2
Custom
10 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
DDRIII SO-DIMM 2
Custom
10 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L 0.1
DDRIII SO-DIMM 2
Custom
10 57Friday, April 12, 2013
2012/11/13 2013/11/12
Compal Electronics, Inc.
C141
0.1U_0402_16V4Z
C141
0.1U_0402_16V4Z
1
2
C138
0.1U_0402_16V4Z
C138
0.1U_0402_16V4Z
1
2
C142
0.1U_0402_16V4Z
C142
0.1U_0402_16V4Z
1
2
C140
0.1U_0402_16V4Z
C140
0.1U_0402_16V4Z
1
2
R71 10K_0402_5%R71 10K_0402_5%1 2
C1
34
10
00
P_
04
02
_5
0V
7K
C1
34
10
00
P_
04
02
_5
0V
7K
1
2
C137
0.1U_0402_16V4Z
C137
0.1U_0402_16V4Z
1
2
C1
33
0.1
U_
04
02
_1
6V
4Z
C1
33
0.1
U_
04
02
_1
6V
4Z
1
2
C136
10
00
P_
04
02
_5
0V
7K
C136
10
00
P_
04
02
_5
0V
7K
1
2
JDIMM2
FOX_AS0A626-U4SN-7F
ME@
JDIMM2
FOX_AS0A626-U4SN-7F
ME@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851
DQ2352
DQ1953
VSS1954
VSS2055
DQ2856
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261
DQS#362
DM363
DQS364
VSS2365
VSS2466
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83
A1184
A985
A786
VDD587
VDD688
A889
A690
CKE073
CKE174
VDD175
VDD276
NC177
A1578
BA279
A1480
VDD381
VDD482
A591
A492
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105
VDD12106
A10/AP107
BA1108
BA0109
RAS#110
VDD13111
VDD14112
WE#113
S0#114
CAS#115
ODT0116
VDD15117
VDD16118
A13119
ODT1120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133
VSS30134
DQS#4135
DM4136
DQS4137
VSS31138
VSS32139
DQ38140
DQ34141
DQ39142
DQ35143
VSS33144
VSS34145
DQ44146
DQ40147
DQ45148
DQ41149
VSS35150
VSS36151
DQS#5152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165
DQ53166
VSS41167
VSS42168
DQS#6169
DM6170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175
DQ55176
DQ51177
VSS45178
VSS46179
DQ60180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185
DQS#7186
DM7187
DQS7188
VSS49189
VSS50190
DQ58191
DQ62192
DQ59193
DQ63194
VSS51195
VSS52196
SA0197
EVENT#198
VDDSPD199
SDA200
SA1201
SCL202
VTT1203
VTT2204
G1205
G2206
+ C145@
SGA00004L00
220U_D2_2VY_R15M
+ C145@
SGA00004L00
220U_D2_2VY_R15M
1
2
C1444.7U_0603_6.3V6KC1444.7U_0603_6.3V6K
1
2
C1
35
0.1
U_
04
02
_1
6V
4Z
C1
35
0.1
U_
04
02
_1
6V
4Z
1
2
C1430.1U_0402_16V4Z
C1430.1U_0402_16V4Z
1
2
C139
0.1U_0402_16V4Z
C139
0.1U_0402_16V4Z
1
2
www.chinafix.com
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
APU
APU
R74/ C146 close to FCH
W=20mils
for Clear CMOS
VGA
Close to HUDSON-M2/3
Need OPEN
DVT change
Remove 0 ohm on PVT
A76M Bolton M3
LAN
WLAN
SIT: For EMI Request
SVT: For EMI Request
APU_PWRGD_RAPU_PROCHOT#_R
32K_X2
32K_X1
25M_X2
CLK_CALRN
+RTCBATT_R
A_RST#
UMI_RXP0_CUMI_RXN0_CUMI_RXP1_CUMI_RXN1_CUMI_RXP2_CUMI_RXN2_CUMI_RXP3_CUMI_RXN3_C
PCIE_CALRPPCIE_CALRN
32K_X1
32K_X225M_X1
25M_X2
25M_X1GCLK_PCH_25MHZ
32K_X1 GCLK_32K
UMI_TXP0UMI_TXN0UMI_TXP1UMI_TXN1UMI_TXP2UMI_TXN2UMI_TXP3UMI_TXN3
UMI_RXP0UMI_RXN0UMI_RXP1UMI_RXN1UMI_RXP2UMI_RXN2UMI_RXP3UMI_RXN3
CLK_PCIE_VGA#CLK_PCIE_VGA
APU_DISP_CLKAPU_DISP_CLK#
APU_CLKAPU_CLK#
PCI_CLK4 PCI_CLK3
PCI_CLK1
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
ALLOW_STOP
APU_RST#
APU_PROCHOT#
LPC_CLK1
RTC_CLK
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
SERIRQ
LPC_FRAME#
CLK_PCI_EC
APU_PWRGD
PLT_RST#
APU_PCIE_RST#
CLK_PCIE_LANCLK_PCIE_LAN#
CLK_PCIE_WLAN1CLK_PCIE_WLAN1#
GCLK_PCH_25MHZ
GCLK_32K
+VDDAN_11_PCIE
+1.1VS_CKVDD
+RTCBATT
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L0.1
FCH PCIE/CLK/PCI/LPC/RTC
Custom
11 57Friday, April 12, 2013
2012/11/13 2013/11/12Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L0.1
FCH PCIE/CLK/PCI/LPC/RTC
Custom
11 57Friday, April 12, 2013
2012/11/13 2013/11/12Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED
FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR
WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
VALGD MB L0.1
FCH PCIE/CLK/PCI/LPC/RTC
Custom
11 57Friday, April 12, 2013
2012/11/13 2013/11/12Compal Electronics, Inc.
C157
10P_0402_50V8J
NOGCLK@C157
10P_0402_50V8J
NOGCLK@1 2
R76 2K_0402_1%R76 2K_0402_1%1 2
R73 0_0402_1%SHORT PAD@
R73 0_0402_1%SHORT PAD@1 2
R75 590_0402_1%R75 590_0402_1%1 2
C152 0.1U_0402_16V7KC152 0.1U_0402_16V7K1 2
R7820M_0402_5%
NO
GC
LK
@
R7820M_0402_5%
NO
GC
LK
@1
2
Y1
32.768KHZ_12.5PF_CM31532768DZFT
NO
GC
LK
@
Y1
32.768KHZ_12.5PF_CM31532768DZFT
NO
GC
LK
@ 12
R920_0402_1%
SHORT PAD@
R920_0402_1%
SHORT PAD@12
RF1 0_0402_1%SHORT PAD@
RF1 0_0402_1%SHORT PAD@1 2
R86 0_0402_5%DEBUG@R86 0_0402_5%DEBUG@1 2
C155
20P_0402_50V8J
NOGCLK@
C155
20P_0402_50V8J
NOGCLK@
C163 10P_0402_50V8JEMI@
C163 10P_0402_50V8JEMI@
1 2
C147 0.1U_0402_16V7KC147 0.1U_0402_16V7K1 2
C156
20P_0402_50V8J
NOGCLK@
C156
20P_0402_50V8J
NOGCLK@
R89
1M_0402_5%
NOGCLK@
R89
1M_0402_5%
NOGCLK@
C150 0.1U_0402_16V7KC150 0.1U_0402_16V7K1 2
T27 TEST POINT@T27 TEST POINT@
C158
1U
_0
40
2_
6.3
V6
K
C158
1U
_0
40
2_
6.3
V6
K1
2
C153 0.1U_0402_16V7KC153 0.1U_0402_16V7K1 2
R207 0_0402_5%GCLK@
R207 0_0402_5%GCLK@
1 2
C154 0.1U_0402_16V7KC154 0.1U_0402_16V7K1 2C148
0.1U_0402_16V7KC148 0.1U_0402_16V7K1 2
R88 510_0402_5%R88 510_0402_5%
1 2
R85 33_0402_5%
EMI@
R85 33_0402_5%
EMI@1 2
HUDSON-2
PCI CLKS
PCI EXPRESS INTERFACES
PCI INTERFACE
CLOCK GENERATOR
LPC
APU
S5 PLUS
U1A
21807-A13-HUDSON-M3_FCBGA656
SA000066K70
HUDSON-2
PCI CLKS
PCI EXPRESS INTERFACES
PCI INTERFACE
CLOCK GENERATOR
LPC
APU
S5 PLUS
U1A
21807-A13-HUDSON-M3_FCBGA656
SA000066K70
PCIE_RST#AE2
A_RST#AD5
UMI_TX0PAE30
UMI_TX0NAE32
UMI_TX1PAD33
UMI_TX1NAD31
UMI_TX2PAD28
UMI_TX2NAD29
