Comparison of 6H-SiC, 3C-SiC, and Si for power devices

645 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 40, NO. 3. MARCH 1993

Comparison of 6H-SiC, 3C-SiC, and Si for Power Devices

Mohit Bhatnagar and B. Jayant Baliga, Fellow, IEEE

Abstract-This paper defines the drift region properties of 6H- and 3C-Sic-based Schottky rectifiers and power MOSFET's to achieve breakdown voltages ranging from 50 to 5000 V. Using these values, the output characteristics of the devices have been calculated and these are compared with the characteristics of Si devices. I t is found that due to very low drift region resistance, 5000-V SIC Schottky rectifiers and power MOSFET's can deliver on-state current density of 100 A/cm2 at room temperature with a forward drop of only 3.85 and 2.95 V, respectively. These values are superior to even that for silicon P-i-N rectifiers and gate turn-off thyristors. Both these Sic devices are expected to have excellent switching characteristics and ruggedness due to the absence of minority-carrier injection. Additionally, a thermal analysis based upon a peak junction temperature limit, as determined by packaging considerations, is presented. Using this analysis, it is found that 5000-V, 6H-, and 3C-Sic MOSFET's and Schottky rectifiers would be approximately 20 and 18 times smaller than corresponding Si devices. This thermal analysis for the Sic indicates that these devices would allow operation at higher temperatures and at higher breakdown voltages than conventional Si devices. Also, a significant reduction in the die size is expected. This reduction in the die size would offset the higher cost of the material. The results of the analysis presented in this paper provide a strong impetus to embarking upon the fabrication of Sic power devices.

I. INTRODUCTION ILICON carbide (Sic) has been recently given re- S newed attention as a potential material for high-power

and high-frequency applications requiring high-temperature operation. Some of the possible applications of S i c as a material for power electronics are for advanced tur- bine engines, propulsion systems, automotive and aero- space electronics, and applications requiring large radia- tion-damage resistance. Table I compares some of the electrical and material properties of 3C- and 6H-Sic that are pertinent for power device applications. Properties such as large breakdown electric field strength, large sat- urated electron drift velocity, small dielectric constant, reasonably high electron mobility, and high thermal conductivity make S i c an attractive candidate for fabricating power devices with reduced power losses and die size. High thermal conductivity and breakdown electric field also suggest that the integration of devices made from S i c

Manuscript received January 13, 1992; revised June 1, 1992. The review

The authors are with the Power Semiconductor Research Center, North

IEEE Log Number 9206109.

of this paper was arranged by Associate Editor T. P. Chow.

Carolina State University, Rayleigh, NC 27695-791 1.

TABLE I

Si, 6H-SIC, A N D 3C-Sic FOR POWER DEVICE APPLICATIONS A COMPARISON OF SOME OF THE ELECTRICAL AND MATERIAL PROPERTIES OF

Si 6H-Sic 3C-Sic

ER (eV) 1.11 2.86 2.2 pn (cm2/V . s ) 1350 = 500 = 1000 V,,, (cm/s) 1 x io7 2 x io7 E,. (V /cm) 2 x los -4 x lo6" - 3 x l o b b € 11.8 9.7 9.66 h (W/cm . "C) 1.5 4.9 4.9

2.5 x io7

~~

where p,, is the electron mobility E, is the breakdown electric field strength t is the dielectric constant h is the thermal conductivity at 300 K Ex is the bandgap. V,,, is the saturation drift velocity.

"For a doping level of 4.8 x 10l6 cm-? as calculated from [22]. 'For a doping level of 4.8 x 10l6 cm-? and linearly scaled down from

E, of 6H-Sic by their bandgap ratio.

is possible with higher packaging densities and, thereby, an improvement in the current handling capability of these devices will be achieved.

In spite of these advantages, research pertaining to S i c power devices and their practical applications has been hampered by the lack of reproducible techniques to grow semiconductor-quality single crystals and epilayers. However, recent develoments in the growth of monocrystalline thin films of S i c by chemical vapor deposition and significant advancements in the growth of 6H-Sic single- crystal boules, has stimulated a renewed interest in S i c devices for a wide gamut of high-temperature and high- power device applications. Developments in the areas of growth of large-area S ic bulk single crystals of 6H-Sic [ l ] , [2], improvement in the quality of S i c epilayers on Si and 6H-Sic substrates [3]-[6], high-temperature ion implantation and in situ doping of p- and n-type dopants [7], [8], thermal oxidation [9], [lo], reactive ion etching [ 1 I], discovery of ohmic and Schottky contact materials [12]-[15], study of the electrical properties of as-grown and doped films and their dependence on the temperature [ 161, [ 171, and advancements in the characterization techniques of the CVD-grown S ic films [ 181, [ 191 have made fabrication of high-voltage S i c power devices a realistic possibility in near future.

Various investigators have fabricated electronic devices on 3C- and 6H-Sic and the characteristics of in situ

0018-9383/93$03.00 0 1993 IEEE

646 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 40, NO. 3, MARCH 1993

doped and ion-implanted p-n junctions [20]-[22], MES- FET’s [23]-[25], JFET’s [25]-[27], and enhancement- and depletion-mode MOSFET’s [25], [28], [29] have been reported. Though some excellent results, especially pertaining to the high-temperature operation of S ic MOS- FET’s, have been reported [25], none of these studies considered the design of S i c power devices based on its material and electrical properties. On the basis of Keyes’ [30] and Johnson’s [31] figures of merit, S i c has been found to have properties superior to silicon and 111-V semiconducting compounds including GaAs. Shenai et al. [32] suggested a figure of merit which emphasizes the electrical and thermal properties of various semiconducting materials to evaluate their power-handling capability. For high-frequency applications, in addition to ohmic heating, switching power losses should also be included to calculate the total power generated in the active area. Based on an analysis to minimize the power generation in the active area due to charging and discharging of the input capacitance and due to ohmic heating of the on-resistance associated with the FET, Baliga derived a figure of merit to evaluate the high-frequency switching capability of devices [33]. These new sets of figures of merit also corroborate the superiority of S i c devices over conventional silicon technology for power-electronic applications. However, these figures of merit do not provide es- timated values of various device parameters needed for the design and fabrication of the S ic devices.

It is the intent of this paper to provide guidelines for the calculation of some of the electrical and thermal parameters for the S i c devices. A theoretical analysis is car- ried out to compare the performance of power rectifiers and power metal-oxide-semiconductor field-effect transistors (MOSFET’s) made from 3C- and 6H-Sic with those made from silicon. These calculations are based on the ideal electrical and thermal conditions during the device operation and thus, compared to the values in the actual devices, some of these calculated parameters could be over- or underestimated. This error in the estimation of these parameters is mainly due to the limitations im- posed by the present-day processing technolgoy for the fabrication of S ic devices. However, comparison of these parameters for S i c with the corresponding values for Si under similar operating conditions, provides a reasonable appraisal of the expected enhancement in the power-handling capability of the S i c devices over present-day silicon devices.

S i c exists in a large number of polytypes which have different stacking sequence of double layers of Si and C atoms. For this analysis we have considered two polytypes of S ic , 6H- and 3C-SiC, which are likely to be the materials of choice for S ic power device fabrication. Ad- vantages of 6H-SiC, also known as a -Sic , are its large bandgap (2.86 eV) which results in high breakdown field strength E, and commercial availability of 6H-Sic substrates and epilayers. Compared to 6H-SiC, 3C-SiC, or 0-Sic, has a smaller bandgap (2.2 eV) and lower E, but has higher electron mobility. Additionally, it is possible

to grow good-quality 3C-Sic epilayers on Si which makes it a cheaper alternative to costly 6H-Sic commercial epilayers and also makes it compatible with present Si technology.

In this paper, first-order calculations based only on the drift region analysis of a power MOSFET have shown that the specific on-resistance Ron,sp of a S i c MOSFET is at least two orders of magnitude smaller than the corresponding on-resistance for a Si device. This value indicates an improvement in terms of reduced power loss, increase in the maximum allowable on-state current density and operating temperature. Comparison of the theoretical forward conduction characteristics of S i c and Si Schottky rectifiers shows the advantages of S i c rectifiers over Si rectifiers in terms of reduced forward voltage drop at high current density for large breakdown voltages. It is shown that an ideal S i c Schottky rectifier can provide a breakdown voltage as high as 5000 V with a forward voltage drop of only 3.85 V at 300 K for a current density of 100 A/cm2.

In addition to comparing the electrical characteristics of S ic and Si devices at room temperature, analysis based on thermal considerations has been performed to compare the relative chip area of the S ic and the Si devices. This analysis is used to calculate the maximum available on- state current density Jon of these devices for a maximum limiting junction temperature TF as governed by the packaging technology. From this analysis it is concluded that due to a significant reduction in Ron,sp for the S ic devices, these devices have much larger value of Jon than the conventional Si devices. This improvement in the current-handling capability of the S i c MOSFET’s over the Si MOSFET’s is quite significant at higher breakdown voltages where it could show approximately a twenty-fold improvement in Jon for the same junction temperature and device packaging. This would allow a considerable increase in the power rating or a decrease in the chip size, for the S i c devices as compared with the silicon devices in use today.

11. POWER MOSFET’s Because of their inherently high switching speeds,

power MOSFET’s have several advantages over power bipolar transistors for high-frequency applications where switching power losses are dominant. MOSFET’s have a high input impedance which makes the gate drive cir- cuitry very simple. Additionally, compared with power bipolar transistors they show an excellent safe operating area and better output characteristics for paralleling. These characteristics of power MOSFET’s make them important candidates for many high-frequency applications such as inverters and in switch-mode power supplies. However, these advantages are offset by the high specific on-resistance Ron, sp associated with Si power MOSFET’s for high breakdown voltages. Consequently, the use of Si power MOSFET’s has been limited to breakdown voltages below lo00 v.

BHATNAGAR AND BALIGA: COMPARISON OF 6H-SiC. 3C-SiC, AND Si FOR POWER DEVICES

In this paper, we have included a brief description of the Si double-diffused MOSFET (DMOSFET) since it is important to understand its working principle in order to estimate the values of various parameters required for the design of S i c devices. A theoretical first-order calculation based only on the drift-region analysis of ideal Si and S i c MOSFET’s has been performed to determine Ron,sp and to demonstrate the superiority of the S i c MOSFET’s over the Si MOSFET’s. This evaluation is in terms of the reduction in the on-resistance and consequent improvement in the current-handling capability of S i c power MOS- FET’s at higher breakdown voltages.

Fig. 1 shows a cross section of a power DMOS structure. The DMOS structure is fabricated by using planar diffusion technology with a refractory gate such as polysilicon. In these devices, the p-base and n+-source regions are diffused through a common window defined by the edge of the polysilicon gate. The surface channel region is defined by the difference in the lateral diffusion between the p-base and n+-source region. The forward blocking capability is achieved by the p-n junction between the p-base region and the n-drift region. During device operation, a fixed potential to the p-base region is established by connecting it to the source metal by a break in the n+-source region. By short-circuiting the gate to the source and applying a positive bias to the drain, the p-baseh-drift region junction becomes reverse-biased and this junction supports the drain voltage by the extension of a depletion layer on both sides. However, due to the higher doping level of the p-base layer, the depletion layer extends primarily into the n-drift region. On applying a positive bias to the gate electrode, a conductive path ex- tending between the n+-source region and the n-drift region is formed. The application of a positive drain voltage results in a current flow between drain and source through the n-drift region and conductive channel. The conductivity of the channel is modulated by the gate bias voltage and the current flow is determined by the resistance of various resistive components shown in Fig. 1. The total Ron,sp is determined as

Ron,sp = R,+ + Rc + RA + Rj + RD + Rs (1)

where R,+ is the contribution from the n+-sources diffusion, Rc is the channel resistance, RA is the accumulation layer resistance, Rj is the resistance from the drift region between the p-base region due to the JFET pinchoff action, RD is the drift region resistance, and Rs the substrate resistance. In a power MOSFET, blocking voltage is sup- ported across the drift layer and thus, drift-region resistance is considered to be the minimum possible theoretical limit for the on-resistance of a MOSFET. For an ideal DMOSFET, the resistances associated with the n+-source, the n-channel, the JFET, the accumulation region, and the n+-substrate are assumed to be negligible, and the specific on-resistance of the power MOSFET is determined by the drift region only. This assumption is not accurate at lower breakdown voltages where the drift-re-

647

Gake

~

%+ N-Drift Region 1

DRAIN

Fig. 1. Cross section of a power DMOSFET showing various internal resistances associated with it.

gion resistance RD is comparable to the other resistive components and these resistances should also be included in calculating Ron, sp. However, at higher breakdown voltages, RD is significantly higher than other resistances and Ron,sp could be approximated by RD. It is to be noted that improvements in design and fabrication of silicon power MOSFET’s have already demonstrated that Ron, sp within a factor of two of the ideal (drift region) value can be achieved.

The drift region analysis for an ideal DMOS structure can be performed by approximating the depletion layer in the drift region as an abrupt one-dimensional junction fabricated in a uniformly doped semiconductor. The doping level N B (cmP3) required to support a given breakdown voltage VB and depletion width W (cm) at the breakdown can be calculated as follows [33]:

N B E * E,2/(2 q ?‘E) ( 2 )

w = 2 v ~ / E , . (3)

The specific on-resistance (n drift layer to support VB is

cm2) associated with the

( 4 )

(5)

where E is the permittivity (C/V cm), E, is the breakdown field (V/cm), q is the electronic charge (C), and p,, is the electron mobility (cm2/V

In general, both the mobility p,, and the breakdown electric field E, are dependent on NE. Fig. 2 shows the dependence of p,, of 3C- and 6H-Sic on N B as used for this analysis. For pic-sic the following empirical relationship was derived from the experimental results of Mat- sunami er al. [3] by obtaining a least square fit for this data set:

Ron.sp = W / ( q * NB * Fn)

= ~ V ; / ( E * E: * p )

s).

p,, = 1.93 x lo8 Ng0.34 (cm2/V - s). (6) Though these data for pic-sic are experimentally valid only for N B greater than - 3 X 10l6, we have used extrapolated values of mobility calculated from (6) for doping concen- trations down to 3.5 X lOI5. For 6H-SiC, extrapolated values of Hall mobility as determined by Hillbom and Kang [35] were used to calculate the dependence of p:HH”ic on NE. For doping levels below these extrapolated

l lool son

E

Breakdown Voltage = 1000 V Temoerature = 300 K

IEEE TRANSACTIONS ON ELECTRON DEVICES. VOL. 40, NO. 3, MARCH 1993

1 0 0 , , , , , \ , # , , I " , # T I 1 1 1 1 1 1 1 , I , 1 1 1 m r

10 " 10 I' 10 10 IO Io

Doping Concent ra t ion (em?)

Fig. 2. Electron mobilities of monocrystalline bulk 6H-Sic and 3C-Sic thin films deposited on Si (100) off-axis towards (011).

values, maximum p,, of 530 and 1000 cm2/V s were used for 6H- and 3C-SiC, respectively.

Dependency of the breakdown field strength of 6H-Sic on NB was determined from the calculated values of E, in 6H-Sic p+-n junctions [22]. Based on these results following empirical relationship between and NB was obtained

(7) However, no such dependence of E, on N B could be found in the literature for 3C-Sic. For we have assumed this dependence to be of the form E, = E:, as is the case

. In order to take into account the lower bandgap of 3C-Sic (2.2 eV) as compared to that of 6H-Sic (2.86 eV), E2c"ic values are obtained by linearly scaling down from E,6H-SiC by the ratio of their energy bandgaps.

In case of Si, the exact dependency of the electron mobility and the breakdown field on the doping concentration is known [36].

E F i C = 1.95 x lo4 N$I3' (V/cm).

with ~6H-Sic ,

5.10 x 10l8 + 92Ni9' (8)

Based on this known dependence of p,, and E, on the doping concentration for Si power MOSFET's, a closed- form analysis which requires the solution of ionization in- tegral, using the electric field distribution for an abrupt junction diode, is used for calculating expressions for NB and Was a function of the breakdown voltage [37]. From this analysis, NB and W for a Si power MOSFET are obtained as [38]

pn = 3.75 x 10'5 + ~ $ 9 1 *

Ns = 2.01 x 10'' Vi4/3

W = 2.58 x V;l6. (10)

(9)

Substituting (8) and (9) in (4) and using room-temperature mobility for low doping levels, the specific on-resistance Ron,sp of the drift region is given as

(1 1) Table I1 provides values of NE, W, pn, and Ron,sp of an ideal DMOS as a function of breakdown voltage for Si

R, , , ,~ = 5.93 x 1 0 - ~ v ; ~ .

100 2 00 3 on 4 no 5 00 0 0 1 I , I , I " " ' I I " , ' , ' , I " " ' ~ ' ' , ~ ' ' " ' ' ~ ' l ~ ' " ' " ' ' l

o no VF (Volts)

Fig. 3. Forward conduction charcteristics of ideal Si and 6H-Sic power MOSFET's and Schottky rectifiers at room temperature with 1OOO-V breakdown voltage.

TABLE I1 VALUES OF DOPING CONCENTRATION, DEPLETION-LAYER WIDTH, A N D

SPECIFIC ON-RESISTANCE AS A FUNCTION OF BREAKDOWN VOLTAGE FOR IDEAL 6H-SiC, 3C-Sic, A N D Si POWER MOSFET's AT

ROOM TEMPERATURE

Breakdown Doping Electron Specific Voltage Concentration Mobility Width On-Resistance

(V) (cm-') (cm2/V . s) (pm) (CI . cm2)

6H-SIC

200 1.60 x 10" 267 1.16 1.69 X lo-' 1000 1.81 X 10l6 435 7.69 6.11 X

3000 4.08 X 10" 523 28.02 8.20 X lo-' 5000 2.04 x 10'' 530 51.12 2.95 X IO-*

3C-Sic

200 7.85 X 10l6 348 1.65 3.77 x io5 10.97 1.06 X 1OOO 8.87 X I O i 5 73 1

3000 2.01 X 10" 1000 39.97 1.24 X lo-* 5000 1.00 x 101' 1000 73.14 4.54 X lo-*

Silicon

200 1.72 x iot5 1336 12.48 3.35 x 81.59 1.88 X lo - ' 1000 2.01 x ioi4 1356

3000 4.65 X 10'' 1360 293.94 2.92 X 10' 5000 2.35 X 10" 1360 533.44 1.05 x IO'

& 50 v 200 V 1000 V 5000 V

6H-Sic 92.9 198.2 305.7 355.9 3C-Sic 49.3 88.8 177.4 229.8

and S ic power MOSFET's. This analysis suggests that in spite of lower electron mobility, 6H-Sic MOSFET's would have lower Ron,sp than 3C-SiC, due to their higher E,. In Figs. 3 and 4, we compare the forward conduction characteristics of Si and 6H-Sic MOSFET's at breakdown voltages of 1000 and 3000 V at room temperature. For a given breakdown voltage, Ron,sp for the S i c MOS- FET is at least two orders of magnitude smaller than for the Si MOSFET", and the ratio of Ron,sp of the Si MOS-

BHATNAGAR AND BALIGA: COMPARISON OF 6H-SiC, 3C-SiC, AND Si FOR POWER DEVICES 649

/ ( X o ' 3 Rectifier

Breakdown Voltage = 3000 V P i Temperature = 300 K

Fig. 4. Forward conduction characteristics of ideal Si and 6H-Sic power MOSFET's and Schottky rectifiers at mom temperature with a breakdown voltage of 3000 V .

FET to that of S i c MOSFET increases with increasing breakdown voltage. However, this difference in the ideal specific on-resistances of these two devices is of greater importance at higher breakdown voltages because at lower voltages the component of the total resistance from the regions other than the drift region must also be included in this analysis.

111. POWER RECTIFIERS Power rectifiers with high-speed switching capabilities

are used in power electronic circuits operating at high fre- quencies. The high-frequency operation allows reduction in the size of passive components (capacitors and induc- tors) leading to a more compact and efficient system design. The Schottky rectifier is a unipolar device providing high-frequency rectification. Unlike the P-i-N rectifier, which is a bipolar device and that exhibits large reverse recovery current and slow switching speed, the Schottky rectifier is a majority-carrier device which does not exhibit any significant reverse recovery current [38]. High- power rectification is achieved by means of nonlinear current transport across a metal-semiconductor interface. In the case of the Schottky rectifier fabricated on a semiconductor region with low doping levels, current components due to field emission, tunneling, and recombination can be neglected. The only significant component of current is thermionic current by means of electron transport over the potential barrier into the metal. For this case, thermionic emission theory can be used to describe the current flow across the Schottky barrier interface [39]

(12) where T i s the temperature, A is the effective Richardson constant, q is the electron charge, k is the Boltzmann's constant, Vis the applied voltage, and is the barrier height between n-type semiconductor and metal. Under conditions of forward current, the second term can be neglected and after including the voltage drop associated with various resistive components, the total forward volt-

J F = AT2 exp ( - q @ B n / k r ) (eqVlkT - 1)

age drop (V,) is given by [38]

where Js is the saturation current of the Schottky rectifier and is given as

Js = AT2 exp - ( q @ B n / k T ) . (14)

Ron,sp is the specific on-resistance of the rectifier and is defined as the total series resistance for an area of 1 cm2. It includes contributions from the drift region, the substrate, and any contact resistances. At higher breakdown voltages, the resistance associated with contacts and the substrate is relatively negligible and Ron,sp could be approximated by the drift region resistance RD only.

for Si and S i c were chosen as 0.8 and 1.2 eV, respectively. The value for the metal- S ic barrier height was taken from the reported values of

for Au Schottky contacts on n-type 0-Sic [40], [41]. For moderately doped Sic , due to Fermi-level pinning mechanism, the for metal-Sic contacts has been found to be relatively independent of the metal used [42]. Thus the calculated output characteristics of S i c Schottky rectifiers should be valid for a wide gamut of metal-Sic contacts. In Figs. 3 and 4 , we compare the theoretical forward conduction characteristics of ideal Si and 6H-Sic Schottky rectifiers at room temperature for breakdown voltages of 1000 and 3000 V, respectively. For these calculations A is 110 A/cm2 K2 and the voltage drop contributions from the substrate and contacts have been neglected. These figures clearly show the advantages of the S ic rectifier over the Si rectifier in terms of reduced voltage drop, increased current density, and reverse blocking capability. Table I11 lists required doping level and the thickness of the drift region for Si and S ic rectifiers as a function of VB. It also includes calculated forward voltage drop V, for a current density J F of 100 A/cm2 at room temperature. As is the case for MOSFET's, S i c Schottky rectifiers require much higher drift region doping and smaller drift region thickness than the silicon devices. This results in a decrease in its series resistance making high-voltage operation a possibility and fabrication of devices is made easier. Based upon this analyis, it is expected that ideal 3G- and 6H-Sic Schottky rectifiers with breakdown voltage as high as 5000 V can deliver 100 A/cm2 at room temperature with a forward voltage drop of only 5.44 and 3.85 V, respectively. In contrast to this, silicon devices with breakdown voltages above 200 V cannot be developed due to their high forward voltage drop.

In these calculations

IV . THERMAL CONSIDERATIONS For power semiconductor devices, some of the desir-

able characteristics are high input impedance, high switching speed, low on-state resistance, and large ava- lanche breakdown voltage. Additionally, for high-temperature operation of these devices, their thermal stability

650

TABLE I11 VALUES OF REQUIRED DOPING CONCENTRATION, DEPLETION-LAYER WIDTH,

AND FORWARD-VOLTAGE DROP AT 200 A/cm2 FOR IDEAL S i c AND Si

BREAKDOWN VOLTAGE

Breakdown Doping VF for JF = 100

SCHOTTKY RECTIFIERS AT ROOM TEMPERATURE AS A FUNCTION OF

Voltage Concentration Width A/cm2 (V) (cm-’) (m) (V)

6H-Sic

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 40, NO. 3, MARCH 1993

200 1.60 x 10” 1.16 0.90 1000 1.8 x lo6 7.69 0.96 3000 4.08 x iof5 28.02 1.72 5000 2.04 x 1015 51.12 3.85

3C-Sic

200 7.85 x 10I6 1.65 0.93

3000 2.01 x 1 0 ’ ~ 39.97 2.15 1000 8.87 x 1015 10.97 1.01

5000 1.00 x 1015 73.14 5.44

Silicon

200 1.72 x 1015 12.48 3.36 1000 2.01 x 1014 81.59 71.1 3000 4.65 X I O i 3 293.94 - 5000 2.35 x 1013 533.44 -

in terms of high-temperature performance and possibility of thermal runaway are very important considerations.

The calculated results from the previous sections suggest that S i c has superior materials properties in terms of electrical characteristics of S i c devices at room temperature for high-power high-frequency electronic applications. In order to fully exploit the potential of S i c as material of choice for power-electronic applications, it is important to estimate the high-temperature performance capability of the S i c devices as compared to the Si devices. Shenai et al. [32] have shown that unlike Si-based power device which are limited in their operating capability to 200°C. S ic devices are capable of operating at temperatures as high as 600°C. This conclusion was based on the calculations that considered the effects of high operating temperature on the on-state device conductivity and the effect of intrinsic leakage current on the power dissipation in the off-state. It was shown that at high operating temperatures, a S ic device has considerably higher on-state conductance and smaller off-state leakage current than a Si device. This resulted in a decrease in the power dissipated in the active device area and, thus, the S i c devices showed desirable performance even for very-high junction temperature. However, none of the previous pa- pers considered the performance of S ic devices under the conditions when the maximum allowable junction temperature q is limited by a criteria based on the existing packaging technology and does not exclusively depend on the semiconducting material properties. This approach to evaluate the high-temperature performance of S i c devices by considering the same T, for both S ic and Si devices is of practical significance since the device packaging technology to accommodate high temperatures which are sus-

tainable by S ic devices, is not currently available. Since Si devices are limited in their operation to temperatures below 200°C due to reliability and packaging limitations, it is worth making a comparison of the on-state current density Jon and the chip size of S i c MOSFET’s with Si MOSFET’s at the same maximum junction temperature q of -200°C.

On considering the heat transfer due to conduction solely, the temperature rise in the active area of the device AT is

AT = O t h P D (15)

where Oth (K/W) is the thermal resistance associated with the device and PD (W) is the total ohmic power generated. PO is consisting of ohmic power dissipated during the on- state Po, and power dissipated during the off-state PoR. For a 50% duty cycle, Po for a MOSFET is given as

where A is the area of the active device (cm’), Jon is the on-state current density (A /cm’), Ron sp is the specific on- resistance of the drift region (Q * cm’), JL is the leakage current density when the device is in its reverse blocking mode (A/cm’), and VB is the reverse blocking voltage (V). In order to make an equitable comparison of S i c and Si power devices, devices with equal area A and equal junction temperature will be compared in terms of Jon and the chip area. In general, the thermal resistance Oth between the active region and the ambient thermal reser- voir consists of two components-e,, which is the junction-to-case thermal resistance and e,, which is the case- to-ambient thermal resistance. e,, is relatively insensitive to the ambient environment and is mainly a function of chip material and geometry and is given by

d ,g. = - ” AA

where d (cm) is the substrate thickness, A (cm’) is the junction area, and X (W/K * cm) is the thermal conductivity of the substrate which for both Si and S i c decreases with temperature. However, an upper bound for e,, can be obtained by using the lowest value for X which corresponds to a substrate temperature of 200°C. For Si and Sic , X at 200°C is 0.8 and 2.8 W / K * cm, respectively. Assuming a chip area of 1 cm2 and a 500-pm-thick substrate, maximum value of e,, for Si and S i c substrates is -0.06 and 0.02 K / W , respectively. Thus for this case, e,, is quite small and e,, is the dominant component in 0 t h .

Or, depends on the package geometry and its orientation in the specific application, and on the condition of the operating ambient environment and could be assumed to be constant for both Si and S i c devices. A typical value of Oth in the state-of-the-art packaging technology is 1 K/W. Thus the same thermal resistance can be assumed for Si and S ic devices.

BHATNAGAR AND BALIGA: COMPARISON OF 6H-Sic, 3C-SiC, AND Si FOR POWER DEVICES

~

65 1

The maximum temperature generated in the device is given as

Equation (1 8) could be used to calculate the dependence of Jon on the breakdown voltage VB if we could estimate the value of JL and Ron, sp as a function of VB and the junction temperature T J . Since the junction temperature in high-power devices could be very high, it is important to consider the variation of Ron, sp with temperature. Ron, sp

for S ic is calculated by using (5) and for Si by using (1 1). In general, due to increased scattering, the electron mobility p,, decreases with temperature and, thus, Ron, sp increases with temperature. For Si, at temperatures of interest for the device operation, Coulombic scattering due to ionized dopants, intervalley, and acoustic phonon scattering are the dominant scattering mechanisms and the dependence of p,, on temperature is given as [43]

/ - \ -2.42

p, ,= 1360(&) .

The exact role of various scattering mechanisms that govern the temperature dependence of pn in S i c is not presently known. However, a large number of empirical relations for this dependence have been reported [16], [17]. In general, this dependence has a form of T-” where a has been reported to be - 1.2-1.4 for CVD grown n-type @-Sic [16]. For both 3C- and 6H-SiC, we have assumed a value of 1.3 for a. For Si MOSFET’s, Ron,sp typically increases threefold for an increase in the junction temperature from 25 to 200°C [44]. This is consistent with the expected increase in Ron,sp due to a decrease in p,, on increasing the temperature from 300 to 500 K as calculated by (19). Based on the temperature dependence of electron mobility in S i c and taking a to be 1.3, Ron,sp for a S ic device at 500 K is expected to be approximately twice its room-temperature value. Thus for calculating the forward-conduction characteristics of Si and S i c devices at 500 K, we have used the scaled up values of room temperature Ron,sp by a factor of 2 and 3 for S i c and Si, respectively.

In power devices which are based on the principles of p-n junctions, the reverse leakage current density J L is given by (20) and has components due to the diffusion current JD and due to the space-charge generation current JG 1391

where ni is the intrinsic carrier concentration ( ~ m - ~ ) , W is the width of the space-charge region (cm), 7, the lifetime of electrons in the space-charge region (s), Nd is the concentration of donor atoms ( ~ m - ~ ) , Dh is the diffusion constant of holes in the n-type region (cm2/s), and Th is the lifetime of holes (s). In (20), the space-charge generation current is given by the first term and the second

term corresponds to the diffusion current. Based on (20), it is obvious that due to the large bandgap of S ic , the intrisic carrier concentration ni in S ic is very small and consequentially, even at high operating temperatures, S i c has much smaller reverse-leakage current than Si. How- ever, at 500 K, J L even for a Si device is very small and the amount of power dissipated in the off-state Poff is negligible compared to the on-state power dissipation Po,. In order to make an objective comparison between the chip size and Jon for Si and S i c power MOSFET’s, we have considered the maximum A T to be 200”C, i.e., T / is 500 K, 0th is 1 K / W , and the chip area is taken as 1 cm2. Using (16) and neglecting Poff for both Si and S i c MOS- FET’s, the on-state current density is given as

Table IV provides Ron,sp and Jon for Si, 6H-, and 3C- S ic MOFSET’s based on this analysis for different values of breakdown voltage for a junction temperature of 500 K. These Jon values are the maximum allowable on-state current density which prevents thermal runaway for given junction temperature and rate of power conduction away from the active device area. Table IV shows that for all the breakdown voltages, S i c MOSFET’s have higher Jon than Si devices and this difference becomes more significant as the breakdown voltage is increased. In Fig. 5, forward conduction characteristics of a 3000-V S i c MOSFET is compared with that of a 500-V Si MOSFE at 500 K. For a VB of 5000 V, Jon of 3C-Sic and 6H-Sic MOSFET’s is -66 and 82 A/cm2, respectively. J:f-sic is -23 times larger than the Jon of a Si MOSFET operating under similar conditions. This improvement in the Jon of S ic over Si at higher breakdown voltages is due to lower Ron, SP associated with the S i c devices as compared to Si devies. The improvement in the current-handling capability of S i c devices is especially significant for higher breakdown voltages since only at higher VB, Ron,sp has negligible contributions from the other resistive components of Fig. 1 and its approximation by the drift region resistance RD in our analysis is valid.

Unlike MOSFET’s, where the reverse-leakage current JL at 500 K was negliglbe even for the Si devices, Schottky-barrier diodes can have an appreciably large value of JL at this temperatures. In the devices such as MESFET’s and Schottky rectifiers, which are based on the principle of Schottky-barrier diodes, the reverse-leakage current across the metal-semiconductor barrier may become a serious problem even at 200°C. For an ideal Schottky rectifier JL is equal to the saturation current density Js and is given by (14). For the case of Schottky- barrier diodes the maximum temperature that is generated in the device is given as

652 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 40, NO. 3, MARCH 1993

TABLE IV CALCULATED VALUES OF SPECIFIC ON-RESISTANCE Ron, sp AND MAXIMUM ALLOWALE ON-STATE CURRENT DENSITY 3,. FOR Si, 3C-, AND 6H-Sic

MOSFET’s UNDER CONDITIONS I N TEXT FOR POWER DISSIPATION

Breakdown Voltage V, (V)

200 lo00 3000 5000

3.39 x 1.22 x 7.54 x 2.11 x

0.01 0.56 3436 572.1 2303 435.2 199.4 26.7

17.2 21.4 11.6 16.3

1.6 X 5 .9 X

2.5 x 9.1 x 8.76 31.5

156.7 82.4 126.7 66.4

6.8 3.6 22.9 22.9 18.6 18.4

3000 V GH-SIC Rectifier

,,.’ ’ ’ 500 V SI FET -

---<- -~ i ’-

I ,/” / ’ - _ ’ 4 -’ 500 V 71 Rectlfler

a I Temperature = 500 K E

I I

G o l j I/ i l

0 60 0iO 100 150 200 250 300 001 I I I I 8 I I I I

V F (Volts) Fig. 5. Forward current-voltage charactenstics of ideal Si and SIC power

MOSFET’s and Schottky rectifiers at 500 K .

TABLE V VALUE OF POWER DISSIPATED I N THE OFF-STATE Po,, MAXIMUM ALLOWABLE CURRENT DENSITY J,,, AND FORWARD-VOLTAGE DROP V , FOR Si, 6H-, AND

3C-Sic SCHOTTKY RECTIFIERS A T 500 K

Breakdown 6H-Sic 3C-Sic Silicon

200 -0.0 533 0.74 520 0.77 47.37 176 2.03 3.03 2.95 1000 0.022 350 1.14 298 1.34 236.79 17 9.74 20.6 17.5 3000 0.066 137 2.92 113 3.52 5000 0.11 77 5.19 63 6.27

- - - - - - - - - -

where V, is the forward voltage drop (V) and V, is the reverse blocking voltage (V). Similar to the analysis for MOSFET’s, thermal analysis to calculate Jon and the relative chip size for Schottky rectifiers is based on the criteria of maximum allowable junction temperature TJ as determined by the packaging. If we assume T,Fx is 500 K, et,, is 1 K/W, and a chip area of 1 cm’, the maximum allowable Jon is obtained by solving the following equation:

JonVF + J L V B = 400. (23) In this equation VF and J F are nonlinearly coupled by

(13) which gives the forward-conduction characteristics

of a Schottky rectifier and solutions of this transcendental equation are provided in Table V for different breakdown voltages. This table also includes the values of Poff, Po,, V,, and JF for Si and S i c Schottky rectifiers at the junction temperature of 500 K for different breakdown voltages. For low values of barrier height JL and P,ff could be considerably large and for a constant amount of power generated in the active area, this imposes a restric- tion on Po, and on-state current density Jon. This is the case for Si where a barrier height of 0.8 V was use in our calculations and for a junction temperature of 500 K, significantly large value of .IL (0.2368 A/cm2) and POff (47.4 W for a 200-V rectifier) was obtained. For Si Schottky

BHATNAGAR AND BALIGA: COMPARISON OF 6H-SiC. 3C-Sic, AND Si FOR POWER DEVICES 653

rectifiers, at breakdown voltages above 200 V and for a junction temperature of 500 K, Po, becomes very large. Based on the analysis it is concluded that the use of Si Schottky rectifiers is no longer pragmatic at temperatures above 200°C for breakdown voltages higher than 200 V. However, for S i c Schottky rectifiers a typical value of barrier height is 1.2 V [40], [41] and based on this value, the JL and Poff for the S i c device were found to be negligible even for large breakdown voltages. Since, S i c Schottky rectifiers have a much smaller value of JL for all the power that is being generated in the active area is due to Po,, 3C- and 6H-Sic Schottky rectifiers with a 5000-V breakdown voltage can operate at a current density as high as 63 and 77 A/cm2, respectively.

Since an increase in the value of Jon implies higher current-handling capability of the device, it would lead to a decrease in the device area. Using the ratio of Jon of S i c to Jon of Si as a measure of the relative size of the devices, for a 1000-V Schottky rectifiers, a more than twentyfold reduction in the die size is calculated for a 6H-Sic device as compared to a similar Si device. This improved current-handling capability of S i c devices over conventional Si devices should offset the present-day higher processing costs associated with the fabrication of S i c device.

V. DISCUSSION AND CONCLUSIONS As in the case of the Si Schottky rectifier, the principal

advantage of the S ic Schottky rectifier is its superior switching characteristics. Silicon Schottky rectifiers with current ratings of 50 A or more are currently used as output rectifiers in power supplies operating at or below 5 V . These power circuits require rectifiers with breakdown voltages below 100 V . However, for power supplies operating at voltages higher than 12 V , diodes with breakdown voltages above 100 V are required. High-speed diodes are also required for invertors for motor control with blocking voltages above 200 V. However, Si Schottky rectifiers with such ratings are not available due to their excessive reverse leakage currents, which limit the reverse blocking capability. Another limitation of these Si devices is a sharp increase in the internal series resistance of the diode with increasing breakdown voltage, which limits the forward conduction current-handling capability. For these reasons high-voltage epitaxial silicon P-i-N rectifiers have been used for these applications. However, these diodes are slower than Schottky rectifiers, have a large reverse recovery current during turn-off, and a large forward-voltage overshoot during turn-on. The use of S ic Schottky rectifiers in lieu of P-i-N rectifiers in high-voltage power circuits will result in superior transient characteristics with high turn-off speed and the absence of large reverse recovery current flow. Being a majority-carrier transport device, the S ic Schottky rectifier operates without high level minority- carrier injection. Thus during dynamic turn-off, large reverse-recovery currents due to the stored charges are eliminated. Compared with the Si Schottky rectifier, the

S ic Schottky rectifier is expected to demonstrate higher current-handling capability and low forward-voltage drop at high breakdown voltages. Unlike Si Schottky rectifier which have breakdown voltages less than 100 V, an ideal 5000-V 6H-Sic rectifier can deliver 100 A/cm2 with a forward-voltage drop of less than 3.85 V.

Power MOSFET’s are particularly useful for high-frequency applications due to their high inherent switching speed. The high-speed capability of MOSFET’s is thk result of their being a majority-carrier device which elimi- nates the large storage and fall times observed in bipolar transistors due to minority-carrier transport. The power MOSFET’s are also found to exhibit superior safe operating area and output characteristics for paralleling compared with bipolar transistors. But in spite of these ad- vantges, application of Si power MOSFET’s has been limited to circuits with voltages of up to 1000 V at current levels of only 1 A. This is mainly because of high specific on-resistance associated with Si MOSFET’s. For applications at above 200 V , IGBT’s with high-end current ratings of 1500 V/300 A are preferred today. However, these devices exhibit slow switching time and are prone to latch-up under stress. In the preceding section, it has been shown that the on-resistance of S i c MOSFET is at least two orders of magnitude smaller than that for Si MOSFET. Especially for high breakdown voltages, the S ic MOSFET has an ideal specific on-resistance which is - 350 times smaller than the on-resistance of corresponding Si MOSFET. This reduction in Ron,sp of Sic power MOSFET coupled with other attributes of power MOS- FET’s such as voltage-controlled characteristics with low input gate power, high input impedance under steady-state condition, large safe operating area, a stable negative temperature coefficient for the on-resistance, and inherent high switching speed makes S i c MOSFET an attractive alternative for existing Si power devices, including GTO’s and thyristors. Our analysis indicates that a 5000-V S i c power MOSFET would have a specific on-resistance of only 29.5 mQ - cm2 which is less than the on-resistance of a 500-V Si MOSFET. A comparison of the on-state characteristics of a 5000-V 6H-Sic and 3C-Sic MOS- FET’s with a 4500-V Si GTO is provided in Fig. 6. It can be seen that 6H-Sic MOSFET would have a forward drop of only 1.95 V at an on-state current density of 100 A/cm2 compared with a 3-V drop for the Si GTO. These S ic devices would thus be candidates to replace even silicon high-voltage thyristors and GTO’s in the future. The relatively high doping levels and small thicknesses of the drift region for the SIC devices as predicted by our analysis indicates that achieving very high voltage operation is not far beyond our technological capability.

From the previous discussion, it is possible to conclude that the development of S i c Schottky rectifiers and power MOSFET’s will provide devices which can deliver larger currents at very fast switching speed in power circuits with high breakdown voltages. On the basis of thermal analysis it is possible to conclude that due to the much smaller value of off-state power loss for Sic devices as compared

~~

654 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 40, NO. 3. MARCH 1993

‘1

1 4500 V 6 H - S I C MOSWFT

I”’::]---..----’

-I

,

/ I

/

’4500 V SI CTO

1 ~ ~ , “ 1 , ” , , 1 , 1 1 , , 1 , 1 , , , , , , , , 1 ~

VF (Volts) 1 0 2 0 3 0 4 0

Fig. 6 . Comparison of the on-state conduction characteristics of ideal 5OOO-V 6H- and 3C-Sic MOSFET’s and a 4500-V Si GTO at room temperature.

with Si devices, much higher on-state current densities could be achieved in S i c devices for given junction temperatures and packaging. This would allow almost a twentyfold reduction in the chip size which should offset higher present-day processing costs associated with the fabrication of S ic devices. Additionally, due to the high thermal conductivity and electric breakdown field strength of SIC, it is possible to achieve integration of these devices at higher packaging densities.

This analysis suggests that S i c power rectifiers and MOSFET’s could be a superior alternative for all Si power devices with breakdown voltage as high as 5000 V. How- ever, this would require considerable improvements in S ic device processing technology. Some of the major prob- lems that needs to be addressed include availability of low- cost high-quality S i c substrates and epitaxial layers with controlled doping, development of thermally stable Schottky contacts with large barrier heights and ohmic contacts with low contact resistance, reactive ion etching of S i c with high anisotropy and selectivity, and improved quality of SiO,/SiC interface. Based upon these conclusions, it is recommended that experimental work related to the development of the S i c processing technology and subsequent fabrication of S i c Schottky rectifier and power MOSFET should be undertaken.

REFERENCES C. H. Carter, Jr., L. Tang, and R. F. Davis, presented at 4th Nat. Review Meet. on the Growth and Characterization of S i c , Raleigh, NC, 1987. D. L. Barrett, R. G. Seidensticker, W. Gaida, R. H. Hopkins, and W. J . Choyke, “Sic boule growth by sublimation vapor transport,” J. Crystal. Growth, vol. 109, p. 17, 1991. H. Matsunami,“Heteroepitaxial growth of S i c on Si-Highly mis- matched system, ” in Hereroepitay on Silicon: Fundamentals, Struc- ture, and Devices, H. K. Choi, R. Hull, H. Ishiwara, and R. J . Ne- manich, Eds. (Materials Res. Soc. Proc., vol. 116, p. 325; Materials Res. Soc., Pittsburgh, PA, 1987). H. S. Kong, I. T. Glass, and R. F. Davis, “Epitaxial growth of &Sic thin films on 6H a - S i c substrates via chemical vapor deposition,” Appl. Phys. Lett., vol. 49, p. 1074, 1986. T. Ueda, H. Nishino, and H. Matsunami, “Crystal growth of SIC by step-controlled epitaxy,” J. Crystal Growth, vol. 104, p. 695, 1990.

[6] J. A. Powell, I . B. Petit, and L. G. Matus, “Advances in silicon carbide chemical vapor deposition (CVD) for semiconducting device fabrication,” in Trans. Ist Int. High Temp. Elec. Conf. (Albuquer- que, NM, 1991), p.192.

[7] J . A. Edmond, S. P. Withrow, W. Wadlin, and R. F. Davis, “High temperature implantation of single crystal beta silicon carbide,” in Interface, Superlattices, and Thin Films, J. D. Dow and I. K. Schuller, Eds. (MateriulsRes. Soc. Proc., vol. 77, p. 193; Materials Res. Soc., Pittsburgh, PA, 1987).

[8] H. J. Kim and R. F. Davis, “Theoretical and empirical studies of impurity incorporation into @-Sic thin films during epitaxial growth,’’ J. Electrochem. Soc., vol. 133, p. 2350, 1986.

[9] I . B. Petit, I . A. Powell, and L. G. Matus, “Oxidation of silicon carbide: Effect of polytypism on kinetics and application to characterization of substrates and films.” in Trans. Ist Int. Hifh Temp. Elec. - . Conf. (Albuquerque, NM, 1991), p. 198. S. M. Tang, W. B. Berry, R. Kwor, M. V. Zeller, andL. G. Matus, “High frequency capacitance-voltage characteristics of thermally grown SiOz films on &SiC,”J. Electrochem. Soc., vol. 137, p. 221, 1990. J. W. Palmour, R. F. Davis, P. Astell-Burt, and P. Blackborow, “Surface characteristics of monocrystalline beta-Sic dry etched in fluorinated gases,” in Science and Technology of Microfabrication, R. E. Howrad, E. L. Hu, S . Pang, and S. Namba, Eds. (Materials Res. Soc. Proc., vol. 76, p. 185; Materials Res. Soc., Pittsburgh, PA, 1987). M. I. Chaudhary, W. B. Berry, and M. V. Zeller, “Ohmic contacts on &Sic,” in J . T . Glass, R. Messier, and N. Fujimori, Eds., Ma- terials Res. Soc. Proc., vol. 162, p. 507 (Materials Res. Soc., Pitts- burgh, PA, 1989). J . B. Crofton, J. M. Ferrero, P. A. Barnes, J. R. Williams, M. J. Bozack, C. C. Tin, C. D. Ellis, J. A. Spitznagel, and P. G. Mc- Mullin, “Metallization studies on epitaxial 6H-SiC;’ presented at 4th Int. Conf. on Amorphous and Crystalline S i c and other IV-IV Materials, Santa Clara, CA, 1991. N. A. Papanicolau, A. Christou, and M. L. Gipe, “Pt and PtSi, Schottky contacts on n-type &Sic,’’ J. Appl. Phy., vol. 65, p. 3526, 1989. L..M. Spellman, “Heteroepitaxial growth and characterization of ti- tanium films on 6H-SiC.” presented at 4th Int. Conf. on Amorphous and Crystalline S i c and other IV-IV Materials, Santa Clara, CA, 1991. K. Sasaki, E. Sakuma, S . Misawa, S . Yoshida, and S. Gonda, “High temperature electrical properties of 3C-Sic epitaxial layers grown by chemical vapor deposition,” Appl. Phys. Lett., vol. 45, p.72, 1984. M. Yamanaka, H. Daimon, E. Sakuma, S. Misawa, and S. Yoshida, “Temperature dependence of the electrical properties of n- and p-type 3C-SiC,” J. Appl. Phys., vol. 61, p. 599, 1987. C. H. Carter, Jr., J. A. Edmond, J. W. Palmour, J. Ryu, H. J. Kim, and R. F. Davis, “Cross-sectional transmission electron microscopy of defects in beta silicon carbide thin films,” in Microscopic Identi- fication of Electroni Defects in Semiconductors, N. M. Johnson, S. G. Bishop, and G. D. Watkins, Eds. (Materials Res. Soc. Proc., vol. 46, p. 593; Materials Res. Soc., Pittsburgh, PA, 1987). J . A. Freitas, Jr., S. G. Bishop, A. Addamiano, J . Ryu, and R. F. Davis, J. Appl. Phys., vol. 61, p. 2011, 1987. L. G. Matus and I . A. Powell, “High-voltage 6H-Sic p-n junction diodes,” h P 1 . Phvs. Lett., vol. 59, U. 1770. 1991.

[21] J. A. Edmonds, K-. Das, and R. F. Davis, “Electrical properties of ion-implanted p-n junction diodes in &Sic,” J. Appl. Phys., vol. 63, p. 922, 1988.

1221 J . A. Edmond, D. C. Waltz, S. Brueckner, H. S. Kong, I . W. Pal- mour, and C. H. Carter, Jr., “High temperature rectifiers in 6H-silicon carbide,” in Trans. 1st Int. High Temp. Elec. Con$ (Albuquer- que, NM, 1991), p. 207.

[23] H. S. Kong, I. W. Palmour, J . T. Glass, and R. F. Davis, “Tem- perature dependence of the current-voltage characteristics of metal- semiconductor field-effect transistors in n-type &Sic grown via chemical vapor deposition,” Appl. Phys. Lett., vol. 51, p. 442, 1987.

[24] H. Daimon, M. Yamanaka, M. Shinohara, E. Sakuma, S. Misawa, K. Endo, and S. Yoshida, “Operation of Schottky barrier field-effect transistors of @Sic up to 400”C,” Appl. Phys. Lett., vol. 51, p. 2106, 1987.

[25] J. W. Palmour, H. S. Kong, D. C. Waltz, J. A. Edmond, and C. H. Carter, Jr., “6H-silicon carbide transistors for high temperature operation,” in Proc. Ist Inr. High Temp. Elec. Conf. (Albuquerque, NM, 1991), p. 511.

BHATNAGAR AND BALIGA: COMPARISON OF 6H-SiC, 3C-SiC, AND Si FOR POWER DEVICES 655

G. Kelner, S. Binari, K. Sleger, and H. Kong, ‘‘@-Sic MESFET’s and buried gate JFET’s,” IEEE Electron Device Lett., vol. EDL-8, p. 428, 1987. G. Kelner, M. S. Shur, S. Binari, K. Sleger, and H. Kong, “High- transconductance 0-Sic buried gate JFET’s,” IEEE Trans. Electron Devices, vol. 36, p. 1045, 1989. H. S. Kong, H. J. Kim, J. A. Edmond, J. W. Palmour, J. Ryu, C. H. Carter, I. T. Glass, and R. F. Davis, “Growth, doping, device development, and characterization of beta-Sic epilayers on Si (100) and alpha-Sic (OOOl),” in Novel Refractory Semiconductors, D. Emin, T. L. Aselage, and C. Wood, Eds. (Materials Res. Soc. Proc., vol. 97, p. 233; Materials Res. Soc., Pittsburgh, PA, 1987). I . W. Palmour, H. S. Kong, and R. F. Davis, “High temperature depletion-mode metal-oxide-semiconductor field-effect transistors in &Sic thin films,” Appl. Phys. Lett., vol. 51,p. 2028, 1987. R. W. Keyes, “Figure of merit for semiconductors for high-speed switches,” Proc. IEEE, vol. 60, p. 225, 1972. E. 0. Johnson, “Physical limitations on frequency and power parameters of transistors,” RCA Rev., p. 163, 1975. K. Shenai, R. S. Scott, and B. I . Baliga, “Optimum semiconductors for high-power electronics,” IEEE Trans. Electron Devices, vol. 36, p. 1811, 1989. B. J. Baliga, IEEE Electron Devices Lett., vol. 10, p. 455, 1989. H. Matsunami, in Proc. 2nd Int. Symp. Power Semic. Dev. and ICs (ISPSD’90), 1990, p. 13. R. B . Hillborn and H. Kang, “Charge camer concentration and mobility in n-type 6H polytypes of SIC,” in Silicon Carbide-1973, R. C. Marshall, J. W. Faust, Jr., C. E. Ryan, Eds. Columbia, SC: Univ. of South Carolina Press, 1973, p. 337. C. Jacoboni, C. Canali, G. Ottaviani, and A. A. Quaranta, “A review of some charge transport properties of silicon,” Solid-State Electron., vol. 20, p. 77, 1977. R. van Overstraeten and H. DeMan, “Measurements of the ionization rates in diffused silicon p-n junctions,” J . Electron. Contr., vol. 13, p. 583, 1970. B . J. Baliga, Modern Power Devices. S. M. Sze, Physics of Semiconductor Devices. New York: Willey- Interscience, 1985. J . A. Edmond, I. Ryu, J. T. Glass, and R. F. Davis, “Electrical contacts to beta-Sic thin films,” J . Electrochem. Soc., vol. 135, p. 359, 1988. D. E. Ioannou, N. A. Papanicolaou, and P. E. Nordquist, Jr., “The effect of heat treatment on Au Schottky contacts on @-Sic,” IEEE Trans. Electron Devices, vol. ED-34, p. 1694, 1987. C. A. Mead, “Metal-semiconductor surface barriers,” Solid-State Electron., vol. 9 , p. 1023, 1966. C. Canali, C. Jacoboni, F. Nava, G. Ottaviani, and A. A. Quaranta, “Electron drift velocity in silicon,” Phys. Rev., vol. B12, p. 2265, 1975. D. A. Grant and J. Gowar, Power MOSFETS: Theory and Applica- tion. New York: Willey-Interscience, 1989.

New York: Wiley, 1987.

olina State University, Raleigh, under the guidance of Prof. B. J. Baliga. His doctoral research work involves modeling, fabrication, and characterization of silicon carbide devices for high-power and high-frequency applications. His other research interests include device physics and processing of solid-state devices for VLSI and power IC applications. He is a recipient of several academic awards including Best Graduate Student Pa- per Award at Vanderbilt University and an NSF Engineering Research Center Fellowship from the Center for Advanced Electronics Materials Processing at NCSU.

B. Jayant Baliga (S’71-M’74-SM’79-F’83) received the Bachelor of Technology degree from the Indian Institute of Technology, Madras, In- dia. He was the recipient of the Philips India Medal and the Special Merit Medal at I.I.T., Madras in 1969. He received the Masters and Ph.D. degrees from Rensselaer Polytechnic Insti- tute, Troy, NY. His thesis work involved gallium arsenide diffusion mechanisms and pioneering work on the growth of InAs and GaInAs layers using organometallic CVD techniques. At R.P.I.,

he was the recipient of the IBM Fellowship and the Allen B . Dumont Prize in 1974.

From 1974 to 1988, he performed research and directed a group of scientists at the General Electric Research and Development Center in Sche- nectady, NY, in the area of Power Semiconductor Devices and High Volt- age Integrated Circuits. During this time, he pioneered the concept of MOS- bipolar functional integration to create a new family of discrete devices. He is the inventor of the IGBT which is now in production by many international semiconductor companies. He is also the originator of the concept of merging Schottky and p-n junction physics to create a new family of power rectifiers. In 1979, he theoretically demonstrated that the performance of power MOSFET’s could be enhanced by more than an order of magnitude by replacing silicon with other materials such as gallium arsenide and silicon carbide. This is expected to form the basis of a new generation of power devices in the 1990’s. In August 1988, he joined the fac- ulty of the Department of Electrical and Computer Engineering at North Carolina State University, Raleigh, as a Full Professor. In 1991, he established an international center (PSRC) at NCSU for research in the area of power semiconductor devices and high-voltage integrated circuits, and is serving as its founding director. His research interests include the modeling of novel device concepts, device fabrication technology, and the investi- gation of the impact of new materials, such as GaAs and silicon carbide, on Dower devices. In addition to over 300 uublications in international iour-

Mohit Bhatnagar was born in Muzzaffamagar, rial$, he has authored 4 books (Power’Transisrors, New York: iEEE India, on November 14, 1967. He received the PRESS, 1984; Epitaxial Silicon Technology, New York: Academic Press, B.Tech. degree in metallurgical engineering from 1986; Modern Power Devices, New York: Wiley, 1987; and High Voltage The Indian Institute of Technology, Kanpur Integrated Circuits, New York. IEEE PRESS, 1988). He holds over 60 (IIT-K) in 1988. He joined the Matenals Science patents in the solid-state area with many more pending office action He and Engineenng department at Vanderbilt Uni- has received numerous awards in recognition for his contributions to semi- versity, Nashville, TN, for M S program in 1988. conductor devices. These include two IR 100 awards (1983, 1984). the During the course of his graduate studies, he con- Dushman and Coolidge Awards at GE (1983), and being selected among ducted research on the role of tin on the electro- the 100 Bnghtest Young Scientists in America by Science Digest Magazine chemistry of lead-acid battery positive gnd. (1984). He was elected Fellow of the IEEE in 1983 for his contributions

He is currently a Research Assistant in the to power semiconductor devices. In 1991, he was awarded the William E Power Semiconductor Research Center and is working towards the Ph.D Newell Award, the highest honor given by the IEEE Power Electronics degree in the Electncal and Computer Engineenng Department, North Car- Society.

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Comparison of 6H-SiC, 3C-SiC, and Si for power devices

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