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Compress Objects, Not Cache Lines: An Object-Based Compressed Memory Hierarchy Po-An Tsai and Daniel Sanchez
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Page 1: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Compress Objects, Not Cache Lines:

An Object-Based Compressed Memory Hierarchy

Po-An Tsai and Daniel Sanchez

Page 2: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior memory compression techniques are limited to

compressing cache lines

2

Page 3: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Data movement limits performance and efficiency

A memory access takes 100X the latency and 1000X the energy of a FP operation

Prior memory compression techniques are limited to

compressing cache lines

2

Page 4: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Data movement limits performance and efficiency

A memory access takes 100X the latency and 1000X the energy of a FP operation

Applying hardware-based compression to the memory hierarchy to reduce

data movement thus becomes beneficial

Prior memory compression techniques are limited to

compressing cache lines

2

CorePrivate

L1/L2

Shared

LLC

Main

Mem

Comp.

Data

Comp.

Data

Data uncompressed

Compressed

Cache

Compressed

Main Mem

More capacity & less traffic

Page 5: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Data movement limits performance and efficiency

A memory access takes 100X the latency and 1000X the energy of a FP operation

Applying hardware-based compression to the memory hierarchy to reduce

data movement thus becomes beneficial

Prior memory compression techniques are limited to

compressing cache lines

2

CorePrivate

L1/L2

Shared

LLC

Main

Mem

Comp.

Data

Comp.

Data

Data uncompressed

Compressed

Cache

Compressed

Main Mem

More capacity & less traffic

To support random accesses,

the memory hierarchy transfers

cache lines between levels

Prior techniques are thus limited

to compressing cache lines

Cache

lines

Cache

lines

Page 6: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Challenges due to compressing at cache-line granularity

3

Page 7: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Challenges due to compressing at cache-line granularity

3

1. Locating the compressed cache line (architecture)

Fixed-size cache lines become variable-size compressed blocks

HW needs to translate uncompressed addresses to compressed blocks

Page 8: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Challenges due to compressing at cache-line granularity

3

1. Locating the compressed cache line (architecture)

Fixed-size cache lines become variable-size compressed blocks

HW needs to translate uncompressed addresses to compressed blocks

2. Compressing cache lines (algorithm)

Cache lines are small, and decompression latency is on the critical path

HW cannot compress more than 64B at a time

Only low-latency algorithms are practical

Page 9: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compressed memory architectures sacrifice

compression ratio for low latency

4

Page 10: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compressed memory architectures sacrifice

compression ratio for low latency

4

They aim to quickly translate uncompressed to compressed addresses

Example: Linearly compressed pages [LCP, Pekhimenko et al., MICRO’13]

Shared

LLC

Original

cache line

address

Compressed

block

address

Page 11: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compressed memory architectures sacrifice

compression ratio for low latency

4

They aim to quickly translate uncompressed to compressed addresses

Example: Linearly compressed pages [LCP, Pekhimenko et al., MICRO’13]

Shared

LLC

Original

cache line

address

Compressed

block

address

4KB page

64B lines

……

Uncompressed

format

Page 12: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compressed memory architectures sacrifice

compression ratio for low latency

4

They aim to quickly translate uncompressed to compressed addresses

Example: Linearly compressed pages [LCP, Pekhimenko et al., MICRO’13]

Shared

LLC

Original

cache line

address

Compressed

block

address

4KB page

64B lines

……

Uncompressed

format

2KB page

32B lines

……

Translation

via the

VM system

Compressed

format

LCP compresses page by page

to leverage VM for translation

Fast and low overhead

LCP forces cache lines in the

same page to compress into

the same size

Sacrifice compression ratio

Page 13: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compressed memory architectures sacrifice

compression ratio for low latency

4

They aim to quickly translate uncompressed to compressed addresses

Example: Linearly compressed pages [LCP, Pekhimenko et al., MICRO’13]

Other techniques make similar tradeoffs

E.g., 4 different sizes for cache lines in a page

Shared

LLC

Original

cache line

address

Compressed

block

address

4KB page

64B lines

……

Uncompressed

format

2KB page

32B lines

……

Translation

via the

VM system

Compressed

format

LCP compresses page by page

to leverage VM for translation

Fast and low overhead

LCP forces cache lines in the

same page to compress into

the same size

Sacrifice compression ratio

[RMC, Ekman and Stenstorm, HPCA’06]

[DMC, Kim et al., PACT’17]

[Compresso, Choukse et al, MICRO’18]

Page 14: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compression algorithms are limited to exploit redundancy

within a cache line to achieve low latency

5

Page 15: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compression algorithms are limited to exploit redundancy

within a cache line to achieve low latency

5

100 100 102 101 103 103 102 104 108 109 109 111Uncompressed layout

Int array

1.1 1.2 1.3

0x18 0x30 0x48

Float array

Reference array

……

……

Example: Base-Delta-Immediate compression [Base-Delta-Immediate, Pekhimenko et al., PACT’12]

Page 16: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compression algorithms are limited to exploit redundancy

within a cache line to achieve low latency

5

100 100 102 101 103 103 102 104 108 109 109 111

100 +

0

+

2

+

1

+

3

+

3

+

2

+

4

108 +

1

+

1

+

3Compressed layout

Work well on arrays: Homogeneous, regular

Uncompressed layout

Int array

1.1 1.2 1.3

0x18 0x30 0x48

……

Float array

Reference array

……

……

64B cache line

[FP-H, Arelakis et al., MICRO’15] [BPC, Kim et al., ISCA’16]

Example: Base-Delta-Immediate compression [Base-Delta-Immediate, Pekhimenko et al., PACT’12]

Page 17: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compression algorithms are limited to exploit redundancy

within a cache line to achieve low latency

5

100 100 102 101 103 103 102 104 108 109 109 111

100 +

0

+

2

+

1

+

3

+

3

+

2

+

4

108 +

1

+

1

+

3Compressed layout

Work well on arrays: Homogeneous, regular

Uncompressed layout

Int array

1.1 1.2 1.3

0x18 0x30 0x48

……

Float array

Reference array

……

……

64B cache line

[FP-H, Arelakis et al., MICRO’15] [BPC, Kim et al., ISCA’16]

1 1

1.6

7

1.5

5

0

0.5

1

1.5

2

FFT SPMV

CO

MPRES

SIO

N R

ATI

O

No compression Prior work

Example: Base-Delta-Immediate compression [Base-Delta-Immediate, Pekhimenko et al., PACT’12]

Page 18: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compression algorithms work poorly on objects

6

Page 19: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compression algorithms work poorly on objects

6

100 1.1 0x18 102 1.3 0x48

Work poorly on objects: Heterogeneous, irregular

Object A1 Object A2

……

Object B Object C

Page 20: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compression algorithms work poorly on objects

6

100 1.1 0x18 102 1.3 0x48

Work poorly on objects: Heterogeneous, irregular

Object A1 Object A2

……

Object B Object C

64B cache line

Little redundancy

within a cache line

Page 21: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Prior compression algorithms work poorly on objects

6

100 1.1 0x18 102 1.3 0x48

Work poorly on objects: Heterogeneous, irregular

Object A1 Object A2

……

Object B Object C

64B cache line

Little redundancy

within a cache line

Array-heavy apps:

61% compression ratio

Object-heavy apps:

14% compression ratio

1 1

1.6

7

1.5

5

0

0.5

1

1.5

2

FFT SPMV

CO

MPRES

SIO

N R

ATI

O

No compression Prior work

1 1 1 1 1 1

1.1

5 1.2

7

1.0

6

1.0

7

1.1 1.1

5

0

0.5

1

1.5

2

H2 SPECJBB PAGERANK COLORING BTREE GUAVACACHE

Page 22: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Objects, not cache lines, are the natural unit of compression

7

Page 23: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Objects, not cache lines, are the natural unit of compression

7

Insight 1:

Object-based applications always follow pointers to access objects

Page 24: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Objects, not cache lines, are the natural unit of compression

7

Object A1 Object B1 Object A2 Object C Object B2

Uncompressed layout

Insight 1:

Object-based applications always follow pointers to access objects

0xFF0x00

Page 25: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Objects, not cache lines, are the natural unit of compression

7

Object A1 Object B1 Object A2 Object C Object B2

Uncompressed layout

Insight 1:

Object-based applications always follow pointers to access objects

Idea 1:

Point directly to the location of compressed objects to avoid

uncompressed-to-compressed address translation!

Object A1 Object B1 Object A2 Object C Object B2

Compressed layout

0xFF0x00

0xDF0x00

Page 26: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Objects, not cache lines, are the natural unit of compression

8

Page 27: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Objects, not cache lines, are the natural unit of compression

8

Insight 2:

There is significant redundancy across objects of the same type

Page 28: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Objects, not cache lines, are the natural unit of compression

8

Insight 2:

There is significant redundancy across objects of the same type

Object A1 Object B1 Object A2 Object C Object B2

Compressed layout

0xDF0x00

Page 29: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Objects, not cache lines, are the natural unit of compression

8

Insight 2:

There is significant redundancy across objects of the same type

Idea 2:

Compress across objects, not within cache lines,

to leverage more redundancy!

Object A1 Object B1 Object A2 Object C Object B2

Compressed layout

∆ A1 ∆ B1 ∆ A2 ∆ C ∆ B2

Further compressed layout

∆ A1 =Bytes that differ from

a shared base object

0xDF0x00

0x8F0x00

Page 30: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Compressing objects would be hard to do on cache hierarchies

9

Page 31: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Compressing objects would be hard to do on cache hierarchies

9

Ideally, we want a memory system that

Moves objects, rather than cache lines

Transparently updates pointers during compression

Page 32: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Compressing objects would be hard to do on cache hierarchies

9

Ideally, we want a memory system that

Moves objects, rather than cache lines

Transparently updates pointers during compression

Therefore, we realize our ideas on Hotpads [Tsai et al., MICRO’18]

A recent object-based memory hierarchy

Page 33: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Baseline system: Hotpads overview

10

Page 34: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Baseline system: Hotpads overview

10

Core L1

pad

L2

pad

L3

pad

Page 35: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Baseline system: Hotpads overview

10

Data array

Managed as a circular buffer using simple

sequential allocation

Stores variable-sized objects compactly

Core L1

pad

L2

pad

L3

pad

Objects

Data Array

Free space

Page 36: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Baseline system: Hotpads overview

10

Data array

Managed as a circular buffer using simple

sequential allocation

Stores variable-sized objects compactly

Core L1

pad

L2

pad

L3

pad

Objects

Data Array

Free space

Obj. A

Page 37: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Baseline system: Hotpads overview

10

Data array

Managed as a circular buffer using simple

sequential allocation

Stores variable-sized objects compactly

Core L1

pad

L2

pad

L3

pad

Objects

Data Array

Free space

Obj. A

Obj. B

Page 38: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Baseline system: Hotpads overview

10

Data array

Managed as a circular buffer using simple

sequential allocation

Stores variable-sized objects compactly

Can store variable-sized compressed objects

compactly too!

Core L1

pad

L2

pad

L3

pad

Objects

Data Array

Free space

Obj. A

Obj. B

Page 39: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Baseline system: Hotpads overview

10

Data array

Managed as a circular buffer using simple

sequential allocation

Stores variable-sized objects compactly

Can store variable-sized compressed objects

compactly too!

C-Tags

Decoupled tag store

Metadata

Pointer? valid? dirty? recently-used?

Core L1

pad

L2

pad

L3

pad

C-Tags

Meta

da

ta

(word

/obje

ct)

Objects

Data Array

Free space

Obj. A

Obj. B

Page 40: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Hotpads moves objects instead of cache lines

11

Page 41: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Hotpads moves objects instead of cache lines

11

L1 Pad L2 Pad Main Mem

A

B

r0r1r2

r3

RegFile

Free

space

Objects

Initial state.

Example object:class ListNode {

int value;ListNode next;

}

0

Page 42: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Hotpads moves objects instead of cache lines

11

L1 Pad L2 Pad Main Mem

A

B

r0r1r2

r3

RegFile

Free

space

Objects

Initial state.

Example object:class ListNode {

int value;ListNode next;

}

0

Program code:int v = A.value;

A

B

r0r1r2r3

A

A copied into L1 pad. 1

Page 43: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Hotpads moves objects instead of cache lines

11

L1 Pad L2 Pad Main Mem

A

B

r0r1r2

r3

RegFile

Free

space

Objects

Initial state.

Example object:class ListNode {

int value;ListNode next;

}

0

Program code:int v = A.value;

A

B

r0r1r2r3

A

A copied into L1 pad. 1

Program code:v = A.next.value;

B copied into L1 pad.B

2

Page 44: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Hotpads moves objects instead of cache lines

11

L1 Pad L2 Pad Main Mem

A

B

r0r1r2

r3

RegFile

Free

space

Objects

Initial state.

Example object:class ListNode {

int value;ListNode next;

}

0

Program code:int v = A.value;

A

B

r0r1r2r3

A

A copied into L1 pad. 1

Program code:v = A.next.value;

B copied into L1 pad.B

2

Hotpads takes control of the

memory layout, hides pointers

from software, and encodes

object information in pointers

Size Object address (48b)

47 04863 50

Fetching size words from the starting address yields the entire object

Page 45: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Hotpads moves objects instead of cache lines

11

L1 Pad L2 Pad Main Mem

A

B

r0r1r2

r3

RegFile

Free

space

Objects

Initial state.

Example object:class ListNode {

int value;ListNode next;

}

0

Program code:int v = A.value;

A

B

r0r1r2r3

A

A copied into L1 pad. 1

Program code:v = A.next.value;

B copied into L1 pad.B

2

Hotpads takes control of the

memory layout, hides pointers

from software, and encodes

object information in pointers

Compressed size Compressed object address (48b)

47 04863 50

Fetching compressed size words from the starting compressed

address yields the entire compressed object

Page 46: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Hotpads updates pointers among objects on evictions

12

Page 47: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Hotpads updates pointers among objects on evictions

12

A (stale)

BA (modified)

BCD

L1 pad is now full,

triggering a bulk

eviction in HW.

L1 pad is full because of

fetched objects or newly-

allocate objects

3

Page 48: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Hotpads updates pointers among objects on evictions

12

A (stale)

BA (modified)

BCD

L1 pad is now full,

triggering a bulk

eviction in HW.

L1 pad is full because of

fetched objects or newly-

allocate objects

3

A

B

B

D

Free

space

After an L1 bulk eviction:

Pointers are updated to

point to the new locations.4

Copied objects (A) are

back to old location

New objects (D) are

sequentially allocated

Page 49: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Hotpads updates pointers among objects on evictions

12

Bulk eviction amortizes the cost of finding and updating pointers across objects

A (stale)

BA (modified)

BCD

L1 pad is now full,

triggering a bulk

eviction in HW.

L1 pad is full because of

fetched objects or newly-

allocate objects

3

A

B

B

D

Free

space

After an L1 bulk eviction:

Pointers are updated to

point to the new locations.4

Copied objects (A) are

back to old location

New objects (D) are

sequentially allocated

Page 50: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Hotpads updates pointers among objects on evictions

12

Bulk eviction amortizes the cost of finding and updating pointers across objects

Since updating pointers already happens in Hotpads,

there is no extra cost to update them to compressed locations!

A (stale)

BA (modified)

BCD

L1 pad is now full,

triggering a bulk

eviction in HW.

L1 pad is full because of

fetched objects or newly-

allocate objects

3

A

B

B

D

Free

space

After an L1 bulk eviction:

Pointers are updated to

point to the new locations.4

Copied objects (A) are

back to old location

New objects (D) are

sequentially allocated

Page 51: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Zippads: Locating objects without translations

13

Page 52: Compress Objects, Not Cache Lines: An Object-Based …people.csail.mit.edu/.../2019.zippads.asplos.slides.pdf · 2019-04-15 · Data movement limits performance and efficiency A memory

Zippads: Locating objects without translations

13

Zippads leverages Hotpads to

Manipulate and compress objects rather than cache lines

Avoid translation by pointing directly to compressed objects during evictions

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Zippads: Locating objects without translations

13

Zippads leverages Hotpads to

Manipulate and compress objects rather than cache lines

Avoid translation by pointing directly to compressed objects during evictions

L1

PadCore

L2

Pad

L3

Pad

Main

Memory

Uncompressed

Compress

Decompress

Compressed

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Zippads: Locating objects without translations

13

Zippads leverages Hotpads to

Manipulate and compress objects rather than cache lines

Avoid translation by pointing directly to compressed objects during evictions

L1

PadCore

L2

Pad

L3

Pad

Main

Memory

Uncompressed

Compress

Decompress

Compressed

Compress both on-chip

and off-chip memories

Neutral to the

algorithm

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Zippads compresses objects when they move

14

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Zippads compresses objects when they move

14

Objects are compressed during bulk object evictions

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Zippads compresses objects when they move

14

Objects are compressed during bulk object evictions

Objects

Free space

L3 padCase 1: Newly moved objects

L2 pad

Objects start their lifetime uncompressed

in private levels

Object

(uncompressed)

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Zippads compresses objects when they move

14

Objects are compressed during bulk object evictions

Objects

Free space

L3 padCase 1: Newly moved objects

L2 pad

Objects start their lifetime uncompressed

in private levels

Object

(uncompressed)

Compression

HWNew object

(compressed)

When objects are evicted into a

compressed level, they are compressed in

that level and store compactly

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Zippads compresses objects when they move

14

Objects are compressed during bulk object evictions

Objects

Free space

L3 padCase 1: Newly moved objects

L2 pad

Objects start their lifetime uncompressed

in private levels

Object

(uncompressed)

Compression

HWNew object

(compressed)

When objects are evicted into a

compressed level, they are compressed in

that level and store compactly

Piggyback the bulk eviction process to find and update

all pointers at once, amortizing update costs

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Zippads compresses objects when they move

15

Objects are compressed during bulk object evictions

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Zippads compresses objects when they move

15

Objects are compressed during bulk object evictions

L2 pad

Case 2: Dirty writeback

Old object

(compressed)

Objects

Free space

Compression

HW

Objects

Updated object

(uncompressed)

L3 pad

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Zippads compresses objects when they move

15

Objects are compressed during bulk object evictions

Updated object

(compressed)

Free space

Unused space

Objects

Objects

L2 pad

Case 2: Dirty writeback

Old object

(compressed)

Objects

Free space

Compression

HW

Objects

Updated object

(uncompressed)

L3 pad

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Zippads compresses objects when they move

15

Objects are compressed during bulk object evictions

Updated object

(compressed)

Free space

Unused space

Objects

Objects

Forwarding thunk

Unused space

Updated object

(compressed)

Objects

Objects

L2 pad

Case 2: Dirty writeback

Old object

(compressed)

Objects

Free space

Compression

HW

Objects

Updated object

(uncompressed)

L3 pad

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Zippads compresses objects when they move

15

Objects are compressed during bulk object evictions

Updated object

(compressed)

Free space

Unused space

Objects

Objects

Forwarding thunk

Unused space

Updated object

(compressed)

Objects

Objects

L2 pad

Case 2: Dirty writeback

Old object

(compressed)

Objects

Free space

Compression

HW

Objects

Updated object

(uncompressed)

Periodic compaction reclaims those unused spaces

(Bulk eviction in on-chip pads, GC in main memory)

L3 pad

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Zippads uses pointers to accelerate decompression

16

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Zippads uses pointers to accelerate decompression

16

Every object access starts with a pointer!

Pointers are updated to the compressed locations, so no translation is needed

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Zippads uses pointers to accelerate decompression

16

Every object access starts with a pointer!

Pointers are updated to the compressed locations, so no translation is needed

Prior work shows it’s beneficial to use different algorithms for various patterns

Zippads encodes compression metadata in pointers to decompress objects quickly

Compressed size Compressed object address (48-X bits)

48 48-X 063 50

Compression encoding bits (X bits)

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Zippads uses pointers to accelerate decompression

16

Every object access starts with a pointer!

Pointers are updated to the compressed locations, so no translation is needed

Prior work shows it’s beneficial to use different algorithms for various patterns

Zippads encodes compression metadata in pointers to decompress objects quickly

Zippads thus knows how to locate and what decompression algorithm to use

when accessing compressed objects with pointers

Compressed size Compressed object address (48-X bits)

48 48-X 063 50

Compression encoding bits (X bits)

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COCO: Cross-object-compression algorithm

17

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COCO: Cross-object-compression algorithm

17

COCO exploits similarity across objects with shared base objects

A collection of representative objects

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COCO: Cross-object-compression algorithm

17

COCO exploits similarity across objects with shared base objects

A collection of representative objects

Uncompressed

object

Base object

Compression

HW

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COCO: Cross-object-compression algorithm

17

COCO exploits similarity across objects with shared base objects

A collection of representative objects

Uncompressed

object

Base object

Compression

HW

Pointer to the

base object

Bytes that are

different

Compressed object

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COCO: Cross-object-compression algorithm

18

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COCO: Cross-object-compression algorithm

18

COCO requires accessing base objects for every compression/decompression

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COCO: Cross-object-compression algorithm

18

COCO requires accessing base objects for every compression/decompression

Caching base objects avoids extra latency and bandwidth to fetch them

A small (8KB) base object cache works well

Few types account for most accesses

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See paper for additional features and details

19

Compressing large objects with subobjects and allocate-on-access

COCO compression/decompression circuit RTL implementation details

Details on integrating Zippads and COCO

Discussion on using COCO with conventional memory hierarchies

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Evaluation

20

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Evaluation

20

We simulate Zippads using MaxSim [Rodchenko et al., ISPASS’17]

A simulator combining ZSim and Maxine JVM

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Evaluation

20

We simulate Zippads using MaxSim [Rodchenko et al., ISPASS’17]

A simulator combining ZSim and Maxine JVM

We compare 4 schemes

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Evaluation

20

We simulate Zippads using MaxSim [Rodchenko et al., ISPASS’17]

A simulator combining ZSim and Maxine JVM

We compare 4 schemes

Uncomp: Conventional 3-level cache hierarchy with no compression

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Evaluation

20

We simulate Zippads using MaxSim [Rodchenko et al., ISPASS’17]

A simulator combining ZSim and Maxine JVM

We compare 4 schemes

Uncomp: Conventional 3-level cache hierarchy with no compression

CMH: Compressed memory hierarchy

LLC: VSC [Alameldeen and Wood, ISCA’04] Main memory: LCP [Pekhimenko et al., MICRO’13]

Algorithm: HyComp-style hybrid algorithm [Arelakis et al., MICRO’15]

BDI [Pekhimenko et al., PACT’12] + FPC [Alameldeen and Wood, ISCA’04]

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Evaluation

20

We simulate Zippads using MaxSim [Rodchenko et al., ISPASS’17]

A simulator combining ZSim and Maxine JVM

We compare 4 schemes

Uncomp: Conventional 3-level cache hierarchy with no compression

CMH: Compressed memory hierarchy

LLC: VSC [Alameldeen and Wood, ISCA’04] Main memory: LCP [Pekhimenko et al., MICRO’13]

Algorithm: HyComp-style hybrid algorithm [Arelakis et al., MICRO’15]

BDI [Pekhimenko et al., PACT’12] + FPC [Alameldeen and Wood, ISCA’04]

Hotpads: The baseline system we build on

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Evaluation

20

We simulate Zippads using MaxSim [Rodchenko et al., ISPASS’17]

A simulator combining ZSim and Maxine JVM

We compare 4 schemes

Uncomp: Conventional 3-level cache hierarchy with no compression

CMH: Compressed memory hierarchy

LLC: VSC [Alameldeen and Wood, ISCA’04] Main memory: LCP [Pekhimenko et al., MICRO’13]

Algorithm: HyComp-style hybrid algorithm [Arelakis et al., MICRO’15]

BDI [Pekhimenko et al., PACT’12] + FPC [Alameldeen and Wood, ISCA’04]

Hotpads: The baseline system we build on

Zippads: With and without COCO

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Evaluation

20

We simulate Zippads using MaxSim [Rodchenko et al., ISPASS’17]

A simulator combining ZSim and Maxine JVM

We compare 4 schemes

Uncomp: Conventional 3-level cache hierarchy with no compression

CMH: Compressed memory hierarchy

LLC: VSC [Alameldeen and Wood, ISCA’04] Main memory: LCP [Pekhimenko et al., MICRO’13]

Algorithm: HyComp-style hybrid algorithm [Arelakis et al., MICRO’15]

BDI [Pekhimenko et al., PACT’12] + FPC [Alameldeen and Wood, ISCA’04]

Hotpads: The baseline system we build on

Zippads: With and without COCO

Workloads: 8 Java apps with large memory footprint from different domains

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Zippads improves compression ratio

21

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Zippads improves compression ratio

21

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Zippads improves compression ratio

21

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Zippads improves compression ratio

21

Same algo as CMH

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Zippads improves compression ratio

21

Same algo as CMH CMH algo + COCO

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Zippads improves compression ratio

21

Same algo as CMH CMH algo + COCO

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Zippads improves compression ratio

21

Same algo as CMH CMH algo + COCO

Only 24% better

than Uncomp.

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Zippads improves compression ratio

21

70%

better

Same algo as CMH CMH algo + COCO

Only 24% better

than Uncomp.

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Zippads improves compression ratio

21

70%

better

2X

better

Same algo as CMH CMH algo + COCO

Only 24% better

than Uncomp.

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Zippads improves compression ratio

21

1. Both Zippads and CMH work

well in array-heavy apps

70%

better

2X

better

Same algo as CMH CMH algo + COCO

Only 24% better

than Uncomp.

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Zippads improves compression ratio

21

1. Both Zippads and CMH work

well in array-heavy apps

2. Zippads works much better than

CMH in object-heavy apps

70%

better

2X

better

Same algo as CMH CMH algo + COCO

Only 24% better

than Uncomp.

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Zippads reduces memory traffic and improves performance

22

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Zippads reduces memory traffic and improves performance

22

Lower is better

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Zippads reduces memory traffic and improves performance

22

1. CMH reduces traffic by 15%

with data compression

Lower is better

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Zippads reduces memory traffic and improves performance

22

2. Hotpads reduces traffic by

66% with object-based data

movement

1. CMH reduces traffic by 15%

with data compression

Lower is better

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Zippads reduces memory traffic and improves performance

22

2. Hotpads reduces traffic by

66% with object-based data

movement

1. CMH reduces traffic by 15%

with data compression

3. Zippads combines the benefits

of both, reducing traffic by 2X

(70% less traffic than CMH)

Lower is better

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Zippads reduces memory traffic and improves performance

22

2. Hotpads reduces traffic by

66% with object-based data

movement

1. CMH reduces traffic by 15%

with data compression

3. Zippads combines the benefits

of both, reducing traffic by 2X

(70% less traffic than CMH)

Similar trend in performance:

Zippads is 24% faster than CMH;

30% faster than Uncomp.

Lower is betterHigher is better

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Zippads also provides benefits on compiled code

23

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Zippads also provides benefits on compiled code

23

We study two object-heavy benchmarks written in C/C++

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Zippads also provides benefits on compiled code

23

We study two object-heavy benchmarks written in C/C++

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Zippads also provides benefits on compiled code

23

We study two object-heavy benchmarks written in C/C++

Zippads again works much better than

CMH in compressing memory footprint

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Zippads also provides benefits on compiled code

23

We study two object-heavy benchmarks written in C/C++

Zippads again works much better than

CMH in compressing memory footprint

Zippads improves both memory

traffic and performance the most

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See paper for more evaluation results

24

Zippads hardware storage overhead analysis

COCO RTL implementation result

Comparison against CMH with hardware support for memory management

Zippads analysis

Base object cache size sensitivity study

Overflow frequency

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We propose the first object-based compressed memory hierarchy

25

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We propose the first object-based compressed memory hierarchy

25

Prior compressed memory hierarchies focus on compressing cache lines

Require address translation and work poorly on object-heavy apps

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We propose the first object-based compressed memory hierarchy

25

Prior compressed memory hierarchies focus on compressing cache lines

Require address translation and work poorly on object-heavy apps

Object-based apps provide new opportunities for compression

Always access objects through pointers

Have significant redundancy across objects, not within cache lines

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We propose the first object-based compressed memory hierarchy

25

Prior compressed memory hierarchies focus on compressing cache lines

Require address translation and work poorly on object-heavy apps

Object-based apps provide new opportunities for compression

Always access objects through pointers

Have significant redundancy across objects, not within cache lines

We present techniques that compress objects, not cache lines

Zippads rewrites pointers to avoid uncompressed-to-compressed address translation

COCO compresses across objects to leverage more redundancy

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Thanks! Questions?

26

Prior compressed memory hierarchies focus on compressing cache lines

Require address translation and work poorly on object-heavy apps

Object-based apps provide new opportunities for compression

Always access objects through pointers

Have significant redundancy across objects, not within cache lines

We present techniques that compress objects, not cache lines

Zippads rewrites pointers to avoid uncompressed-to-compressed address translation

COCO compresses across objects to leverage more redundancy


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